Unit 4- Logic Gates

February 6, 2019 | Author: Traian Vladu | Category: Boolean Algebra, Digital Electronics, Bit, Logic Gate, Electronic Engineering
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Digital Electronic Systems Unit 4

Logic Gates The term gate is used to describe describe a circuit that performs performs a basic logic logic operation. operation. All gates gates have have both both inputs inputs and outputs outputs.. The The number number of inputs inputs can vary dependin depending g on the gate in question but there is generally only one output. As discu discusse ssed d in unit unit 1 ther theree are three three prim primary ary logi logicc gate gatess from from !hic !hich h by vari variou ouss combinations all other gates can be made. These are the "#T $ate %inverter& the A"D $ate and the #' $ate. This unit revisits these gates gates and proceeds to introduce introduce a number of other  gates.

NOT Gate (Inverter)

The "#T gate has a single input input and a single output. The gate very simply inverts the input. input. The symbol and truth table for the "#T gate are ar e sho!n belo!.  Symbol  nput A

#utput (

The circle on the symbol indicates that the output ( is the inverse %or complement& of the input A. Truth Table

A * 1

( 1 *

The above table is +no!n as a truth table. )n this table every possible combination combination of input is !ritten !ritten in order order and the output output is determ determined ined for for each input. input. There There are ,   possible comb combin inati ation onss in the case case of an n-inpu n-inputt gate gate.. )n other other !ord !ords s ther theree are t!o possib possible le combinations in the case of a one-input gate four possible combinations of input in the case of a t!o-input gate etc.. n

 Boolean Expression Expression ( = A

or verbally ( / A bar0 oolean oolean algebra is the mathematics of digital systems. systems. A letter letter designates designates a variable variable and a  bar over a letter designates the inverse %or complement& of the variable. 2ore generally a bar  over a quantity designates the inverse %or complement& of that quantity.

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Digital Electronic Systems Unit 4

AND Gate

The A"D A"D gate has multiple inputs and a single output. The output of any A"D gate is 3)$3 only !hen all  of  of its inputs are 3)$3.  Symbol  )nput A

#utput (

)nput 1

)n this case the output is 3)$3 %or logic level 1& only if the inputs A and  are 3)$3 %or  logic level 1&. Thus !e can !rite a table defining defining all the possible possible states that might occur for  this t!o input A"D gate. Truth Table

A * * 1 1

 * 1 * 1

( * * * 1

 Boolean Expression Expression F = A . B

or verbally ( / A and 0 The A"D gate performs oolean 2ultiplication as illustrated in the timing diagram belo!. oolean multiplication follo!s the same rules as binary multiplication as discussed in unit ,. Timing Diagram

)"4UT A

)"4UT 1

#UT4UT

Timing Diagram for an A"D gate

,

Digital Electronic Systems Unit 4

3-Input AND Gate

 Symbol  )nput A

#utput (

)nput 1 )nput 5

Truth Table

A * * * * 1 1 1 1

 * * 1 1 * * 1 1

5 * 1 * 1 * 1 * 1

( * * * * * * * 1

As can be seen !hen !e have a three input A"D gate the same rule applies as did for the t!o input gate i.e. A66 the inputs must be 3)$3 if !e are to achieve a 3)$3 on the output.

 Boolean Expression Expression F = A . B . C

#r more commonly it is !ritten as F = ABC

)n boolean e7pressions !hen variables are !ritten ne7t to each other !ith no symbol in  bet!een it is implicitly assumed that they are A"Ded. A"Ded.

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Digital Electronic Systems Unit 4

O Gate

The #' gate can have t!o or more more inputs. The output of an #' #' gate is 3)$3 !hen one or  more of the inputs are 3)$3.

 Symbol  )nput A #utput ( )nput 1

Truth Table

A * * 1 1

 * 1 * 1

( * 1 1 1

 Boolean Expression Expression F=A!B

#r verbally ( / A or 0 The #' gate gate perfor performs ms oolean oolean Addit Addition ion - not to be confus confused ed !ith !ith binary binary addition addition as discussed in unit ,. Timing Diagram

)"4UT A

)"4UT 1

#UT4UT

Timing Diagram for an #' gate

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Digital Electronic Systems Unit 4

3-Input O Gate

 Symbol  )nput A )nput 1

#utput (

)nput 5

Truth Table

A * * * * 1 1 1 1

 * * 1 1 * * 1 1

5 * 1 * 1 * 1 * 1

( * 1 1 1 1 1 1 1

Again it can be seen from the table that the output is 6#9 only !hen all the inputs are 6#9.

 Boolean Expression Expression F=A!B!C

 "o! that the three basic gates have been considered they can be combined c ombined to generate other  operations.

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Digital Electronic Systems Unit 4

NAND Gate

This is a combination of the A"D gate and the "#T gate in that order.  Symbol  )nput A #utput ( )nput 1

)nput A A1

#utput ( = A1

)nput 1

oth representa representations tions are equivalent equivalent.. "ote that the bubble0 bubble0 %o& in the top symbol indicates the presence of an inverter on on the output output line. The top representation is more common. The  bottom representation indicates ho! a "A"D gate may be bro+en do!n. Truth Table

A * * 1 1

 * 1 * 1

( 1 1 1 *

 Boolean Expression Expression F = A

#r more commonly commonly

F

=



B

AB

As can be seen from the table the inputs are A"Ded together and then "#Ted %inverted& to give the final output. output. The timing diagram sho!n sho!n belo! illustrates this. Timing Diagram )"4UT A

)"4UT 1

#UT4UT

Timing Diagram for a "A"D gate

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Digital Electronic Systems Unit 4

NO Gate

This is a combination of the #' gate and the "#T gate in that order.  Symbol  )nput A #utput ( )nput 1

)nput A A#' gate and the "#T gate %)nverter& in that order.  Symbol  nput A #utput ( nput 1

Truth Table

A * * 1 1

 * 1 * 1

( 1 * * 1

As can be seen seen from from the the truth truth tabl table e the the inpu inputs ts are >#'e >#'ed d toge togeth ther er and and then then "#T "#Ted %inverted& to give the final output. 

Digital Electronic Systems Unit 4

 Boolean Expression Expression ( = A⊕1

Timing Diagram )"4UT A

)"4UT 1

#UT4UT

Timing Diagram for an E7clusive "#' %>"#'& $ate

Direct app%ications o& t'e asic %ogic operations

%Terminology %Terminology - A it is a inary Digit. A byte is made up of @ bits. & 6ogic gates are the building bloc+s of computers. 2ost of the functions in a computer computer !ith the e7ception of certain types of memory are implemented !ith logic gates used on a very large scale. (or e7ample a microprocessor !hich is the main part of of a computer is made up of hundreds and thousands of logic gates. App%ication  -  5omputers need to selectively manipulate certain bits in one or more bytes of  data. Selective bit manipulations manipulations are achieved using a mas+. (or e7ample to clear %ma+e %ma+e all *?s& the right four bits in a data byte but +eep the information in the left four bits the data  byte is A"Ded !ith 1111 1111****. ****. "otice that any bit A"Ded !ith ero !ill be * and any bit A"Ded !ith one !ill remain the same.  Ex 1: 9hat is the resulting r esulting byte if 1*1*1*11, is A"Ded !ith the mas+ 1111**** ,F App%ication * + Another mas+ operation that is used in computer programming selectively ma+es certain certain bits in a data byte equal to 1 !hile not affecting affecting any other other bit. This is called setting setting %setting %setting a bit to 1&. This is achieved achieved using using the #' operatio operation. n. A mas+ is used used that contains a 1 in any position !here a data bit is to be set.  Ex 2: 3o! !ould one force the most significant bit in a data byte to equal 1 but leave all of  the other bits unchangedF

1*

Digital Electronic Systems Unit 4

Active %o, inputs

An active lo! input is represented represented by either a small circle at the input input point to a gate or by a bar0 bar0 over the input variabl variablee on a data data sheet. This This small circle circle represent representss a "#T gate %inverter&. 5onsider 5onsider for e7ample e7ample 5S - chip select an active active lo! input to an integrate integrated d circuit. 5hip select is enabled only !h !hen en the input voltage voltage is lo!. The bar0 indicates indicates that the input is active lo!. Sho!n belo! is an e7ample of an A"D gate !ith active lo! inputs. )nput A #utput ( )nput 1

)nput A

A #utput ( = A.1

)nput 1

1

Truth Table

A * * 1 1

 * 1 * 1

( 1 * * *

Timing Diagram )"4UT A

)"4UT 1

#UT4UT

Timing diagram for an A"D gate !ith active lo! inputs.

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