UNIT 3 Mechatronics

UNIT – III

MICROPROCESSOR 8085

INTRODUCTION: Ø The microprocessor is a clock-driven semiconductor device consisting of electronic logic circuits manufactured by using either a large-scale integration (LSI) or very-large-scale integration (VLSI) technique. Ø The microprocessor is capable of performing various computing functions and making decisions to change the sequence of program execution. In large computers, a CPU implemented on one or more circuit boards performs these computing functions. Ø The microprocessor is in many ways similar to the CPU, but includes all the logic circuitry, including the control unit, on one chip. Ø The microprocessor can be divided into three segments for the sake of clarity, arithmetic/logic unit (ALU), register array, and control unit.

Arithmetic/Logic Unit: This is the area of the microprocessor where various computing functions are performed on data. The ALU unit performs such arithmetic operations as addition and subtraction, and such logic operations as AND, OR, and exclusive OR. Register Array: This area of the microprocessor consists of various registers identified by letters such as B, C, D, E, H, and L. These registers are primarily used to store data temporarily during the execution of a program and are accessible to the user through instructions. Control Unit: The control unit provides the necessary timing and control signals to all the operations in the microcomputer. It controls the flow of data between the microprocessor and memory and peripherals. Memory: Memory stores such binary information as instructions and data, and provides that information to the microprocessor whenever necessary. To execute programs, the microprocessor reads instructions and data from memory and

performs the computing operations in its ALU section. Results are either transferred to the output section for display or stored in memory for later use. Read-Only memory (ROM) and Read/Write memory (R/WM), popularly known as RandomAccess memory (RAM). 1. The ROM is used to store programs that do not need alterations. The monitor program of a single-board microcomputer is generally stored in the ROM. This program interprets the information entered through a keyboard and provides equivalent binary digits to the microprocessor. Programs stored in the ROM can only be read; they cannot be altered. 2. The Read/Write memory (RIWM) is also known as user memory It is used to store user programs and data. In single-board microcomputers, the monitor program monitors the Hex keys and stores those instructions and data in the R/W memory. The information stored in this memory can be easily read and altered. I/O (Input/Output): It communicates with the outside world. I/O includes two types of devices: input and output; these I/O devices are also known as peripherals. Ø System Bus: The system bus is a communication path between the microprocessor and peripherals: it is nothing but a group of wires to carry bits MICROPROCESSOR ARCHITECTURE AND ITS OPERATIONS:

Architecture of 8085 Microprocessor

Ø Address Bus: The address bus is a group of 16 lines generally identified as A0 to A15. The address bus is unidirectional: bits flow in one direction —from the MPU to peripheral devices. The MPU uses the address bus to perform the first function: identifying a peripheral or a memory location.

8085 Bus Structure Data Bus: The data bus is a group of eight lines used for data flow. These lines are bidirectional —data flow in both directions between the MPU and memory and peripheral devices. The MPU uses the data bus to perform the second function: transferring binary information .The eight data lines enable the MPU to manipulate 8bit data ranging from 00 to FF (28 = 256 numbers). The largest number that can appear on the data bus is 11111111. Control Bus: The control bus is comprised of various single lines that carry synchronization signals, providing timing signals. The MPU generates specific control signals for every operation it performs. These signals are used to identify a device type with which the MPU intends to communicate. Registers:

The 8085 programmable register

The 8085 have six general-purpose registers to perform the first operation listed above; that is, to store 8-bit data during program execution. These registers are identified as B, C, D, E, H, and L. They can be combined as register pairs —BC, DE, and HL —to perform some 16-bit operations. Ø Accumulator: The accumulator is an 8-bit register that is part of the arithmetic/logic unit (ALU). This register is used to store 8-bit data and to perform arithmetic and logical operations. The result of an operation is stored in the accumulator. The accumulator is also identified as register A. Ø Flags: The ALU includes five flip-flops that are set or reset according to the result of an opera tion. The microprocessor uses them to perform the third operation; namely, testing for data conditions. They are Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags. The most commonly used flags are Sign, Zero, and Carry; the others will be explained as necessary. The bit position for the flags in flag register is, D7 D6 D5 D4 D3 D2 D1 D0 S

(1)

(2) (3) (4) (5)

Z

AC

P

CY

Sign Flag (S): After execution of any arithmetic and logical operation, if D7 of the result is 1, the sign flag is set. Otherwise it is reset. D7 is reserved for indicating the sign; the remaining is the magnitude of number. If D7 is 1, the number will be viewed as negative number. If D7 is 0, the number will be viewed as positive number. Zero Flag (z): If the result of arithmetic and logical operation is zero, then zero flag is set otherwise it is reset. Auxiliary Carry Flag (AC): If D3 generates any carry when doing any arithmetic and logical operation, this flag is set. Otherwise it is reset. Parity Flag (P): If the result of arithmetic and logical operation contains even number of 1’ s then this flag will be set and if it is odd number of 1’ s it will be reset. Carry Flag (CY): If any arithmetic and logical operation results any carry then carry flag is set otherwise it is reset.

Program Counter (PC): Ø This 16-bit register deals with the fourth operation, sequencing the execution of instructions. This register is a memory pointer. Ø The microprocessor uses this register to sequence the execution of instructions. The function of the program counter is to point to the memory address from which the next byte is to be fetched. Ø When a byte (machine code) is being fetched, the program counter is incremented by one to point to the next memory location. Stack Pointer (Sp): The stack pointer is also a 16-bit register used as a memory pointer; initially, it will be called the stack pointer register to emphasize that it is a register. It points

to a memory location in R/W memory, called the stack. The beginning of the stack is defined by loading a 16-bit address in the stack pointer (register). Temporary Register: It is used to hold the data during the arithmetic and logical operations. Instruction Register: When an instruction is fetched from the memory, it is loaded in the instruction register. Instruction Decoder: It gets the instruction from the instruction register and decodes the instruction. It identifies the instruction to be performed. Serial I/O Control: It has to control signals named SID and SOD for serial data transmission. Timing and Control unit: It has control and status signals. It provide control signal to synchronize the components of microprocessor and timing for instruction to perform the operation. Interrupt Control Unit: It is used to receive an interrupt signal for process the operation and send an acknowledgement for receiving the interrupt signal.

I/O INTERFACING: The two methods of data transfer are: : One bit is transferred using one data line • Serial I/O • Parallel I/O : Data can enter (or exit) in groups of eight bits using the entire data bus. Thus the I/O devices (Keyboards and displays) can be interfaced using two methods namely: • Peripheral-mapped I/O: The device is identified with an 8-bit address and enabled by I/O – related control signals. • Memory-mapped I/O: The device is identified with a 16-bit address and enabled by memory related control signals. Concepts Review for peripheral mapped I/O a) When an I/O instruction is executed, 8085 places the device address (Port number) on the de multiplexed low – order and high – order address bus. b) The address is decoded to generate the pulse corresponding to the device. c) The device address pulse is AND ed with the appropriate control signals like IO/M, RD and WR to assert the I/O device. d) A latch is used for an output port and a tri-state buffer is used for an input port.. e) The address bus can be decoded by using either the absolute or the linear select decoding reduces the component cost but the I/O device ends up with multiple addresses.

Memory Mapped I/O : Here, the input and output devices are assigned and identified by 16-bit addresses. To transfer data between 8085 and I/C devices, memory – related instructions like LDA, STA etc are used. The control signals MEMR and MEMW should be connected to I/O devices. STA 8000H; Address 2050H; stores the contents of A to 8000. 2050 32; 2051 00; 2052 80; 8085 requires 4 Machine cycles to execute STA; Instruction fetch and decode in M1; read 2051 and 2052 in M2 an M3; In M4 8085 places the entire address (8000H) on the address lines, the contents of the accumulator on data bus and generates MEMW Characteristics 1. Device address 2. Control Signals 3. Instructions

4. Data transfer 5.Maximum number of I/O 6. Execution 7. Hardware 8. Other features

Memory-Mapped I/O 16 Bit RD / WR (MEMR / MEMW) Memory related instructions LDA, STA, MOV, ADD, SUB Between any register and I/O 64K memory shared between I/O and system memory. 13 T States (LDA, STA) 7 T States (MOV) More hardware required to decode 16 bit address Arithmetic or Logical operations can be performed

Peripheral I/O 8 Bit IO/M , RD / WR (IOR, IOW) IN, OUT

Between I/O and Accumulator 256 Input; 256 Output 10 T States Less hardware to decode 8 bit address Not Possible.

8085 INSTRUCTION SET: The 8085 instruction set can be classified into the following five functional headings. 1. DATA TRANSFER INSTRUCTIONS : Includes the instructions that moves (copies) data between registers or between memory locations and registers. In all data transfer operations the content of source register is not altered. Hence the data transfer is copying operation. 2. ARITHMETIC INSTRUCTIONS: Includes the instructions, which performs the addition, subtraction, increment or decrement operations. The flag conditions are altered after execution of an instruction in this group.

3. LOGICAL INSTRUCTIONS: The instructions which performs the logical operations like AND, OR, EXCLUSIVE- OR, complement, compare and rotate instructions are grouped under this heading. The flag conditions are altered after execution of an instruction in this group. 4. BRANCHING INSTRUCTIONS: The instructions that are used to transfer the program control from one memory location to another memory location are grouped under this heading. 5. MACHINE CONTROL INSTRUCTIONS: Includes the instructions related to interrupts and the instruction used to halt program execution. 1. ACI: Add Immediate to Accumulator with Carry. Description: The 8-bit data (operand) and the Carry flag are added to the contents of the accumulator, and the result is stored in the accumulator. All flags are modified to reflect the result of the addition. 2. ADC: Add Register to Accumulator with Carry Description: The contents of the operand (register or memory) and the Carry flag are added to the contents of the accumulator and the result is placed in the accumulator. The contents of the operand are not altered; however, the previous Carry flag is reset. All flags are modified to reflect the result of the addition. 3. ADD: Add Register to Accumulator Description: The contents of the operand (register or memory) are added to the contents of the accumulator and the result is stored in the accumulator. If the operand is a memory location, that is indicated by the 16-bit address in the HL register. All flags are modified to reflect the result of the addition. 4. ADI: Add Immediate to Accumulator Description : The 8-bit data (operand) are added to the contents of the accumulator, and the result is placed in the accumulator. All flags are modified to reflect the result of the addition. 5. ANA: Logical AND with Accumulator Description: The contents of the accumulator are logically AND ed with contents of the operand (register or memory), and the result is placed in accumulator. If the operand is a memory location, its address is specified by contents of HL registers. Flags S, Z, P are modified to reflect the result of operation. CY is reset. In 8085 AC is set. 6. ANI: AND Immediate with Accumulator

the the the the

Description: The contents of the accumulator are logically AND ed with the 8-bit data (operand) and the results are placed in the accumulator. Flags S, Z, P are modified to reflect the results of the operation. CY is reset. In 8085, AC is set. 7. CALL: Unconditional Subroutine Call Description: The program sequence is transferred to the address specified by the operand. Before the transfer, the address of the next instruction to CALL (the contents of the program counter) is pushed on the stack. 8. CMA: Complement Accumulator Description: The contents of the accumulator are complemented. No flags are affected. 9. CMC: Complement Carry. Description: The carry flag is complemented. 10. CMP: Compare with Accumulator. Description: The contents of the operand (register or memory) are compared with the contents of the accumulator. 11. CPI: Compare Immediate with Accumulator Description: The second byte (8-bit data) is compared with the contents of the accumulator. 12. DAA: Decimal-Adjust Accumulator Description: The contents of the accumulator are changed from a binary value to two 4-bit binary-coded decimal (BCD) digits. This is the only instruction that uses the auxiliary flag (internally) to perform the binary-to-BCD conversion. Flags S, Z, AC, P. CY flags are altered to reflect the results of the operation. 13. DAD: Add Register Pair to H and L Registers Description: The 16-bit contents of the specified register pair are added to the contents of the HL register and the sum is saved in the HL register. The contents of the source register pair are not altered. If the result is larger than 16 bits the CY flag is set. No other flags are affected. 14. DCR: Decrement Source by 1 Description: The contents of the designated register/memory are decremented by 1 and the results are stored in the same place. If the operand is a memory location, it is specified by the contents of the HL register pair. Flags S. Z, P, AC are modified to reflect the result of the operation. CY is not modified. 15. DCX: Decrement Register Pair by 1

Description: The contents of the specified register pair are decremented by 1. This instruction views the contents of the two registers as a 16-bit number. No flags are affected. 16. DI: Disable Interrupts Description: The Interrupt Enable flip-flop is reset and all the interrupts except the TRAP (8085) are disabled. No flags are affected. 17. El: Enable Interrupts Description: The Interrupt Enable flip-flop is set and all interrupts are enabled. No flags are affected. 18. HLT: Halt and Enter Wait State Description: The MPU finishes executing the current instruction and halts any further execution. The MPU enters the Halt Acknowledge machine cycle and Wait states are inserted in every clock period. The address and the data bus are placed in the high impedance state. The contents of the registers are unaffected during the HLT state. An interrupt or reset is necessary to exit from the Halt state. No flags are affected. 19. IN: Input Data to Accumulator from a Port with 8-bit Address Description: The contents of the input port designated in the operand are read and loaded into the accumulator. No flags are affected. 20. INR: Increment Contents of Register/Memory by 1 Description: The contents of the designated register/memory are incremented by I and the results are stored in the same place. If the operand is a memory location, it is specified by the contents of HL register pair. Flags S. Z, P, AC are modified to reflect the result of the operation. CY is not modified. 21. INX: Increment Register Pair by 1 Description: The contents of the specified register pair are incremented by 1. The instruction views the contents of the two registers as a 16-bit number. No flags are affected. 22. JMP: Jump Unconditionally. Description: The program sequence is transferred to the memory location specified by the 16-bit address. This is a 3-byte instruction; the second byte specified the loworder byte and the third byte specifies the high-order byte. No flags are affected. Jump Conditionally: Description: Jump on carry Jump on No carry Jump on Positive Jump on minus Jump on Parity Even

Jump on parity Odd Jump on Zero Jump on No Zero 23. LDA: Load accumulator Direct Description: The contents of a memory location, specified by a 16-bit address in the operand, are copied to the accumulator. The contents of the source are not altered. This is a 3-byte instruction; the second byte specifies the low-order address and the third byte specifies the high-order address. No flags are affected. 24. LDAX: Load Accumulator Indirect. Description: The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the accumulator. The contents of either the register pair or the memory location are not altered. No flags are affected. 25. LD: Load H and L Registers Direct Description: The instruction copies the contents of the memory location pointed out by the 16-bit address in register L and copies the contents of the next memory location in register H. The contents of source memory locations are not altered. No flags are affected. 26. Load Register Pair Immediate Description: The instruction loads 16-bit data in the register pair designated in the operand. This is a 3-byte instruction; the second byte specifies the low-order byte and third byte specifies the high-order byte. 27. MOV: Move – Copy from Source to Destination. Description: This instruction copies the contents of the source register into the destination register; the contents of the source register are not altered. If one of the operand is a memory location, it is specified by the contents of HL registers. No flags are affected. 28. MVI: Move Immediate 8-Bit Description: The 8-bit data is stored in the destination register or memory. If the operand is a memory location, it is specified by the contents of HL registers. No flags are affected. 29. NOP: No Operation Description: No operation is performed. The instruction is fetched and decoded; how ever, no operation is executed. No flags are affected. 30. ORA: Logically OR with Accumulator Description: The contents of the accumulator are logically OR with the contents of the operand (register or memory), and the results are placed in the accumulator. If

the operand is a memory location, its address is specified by the contents of HL registers. Flags Z, S, P are modified to reflect the results of the operation. AC and CY are reset. 31. ORI: Logically OR Immediate Description: The contents of the accumulator are logically OR with the 8-bit data in the operand and the results are placed in the accumulator. Flags S, Z, P are modified to reflect the results of the operation. CY and AC are reset. 32. OUT: Output Data from Accumulator to a Port with 8-Bit Address Description: The contents of the accumulator are copied into the output port specified by the operand. Flags No flags are affected. 33. PCHL: Load Program Counter with HL Contents Description: The contents of registers H and L are copied into the program counter. The contents of H are placed as a high-order byte and of L as a low-order byte. No flags are affected. 34. POP: Pop off Stack to Register Pair Description: The contents of the memory location pointed out by the stack pointer register are copied to the low-order register (such as C, E, L, and flags) of the operand. The stack pointer is incremented by 1 and the contents of that memory location are copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is again incremented by 1. No flags are modified. 35. PUSH: Push Register Pair onto Stack Description: The contents of the register pair designated in the operand are copied into the stack in the following sequence. The stack pointer register is decremented and the contents of the high-order register (B, D, H, A) are copied into that location. The stack pointer register is decremented again and the contents of the low-order register (C, E, L, flags) are copied to that location. No flags are modified. 36. RAL: Rotate Accumulator Left through Carry Description: Each binary bit of the accumulator is rotated left by one position through the Carry flag. Bit D is placed in the bit in the Carry flag and the Carry flag is placed in the least significant position D. Flags CY is modified to bit D S, Z, AC, P are not affected. 37. RAR: Rotate Accumulator Right through Carry Description: Each binary bit of the accumulator is rotated right by one position through the Carry flag. Bit D is placed in the Carry flag and the bit in the Carry flag is placed in the most significant position, D. Flags CY is modified according to bit D S, Z, P, AC are not affected. 38. RLC: Rotate Accumulator Left Description: Each binary bit of the accumulator is rotated left by one position. Bit D is placed in the position of D as well as in the Carry flag. Flags CY is modified according to bit D S, Z, P, AC are not affected.

39. RRC: Rotate Accumulator Right Description: Each binary bit of the accumulator is rotated right by one position. Bit D is placed in the position of D as well as in the Carry flag. Flags CY is modified according to bit Do. S. Z, P, AC are not affected. 40. RET: Return from Subroutine Unconditionally. Description: The program sequence is transferred from the subroutine to th4e calling program. The two bytes from the top of the stack are copied into the program, counter and the program execution begins at the new address. The instruction is equivalent to POP Program Counter. No flags are affected. 41. RIM: Read Interrupt Mask. Description: This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and to read serial data input bit. No flags are affected. 42. RST: Restart. Description: The RST instructions are equivalent to 1-byte call instruction to one of the eight memory locations on page 0. The instructions are generally used in conjunction with interrupts and inserted using external hardware. However, these can be used as software instructions in a program to transfer program execution to one of the eight locations. No flags are affected. 43. SBB: Subtract Source and Borrow from Accumulator. Description: The contents of the operand (register or memory) and the Borrow flag are subtracted from the contents of the accumulator and the results are placed in the accumulator. The contents of the operand are not altered; however, the previous Borrow flag is reset. All flags are altered to reflect the result of the subtraction. 44. SBI: Subtract Immediate with Borrow. Description: The 8-bit data (operand) and the borrow are subtracted from the contents of the accumulator, and the results are placed in the accumulator. All flags are altered and the results are placed in the accumulator. 45. SHLD: Store H and L Register Direct. Description: The contents of register L are stored in the memory location specified by the 16 bit address in the operand, and the contents of H register are stored in the next memory location by incrementing the operand. The contents of registers HL are not altered. This is a 3-byte instruction; the second byte specifies the low-order address and the third byte specifies the high order address. No flags are affected. 46. SIM: Set Interrupt Mask. Description: This is a multipurpose instruction and used to implement the 8085 interrupts (RST 7.5,6.5 and 5.5) and serial data output. 47. SPHL: Copy H and L Registers to the Stack Pointer.

Description: The instruction loads the contents of the H and L registers into the stack pointer register; the contents of the H register provide the High order address, and the contents of the L register provide the low order address. The contents of the H and L registers are not altered. No flags are affected. 48. STA: Store Accumulator Direct. Description: The contents of the accumulator are copied to a memory location specified by the operand. This is a 3-byte instruction; the second byte specifies the low order address and the third byte specifies the high order address. No flags are affected. 49. STAX: Store Accumulator Indirect. Description: The contents of the accumulator are copied into the memory location specified by the contents of the operand (register pair). The contents of the accumulator are not altered. No flags are affected. 50. STC: Set Carry. Description: The carry flag is set to 1. No other flags are affected. 51. SUB: Subtract Register or Memory from Accumulator. Description: The contents of the register or the memory location specified by the operand are subtracted from the contents of the accumulator, and the results are placed in the accumulator. The contents of the source are not altered. All flags are affected to reflect the result of the subtraction. 52. SUI: Subtract Immediate from Accumulator. Description: The 8-bit data (the operand) are subtracted from the contents of the accumulator and the results are placed in the accumulator. All flag are modified to reflect the results of the subtraction. 53. XCHG: Exchange H and L with D and E. Description: The contents of register H are exchanged with the contents of register D and the contents of register L are exchanged with the contents of register E. No flags are affected. 54. XRA: Exclusive OR with Accumulator. Description: The contents of the operand (register or memory) are Exclusive OR with the contents of the accumulator, and the results are placed in the accumulator. The contents of the operand are not altered. Z,S,P are altered to reflect the results of the operation. CY and AC are reset. 55. XRI: EXCLUSIVE OR Immediate with Accumulator. Description: The 8 bit data (operand) are exclusive ORed with the contents of the accumulator, and the result are placed in the accumulator. Z,S,P are altered to reflect the results of the operation. CY and AC are reset.

56. XTHL: Exchange H and L with Top of Stack. Description: The contents of the L register are exchanged with the stack location pointed out by the contents of the stack pointer register. The contents of the H register are exchanged with the next stack location (SP+1); however, the contents of the stack pointer register are not altered. No flags are affected.

ADDRESSING MODES:

Every instruction of a program has to operate on a data. The method of specifying the data to be operated by the instruction is called Addressing. The 8085 has the following 5 different types of addressing. 1. Immediate Addressing 2. Direct Addressing 3. Register Addressing 4. Register Indirect Addressing 5. Implied Addressing Immediate Addressing: In immediate addressing mode, the data is specified in the instruction itself. The data will be a part of the program instruction. Ex: MVI B, 3EH - Move the data 3EH given in the instruction to B register.

Direct Addressing: In direct addressing mode, the address of the data is specified in the instruction. The data will be in memory. In this addressing mode, the program instructions and data can be stored in different memory. Ex: LDA 1050H - Load the data available in memory location 1050H in to accumulator.. Register Addressing: In register addressing mode, the instruction specifies the name of the register in which the data is available. Ex: MOV A, B - Move the content of B register to A register. Register Indirect Addressing: In register indirect addressing mode, the instruction specifies the name of the register in which the address of the data is available. Here the data will be in memory and the address will be in the register pair. Ex; MOV A, M - The memory data addressed by H L pair is moved to A register. Implied Addressing: In implied addressing mode, the instruction itself specifies the data to be operated. Ex: CMA - Complement the content of accumulator.

ASSEMBLY LANGUAGE PROGRAMMING:

ASSEMBLER: An ASSEMBLER is a program, which is used to translate assembly language program to correct binary code for each instruction. Types of assembler: 1. One pass assembler:

It is an assembler in which the source codes are processed only once. Very fast. Backward reference only used. It issues an error message if it encounters a label or variable that is defined at a later end of a program. So it cannot have forward references. 2. Two pass assembler: • The source codes are processed two times. • In the first pass it assigns addresses to all the labels and attach values to all the variables used in the program. • In the second pass it converts the source code into machine code. Advantages of assembler: • Translates mnemonics into binary code with speed and accuracy. • Allows the programmer to use variables in the program. • It is easier to alter the program and reassemble. • It identifies the syntax error. • It can reserve memory locations for data or result. • It provides list file for documentation. Assembler directives: • They are the instructions to the assembler regarding the program being assembled. • Also called as pseudo instructions or pseudo op-codes. • They will give information’ s like start and end of program, values of variables used in the program, storage locations of output and input data etc. • Assemblers are ORG origin of a program END End of program EQU Equate DB Define Byte DW Define Word DS Define Storage SUBROTINE: • It is a group of instructions written separately from the main program to perform a function that occurs repeatedly in the main program. • It is called in the main program by using CALL addr16 instruction. The addr16 is the starting address of subroutine. • It should be terminated by RET instruction. Advantage of subroutine: • Modular programming: The various tasks in a program can be developed as separate modules and called in the main program. • Reduction in the amount of work and program development time. • Reduces memory requirement for program storage. DELAY ROUTINE: It is a subroutine used for maintaining the timings of various operations in microprocessor. List: List is a linked data structure used in programming techniques. The linked data structure will have a number of components linked in a particular fashion. Each component will consists of a string data and a pointer to next component. Types of list are, • Linear linked lists • Linked list with multiple pointers & Tress • Circular inked list • • • •

Array: it is a series of data of the same type stored in successive memory locations. EACH value in the array is referred to as an element of the array. Flow chart: It is a graphical representation of the operation flow of the program. It is a graphical form of algorithm. Symbol Race track shape box Parallelogram Rectangular box Rectangular box with double lines on vertical sides

Operation To indicate the start or end of the program To represent input or output operation To represent simple operations other than I/O operations

To represent a subroutine or procedure

Diamond shaped box To represent the decision point Small circle

Five sided box

Line Arrow

It is used as a connector to show the connections between various part of flowchart within a page. Identical numbers are entered inside the boxes that represent the same connecting point. It is used as a off-page connector to show the connections between various sections of flowchart in a different page. Identical numbers are entered inside the boxes that represent the same connecting point. The lines are drawn between boxes and diamonds to indicate the program flow and the arrow is placed on the lines to indicate the direction of flow.

ASSEMBLY LANGUAGE PROGRAMMING DEVELOPMENT TOOLS: 1. Editor: It is a program which when run on a microcomputer system, allows the user to type and modify the assembly language program statements. The main use of editor is to help the user to construct the assembly language program in the right format and save as a file. 2. Assembler: An ASSEMBLER is a program, which is used to translate assembly language program to correct binary code for each instruction. 3. Linker: A program used to join together several object files into one large object file. 4. Locator: A program used to assign specific addresses to the object codes to be loaded into memory. 5. Debugger: It is a software used to locate and troubleshoot the errors in a program.

6. Simulator: A program, which can be run on the development system to simulate the operations of the newly designed system. Some of the operations that can be simulated are given below. • Execute a program and display the result. • Single step execution of a program. • Break-point execution of a program. • Display the content of register/memory. 7. Emulator: A system that can be used to test the hardware and software of a newly developed microprocessor based system. Counter: Ø A counter is designed simply by loading an appropriate number into one of the registers and using the INR (Increment by one) or the DCR (Decrement by one) instructions. Ø A loop is established to update the count and each count is checked to determine whether it has reached the final number; if not, the loop is repeated. Ø The flowchart illustrates the following steps. Ø This counter has one major drawback; the counting is performed at such high speed that only the last count can be observed. To observe counting there must be an appropriate time delay between counts.

Initialize Display Update

No

Is this final count Yes Time delay: Ø The procedure used to design a specific delay is similar too that used to set up a counter. Ø A register is loaded with a number, depending on the time delay required and then the register is decremented until it reaches zero by setting up a loop with a conditional jump instruction. Ø The loop causes the delay, depending upon the clock period of the system. Time delay using one register: Ø The flow chart shows a time delay loop. Ø A count is loaded in a register, and the loop is executed until the count reaches zero. Ø The set of instructions necessary to set up the loop is shown below.

Load delay Register

Decrement Register

No

Is Register=0 Yes

Label

Loop:

Opcode

Operand

Comments

T-states

MVI

C,FFH

;Load register C

7

DCR

C

;Decrement C

4

JNZ

Loop

;Jump back to 10/7 ;decrement C • The last column shows the T-states (clock period ) required by the 8085 microprocessor to execute each instruction. The instruction MVI requires seven clock periods. An 8085 based micro computer with 2 MHz clock frequency will execute the instruction MVI in 3.5µs as follows. Clock frequency of the system f=2 MHz Clock period T=1/f=1/2x10-6 =0.5µs Time to execute MVI = 7T states * 0.5 =3.5µs. • However if the clock frequency of the system is 1MHZ , the microprocessor will require 7µs to execute the same instruction. To calculate the time delay in a loop , we must account for the T-states required for each instruction and for the number of times the instructions are execute in the loop. • In above figure , register C is loaded with the count FFH (22510) by the instruction MVI, which is executed once and takes seven T-states. The next two instructions DCR and JNZ, form a loop with a total of 14(4+10) T-states. The loop is repeated 255 times until register C=0. The time delay in the loop TL with 2 MHZ clock frequency is calculated as TL=(T x Loop T-States x N10). Where TL= Time delay in the loop T = System clock period N10 = Equivalent decimal number of the hexadecimal count loaded in the delay register. TL = (0.5x10-6x14x225) =1785µs = 1.8ms. In most applications, this approximate calculation of the time delay is considered reasonably accurate. However, to calculate the time delay more accurately, we need

to adjust for the execution of the JNZ instruction and add the execution time of the initial instruction. • The T-states for JNZ instruction are shown as 10/7. This can be interpreted as follows: The 8085 micro processor requires ten T-states to execute a conditional jump instruction when it jumps or changes the sequence of the program and seven T-states when the program falls through the loop (goes to the instruction following the JNZ). In the above figure the loop is executed 255 times; in the last cycle, the JNZ instruction will be executed in seven T-states . This difference can be accounted for in the delay calculation by subtraction the execution time of three states. There fore , the adjusted loop delay is TLA= TL-(3 T states x clock period) =1785.0µs - 1.5µs =1783.5µs. Now the total delay must take into account the execution time of the instructions outside the loop. In the above example we have only one instruction (MVI C) outside the loop. Therefore, the total delay is Total delay = Time to execute instruction + Time to execute the loop instructions. TD =To+ TLA =(7x0.5µs) + 1783.5µs =1787µs. ≅1.8ms. • The difference between the loop delay TL and these calculations is only 2µs and can be ignored in most instances. • The time delay can be varied by changing the count FFH; however to increase the time delay beyond 1.8ms in a 2MHZ micro computer system, a register pair or a loop within a loop technique should be used. Time delay using a register pair: The time delay can be considerably increased by setting a loop and using a register pair with a 16-bit number (maximum FFFFH). The 16 bit number is decremented by using the instruction DCX. Label Opcode Operand Comments TStates LXI B,2384H ;Load BC with 16 bit count 10 Loop: DCX B ;Decrement (BC) by one 6 MOV A,C ;Place contents of C in A 4 ORA B ;OR (B) with (C) to set Zero flag JNZ Loop ;if result = 0,jump back to Loop 10/7 Time delay: •

The time delay in the loop is calculated as in the previous example. The loop includes four instruction: DCX, MOV, ORA, and JNZ, and takes 24 clock periods for execution. The loop is repeated of 2384H times which is converted to decimal as 2384H= 2x (16)3 + 3x(16)2 + 8x(16)1 + 4(16)0 = 909210 If the clock period of the system =0.5µs, the delay in the loop T TL= (0.5 x 24 x 909210) ≈109 ms (without adjusting for the last cycle) Total delay Td = 109 ms + T0: ≈ 109 ms (The instruction LXI adds only 5µs.

Time

delay using a loop within a loop technique: A time delay similar to that of a register pair can also be achieved by using two loops; one-loop insides the other loop is shown in below figure. For example, register C is used in the inner loop (LOOP 1) and register B is used for the outer loop (LOOP 2). The following instructions can be used to implement the flow chart is shown in figure. MVI B, 38H 7T Loop2: MVI C,FFH 7T Loop1: DCR C 4T JNZ Loop1 10/7T DCR B 4T JNZ Loop2 10/7T Delay calculations: The delay in Loop 1 is TL1=1783.5µs. We are replace loop1 by TL1. Now we can calculate these delay in Loop2 as if it is one loop; this loop is executed 56 times because of the count (38H) in register B: TL2=56(Tl1+21 T states x 0.5µs) = 56(1783.5µs+10.5µs) = 100.46ms. Flow chart for time delay with two loops. C, FF

MVI

Load Register B

Loop 2

Load register C Loop1

TL, Delay in Loop

Decrement Register C No

B

DCR

Is register C=0 JNZ

Loop2 Yes

No

Decrement register B

Is register B=0

•

The total delay should include the execution time of the first instruction (MVI B,&T); however, the delay outsides these loops insignificant. The time delay can be increased considerably by using register pairs in the above example.

TIMING DIAGRAM OF 8085 INSTRUCTIONS: • •

•

The 8085 instructions consist of one to five machine cycles. Actually the execution of an instruction is the execution of the machine cycles of that instruction in the predefined order. Therefore, from the knowledge of the timing diagrams of each machine cycle of an instruction, the timing diagram of that instruction can be obtained. The timing diagram of an instruction ate obtained by drawing the timing diagrams of the machine cycles of that instruction, one by one in the order of execution.

MICROPROCESSOR APPLICATIONS: 1.TEMPERATURE CONTROL SYSTEM: The microprocessor based temperature control system can be used for automatic control of the temperature of a body. A simplified block diagram of 8085 microprocessor based temperature control system is,

8085 Microprocessor based Temperature Control System •

•

The system consist of 8085 microprocessor as CPU, EPROM & RAM memory for program & data storage, INTEL 8279 for keyboard and display interface, ADC, DAC, INTEL 8255 for I/O ports, Amplifiers, Signal conditioning circuit, Temperature sensor and Supply control circuit. The EPROM memory is provided for storing system program and RAM memory for temporary data storage & stack operation.

•

Using INTEL 8279, a keyboard and six numbers of 7-segment LEDs are interfaced to the system. The system has been designed to accept the desired temperature and various control commands through keyboard.

•

The 7-segment display has been provided to display the temperature of the body at any time instant.

•

The temperature of the body is measured using a temperature sensor. The different types of temperature sensors that can be used for temperature measurement are Thermo-couples, Thermistors, PNjunctions, IC sensors like AD590, etc.

•

The sensors will convert the input temperature to proportional analog voltage or current. The output signal of the sensor will be a weak signal and so it has to be amplified using high input impedance opamp.

•

The analog signal is scaled to suitable level by the signal conditioning circuit.

•

•

• •

The microprocessor can process only digital signals and so the processor cannot read the analog signal from signal conditioning circuit directly. The system has an analog-to-digital converter (ADC) to convert the analog signal to proportional digital data. In this system the ADC is interfaced to 8085 processor through port-A of 8255. The 8085 processor send signal to ADC to start conversion and at the end of conversion it read the digital data from the port-A of 8255. The 8085 processor calculate the actual temperature using the input data and display it on the 7-segment LED. Also, the processor compare the desired temperature with actual temperature (The operator can enter the desired temperature through keyboard) and calculate the error (the difference between actual temperature and desired temperature).

• • • • •

The error is used to compute a digital control signal, which is converted to analog control signal by DAC. The DAC is interfaced to the system through port-B of 8255. The analog control signal produced by DAC is used to control the power supply of the heating element of the body. The digital control signal can be computed by the 8085 processor using different digital control algorithms (P/PL’ PID/FUZZY logic control algorithms).s The control circuit for power supply can be either thyristor - based circuit or relay. In case of thyristor control circuits the firing angle can be varied by the control signal to control the power input to the heater. In case of relay the control signal can switch ON/OFF the re to control the power input to the heater.

2.TRAFFIC LIGHT CONTROL SYSTEM: The traffic lights placed at the road crossings can be automatically switched ON/OFF in the desired sequence using the microprocessor system. The system can also have a manual control option, so that during heavy traffic (or during traffic jam) the duration of ON/OFF time can be varied by the operator. A typical traffic light control system (demonstration type) is,

8085 Microprocessor based Traffic Light Control demonstration System •

The system has been developed using 8085 as CPU. The system has EPROM memory for system program storage and RAM memory for stack operation. For manual control a keyboard have been provided. It will be helpful for the operator if the direction of traffic flow is displayed during manual control. Hence 7 segment LEDs are interfaced

•

to display the direction of traffic flow both during manual and automatic mode. The primary function of the microprocessor in the system is to switch ON/OFF the Red/Yellow/Green lights in the specified sequence. In the demonstration system of fig shown, Red/Yellow/Green LEDs are provided instead of lights (lamps). The LEDs are interfaced to the system through buffer (74LS245) and ports of 8255.

Ø In the practical implementation scheme the lights can be turned ON/ OFF using driver transistors and relays. Ø In practical implementation the output of buffer (74LS245) can be connected to the driver transistor. Ø A relay placed at the collector of the transistor can be used to switch ON/ OFF the light as shown in fig. Ø A reverse biased diode is connected across relay coil to prevent relay chattering (for free-wheeling action). The microprocessor sends HIGH through a port line to switch ON the light and LOW to switch OFF the light. A switching schedule (or sequence) can be developed as shown in table. In this switching sequence it is assumed that the traffic is allowed only in one direction at a time.

Switching Circuit for Traffic light

Ø The processor can output the codes for switching the lights for schedule-I and then waits. After a specified time delay the processor output the codes for schedule-I and so on. Ø For each schedule the processor can wait for a specified time. After schedule-XH, the processor can again return to schedule-I. On observing the schedules we can conclude that three different delay routines are sufficient for implementing the twelve switching schedules. 3.STEPPER MOTOR CONTROL SYSTEM: Ø The stepper motors are popularly used in computer peripherals, plotters, robots and machine tools for precise incremental rotation. Ø In stepper motor, the stator windings are excited by electrical pulses and for each pulse the motor shaft advances by one angular step. (Since digital pulses can drive the stepper motor, it is also called digital motor). Ø The step size in the motor is determined by the number of poles in the rotor and the number of pairs of stator windings (one pair of stator winding is called one phase). The stator windings are also called control windings. Ø The motor is controlled by switching ON/OFF the control winding. The popular stepper motor used for demonstration in laboratories has a step size of 1.8° (i.e, 200 steps per revolution). Ø The basic step size of the motor is called full-step. By altering the switching sequence, the motor can be made to run with incremental motion of half the full-step value.

8085 Microprocessor Based Stepper Motor Control System

Ø A two phase or four winding stepper motor control system is shown in above figure. The system consists of 8085 microprocessor as CPU, EPROM and RAM memory for program & data storage and for stack. Ø Using INTEL 8279, a keyboard and six number of 7-segment LED display have been interfaced in the system. Through the keyboard the operator can issue commands to control the system. The LED displays have been provided to display messages to the operator. Ø The windings of stepper motor are connected to the collector of Darlington pair transistors. The transistors are switched ON/OFF by the microprocessor through the ports of 8255 and buffer (74LS245). Ø A freewheeling diode is connected across each winding for fast switching. The flowchart for the operational flow of the stepper motor control system is shown. Ø The processor has to output a switching sequence and wait for 1 to 5 msec before sending next switching sequence.

Flow Chart for Stepper Motor Control Program

Unit-I Part A 1. Distinguish I/O mapped I/O and memory mapped I/O. 2. Explain the execution of the instruction CMA M in 8085. 3. What is the function performed by SIM instruction? 4. What is meant by processor cycle? 5. Explain the different types of flags in 8085. 6. What are the two compare instructions available in 8085. 7. When the READY signal of 8085 processor is sampled by the processor? 8. What is DAD and what are the flags, affected by this instruction? 9. List the Software and Hardware interrupts of 8085? 10. How to calculate the vector address of software interrupts and calculate for all.

Part B 1. Explain the 8085 architecture in detail 2. Draw the pin configuration of 8085 processor & explain the signals 3. Draw the Timing diagram for the following machine cycles. (i) Opcode fetch (ii) Memory Read (iii) Memory Write (iv) I/O Read (v) I/O write 4. (i) Explain the classification of 8085 Instruction set with some examples. (ii) Write about the addressing modes of 8085. 5. (i) How do you Interface a memory with 8085? (ii) Explain the memory mapped I/O Interface. 6. (i) Draw the Timing diagram of STA 8080 instruction and explain each cycle. (ii) Draw the Timing diagram of IN 10 and MVI A, 70H instruction & explain each cycle. 7. How will you interface a peripheral device with 8085 processor? Explain. 8. (i) Discuss the interrupt system of 8085. (ii) Draw the timing diagram for memory read operation performed by 8085 (Use associated signals). 12. Write a program to count continuously in hexadecimal from FFH to OOH in a system with a 5 µsec clock period. Use register C to set up a one millisecond delay between each count and display the number at one of the output ports. 13. (i)List all the control signals of the Timing and control unit. Explain the use of each of these signals. (ii)Write an ALP to evaluate the expression C=A2 +B2. 14. (i)Compare the similarities and differences between PUSH /POP and CALL/RET instructions. (ii)What are the features of FIFO and LIFO memory structure? (iii)Draw and explain the timing diagram for the execution of the instruction LDA 2080 H. 15. What is the memory mapped I/O and I/O mapped I/O. Explain.

16. (i)Explain with the help of suitable diagram how the INTR pin can be used to interrupt the 8085 and how it to the signal. (ii)Bring out the differences between memory mapped I/O and I/O mapped I/O. 17. (i)Explain the logic instructions of 8085 microprocessor with examples. (ii)Write an ALP using 8085 instruction set to add two n-byte numbers stored at memory locations starting and respectively. Store the result at memory location starting from . Draw the flow chart.

Unit-II Part A 1. Distinguish microprocessor and micro controller. 2. List any two applications of micro controller. 3. Write and ALP for 8051 to implement a BCD, counter and store the count in memory location starting from . 4. What is the significance of Interrupt Priority control register in 8051 microcontrollers? 5. Write an ALP for time delay using a register pair available in 8085. 6. What is the job of the TMOD register? 7. What is the function of DPTR register? 8. Name the interrupts of 8051 micro controllers. 9. What is the importance of special function registers available in 8051 micro controllers? 10.What is the voltage level used in RS 232?

Part B 1. Explain briefly the architecture or 8051. 2. (i)List the various special function registers in 8051 and explain its usage. (ii)With neat diagram explain ports 1 pin configuration. 3. (i)Explain the significance of SFRs in 8051 micro controller. (ii)Explain how to interface external memory devices with 8051 micro controller. 4. (i)Write an ALP in 8051 to sort the numbers stored in an array. (ii)Compare the features of 8 bit and 16 bit micro controller. 5. Explain with neat diagram of port pin and circuits that connect the 8051 micro controller to the outside world. 6. With neat sketch, describe the hardware features of 8051 microcontroller. 7. (i)Draw the bit pattern of program status word of 8051 and explain the significance of each bit with examples. (ii)List the special function registers of 8051 micro controller and explain their functions. 8. (i)Explain the various modes available for timer in 8051 microcontroller. (ii) Discuss the interrupt structure of 8051 microcontroller. 9. Draw the pin configuration of 8051 and explain the signals. 10. (i)Explain the hardware circuits used in 8051 microcontrollers.

(ii)Explain the operation of the following hardware circuits in 8051. (i) Timers (ii) Serial data I/O (iii) Interrupts (iv) External memory 11. Explain the architecture of 16 bit microcontroller in detail (80196). 12. With necessary hardware and software details explain how to interface LCDs with 8051 micro controller. 13. (a) Explain with neat diagram of port pin & circuits that connect the 8051 microcontroller to the outside world. (b) With neat sketch, describe the hardware features of 8051 microcontroller.

Unit-III Part A 1. What are the segment registers in8086? 2. List the additional features of 486 processor in comparison with 386 processor. 3. List the merits of Memory segmentation. 4. Name the external hardware synchronization instruction 8086 processor. 5. What is the job of the TMOD register? 6. What is segment override prefix? Give an example. 7. What is the function of TEST pin in 8086 processor? 8. How does the 8086 processor access a word at on odd address? 9. What are the differences between 8085 and 8086? 10. Briefly explain the interrupts in 8086.

Part B 1. With neat diagram explain the architecture of 8086 processor. 2. (i)Explain the instruction set of 8086 with examples. (ii)Briefly explain the advanced design features in Intel Pentium processor when compared with 486 processor. 3. (i)Explain with examples the addressing modes of 8086 processor. (ii)Explain the interrupt structure or 8086 processor. 4. Explain the minimum and maximum mode of operation of o8086 microprocessors 5. (i)Explain any three addressing modes of 8086. 6. (ii)Discuss the interrupt mode configuration of 8086 processor. 7. (i)Design an 8086 based system in minimum modes to intsesrfac3e 64 KB EPROM and 64KB RAM with starting address 00000H and 80000H respectively.

(ii) Draw the pin configurations of 8086 and explain the signals 8. Discuss the features and architecture of Pentium processor with necessary diagrams. 9. Explain the architecture of 80386 (32-bit) 10. Explain the architecture of 80486 (32-bit) 11. Explain the working of 8086 in maximum mode systems. 12. Explain the working of 8086 in minimum mode systems. 13. (i) Explain the Instruction set of 8086. (ii) Write any 5 features of 8086.

Unit-IV Part A 1. 2. 3. 4. 5.

What is 8259? What are its functions? What is handshake port? How a keyboard matrix is formed in keyboard interface using 8279? What is resolution and conversion time in ADC? Write a program segment that will carry out the following binary operation using 8086 instructions. W< X+Y+24-Z. 6. Specify the bit of a control word of the 8255, which differentiates between I/O mode and the BSR mode. 7. What is cycle stealing in DMA? 8. List the functions performed by 8279. 9. What are the modes of data transmission of 8251? 10. List the signals used by transmitter and receiver unit of 8251.

Part B

their 2. 3.

4. 5.

6.

7.

1. List the major components of the 8279 keyboard/ display interface and explain functions, with neat diagram. Design an interfacing circuit to read data from an A/D converter using 8255 in memory mapped I/O form. (i)Explain the important features of programmable DMA controller. (ii)Show how the 8255 PPI can be interfaced to the 8085 processor based system with 2 K bytes of EPROM. What are the different modes of serial communication? Draw the internal block diagram of 8251 and explain how the CPU uses it for serial communication. (i)What are the different modes of DMA transfer? (ii)With a neat sketch show how a DMA controller is connected to the 8085 processor. Outline the sequence of operation needed in performing a DMA transfer. (i)Interface 8251 A to 8086 in I/O mapped I/O mode and memory mapped I/O mode. (ii)Discuss the features of programmable DMA controller with functional block diagram. Explain how to interface: a. ADC and b. DAC with 8051 micro controller.

Unit-V Part A 1. 2. 3. 4. 5. 6. 7. 8. 9. 10.

Mention the hardware requirement to interface an LCD using 8255. What is a smart scale? Draw the circuit using MOSFET to drive solenoids or motor windings. Name any two alphanumerical display devices. What Is The Voltage Levels Used In RS232? What is the shaft encoder? List the advantages of robotic control. What do you mean by real time digital signal processing? Write short notes on stepper motor. List the applications of stepper motor.

Part-B 1. With neat block diagram explain the operation of 8085 based stepper motor control system. 2. With neat diagram explain the operation of 8085 based industrial temperature control system. 3. With necessary hardware and software details explain how to interface LCDs with 8051 microcontroller. 4. (i)Explain with diagram how to interface stepper motor with a microprocessor. (ii)How optical motor shaft encoders are used in motor control applications. 5. (i)With a block diagram and flow chart, explain the operation of microcomputer based smart scale. (ii)Show how will interface a stepper motor to the microprocessor. 6. (i)Develop a hardware and necessary software algorithm to run a stepper motor in the forward direction through five revolutions in 10 seconds. Assume necessary specification for the stepper motor. (ii)With block diagram explain briefly the microprocessor based scale.