Underground Cable Report New

April 30, 2017 | Author: akash_shah111990 | Category: N/A
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Under ground cable fault detection using microcontroller with auto sms and cutoff. Operates on resistive principle of li...

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Project Development Final Report

Underground Cable Fault Detection and Alert System Student #

May 2017

Supervisor:

Abstract Cables are most convenient way to transfer power over a long distance with minimal losses. Underground cables have been widely implemented due to high reliability, strength and environmental concerns. Faults in the power line effects the overall system performance which is expected to be ideal. As the length of the cable is very long, detection of fault turns out to be difficult task which requires, more no of testing points. To improve the reliability of a distribution system, accurate identification of faulted line is required in order to reduce the interruption time during fault. Running cable length creates the finite resistance which is used for the measuring voltage drop. Proposed system uses the property of change in voltage drop with respect to change in resistance using Ohms law. Different cable faults like Line to Ground(LG), Line to Line(LL) and Line to Line to Ground(LLG) are detected and distance is located. Open circuit fault is detected and displayed. In proposed system power line is replaced by series of resistors defining length of cable and switches are connected to create the faults. GSM based short message service (SMS) is used to alert the concerned authority about the fault and exact location. Hence, it can be concluded that the proposed technique is able to provide high accuracy, in the fault classification and fault location.

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Contents 1. Introduction.......................................................................................................... 1 1.1 Objectives............................................................................................. 1 1.2 Significance........................................................................................... 1 1.3 Report Organisation..............................................................................2 1.4 Timeline................................................................................................ 3 1.5 Risk Assessment................................................................................... 5 2. Background.......................................................................................................... 6 2.1 Literature Review.................................................................................. 6 2.1.1 Introduction To Fault Detection.......................................................6 2.1.2 Related Works.................................................................................7 2.1.2 Fault Location Methods.................................................................11 3. Proposed Approach............................................................................................. 11 3.1 Task 1 – Literature Review...................................................................11 3.2 Task 2 – Proposed System Design.......................................................12 3.2.1 Block Diagram............................................................................... 12 3.2.2 Schematic Diagram.......................................................................13 3.2.3 PCB Routing and Layout................................................................19 3.2.4 System operational flow:...............................................................21 4. Software Programming....................................................................................... 23 5. Results and Discussions...................................................................................... 23 6. Conclusion.......................................................................................................... 23 7. References.......................................................................................................... 23

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1. Introduction

Concerns about the reliability of the overhead lines, increases their maintenance and operational costs, and issues of the public safety and quality-of-life are leading into more and more utilities and municipalities to realization, that converting the overhead distribution lines to underground is the best way, to provide high-quality service to customers. More than 3.2 million miles, of electrical cables are strung overhead across the country. Add to that at least 185 million telephone and cable TV lines, and it’s no wonder tornadoes, hurricanes, ice storms and fires are wreaking havoc on the electrical systems every year, causing utility outages that last days, weeks, months and longer. Power outages over the extended period present major health issues and safety concerns with economic losses. For the utility companies, underground cabling provides potential benefits by reduced operations and maintenance costs, less tree trimming costs, reduced storm damage and lower loss of day-to-day electricity sales when customers lose power during storms. Creative funding options are available to make the goal of undergrounding. The underground cable system is very important for power and data distribution, especially in cities, defense service and airports.

1.1 Objectives The objectives for the project are to: Improved Reliability: 

Increase reliability during storm weather (wind related storm damage will be reduced in underground systems, and areas not subject to flooding and storm will experience minimal damage and minimal discontinuation of electrical services).



Less cable damages in severe weather.



Less number of temporary interruptions.

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1.2 Significance Although commercial OMR is highly developed and offers an accurate solution for multiple-choice exam marking, it is unsuitable for personal use as its high cost restricts it to a single department of an organisation (as opposed to every department getting the same system). This project will attempt to address this issue through development of low-cost, easy to use software that maintains the performance of commercial systems. This will give the average user an extra, highly flexible option when the requirement for automated exam marking arises. Unlike commercial systems; a low-cost, easy to use system can be acquired easily without significant funding and does not require any formal training to use. This contributes to the decentralisation of OMR services throughout an organisation and alleviates any large turnaround times imposed on the information and data collection department. Furthermore, this project will aim to incorporate sophisticated image analysis techniques in an effort to remove the stringent marking requirements imposed on students undertaking exams using traditional OMR forms i.e. improve on the existing state-of-the-art. The final product will offer an effective alternative for lecturers who need to quickly conduct and mark multiple-choice exams.

1.3 Report Organisation This report is divided up into 5 chapters which are organised as follows: Chapter 1: Introduction The introduction introduces the topic and provides minimal background information. It lists the main objectives on which the entire report is written and gives indication of the motivation behind the project. Chapter 2: Background The background starts off with a detailed analysis of OMR technology. This allows the current project to be brought into context and acts as a point of reference for the remainder of the report. It justifies the report motivation and provides insight into the available OMR technologies available. The study of current OMR technology is followed by a literature review which provides a thorough examination of previous works performed in the area of low cost alternatives to OMR technology. Each paper is analysed followed by a critique and any influences on the current project.

Chapter 3: Proposed Approach

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This chapter discusses the proposed steps that are to be taken in order to achieve the project objectives. This section should convey the partitioning of the project into logical steps, discuss how the project will be tackled and outline any predicted challenges. Also, influences from the literature review, if any, will be reflected in this section. Chapter 4: Software Programming This chapter outlines the systems operational flow. Various logics and algorithms are codded in Embedded C language using KEIL uV3 compiler. Section coveys program writing syntax and efficiency for the given task. Chapter 5: Preliminary Results and Discussions This chapter will outline any work done toward achieving the project objectives and will present any accompanying results. This section will start with a high level description of the system in order to give the busy reader a general overview of the systems functionality. Then, each sub-system is subsequently analysed for those who are interested in the finer details. The final part of this section analyses the overall performance results for the system. Chapter 5: Conclusion The conclusion will summarise the entire report reiterating key points presented throughout.

1.4 Timeline It is important to co-ordinate the project work with other units being studied in the two semesters. A dedicated time period should be kept for various tasks related to project completion, including but not limited to hardware, software and documentation. In a corporate world, time plan is generally laid out by the project manager and is of great importance in the delivery of a successful project [10]. Keeping in mind that the mid semesters for other units will be in week 8 and the exams will be in week 13, less work for the project will be allocated during that period. A timeline of the work distribution for the project is shown in a tabular format in table 1. SEMESTER /YEAR WEEK PLANNED ACTIVITIES 2/2016 Submission of form registration Skimming research papers, journals, and books relevant to the project. Construction of a rough block diagram. Based on the block diagram make a list of the components to be used in project. 3

Check availability of components in the market Collect data sheets of the components Proposal Documentation Cost analysis of the project Feedback on proposal Pin configuration of the components Schematic diagram generation in EAGLE software Submission of proposal PCB layout generation in EAGLE software Report 1 Documentation Algorithm for the program Flow chart for coding Generation of the board Report 1 Documentation Mounting the components on board Study of GSM communication to be implemented in

1/2017

the project Microcontroller coding for LCD screen Feedback on report 1 Report 1 documentation Preparing poster presentation Submission of report 1 and log book. Microcontroller coding for input data from sensing element via Analog to Digital converter Microcontroller coding for analysing the data from the input side to measure the fault distance Microcontroller coding for calculating fault distance Report 2 Documentation Testing all codes in keil software and converting into HEX format. Burning the integrated chip and mounting it on the board Soldering the components Interfacing the GSM modem to the board Testing the GSM section Report 2 Documentation Trouble shooting the project Recording complete initial testing in tabular format with mistakes and errors Resolving errors and modifying the project with the guidance of the supervisor Final testing Report 2 documentation Final testing with demonstration to supervisor Reserved for optimisation and/or unexpected setbacks if any in the project 4

Report 2 documentation Reserved for unexpected setbacks/optimisation Report 2 documentation Reserved for unexpected setbacks/optimisation Submission of Final report and presentation Table 1: Project work distribution timeline

Although, project 1 and 2 reports are due at the end of each semester, the documenting work is assigned evenly during the entire period of the two semesters in order to reduce the burden at the end and also to reserve enough time to make necessary changes in accordance to the feedback provided. The timeline in table 1 is quite realistic in nature, keeping sufficient time for every task which is based on experiences gathered in doing past projects in the relevant subjects. The timeline also takes into consideration for any unexpected events that may delay the project work in any manner [10] .A Gantt chart for same can be seen in attachment 1.

1.5 Risk Assessment The project overall is a low risk project with the main risk being of short circuit current that may damage the component or the board. To make sure there are no short circuit currents, the connections should be tested with a multimeter first. Also, the power supply should not be switched on until it’s verified by the supervisor. A medium level risk of strain in the eyes and backache is also present due to excessive use of computers. To deal with these types of risks, ergonomic sitting posture and avoiding excessive use of computers at a stretch should be adapted. It is important to keep all the data safe as loss of data will not only delay the project completion but can also be frustrating leading to unprofessional work. To make sure the project data is safe it will be saved in 3 different places laptop, external hard drive and one drive (linked to my account). Low level risks of damaging components during soldering are also present. The lead released during soldering if ingested can be toxic. It is a good practice to always use protective clothing and eye glares while doing any type of mechanical work like soldering. A complete list of all the risks associated with this project, the risk treatments and their likelihood can be found in attachment 2.As can be seen from the table in attachment 2, all the risks can be broadly classified into the following 5 types: Supervisor risk (SUP), Personal risk (PER), Ergonomics risk (ERG), Equipment risk (EQU) and Computer risk (CMP).

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2. Background 2.1 Literature Review De-regulation of power market brings changes by creating an increase in competition among utilities. Minimizing the cost of maintenance and losses due to cable failures is a key to successful operation. Simulations demonstrate the possibility of applying condition-based maintenance for the entire service period of a cable system if maintenance cost could be lowered to a certain level. The aging of power cables begins long before the cable actually fails. Preventing incipient failures developing into failures can greatly reduce loses. There are several external phenomena indicating undergoing aging problems, including partial discharges, hot spots, mechanical cracks and changes of insulation dielectric properties. Most sensors currently used are cumbersome to move, complicated to use, or destructive to cables. In the presented project, non destructive miniature sensors capable of determining the status of power cable systems are developed and integrated into a monitoring system, including a video sensor for visual inspection, an infrared thermal sensor for detection of hot spots, an acoustic sensor for identifying partial discharge activities, and a fringing electric sensor for determining the aging status of insulating material. Mobile monitoring can greatly reduce the maintenance cost and supply more accurate status of local cables over traditional monitoring techniques. The application range of condition-based maintenance can be expanded greatly with the aid of mobile monitoring.

2.1.1 Introduction To Fault Detection In an electric power system, a fault is detected by any abnormal electric current follow . For example, a short circuit is a fault in which current bypasses the normal load. An open-circuit fault occurs if a circuit is interrupted by some failure. In threephase systems, a fault may involve one or more phases and ground, or may occur only between phases. In a "ground fault" or "earth fault", charge flows into the earth. The prospective short circuit current of a fault can be calculated for power systems. In power systems, protective devices detect fault conditions and operate circuit breakers and other devices to limit the loss of service due to a failure.[4] In a poly phase system, a fault may affect all phases equally which is also called symmetrical fault. If only some phases are affected, the resulting asymmetrical fault becomes more complicated to analyze because the simplifying assumption of equal current magnitude in all phases is no longer applicable. The analysis of this type of fault is often simplified by using methods such as symmetrical 6

components. A symmetric or balanced fault affects each of the three phases equally. In transmission line faults, roughly 5% are symmetric. This is in contrast to an asymmetrical fault, where the three phases are not affected equally. An asymmetric or unbalanced fault does not affect each of the three phases equally Power transmission and distribution lines are the vital links that achieve the essential continuity of service of electrical power to the end 6 users. Transmission lines connect the generating stations and load centers. Faults are caused either by insulation failures and conducting path failures. Most of the faults on transmission and distribution lines are caused by over voltage due to lighting and switching surges or by external conducting objects falling on over head lines. Birds, tree branches may also cause faults on over head lines. Other causes of faults on over head lines are direct lightning strokes, aircraft, snakes, ice and snow loading, storms, earthquakes, creepers etc. In the case of cables, transformers, generators the causes may be failure of solid insulation due to ageing, heat, moisture or over voltage, accidental contact with earth . [5] The overall faults can be classified into two types: 1. Series faults 2. Shunt faults A fault if unclear has the following effects on a power system. A fault if unclear has the following effects on a power system. 

Heavy short circuit current may cause damage to equipment or any other element of the power system due to over heating or flash over and high



mechanical forces set up due to heavy current. There may be reduction in the supply voltage of the healthy feeders, resulting in the loss of industrial loads. Short circuits may cause the unbalancing of



the supply voltages and currents, there by heating rotating machines. There may be a loss of system stability. The faults may cause an interruption of supply to consumers.

2.1.2 Related Works 1. Travelling Waves for Finding The Fault Location Transmission lines are considered the most vital components in power systems connecting both generating and consumer areas with huge interconnected networks. They consist of a group of overhead conductors spreading in a wide area in different geographical and weather circumstances. These conductors are dispensed on a special metallic structure “towers”, in which the conductors are separated from the tower body with some insulating components and from each other with an adequate spacing to allow the air to serve as a sufficient insulation among them. Unfortunately these conductors are frequently subjected to a wide 7

variety of fault types. Thus, providing proper protection functions for them is an attractive area for research specialists. Different types of faults can occur including phase faults among two or more different conductors or ground faults including one or more conductors to ground types. However, the dominant type of these faults is ground ones [6].Excellent fault Location Estimated Benefits : 

Time And Effort Saving: After the fault, the related relaying equipment enables the associated circuit breakers to De energize the faulted sections. Once the fault is cleared and the participated faulted phase(s) are declared, the adopted fault locator is enabled to detect the fault position. Then, the maintenance crews can be informed of that location in order to fix the resultant damage. Later, the line can be reenergized again after finishing the maintenance task. Since transmission line networks spread for some hundreds of kilo-meters in 8 different environmental and geographical circumstances, locating these faults based on the human experience and the available information about the status of all breakers in the faulted area is not efficient and time consuming. These efforts can therefore effectively help to sectionalize the fault (declare the faulted line section) rather than to locate precisely the fault position. Thus the importance of employing



dedicated fault location Schemes are obvious.[6] Improving the System Availability: There is no doubt that fast and effective maintenance processes directly lead to improve the power availability to the consumers. This consequently enhances the overall efficiency of the power nets. These concepts of (availability, efficiency, quality) have an increasingly importance nowadays due to the new marketing policies resulting from



deregulation and liberalization of power and energy markets. Assisting Future Maintenance Plans: It is quite right that temporary faults (the most dominant fault on overhead lines) are self cleared and hence the system continuity is not permanently affected. However, analysing the location of these faults can help to pinpoint the wake spots on the overall transmission nets effectively. This hopefully assists the future plans of maintenance schedules and consequently leads to avoid further problems in the future. These strategies of preventive maintenance enable to avoid those large problems such as blackouts



and help to increase the efficiency of the overall power system. Economic Factor: All the mentioned benefits can be reviewed from the economical perspective. There is no doubt that time and effort saving, increasing the power availability and avoiding future accidents 9 can be directly interpreted as a cost reduction or a profit increasing. This is an essential concept for competitive marketing. 8

Travelling wave schemes can be used either with injecting a certain travelling wave from the locator position or with analysing the generated transients due to the fault occurrence. Impedance measurement schemes are classified whether they depend on the data from one or both line ends.

Fault Location Methods

Travelling Wave

Impedance Measurement

External Wave Injection Generated Wave Analysis Single ended data infeed Double Ended data infeed

Single endDouble End

Distributed Parameters Single endDouble End Lumped Parameters Lumped Parameters Distributed Parameters

Fig. Classification of fault location methods Travelling Wave Based Fault Locators: Employing travelling wave phenomena for fault location purposes for both underground cables and overhead lines was reported since 1931. In 1951, Lewis classified travelling wave based schemes into different four types A, B, C and D according to their modes of operation using the travelling voltage waves. Types A and D depend on analyzing the resulting transients from the fault itself needing no further pulse generating circuitry. Type A is a single end one capturing the transients only at one end. It relies on the generated transients from the arcing flashover during the fault. However the assumption of getting generated transients at the line end is not always satisfied. Moreover, the arc itself may extinguish rapidly. They rely on measuring the required time for the injected pulses to go and to be captured after reflection from the fault point. This time can be directly interpreted as a fault distance. 9

Impedance Measurement Based Fault Locators: These schemes provide another alternative for the fault location estimation problem. A line to ground fault occurred on phase A at point F through a resistance RF at a distance x from the locator position. The fault current IF is comprised from two components Ifs and IFr flowing from sending and receiving ends respectively. The essential task of the fault location algorithm is to estimate the fault distance x as a function of the total line impedance ZL using the sending end measurements (for single end algorithms) or both end measurements (for double end algorithms)with the most possible accuracy. 2.1.1 Detection Techniques The common methods of locating faults are 1. Sectionalizing: This procedure risks reducing the cable reliability, because it always depends on physically cutting and splicing of the cable. Dividing the cables, into successively smaller sections and measuring both ways using an ohmmeter or high-voltage insulation resistance (IR) tester, narrow down search for a fault. This laborious procedure normally involves the repeated cable excavation. 2. Time domain reflectometry (TDR): The TDR sends low-energy signal through the cable, causing no insulation degradation. A theoretically perfect cable returns that signal in a known time and in a known profile. Impedance variations in a “realworld” cable alter both the time and profile, which the TDR screen or printout graphically represents. One weakness of TDR is that it does not pinpoint faults. 3. Murray loop test: It is a bridge circuit used for locating faults in underground or underwater cables. It uses the principle used in potentiometer experiment. One end of the faulted cable is connected through a pair of resistors to the voltage source. Also a null detector is connected. The other end of the cable is shorted. The bridge is brought to balance by changing the value

In above figure, RC is proportional to (l+ (l-x)) and RD is proportional to l. RA/RB=r=RC/RD = (2l-x)/x (1) And hence 10

x= 2l/(r-1) (2) Where l is the length on each segment of wire, r is the ratio RA/RB and x is the length of faulty segment. The main disadvantage of this method assumes that only a single fault exists, a low resistance when compared with UG cable resistance and cable conductors have uniform resistance per unit length. 4. Varley loop test: If the fault resistance is high, the sensitivity in Murray bridge is reduced and Varley loop may be more suitable but only a single fault exists. Except that here the ratio arms are fixed and a variable resistance is connected to the test end of the faulty cable. The drawbacks of the above methods can be overcome to certain extent by this method in which the concept of OHM’s law is applied. world is become digitalized so the project is intended to detect the location of fault in digital way. The underground cable system is more common practice followed in many urban areas. While fault occurs for some reason, at that time the repairing process related to that particular cable is difficult due to not knowing the exact location of cable fault. Fault in cable is represented as: • Any defect, • Inconsistency, • Weakness or non-homogeneity that affect performance of cable . • Current is diverted from the intended path. • Caused by breaking of conductor& failure of insulation

2.1.2 Fault Location Methods Fault location methods can be classified as: 1)

Online method: This method utilizes & processes the sampled voltages & current to determine the fault points. Online method for underground cable are

2)

less than overhead lines. Offline method: In this method special instrument is used to test out service of cable in the field. There are two offline methods as following Tracer method: In this method fault point is detected by walking on the cable lines. Fault point is indicated from audible signal or electromagnetic signal. It is used to pinpoint fault location very accurately. Example: 1) Tracing current method 2) Sheath coil method

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Terminal method: It is a technique used to detect fault location of cable from one or both ends without tracing. This method use to locate general area of fault,to expedite tracing on buried cable. Example: 1) Murray loop method 2) Impulse current method

3. Proposed Approach The proposed approach of a project presents the steps needed to produce the end result. This section reveals the 4 major steps that need to be completed for the project to be successfully completed. Each task will be described in detail with a discussion on how they are to be tackled and any predicted challenges.

3.1 Task 1 – Literature Review The literature review gives a broad assessment of methodologies used to approach problems similar to the one in question. This prevents completely designing a solution from scratch, which saves valuable time that can be used in later tasks. It also gives the author the chance to demonstrate understanding of the project which in turn proves his suitability to undertake it. The current project makes use of multiple databases in order to provide a broad range of papers covering individual techniques in image processing and image analysis, as well as complete solutions that are similar to what the current projects objectives aim to achieve. Three bodies of information were used to form the literature review. These are: 1) - IEEE Xplore Digital Library, 2) - Scopus and 3) – ECU library one search. From the 8 papers gathered on OMR systems, 5 were chosen to form the basis of the literature review. From these papers, techniques will be evaluated and may be incorporated into the project.

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3.2 Task 2 – Proposed System Design The theoretical approach provides the general steps that must be performed in order to achieve the end solution. The theoretical approach presented next represents block diagram based on research performed by the author. The research helps establish justification for each step in the proposed approach.

3.2.1 Block Diagram Block diagram describes the hardware blocks used to design the proposed system. Inputs and outputs are differentiated based on the arrow direction with respect to microcontroller.

Development of a rough block diagram and forming a list of components To understand the control systems of the project a rough block diagram is the first step. Once all the blocks have been finalised, the corresponding chips fulfilling the role of the particular block would be researched by scanning the datasheets. Once all the components have been selected, the components would then be checked for their availability in the market. In the absence of particular element a suitable substitute would be chosen. In case, there is an option of selecting more than one component for the same task the best component would be selected keeping the cost and advantage in mind. 3.2.2 Schematic Diagram 13

Construction of a complete circuit diagram on EAGLE software Once the components have been finalised the individual pins should be assigned different functionalities .The layout of the connections will be generated in EAGLE software using both auto and manual mode. A compact circuitry with less overlaps, if not none, would be picked. The Eagle toolbar is shown in figure below.

The user interface in Eagle is somewhat special when compared to other drawing utilities (and PCB layout programs). This takes a little getting time getting used to. Some of the tools will be described here, to allow the user to get to know these tools, while the tools that constitute the main part of the tutorial will be described along the way. The copy-tool can be used to easily clone a component. If you select copy and click on a component, a copy of the component will be attached to the mouse cursor, and can be placed in the schematic. If you want to copy something to a different schematic, you will need to use the cut-tool. This does not delete the component from the schematic (as you might otherwise assume from the name), but merely copy’s it to the clipboard. The group-tool can be used to work on a group of components etc. First select the group tool and mark the components you want to modify. You can either hold the left button and drag to draw a rectangular selection, or click the left mouse button 14

to make a polygon selection, using the right mouse button to end the polygon selection. When the selection is done, you select the tool you wish to apply, such as move, rotate, cut, etc. Right-click the group to use the selected tool. The change-tool is used to modify the properties of various objects. Again, this is a little different in Eagle when compared to other tools (where you would normally be able to right-click on an object and change its properties from a pop-up menu). First you choose the modify-tool and select what you want to modify (style, size, layer etc.), then you click on the component you want to modify. The command line interface (CLI) can be used to make this task easier. If you want to modify the value of say 10 capacitors to 100nF, you could use the change-tool and select value. Now, each time you click a component, a dialog will pop up asking for the new value, which you will have to type in. If you instead enter the command value 100nF in the CLI (the input-box just above the main drawing canvas), you can simply click on the components whose value you wish to change. When adding components, you will notice a small black cross on each device. This is the origin or “handle” of the device, and is used to manipulate the device with various tools. So whenever you are using a tool, Eagle will apply the tool to the entity whose origin is closest to the mouse cursor. If two or more entities are very close to each other, Eagle will highlight one and ask if this is the one you want to modify. Click left button to accept or right button to cycle to the next entity. When you use the smash-tool, the name and value-texts will be detached from the device and get their own origin, allowing them to be moved individually. Power Line:

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Circuit Description: Power line represented by series resistors valuing 1k for 1km length(assumed for experimentation) indicates three phases of supply. Switches are connected to create fault at different locations in the power line. Shorting using switches creates a line to ground fault at a particular location in different lines. Shorting allows the current to be passed through ground, which changes the voltage drop according to OHM’s law. Microcontroller Unit:

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Microcontroller acts as a master control unit for controlling all the processes. 89s52 an 80-51 family microcontroller with add-on feature of In-System Programming (ISP) suits best for application development prototyping. 8KB of available ROM is used as a program space for writing the algorithm codes. 256 Bytes RAM stores the temporary values of line voltages for processing. 4 I/O ports with 8 pins per port provides enough I/O pins for proposed application implementation. Port 0 connected to pull up resistors, sources current using pullups, since it has open drain configuration. 11.0592 Mhz crystal is used to generate clock signal using on chip generator. Frequency selection signifies the use of serial communication in the project. 33pF filtering capacitors reduces the noise over clock.

LCD 16x2:

LCD 16x2 acts as a user interface to display systems detection status. Faults when detected are displayed on the LCD with distance and power line information. Alphanumeric LCD uses ASCII characters to display the text.LCD connected in 4 bit mode for data transfer at P0.4 through P0.7 for D4 to D7 respectively. Register select and enable are the control lines used for data transfer between microcontroller and LCD. R/W line is hard wired grounded to configure the LCD in always write mode. 10K potentiometer is connected between Vcc and Ground to

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vary the contrast of LCD display. At 0V i.e. ground level the contrast is maximum and minimum at 5V.

Analog to Digital Converter:

MCP 3208, an 8 channel 12 bit resolution analog to digital convertor is used to convert varying analog voltages to a digital value which can be processed. Serial peripheral interface (SPI) based communication is used between ADC and microcontroller. ADC is connected from P1.0 to P1.3 of the microcontroller. 10K potentiometer is used to set the reference voltage of ADC. Pin no 1 through 8 acts as the analog input, which is connected to internal ADC SAR block using multiplexer. GSM Modem:

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Sim 900a GSM modem is used to send SMS using AT command Set. Modem supporting RS 232 communication is converted to TTL using MAX 232 logic convertor device. Capacitors valuing 0.1uF are used for voltage doubling and inverting for RS 232 logic. DB 9 connector uses is a female 90degree bend type. A male to male cross cabled DB9 connector is used to connect GSM modem to the circuit.

Switching Network:

Relays are used to connect the lines for testing. 12V DC relay coils are driven by ULN 2803 based sinking amplifier also known as relay driver. 8channel driver with current sinking capacity can drive up-to 8 relays.

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Regulated Power Supply:

12V supply is derived from SMPS circuit which converts 230VAC to 12VDC with current drain of 1Amp. 7805 a +5V DC voltage regulator regulates the supply with constant +5V DC output for inputs ranging from +7.5V to 30V, with up-to 1Amp of output current.

3.2.3 PCB Routing and Layout The task of experimentation allows the engineer to proceed towards hardware implementation of the system design. To start laying out the printed circuit board, you should open the schematic in Eagles schematic editor and click on the board-button (located on the top toolbar in Eagle). You will be asked whether you want to create a new PCB design from the schematics. This should open Eagle’s Board editor window. Once you have created a board for a schematic, you should always have both files open when working with either the schematic or the circuit board layout. This is important, since it allows Eagle to keep the consistency between the two. This is called forward- and back annotation. If you close either the schematic window or the board window and modify anythin in the other window, Eagle will be unable to track the changes you have made, and help you keep the schematic and PCB consistent. Notice how all the components from the schematic have been placed next to a white frame in the board editor. The white frame shows the maximum size of a circuit-board designed with the freeware version of Eagle. You will need to stay within these limitations.

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The first thing that should be added to the PCB is the mounting holes. This ensures that you do not end up having troubles finding room for the mounting holes because you have routed a lot of signals in the spot where the hole should be. To add the holes, we need to go back to the schematic editor. This is because of Eagles for- ward and back annotation, which aparently is not too good at back-annotating new components. Go back to the schematic editor and add 4 mounting holes (add mount-pad-round3.0). The placement in the schematic is not important. You will se that the mounting holes appear in the board editor right away. You should move them to appropriate places on the board. It is a good idea to align the mounting holes on some nice metric positions. Switch the grid to millimeters while placing the mounting holes. You probably want to change it back afterwards, since the 100mil grid is the standard distance between component pins.

Proposed System Layout Design:

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When all the components are placed appropriately, we are ready to start routing the PCB. This can either be done using the auto router (select the autocommand from the toolbar), or using the manual routing (the route-command). Use the auto router with caution. In particular pay attention to the signals that should be routed on a particular side of the PCB to make room for the soldering. The auto router can be restricted to work in only one layer by selecting the other layer as N/A. This may however generate some errors, since some components (SMD) are not routable on the allowed layer. For manual routing, select the route-tool. Now click on an air-wire and Eagle will start routing the connection. Use right mouse button to change the bend of the routed signal. If you need to change the routing layer during routing (by inserting a via), press the middle mouse button. Holding the shift-key while starting the routing operation allows you to route a signal from anywhere, not only the endpoints of the air-wires.

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Components placement and Soldering: Now select the move-tool and move each of the components and placing them within the board. Try to rotate the components while moving them (by right clicking), to untangle as many of the air-wires as possible. The air-wires are not automatically updated when moving the components. To do this you should use the Ratsnest-command. Since changing back and forth between the move-tool and the ratsnest-tool is quite annoying, it is a good idea to define a keyboard shortcut for this action. Go to Options → assign...and enter the command ratsnest; move for the key-combination CTRL-E. This combination will execute the ratsnest-command and change back to the move-command. Notice how using a semicolon (;) allows you to have several commands carried out by a single shortcut key, which can be very useful.

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3.2.4 System operational flow: The design phase refers to the design and construction of algorithms corresponding to systems operation.

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4. Software Programming

5. Results and Discussions 6. Conclusion The project prototype is to be built for finding the position of the fault in an underground cable. The position will be displayed in kilometres from the base and an LCD will be used to display it. This will solve the problem of finding the location of the fault in an underground cable that will improve its reliability compared to aerial conductors. As this project will ensure a more stable flow of current compared to aerial conductors, it will have a number of economic and industrial benefits. In addition, a GSM modem will be used to increase the communication range that will make it possible to inform the concerned personal in any part of the world. Future modifications and optimisations will be done in accordance to the meetings with Dr. Wlodek.

7. References Qinghai Shi, Troeltzsch U, Kanoun O. Detection and localization of cable faults by time and frequency domain measurements. Conf. Systems and Signals and Devices, 7th International conference, Amman. 2010; 1-6. B. Clegg, Underground Cable Fault Location. New York: McGraw- Hill, 1993. M.-S. Choi, D.-S. Lee, and X. Yang, “A line to ground fault location algorithm underground cable system,” KIEE Trans. Power Eng., pp. 267–273, Jun. 2005. E. C. Bascom, “Computerized underground cable fault location expertise, ”in Proc. IEEE Power Eng. Soc. General Meeting, Apr. 10–15,1994, pp. 376–382.J. Clerk Maxwell, A Treatiseon Electricity and Magnetism, 3rded., vol. 2. Oxford: Clarendon, 1892, pp.68–73.

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K.K. Kuan, Prof. K. Warwick, “ Real-time expert system for fault location on high underground distribution cables”, IEEE PROCEEDINGS-C, Vol. 139, No. 3, MAY 1992. J. Densley, “Ageing mechanisms and diagnostics for power cables—an overview,” IEEE Electr. Insul. Mag., vol. 17, no. 1, pp. 14–22, Jan./Feb. 2001. T. S. Sidhu and Z. Xu, “Detection of incipient faults in distribution underground IEEE Trans. Power Del., vol. 25, no. 3, pp. 1363–1371, Jul. 2010. Tarlochan S. Sidhu, Zhihan Xu, “Detection of Incipient Faults in Distribution Underground Cables”, IEEE Transactions on Power Delivery, Vol. 25, NO. 3, JULY 2010. Md. Fakhrul Islam, Amanullah M T Oo, Salahuddin. A. Azad1 , “Locating Underground Cable Faults: A Review and Guideline for New Development” , 2013 IEEE [10] http://www.scribd.com [11] http://ecmweb.com/content/locating-underground-cable-fault

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