Section 2 Hardware Overview
September 16, 2022 | Author: Anonymous | Category: N/A
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Section 2 Hardware Overview
Module 1 7750 Chassis Architecture
Alcatel!ucent S& 'a(ily
$ % Hardware Overview
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Alcatel!ucent S& *OM+ M,As+ and S'-s
) % Hardware Overview
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Alcatel!ucent S& S'.C-M Cards
5 % Hardware Overview
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reathrough Silicon *nnovation
FP2
100 Gb/s e c n a ( r o 2 r e -
10 Gb/s
'-1 10 4.s 6-.8M
FP1 'eature si9e
0"15:(
Array Cores
$0
M*-s 'reS'.C-M?
250 4ps ull duple@ card or 7750 S&7 >504ps per Slot? 500 4ps ull duple@ card or 7750 S&12 >504ps per Slot? ; % Hardware Overview
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*OM+ M,As+ and S'-s
*nput.Output Module >*OM?
2 M,As per *OM
S(all 'or('actor -luggale >S'-? optics
10 % Hardware Overview
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'irst 4eneration '- chipsetased H *OM2204+ *OM104 and *OM204
IOM2-20G Ctrl" &AM NPU
NPU
‘P’ Chip
‘P’ Chip
Ctrl" &AM
CAM
M
-t" &AM TO FABRIC
TM
FROM MDA
IOM-20G-B
Ctrl" &AM
M D
IOM-10G
‘Q’ Chip
TAP
M
500MHz 14 CPU
D
TAP
,&AM
D
Ctrl" &AM
NPU
NPU
‘P’ Chip
‘P’ Chip
CAM -1t" &AM
FROM MDA
TM
TO FABRIC
TAP
‘Q’ Chip
A
TM
TO MDA
FROM FABRIC
‘Q’ Chip
‘T’ Chip
-t" &AM
1 NPU
NPU
‘P’ Chip
‘P’ Chip
Ctrl" &AM
Ctrl" &AM
A
‘T’ Chip
1
CAM
Ctrl" &AM
NPU
NPU
‘P’ Chip
‘P’ Chip
1
TM
TO TO MDA
‘T’ Chip
FROM FABRIC
‘Q’ Chip -1t" &AM Ctrl" &AM
CAM
NPU
CAM
‘P’ Chip
-t" &AM
500MHz 14 CPU
Ctrl" &AM
A
,&AM
‘Q’ Chip
TO MDAs
‘Q’ Chip
400MHz 14
TO FABRIC
TM
FROM MDAs
CPU
,&AM
TM
Ctrl" &AM
Ctrl" &AM
NPU
NPU
‘P’ Chip
‘P’ Chip
FROM MDA
D A 2
-t" &AM NPU
CAM
M
-t" &AM
M
TO FABRIC
TM ‘Q’ Chip TM
TO MDA
FROM FABRIC
‘Q’ Chip -t" &AM NPU
NPU
‘P’ Chip
‘P’ Chip
Ctrl" &AM
Ctrl" &AM
11 % Hardware Overview
FROM FABRIC
Ctrl" &AM
TAP ‘T’ Chip
‘P’ Chip
D A
Ctrl"
Ctrl"
&AM
&AM
NPU
NPU
‘P’ Chip
‘P’ Chip
CAM
M
CAM -1t" &AM
TAP ‘T’ Chip
2
FROM
D A 2
TM
MDA
TO TO MDA
TAP
TM
‘T’ Chip
FROM FABRIC
‘Q’ Chip -1t" &AM
CAM
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TO FABRIC
‘Q’ Chip
Ctrl"
NPU
&AM
‘P’ Chip
CAM
50 4.s *OM$#-
High-eror(ance Switching and &outing 50 4.s perslot throughput Massive Service Scaling =10 @ service and eature scale
Massive Bueue Scaling Si(ple to ,eploy
/)
#? provides adaptation
.
Multiservice+ (ultigeneration+ 3
.
•
enhanced application supportD
M,A
M,A#- or 254 highdensity+ SyncE enaled Ethernet interaces 'ully acwards co(patile with ASA-+ CES+ A8M and Ethernet M,As *ntegrated Services Cards >*SA? or service speciali9ation >e"g" AA*SA+ *-Sec *SA+ Fideo*SA?
#
-2
-2
.
M,A#- Highlights
1p.2p.)p 104E >=p 104E per slot? 1p 104E 8unale Optics
10p.20p 4E >)0p 4E per slot?
)=p 10.100.10008@ 10.100.10008@ 4E >;/p per slot? >&="0?
p to two M,A.*SA per *OM$#-
Service &outer leadership with 504 slots and 18 syste( orwarding capacity *nvest(ent protection with (ultiservice+ (ultigeneration support
To Fa!"i#
1$ % Hardware Overview
S&7 'ront
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1) % Hardware Overview
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Alactel!ucent 7750 S&7 Syste( Architecture Architecture
15 % Hardware Overview
S&12 'ront
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1/ % Hardware Overview
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Alcatel!ucent 7750 S&12 Syste( Architecture Architecture
17 % Hardware Overview
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Module 2 7750 *OMs+ M,As+ *MMs and S'C-M
1= % Hardware Overview
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Alcatel!ucent S& *OM+ M,As+ *MMs and S'-s
1; % Hardware Overview
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Alcatel!ucent S& S'.C-M Cards
20 % Hardware Overview
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Switch 'aric . C- Module >S'.C-M?
21 % Hardware Overview
S'.C-M 'ront -anel
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22 % Hardware Overview
S'.C-M Architecture
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2$ % Hardware Overview
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Alcatel!ucent S& *OM2 Co(ponents
2) % Hardware Overview
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*OM2 Architecture 3 -acet 'low
25 % Hardware Overview
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Alcatel!ucent S& *OM$ Co(ponents
2/ % Hardware Overview
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IOM3-XP Architecture & Packet Flow
27 % Hardware Overview
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Ethernet M,A Cards >7750S& &elease 7"0?
2= % Hardware Overview
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Ethernet M,A Cards >7750S& &elease 7"0?
20@100ase'# /0 port 10.100 ase 8#
5.10 -ort 4igait Ethernet
2; % Hardware Overview
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Ethernet M,A Cards >7750S& &elease 7"0?
20 port 4igE
$0 % Hardware Overview
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Ethernet M,A Cards >7750S& &elease 7"0?
2 -ort 104igE #'-
1 port 104igE
$1 % Hardware Overview
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Channeli9ed M,A Cards >7750S& &el7"0?
$2 % Hardware Overview
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Channeli9ed M,A Cards >7750S& &el7"0?
) -ort OC$c.S8M1c
12 -ort ,S$.E$
1 -ort OC12c.S8M)c
$$ % Hardware Overview
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SO6E8.S,H M,A Cards >7750S& &el7"0?
$) % Hardware Overview
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SO6E8.S,H M,A Cards >7750S& &el7"0?
=.1/ -ort OC12c.S8M)c =.1/ -ort OC$c.S8M1c
2.) -ort OC)=c.S8M1/c
OC1;2c.S8M/)c
$5 % Hardware Overview
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A8M M,A Cards >7750S& &el7"0?
) -ort OC$c.S8M1c.OC12c.S8M)c
1/ -ort OC$c.S8M1c !E,s.'ront -anel
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$/ % Hardware Overview
Hardware Ar Architecture chitecture or the 7750 S&12 and S&7 *nput.Output
Control.'aric
Control.'aricD .
MDA, MDA-XP
. .
IOM3-XP
Multiservice
MDA * MDA-XP
FP2 50G
50 Gb/s
Switch Faric! Co"tro# Proc$ssor Mo%$ 50 Gb/s 'SF!CPM(
ISA
Switch 'aric.Control -rocessor Modules+ 2 per syste( or redundancy
8raic is loadshared across the arics >dualactive arics?
1004.s andwidth to each slot using S'.C-M)+ 504.s when S'.C-M2 or $
IMM . . . .
50 r
Mti-Cor$
!00Gb/s
CP)
FP2 50G or 100G
50 r
. .
!00 Gb/s
Redundant SF/CPM
*nput.OutputD
'-2 silicon or pacet processing+ traic (anage(ent and advanced BoS
Auto(atic detection or M,A#- >25 4.s >',?+ M,As >12 4.s >',?? and *SAs >12 4.s >',??
p to 10.20 >S&7.S&12? M,As per chassis
2 M,As or *SAs per *OM
p to 5.10 >S&7.12? *MM per chassis
++50 SR-12 or SR-+ M,A G Media ,ependent Adapter *SA G *ntegrated Service Adapter *OM G *nput.Output Module *MM G *ntegrated Media Module
used 10core C- or syste( control+ centrali9ed protocol processing and (anage(ent
$7 % *-, Hardware -ortolio -ortolio Overview % Sep10
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Switch 'aric.Control -rocessor Module ) >S'.C-M)? Switch aric scaling
6ew S'.C-M) cards or S&.ESS 7 and 12 6ew switch chip >S2?
-rovides -ro vides 100 4.s per slot capacity
Supported Conigurations
S+i'ch Fabric S'.C-M$
SR or SS SF/CPM"-#
SR or SS 12 SF/CPM"-!$
SF/CPM"-!$
,oules the acplane speed
acwards co(patile with *OM1.2+ *OM$ #- and 504 *MMs
Migration ro( S'.C-M1 or 2 to S'.C-M$ or )
Starting ro( 7"0"&15 and ="0"&7
6o rollac
6o interop o S'.C-M$ and S'.C-M)
500Gb%s &D
!'b%s &D red. $'b%s &D nnred.
S'.C-M)
SF/CPM(-#
SF/CPM(-!$
!'b%s &D
$'b%s &D red.
$= % 7@50 Hardware &elease Overview ;"0 Sales 8raining % anuary 2011
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*nput.Output Modules >*OMs?
*OM2 20 4.s >',? throughput throughput using two 10 4.s >',?orwarding >',? orwarding co(ple@es
'-1 siliconased (odular design
*OM$# 50 4.s >',? throughput using two 25 4.s >',? orwarding co(ple@es
'-2 siliconased (odular design
= ingress.= egress M,As? to (eet interace type+ speed and reach reload shared?
S'M)
6ew Switch 'aric Module >S'M)? D
18 ullduple@ capacity per switch aric . 28 syste( orwarding capacity
,oules speed o SE&,ES to /"254
1004.s capacity to each slot
Multicore C-
'ully co(patile with e@isting e@isting *OMs+ *MMs and M,As" Chassis (odes A,"
'ully redundant with high availaility
Co(prehensive C- protection
Operation supported with -EM$s+ e@isting ans
6ew ans reco((ended
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)$ % *-, Hardware -ortolio -ortolio Overview % Sep10
-ath to the 1004 *MM -lator( Evolution -ath
*ntegrated Media Modules &="0ID
FP2 (100G Layout
1004 !ayout or '-2 silicon •
6o new siliconJ
•
-2.B2 chips in each direction douling line rate o the card
•
12p 104E *MM 1p 1004E *MM
82 !in onding paralleli9es aric taps
B2 .
-2
#2
To Fa!"i#
.
K
. .
82
-2
-2
B2
82
1004 *MM eneits •
,oule the !E,s?
e@ternal
alar( *.O connector
an
Audile Alar( Cuto.!a(p 8est >ACO.!8? pushutton" L 8he 'an (odule is hotswappale L 8he syste( can operate saely without the 'an Module or up to ) (inutes
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/0 % Hardware Overview
Module ) 7705 !ine Cards
/1 % Hardware Overview
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7705 SA&= Ethernet Adapter Adapter Card
/2 % Hardware Overview
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7705 SA&= Ethernet Adapter Adapter Card
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7705 SA&= 1/port 81.E1 ASA- Adapter Card
/) % Hardware Overview
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7705 SA&= 1/port 81.E1 ASA- Adapter Card
/5 % Hardware Overview
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7705 SA&= 2 and ) port OC$.S8M1 Adapter Adapter Card
// % Hardware Overview
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7705 SA&= 2 and ) port OC$.S8M1 Adapter Adapter Card
/7 % Hardware Overview
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7705 SA&= 12 port Serial ,ata Adapter Card
/= % Hardware Overview
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