SC Filters

Switched

Capacitor Filters Franco Maloberti 

F. Maloberti Malo berti :

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OUTLINE • Switched ca capacitor te techniqu ique • Biquadratic SC filters • SC N-path filters • Finit inite e gai gain n and and ba band ndwi widt dth h ef effect ects • Layout consideration • Noise

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SWITCHED SWITC HED CAPACITOR TECHNIQUE • An active filter is made of op-amps, resistors and capacitors. • The accuracy of the filter is determined by the accuracy of the realized time costants since the capacitors and resitors are realized by uncorrelated technological steps δ τ  ----  τ 

2

2

δR δC =  ------- +  -------  R

• In CMOS MOS te tech chno nolo logy gy δ R  ⁄  R ≈ 40 40% %;

2

 C δ C  ⁄  C ≈ 30 30% %

; he henc nce e

δτ 50% %, ----- ≈ 50  τ

unacceptable for for most of the applications •Hybrid realization with functional trimming •Problems for for a fully integrated realization F. Maloberti Malo berti :

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•

Accuracy

•

Values of capacitors and resistors: for 70 nm oxide thickness 1 pF --> 2000 µ 2; 10 pF is a large la rge capacitance. capaci tance. To get ge t  τ = 10-4 sec R = 107 Ω

The above problems are solved by the use of simulated resistors made of switches and capacitors. MOS technology is suitable because: •Offset free switches switches •Good capacitors •Satisfactory •Satisfactory op-amps

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Simple SC structures  I

V1

Φ1

Φ2

C

Φ1

1

I Φ2

V1

Φ1

C

T

V2

Φ2

T

V2 1

∆Q = C1 (V1 - V2) every ∆t = T

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I

I

V1 – V2 ∆ Q = i ∆ t = ------------------- T R V1

T

V2

t

The two SC structures are (on average) equivalent to a resistor T R e q = ------C1

If the SC structures are used to get an equivalent time constant  τeq = ReqC2 it results: C2

 τ e q = T ------C1

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•

Its accuracy depends on the clock and on the capacitor matching accuracy

•

If  τeq=40 T C2 = 40 C1 (acceptable spread) regardless of the value of  τeq

A more complex SC structure: 

V1

Φ1

Φ2

Φ2

Φ1

V2

∆ Q = 2 C1 ( V1 – V2 )

The charge is transferred twice per clock period T or we assume as clock period half of the period of phases Φ1 and Φ2. F. Maloberti Malo berti :

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SC IN INTEG TEGRA RAT TOR C2 R1 _

+

Starting from the continuous-time circuit of the Integrator, we can obtain a SC integrator by replacing the continuous-time resistor with the equivalent resistances. F. Maloberti Malo berti :

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C2

Φ2

Φ1

C1

_ Φ1

+

C2 Φ2

_

Φ1

C1

Φ1

+

C2 Φ2

Φ1

C Φ2

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_

1 Φ1

+

Φ2

Φ1

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•We •We consider the samples of the input and of the output taken at the same times nT (the end of the sampling period). •

Structure 1: C1 V o u t [ ( n + 1 ) T ] = V o u t ( n T ) – ------- V i n ( n T ) C2

taking the z-transform: C1 Vou t ( z ) 1 ------------------- = – ------- ⋅ -----------C2 z – 1 V in ( z )

•

Structure 2: C1 V o u t [ ( n + 1 ) T ] = V o u t ( n T ) – ------- V i n ( n + 1 ) T ] C2

taking the z-transform: F. Maloberti Malo berti :

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C1 Vou t ( z ) z ------------------- = – ------- ⋅ -----------C2 z – 1 V in ( z )

•

Structure 3: C1 V o u t [ ( n + 1 ) T ] = V o u t ( n T ) – ------- { V in [ ( n + 1 ) T ] + V in ( n T ) } C2

taking the z-transform: C1 z + 1 Vout ( z ) = – ------- ⋅ -----------------------------C2 z – 1 Vin ( z )

Remember that for the continuous-time integrator: Vout ( s ) 1 ------------------- = – -----------------Vin ( s ) s R1 C 2

Comparing the sampled-data and continuous-time transfer functions we get: F. Maloberti Malo berti :

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•

Structure 1: T R 1 → ------C1

•

FE approximation approximation

1 (z – 1) s → --- ----------------T z

BE approximation approximation

Structure 2: T R 1 → ------C1

•

1 s → --- ( z – 1 ) T

Structure 3: T R 1 → ---------2 C1

2 (z – 1) s → --- ----------------T (z + 1)

Bilinear approximation approximation

•It does not exist a simple SC integrator which implement the LD LD approximation. •Note: the cascade of a FE integrator and a BE integrator i ntegrator is equivalent to the cascade of two LD integrators.

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C2

C1'

_ Φ 1

C2'

_

Φ 2

C1

+

Φ 1

Φ2

+

•The key key point is to introduce a full period pe riod delay from the input to the output

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•The same result is got with: C2'

C2

_ Φ1

Φ2

C1

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+

Φ2

_ Φ1

' C1

+

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STRAY STRA Y INSENSITIVE STRUCTURE The considered SC integrators are sensitive to parasitics. Toggle structure:  •

The top plate parasitic capacitance C t,1 is in parallel with C 1

•

It is not negligible with respect to C1 and it is non linear

•

The top plate parasitic capacitance Ct,1 acts as a toggle structure

Bilinear resistor: 

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Φ2

Φ1

C1

Ct,1

Cb,1

Φ2

C1

Φ1

Ct,1

Cb,1

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•

•

•

Both the parasitic capacitances Ct,1, Cb,1 act as toggle structures. Their values are different (of a factor ≈ 10) and they are non linear. Stray Stray insensitivity can be got for the first two structures if one terminal is switched between points at the same voltage. The right-side parasitic capacitor is switched between the virtual ground and ground (note: even in DC Vv.g. must equal Vground)

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Ct,1

Φ 1

Φ 2

C1

Φ1

Φ 2

Cb,1

C1 Φ1 Φ2

Φ1

Φ2

Virtual ground

C1 Φ1 Φ2

Φ1

Virtual ground

Φ2

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•

The left side capacitor is connected, during phase 1, to a voltage (or equivalent) source.

•

The charge injected into virtual ground is important, not the one furnished by the input source.

•

Structure A is equivalent to the toggle structure, but the injected charge has opposite sign.

•

Equivalent negative negative resistance allows to implement non inver inverting ting integrators.

•

It is possible to easily realize a stra st ray y insensitive bilinear resistor with fully differential configuration.

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SC BIQUADRATIC FILTERS Consider a (continuous-time) biquadratic transfer function 2

p0 + s p1 + s p2 H ( s ) = ---------------------------------------2

ω0

s + s ------- + ω 0 Q0

2

If the bilinear transformation is applied, it results a z-biquadratic z-biqu adratic transfer function 2

a0 + z a1 + z a2 H ( s ) = ---------------------------------------2 b0 + z b1 + z b2

where the coefficients are: 2 4 a 0 = p 0 – --- p 1 + ------2 p 2 T T

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8 a 1 = 2 p 0 – ------2 p 2 T 2 4 a 2 = p 0 + --- p 1 + ------2 p 2 T T

b0 = ω0

2

2 ω0 4 – --- ------ + -----T Q T2

2 8 b 1 = 2 ω 0 – -----2 T

b2 = ω0

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2 ω0 4 + --- ------ + -----T Q T2

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All the stable z-biquadratic transfer functions are realized by the topology: E C F D 1

G B

-

A

H

+

V01 +

V02

I

J

F1

F2

Vin

t

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Features:  •Loop of two integrators one inver inverting ting and the other noninver noninverting. ting. •Damping around the loop provided by capacitor F or (and) capacitor E (usually only E or F are included in the network). •Two outputs available V0,1 V0,2. •Denominator of the transfer function determined by the capacitors along the loop (A, B, C, D, E, F). •Transmission zeros (numerator) realized by the capacitors (G, H, I, J). •Input signal sampled during Φ1 and held for a full clock period •Charge injected into the virtual ground during Φ1. F. Maloberti Malo berti :

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Charge conservation equations:  DV0,1(n+1) = DV0,1(n) - GVin(n+1) + HVin(n) - CV0,2(n+1) - E[V0,2(n+1) - V0,2(n)] (B + F)V0,2(n+1) = BV0,2(n) + AV0,1(n) - IVin(n+1) + JVin(n)

Taking the z-transform and solving, it results: H1

2 V 0, 1 ( IC + IE – GF – GB )z + ( FH + BH + B G – JC – J E – IE )z + ( EJ – BH) = ----------- = ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------2 Vin ( DB + DF )z + ( AC + AE – 2DB – DF )z + ( DB – AE )

H2

2 V 0, 2 DIz + ( AG – DI – DJ )z + ( DJ – AH) = ----------- = ------------------------------------------------------------------------------------------------------------------------------------------2 Vin ( DB + DF )z + ( AC + AE – 2DB – DF )z + ( DB – AE )

•

10 Capacitors

•

6 Equations a0, a1, a2, b0, b1, b2

•

Dynamic range optimization

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•

Scaling for minimum total capacitance in the groups of capacitors connected to the virtual ground of the op-amp 1 and the op-amp2.

•

Since there are 9 conditions, one capacitor can be set equal to zero E=0 “F type”

F=0

“E type”

Firstly the 6 equations are satisfied. Later capacitors D and A are adjusted in order to optimize the dynamic range. Finally Finall y all the capacitor connected to the virtual ground of the op-amp are normalized to the smaller of the group.

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Scaling for minimum total capacitance  Cn

C1 _ C2 + C3

C4

Assume that C3 is the smallest capacitance of the group. In order to make minimum the total capacitance C3 must be reduced to the smallest value allowed by the technology (Cmin) •

Multiply all the capacitors of the group by C mi n k = -----------C3

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SC LADDER FILTERS Orchard’s observation  Doubly-terminated LC ladder network that are designed to effect maximum power transfer from source to load over the filter passband feature very low sensitivities to value component variation. Syntesis of SC Ladder Filters:  Symple approach •

Replace every every resistance Ri in an active ladder structure with a switched capacitor Ci = T/Ri.

•

Use a full clock period delay delay along all the two t wo integrator loop (it results automatically verified in single ended schemes).

It results an LD equivalent, except for the terminations.

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Quasi LD transformation:  DESIRED SPECIFICATION

    n     o       i      t       a      u      n     e       t      t        A

Asb

Apb wpb

wsb

w

PREWARPED SPECIFICATION

    n     o       i      t       a      u      n     e       t      t        A

Asb

Apb w sin( w pb T/2)

sin( w sb T/2)

Prewarp the specifications using sin(ωT/2) F. Maloberti Malo berti :

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Effect of the terminations:  C3

R

C2

 _ R 1

_

C1

+

C2 _ +

R3 C1 H D I ( s ) = --------------------------------------- if R1 = T/ C1 and R3 = T/C3 we get: H D I ( s ) = ---------------------------s C2 R1 R3 + R1 s T C2 + C3 Vo u t ( n + 1 ) ( C2 + C3 ) = V o u t ( n ) C2 + C1 Vi n ( n )

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Taking the z-transform we get:

z V o u t ( C2 + C3 ) = C2 Vo u t + C1 Vi n – 1  ⁄  2

C1 C1 z H D I ( z ) = -------------------------------------------------------------------------------- = -----------------------------------------------------------------1  ⁄  2 1  ⁄  2 – 1  ⁄  2 C2 ( z – 1 ) + z C3 ) + z C3 C2 ( z –z

along the unity circle z=e jωT – j ω T  ⁄  2

 j ω T

HDI ( e

– j ω T  ⁄  2

C1 e C1 e ) = -------------------------------------------------------------------------------------------------------------------------- = -------------------------------------------------------------------------------- j ω T  ⁄  2  j ω T  ⁄  2 – j ω T  ⁄  2 ωT ωT C2 ( e –e C3 )+e 2 j ( C 2 + C 3 ) sin -------- + C 3 cos -------2 2

The half clock period delay will be used in the cascaded integrator in order to get the LD transformation •

The termination is complex and frequency dependent.

•

The integrating capacitor C2 must be replaced by C2 + C3 /2.

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Complex termination:  C3

C1

C2 _ F1

+

Note: the output voltage changes during Φ 2

Vo u t ( n + 1 ) C2

C2 = V o u t ( n ) -------------------- + C 1 V i n ( n ) C2 + C3

Taking the z-transform: C2 C3 z V o u t C 2 = V o u t  C 2 – --------------------  + C 1 V i n  C 2 + C 3

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– 1  ⁄  2

C1 C1 z H D I ( z ) = ---------------------------------------------------- = ---------------------------------------------------------------------------------------------------------------------------C2 C3 – 1  ⁄  2 – 1  ⁄  2 C 2 C 3 1  ⁄  2 C 2 ( z – 1 ) + -------------------–z )+z C2 ( z -------------------C2 + C3 C2 + C3

along the unity circle z=e jωT – j ω T  ⁄  2

 j ω T

HDI ( e

•

•

C1 e ) = --------------------------------------------------------------------------------------------------------------C C C2 C3 ωT 1 2 3 ωT 2 j  C2 – -- --------------------  sin -------- + -------------------- cos ------- 2 2 C 2 + C 3 C2 + C3 2

The imaginary part of the contribution of the termination is negative The integrating capacitor

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C2

must be replaced by

1 C2 C3 C 2 – -- -------------------2 C2 + C3

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Example: 5th order filter  RS

IS

L2

L4

V1

V3

Vin

I2

Passive prototype

R6

Vin

_V 1

_

+

_1/s  τ 1

R/Rs

Vs

C3

_1/s  τ 2

_ 1/s  τ 3 _V 2

+

+

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V4

+

_V 5

_1/s τ5

_ 1/s τ 4

_

_ R/R 6 +  _ V6

+ 1

1

   -

 τ3

    +

 τ5

    +

T

 τ2    -

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_

T

T

1

_

+

 τ1

1

C5

1

   -

implementa-

V3

_

_

1

SC tion

I6

I4

C1

Flow diagram

Vout

V5

   -

T

      +

1

1

 τ4

      +

   -

T

1

      +

1

1

33

FINITE GAIN AND BANDWIDTH EFFECT C2

C1

_

+

If the op-amp has finite gain A0 the “virtual ground” voltage is V0 /A0 V0 ( n + 1 ) 1 1 C 2 V 0 ( n + 1 )  1 + ------ = C 2 V 0 ( n )  1 + ------ – C 1 V i n ( n + 1 ) + ------------------------  A 0 A 0 A0

z-transforming: Vo ( z ) C1 z H ( z ) = ---------------- = – ---------------------------------------------------------------Vin ( z ) C1 1 C 2  1 + ------ ( z – 1 ) + ------- z  A0 A 0 F. Maloberti Malo berti :

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Comparing H(z) with the transfer function with

A0 → ∞

C1 z H i d ( z ) = – -----------------------C2 ( z – 1 ) H (z) H (z) H (z) id id id H ( z ) = ---------------------------------------------------------- = ----------------------------------------------------------------------------------- = ---------------------------------------------------------------------------------------C C C  C  1 z 1 1 1 1 1 1 1 1 1 z+1 1  1 + ------ 1 + ------- + ---------------  ------------ + -- + --  + --------------- -----------1 + + + -------------------------------------------------    A  C2 A0 z – 1 A  C 2 A 0  z – 1 2 2 2 C A  2C A z – 1 A  0 0 2 0 2 0 0

Substituting z = esT, on the imaginary axis  j ω T

 j ω T

) H (e ) H (e  j ω T id id H ( e ) = ----------------------------------------------------------------------------------------------------- = ------------------------------------------C C 1 – m ( ω ) – j θ ( ω ) 1 1 1 1 + ------- + ------------------- – j --------------------------------------------------A 0 2 C 2 A 0 2 C 2 A0 tan ( ω T  ⁄  2 )

Magnitude error Phase error F. Maloberti Malo berti :

C  1 1 m ( ω ) = – ------  1 + ----------- A0  2 C 2

C1 C1 θ ( ω ) = ------------------------------------------------ ≅ ----------------------2 C A tan ( ω T  ⁄  2 ) C A ω T 2 0 2 0

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For the noninverting integrator C2

C1

_

+

V0 ( n + 1 ) 1 1 C 2 V 0 ( n + 1 )  1 + ------ = C 2 V 0 ( n )  1 + ------ + C 1 V i n ( n ) + ------------------------  A 0 A 0 A0

z-transforming and solving Vo ( z )

C1

V in ( z )

C1 1  C 2 1 + ------ ( z – 1 ) + ------- z  A0 A 0

H ( z ) = ---------------- = -------------------------------------------------------------------------------------------------------

Same magnitude and phase error result F. Maloberti Malo berti :

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FULLY DIFFERENTIAL CIRCUITS •Fully differential configurations reduce the clock feedthrough feedthrough noise and increase the dynamic range. •They allow an increase design flexibility C2 C1

(Φ2) _

Φ2 Φ1

Φ2

Φ1

(Φ1)

+

Φ2

Simple integrator (inverting and non inverting)

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Immediate sampling (inverting and non inverting) integrator: Vin -Vin

Φ1 Φ2

Φ1 Φ2

_

Φ1

-Vin Vin

Φ1 Φ2

Φ1

+

Φ1

Φ2

Delayed sampling (inverting and non inverting) integrator: Vin -Vin

Φ1 Φ2

Φ1 Φ2

_

Φ2

-Vin Vin

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Φ1 Φ2

Φ1 Φ2

+

Φ2

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•It is possible to reduce the op-amp o p-amp finite bandwidth dependence by the use of delayed delayed sampling inverting and non inver inverting ting integrators along a second order loop. Φ1

Φ1 Φ2

Φ2

Φ1

Φ1 Φ2

Φ2

 _   _ 

      +

Φ2

Φ2 Φ1

Φ2 Φ1

F. Maloberti Malo berti :

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Φ1

Φ1

Φ2

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•The peaking in the frequency response due to the phase error is strongly reduced •It is easy to realize reali ze bilinear integrators Vin

C1 Φ

C2

1 Φ

Φ2

1

Φ2

 _ 

C1 Φ

 _ V in

2

+ Φ1

Φ1

Φ

2

C2

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NOISE IN SC CIRCUI CIRCUITS TS The noise sources in a SC network are: •

Clock feedthrough noise

•

Noise coupled from power supply lines and substrate

•

kT/C noise

• Noise generators of the op-amp The first two sources are the same as in mixed analog-digital circuits.

kT/C noise: 

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Consider the simple network: vin S1

In the “on” state the switch can be modeled with a noisy resitor

C

Noise equivalent circuit: Ron S1 4kTRon

f 

C

The white spectrum of the “on” resistance is shaped by the low pass F. Maloberti Malo berti :

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action of the RonC filter. The noise voltage across the capacitor C has spectrum: 4kTR o n ∆ f 2 2 S n ,c = v n, c = 4kTR o n H ( f ) ∆ f = ----------------------------------------2 1 + ( 2 π f Ron C )

When the switch is turned “off” the noise voltage vn,c is sampled and held onto C S

f 

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The folding of the spectrum in band-base gives a white spectrum. * v n,c

f CK /2

f 

It power (the dashed area) is equal to the integral of Sn,c 2 v n, c

∞

=

4kTR o n ∆ f 4kT ∞ kT ( ) d f = atan x = -------------------------------------------------------- ∫  0 2 2πC C + π ( ) 1 2 f R C 0 on

Procedure for the noise calculation in SC networks:  F. Maloberti Malo berti :

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