sample acknowledgement

MINING FREQUENT ITEMSETS USING HIGH- SPEED ALGORITHMS AND FP-TREES A PROJECT REPORT Submitted by

ANTONY JAYASEELAN.G MUTHU KUMARAN.D PRAVVEEN.G RAKESH.R in partial fulfillment for the award of the degree of

BACHELOR OF ENGINEERING IN

COMPUTER SCIENCE AND ENGINEERING SAVEETHA ENGINEERING COLLEGE, CHENNAI – 602 105

ANNA UNIVERSITY : CHENNAI 600 025 April 2009

ANNA UNIVERSITY : CHENNAI 600 025 BONAFIDE CERTIFICATE Certified that this project report “MINING OF THE FREQUENT ITEMSET MINING USING

HIGH SPEED ALGORITHMS AND FP-TREES” is the

bonafide work of

“ANTONY JAYASEELAN.G (21605104003), MUTHU

KUMARAN.D

(21605104027),

PRAVVEN.G

(21605104035),

RAKESH.R

(21605104039)”, who carried out the project work under my supervision.

SIGNATURE

SIGNATURE

Dr.P.Palaniswamy, M.Tech(IIT-M), Ph.D(IISc)

Mr.Mohana Prakash.T.A, B.E

HEAD OF THE DEPARTMENT

SUPERVISOR LECTURER

Computer Science & Engineering

Computer Science & Engineering

Saveetha Engineering College,

Saveetha Engineering College,

Saveetha Nagar,

Saveetha Nagar,

Thandalam,

Thandalam,

Chennai – 602 105

Chennai – 602 105

INTERNAL EXAMINER

EXTERNAL EXAMINER

ACKNOWLEDGMENT We express our deepest gratitude to our President Dr.N.M.Veeraiyan, for his invaluable guidance and blessings. We are very grateful to our Principal Dr.Venkatasamy.R for providing us with an environment to complete our project successfully. We would like to thank Prof.R.Dheenadayalu, B.E, M.Sc (Engg.) Dean (ICT) for his unwavering support during the entire course of this project work. We are deeply indebted to our Head of the Department Dr. P.Palaniswamy, M.Tech (IIT Madras), Ph.D (IISC), who modeled us both technically and morally for achieving greater success in life. We express our sincere thanks to Senior Lecturer Mr.Saravanan.R, for his constant encouragement and support throughout our course, especially for the useful suggestions given during the course of the project period. We are very grateful to our internal guide Mr.Mohana Prakash.T.A, Lecturer, for being instrumental in the completion of our project with his complete guidance. We would also like to thank our Project Coordinator Mr.Sridharan.K for his support during the entire course of this project work. We also thank all the staff members of our college and technicians for their help in making this project a successful one. Finally, we take this opportunity to extend our deep appreciation to our family and friends, for all that they meant to us during the crucial times of the completion of our project.

ABSTRACT Efficient algorithms for mining frequent itemsets are crucial for mining association rules as well as for many other data mining tasks. Methods for mining frequent itemsets have been implemented using a prefix-tree structure, known as an FP-tree, for storing compressed information about frequent itemsets. Numerous experimental results have demonstrated that these algorithms perform extremely well. In this paper, we present a novel FP-array technique that greatly reduces the need to traverse FP-trees, thus obtaining significantly improved performance for FPtree-based algorithms. Our technique works especially well for sparse data sets. Furthermore, we present new algorithms for mining all, maximal, and closed frequent itemsets. Our algorithms use the FP-tree data structure in combination with the FParray technique efficiently and incorporate various optimization techniques. Even though the algorithms consume much memory when the data sets are sparse, they are still the fastest ones when the minimum support is low. Moreover, they are always among the fastest algorithms and consume less memory than other methods when the data sets are dense. This algorithm can be applied to various applications like Banking, Insurance, and Departmental Stores etc. We implementing this algorithm adopted especially for banking application

TABLE OF CONTENTS

CHAPTER NO.

TITLE

PAGE NO.

ABSTRACT

i

LIST OF TABLES

ii

LIST OF FIGURES

iii

LIST OF ABBREVIATIONS

iv

TABLE OF CONTENTS

CHAPTER NO.

1.

2.

3.

TITLE

PAGE NO.

INTRODUCTION

2

1.1 ABSTRACT

2

LITERATURE REVIEW

3

2.1 EXISTING SYSTEM

3

2.2 PROPOSED SYSTEM

3

DESIGN

4

3.1 ARCHITECTURAL DESIGN

4

3.1.1 Proposed System Architecture 3.2 SYSTEM DESIGN

4 5

3.2.1 Module Description

5

3.2.2 Data Flow Diagram

8

3.2.3 Class Diagram

9

3.2.4 SequenceDiagram

10

3.2.5 ER Diagram

11

3.3 SYSTEM REQUIREMENTS 3.3.1 Hardware Requirements

12

3.3.2 Software Requirements

12

REFERENCES SAMPLE CODE APPENDIX A – SAMPLE INTERFACE SCREENS APPENDIX B – RESULTS AND ANALYSIS