RC Phase Shift Oscillator Full Derivation

D ERIVATIONS

OF

S ELECTED

E QUATIONS

Equation 2–3 The average value of a half-wave rectified sine wave is the area under the curve divided by the period (2p). The equation for a sine wave is v = Vpsin u p Vp area 1 = Vpsin u du = (-cos u)|p0 2p 2p L0 2p Vp Vp Vp = 3-cos p - (-cos 0)4 = 3-(-1) - (-1)4 = (2) 2p 2p 2p Vp = p

VAVG =

VAVG

Equation 2–12 Refer to Figure B–1.

vC = Vp(rect)e

–

t RLC

Vp(rect)

0

Vr( pp)

tdis T

䊱

FIGURE B–1

When the filter capacitor discharges through RL, the voltage is vC = Vp(rect)e - t>RLC Since the discharge time of the capacitor is from one peak to approximately the next peak, tdis ⬵ T when vC reaches its minimum value. vC(min) = Vp(rect)e - T>RLC Since RC W T, T/RLC becomes much less than 1 (which is usually the case); e - T>RLC approaches 1 and can be expressed as e - T>RLC ⬵ 1 -

T RLC

Appendix

B

B-2

◆

A PPENDIX B

Therefore, vC(min) = Vp(rect) a1 -

T b RLC

The peak-to-peak ripple voltage is Vr(pp) = Vp(rect) - VC(min) = Vp(rect) - Vp(rect) + Vr(pp) ⬵ a

Vp(rect)T RLC

Vp(rect)T =

RLC

1 bV fRLC p(rect)

Equation 2–13 To obtain the dc value, one-half of the peak-to-peak ripple is subtracted from the peak value. VDC = Vp(rect) VDC = a1 -

Vr(pp) 2

= Vp(rect) - a

1 bV 2fRLC p(rect)

1 bV 2fRLC p(rect)

Equation 6–1 The Shockley equation for the base-emitter pn junction is IE = IR(eVQ>kT - 1) where IE IR V Q k T

= = = = = =

the total forward current across the base-emitter junction the reverse saturation current the voltage across the depletion layer the charge on an electron a number known as Boltzmann’s constant the absolute temperature

At ambient temperature, Q>kT ⬵ 40, so IE = IR(eV40 - 1) Differentiating yields dIE = 40IReV40 dV Since IReV40 = IE + IR, dIE = 40(IE + IR) dV Assuming IR 6 6 IE, dIE ⬵ 40IE dV The ac resistance r¿e of the base-emitter junction can be expressed as dV>dIE. r¿e =

dV 1 25 mV ⬵ ⬵ dIE 40IE IE

Equation 6–14 The emitter-follower is represented by the r parameter ac equivalent circuit in Figure B–2(a).

D ERIVATIONS

C R1

βac Ib

βac Ib Rs || R1 || R2

B Rs

r ′e

r ′e E

Vs

R2

RE

Ie

(a) 䊱

RE

Ve = Vout

(b)

FIGURE B–2

Conventional current direction shown.

By thevenizing from the base back to the source, the circuit is simplified to the form shown in Figure B–2(b). Vout = Ve, Iout = Ie, and Iin = Ib. Ve Ie Ie ⬵ b acIb

Rout =

With Vs = 0 and with Ib produced by Vout, and neglecting the base-to-emitter voltage drop (and therefore r¿e), Ib ⬵

Ve R1 || R2 || Rs

Assuming that R1 7 7 Rs and R2 7 7 Rs, Ib ⬵

Ve Rs

b acVe Rs Ve Ve Rs = = = Ie b acVe>Rs b ac

Iout = Ie = Vout Iout

Looking into the emitter, RE appears in parallel with Rs>b ac. Therefore, Rout = a

Rs b || RE b ac

Midpoint Bias (Chapter 8) The following proof is for the equation on page 400 that shows ID ⬵ 0.5IDSS when VGS = VGS(off )/3.4. Start with Equation 8–1: ID ⬵ IDSS a1 -

VGS VGS(off)

b

2

Let ID = 0.5IDSS. 0.5IDSS = IDSS a1 -

VGS VGS(off)

b

2

OF

S ELECTED E QUATIONS

◆

B-3

B-4

◆

A PPENDIX B

Cancelling IDSS on each side, 0.5 = a1 -

VGS VGS(off)

b

2

We want a factor (call it F) by which VGS(off) can be divided to give a value of VGS that will produce a drain current that is 0.5IDSS. 0.5 = J 1 -

Solving for F,

10.5 = 1 -

a

a

VGS(off) F

b

VGS(off)

VGS(off) F

b

K

= 1 -

VGS(off)

10.5 - 1 = -

2

1 F

1 F

1 = 1 - 10.5 F 1 F = ⬵ 3.4 1 - 10.5 Therefore, ID ⬵ 0.5IDSS when VGS = VGS(off)/3.4.

Equation 9–2 ID ⬵ IDSS a1 = IDSS a1 -

IDRS 2 IDRS IDRS b = IDSS a1 b a1 b VGS(off) VGS(off) VGS(off) 2IDRS I2DR2S 2IDSSRS IDSSR2S 2 + 2 b = IDSS ID + 2 ID VGS(off) VGS(off) VGS(off) VGS(off)

Rearranging into a standard quadratic equation form, a

IDSSR2S V2GS(off)

bI2D - a1 +

2IDSSRS b I + IDSS = 0 VGS(off) D

The coefficients and constant are A =

R2SIDSS V2GS(off)

B = - a1 +

2RSIDSS b VGS(off)

C = IDSS In simplified notation, the equation is AI2D + BID + C = 0 The solutions to this quadratic equation are ID =

-B ; 2B2 - 4AC 2A

Equation 9–10 A general model of a switched-capacitor circuit, as shown in Figure B–3(a), consists of a capacitor, two voltage sources, V1 and V2, and a two-pole switch. Let’s examine this circuit

D ERIVATIONS

OF

S ELECTED E QUATIONS

B-5

◆

0 T/2 T I1

1

V1

Position 1

2 C

V2

Position 2 T/2

0 (a) 䊱

Position 1

Position 1 Position 2

T

(b)

FIGURE B–3

for a specified period of time, T. Assume that V1 and V2 are constant during the time period T and V1 7 V2. Of particular interest is the average current I1 produced by the source V1 during the time period T. During the first half of the time period T, the switch is in position 1, as indicated in Figure B–3(b). The capacitor charges very rapidly to the source voltage V1. Therefore, an average current I1 due to V1 is charging the capacitor during the interval from t = 0 to t = T/2. During the second half of the time period, the switch is in position 2, as indicated. Because V1 7 V2, the capacitor rapidly discharges to the voltage V2. The average current produced by the source V1 over the time period T is I1(avg) =

Q1(T/2) - Q1(0) T

Q1(0) is the charge at t = 0 and Q1(T/2) is the charge at t = T/2. Therefore, Q1(T/2) - Q1(0) is the net charge transferred while the switch is in position 1. The capacitor voltage at T/2 is equal to V1, and the capacitor voltage at 0 or T is equal to V2. By substituting CV for Q in the previous equation, I1(avg) =

CV1(T/2) - CV2(0) T

=

C1V1(T/2) - V2(0)2 T

Since V1 and V2 are assumed to be constant during T, the average current can be expressed as I1(avg) =

C(V1 - V2) T

Figure B–4 shows a conventional resistive circuit with two voltage sources. From Ohm’s law, the current is I1 =

I1 V1

V1 - V2 R

The current I1(avg) in the switched-capacitor circuit is equal to I1 in the resistive circuit. I1(avg) =

C(V1 - V2) V1 - V2 = T R

By solving for R and canceling the V1 - V2 terms, T(V1 - V2) C(V1 - V2) T R = C

R =

As you can see, a switched-capacitor circuit can emulate a resistor with a value determined by the time period T and the capacitance C. Remember that the two-pole switch is in each position for one-half of the time period T and that you can vary T by varying the frequency at which the switches are operated.

䊱

F I G U R E B –4

R V2

B-6

◆

A PPENDIX B

Since T = 1/f, the resistance in terms of frequency is R =

1 fC

Equation 10–1 An inverting amplifier with feedback capacitance is shown in Figure B–5. For the input, I1 = Factoring V1 out, I1 =

V1 - V2 XC

V1(1 - V2 > V1) XC

The ratio V2>V1 is the voltage gain, -Av. I1 = 䊳

V1(1 + Av) V1 = XC XC > (1 + Av) C

FIGURE B–5

I1

I2 Av

V1

The effective reactance as seen from the input terminals is XCin(Miller) =

XC 1 + Av

or 1 1 = 2pfCin(Miller) 2pfC(1 + Av) Cancelling and inverting, Cin(Miller) = C(Av + 1)

Equation 10–2 For the output in Figure B–6, I2 = Since V1>V2 = -1>Av, I2 =

V2(1 - V1>V2) V2 - V1 = XC XC

V2(1 + 1>Av) XC

=

V2 V2 = XC>(1 + 1>Av) XC>[(Av + 1)>Av]

The effective reactance as seen from the output is XC (Av + 1)>Av 1 = 2pfC[(Av + 1)>Av]

XCout(Miller) = 1 2pfCout(Miller)

V2

D ERIVATIONS

Cancelling and inverting yields Cout(Miller) = C a

Av + 1 b Av

Equations 10–29 and 10–30 The total gain, Av(tot), of an individual amplifier stage at the lower critical frequency equals the midrange gain, Av(mid), times the attenuation of the high-pass RC circuit. Av(tot) = Av(mid) a fcl =

R 2R + 2

X2C

b = Av(mid) a

1

21 + X2C>R2

b

1 2pRC

Dividing both sides by any frequency f, fcl 1 = f (2pfC)R Since XC = 1 > 2pfC, fcl XC = f R Substitution in the gain formula gives Av(tot) = Av(mid) a

1

21 + ( fcl>f )2

b

The gain ratio is Av(tot) Av(mid)

1

=

21 + ( fcl>f )2

For a multistage amplifier with n stages, each with the same fcl and gain ratio, the product of the gain ratios is a

1

21 + ( fcl>f )2

b

n

The critical frequency f cl ¿ of the multistage amplifier is the frequency at which Av(tot) = 0.707Av(mid), so the gain ratio at f cl ¿ is Av(tot) Av(mid)

= 0.707 =

1 1 = 1.414 12

Therefore, for a multistage amplifier, n 1 1 1 = c d = 12 21 + ( fcl>f c¿ l)2 (21 + ( fcl>f c¿ l)2)n

So 21/2 = (21 + ( fcl>f cl ¿ )2)n Squaring both sides, 2 = (1 + ( fcl>f cl ¿ )2)n

OF

S ELECTED E QUATIONS

◆

B-7

B-8

◆

A PPENDIX B

Taking the nth root of both sides,

21>n = 1 + ( fcl>f cl ¿ )2

fcl 2 b = 21>n - 1 f cl ¿ fcl a b = 221>n - 1 f cl ¿ fcl f cl ¿ = 1>n 22 - 1

a

A similar process will give Equation 10–30: f cu ¿ = fcu 221>n - 1

Equations 10–31 and 10–32 The rise time is defined as the time required for the voltage to increase from 10 percent of its final value to 90 percent of its final value, as indicated in Figure B–6. Expressing the curve in its exponential form gives v = Vfinal(1 - e - t>RC) When v = 0.1Vfinal, 0.1Vfinal = Vfinal(1 - e - t>RC) = Vfinal - Vfinale - t>RC Vfinale - t>RC = 0.9Vfinal e - t>RC = 0.9 ln e - t>RC = ln (0.9) t = -0.1 RC t = 0.1RC 䊳

FIGURE B–6 Vfinal 0.9 Vfinal

Vfinal 1 – e

–

t RC

0.1 Vfinal 0

tr

When v = 0.9Vfinal, 0.9Vfinal = Vfinal(1 - e - t>RC) = Vfinal - Vfinale - t>RC Vfinale - t>RC = 0.1Vfinal ln e - t>RC = ln (0.1) t = -2.3 RC t = 2.3RC

t

D ERIVATIONS

The difference is the rise time. tr = 2.3RC - 0.1RC = 2.2RC The critical frequency of an RC circuit is 1 2pRC 1 RC = 2pfc fc =

Substituting, 2.2 0.35 = 2pfcu fcu 0.35 = tr

tr = fcu In a similar way, it can be shown that

fcl =

0.35 tf

Equation 12–21 The formula for open-loop gain in Equation 12–19 can be expressed in complex notation as Aol =

Aol(mid) 1 + jf>fc(ol)

Substituting the above expression into the equation Acl = Aol>(1 + BAol) gives a formula for the total closed-loop gain. Acl =

Aol(mid)>(1 + jf>fc(ol))

1 + BAol(mid)>(1 + jf>fc(ol))

Multiplying the numerator and denominator by 1 + jf>fc(ol) yields Acl =

Aol(mid) 1 + BAol(mid) + jf>fc(ol)

Dividing the numerator and denominator by 1 + BAol(mid) gives Acl =

Aol(mid)>(1 + BAol(mid))

1 + j[ f>( fc(ol)(1 + BAol(mid)))]

The above expression is of the form of the first equation Acl =

Acl(mid) 1 + jf>fc(cl)

where fc(cl) is the closed-loop critical frequency. Thus, fc(cl) = fc(ol)(1 + BAol(mid))

Equation 14–1 In Figure B–7 the common-mode voltage, Vcm, on the noninverting input is amplified by the small common-mode gain of op-amp A1. (Acm is typically less than 1.) The total output voltage of op-amp A1 is Vout1 = a1 +

R1 R1 bV - a bVin2 + Vcm RG in1 RG

OF

S ELECTED E QUATIONS

◆

B-9

B-10

◆

A PPENDIX B

A similar analysis can be applied to op-amp A2 and results in the following output expression: Vout2 = a1 +

Vin1 + Vcm

+

Vout1 R3

A1 –

R2 R2 bV - a bVin1 + Vcm RG in2 RG

R1

–

R2

RG

+ A2

Vin2 + Vcm

Vout = Acl (Vin2 – Vin1)

A3

–

䊱

R5

+

R4 Vout2

R6

FIGURE B–7

Op-amp A3 has Vout1 on one of its inputs and Vout2 on the other. Therefore, the differential input voltage to op-amp A3 is Vout2 - Vout1. Vout2 - Vout1 = a1 +

R2 R1 R2 R1 + bVin2 - a1 + + bV + Vcm - Vcm RG RG RG RG in1

For R1 = R2 = R, Vout2 - Vout1 = a1 +

2R 2R bV - a1 + bV + Vcm - Vcm RG in2 RG in1

Notice that, since the common-mode voltages (Vcm) are equal, they cancel each other. Factoring out the differential gain gives the following expression for the differential input to op-amp A3: Vout2 - Vout1 = a1 +

2R b(Vin2 - Vin1) RG

Op-amp A3 has unity gain because R3 = R5 = R4 = R6 and Av = R5/R3. = R6/R4. Therefore, the final output of the instrumentation amplifier (the output of op-amp A3) is Vout = 1(Vout2 - Vout1) = a1 +

2R b(Vin2 - Vin1) RG

The closed-loop gain is Vout Vin2 - Vin1 2R Acl = 1 + RG Acl =

Equation 16–1 R(-jX)>(R - jX) Vout R(-jX) = = Vin (R - jX) + R(-jX)>(R - jX) (R - jX)2 - jRX

D ERIVATIONS

Multiplying the numerator and denominator by j, Vout RX RX = = Vin j(R - jX)2 + RX RX + j(R2 - j2RX - X2) RX RX = = 2 2 RX + jR + 2RX - jX 3RX + j(R2 - X2) For a 0° phase angle there can be no j term. Recall from complex numbers in ac theory that a nonzero angle is associated with a complex number having a j term. Therefore, at fr the j term is 0. R2 - X2 = 0 Thus, Vout RX = Vin 3RX Cancelling yields Vout 1 = Vin 3

Equation 16–2 From the derivation of Equation 16–1, R2 - X2 = 0 R2 = X2 R = X Since X =

1 , 2pfrC 1 2pfrC 1 fr = 2pRC

R =

Equations 16–3 and 16–4 The feedback circuit in the phase-shift oscillator consists of three RC stages, as shown in Figure B–8. An expression for the attenuation is derived using the mesh analysis method for the loop assignment shown. All Rs are equal in value, and all Cs are equal in value. (R - j1>2pfC)I1 - RI2 + 0I3 = Vin -RI1 + (2R - j1>2pfC)I2 - RI3 = 0 0I1 - RI2 + (2R - j1>2pfC)I3 = 0 C

Vin

䊱

FIGURE B–8

C

I1

R

C

I2

R

I3

R

Vout

OF

S ELECTED E QUATIONS

◆

B-11

B-12

◆

A PPENDIX B

In order to get Vout, we must solve for I3 using determinants: 3

(R - j1>2pfC) -R 0

-R (2R - j1>2pfC) -R

Vin 0 0

3

(R - j1>2pfC) -R 0

-R (2R - j1>2pfC) -R

0 3 -R (2R - j1>2pfC)

I3 =

I3 =

3

R2Vin (R - j1>2pfC)(2R - j1>2pfC)2 - R2(2R - j1>2pfC) - R2(R - 1>2pfC)

Vout RI3 = Vin Vin =

R3 (R - j1>2pfC)(2R - j1>2pfC)2 - R3(2 - j1>2pfRC) - R3(1 - 1>2pfRC)

=

R3 R3(1 - j1>2pfRC)(2 - j1>2pfRC)2 - R3[(2 - j1>2pfRC) - (1 - j1>2pfRC)]

=

R3 R3(1 - j1>2pfRC) (2 - j1>2pfRC)2 - R3(3 - j1>2pfRC)

Vout 1 = Vin (1 - j1>2pfRC) (2 - j1>2pfRC)2 - (3 - j1>2pfRC) Expanding and combining the real terms and the j terms separately. Vout = Vin

1 5 6 1 a1 b - ja b 2 2 2 2 2pfRC 4p f R C (2pf )3R3C 3

For oscillation in the phase-shift amplifier, the phase shift through the RC circuit must equal 180°. For this condition to exist, the j term must be 0 at the frequency of oscillation fr. 6 1 = 0 2pfrRC (2pfr)3R3C3 6(2p)2fr2R2C2 - 1 (2p)3fr3R3C3

= 0

6(2p)2fr2R2C2 - 1 = 0 1 6(2p)2R2C2 1 fr = 2p16RC

fr2 =

Since the j term is 0, Vout = Vin

1 5 1 2 2 2 2 4p fr R C

1 = 1 -

5 a

=

1 1 = 1 - 30 29

2 1 b R2C2 16RC

The negative sign results from the 180° inversion. Thus, the value of attenuation for the feedback circuit is B =

1 29