Protection of distribution transformer by using SCADA
Short Description
protecting the distribution transformer by implementing "SCADA" technology....
Description
APPLICATION OF “SCADA” FOR DISTIBUTION TRANSFORMER PROTECTION CONTENTS: ABSTRACT
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CHAPTER 1 1.1
INTRODUCTION
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1.2
BLOCK DIAGRAM
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1.3
CIRCUIT ANALYSIS
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1.3.1 LOAD MONITORING CIRCUIT
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1.3.2 HIGH VOLTAGE MONITORING CIRCUIT
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1.3.3 TEMPERATURE SENSENING CIRCUIT
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1.3.4 ANALOG TO DIGITAL CONVERTER
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1.3.5 CLOCK GENERATOR
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1.3.6 DIGITAL DISPLAY
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1.3.7
F.M TRANSMITTER
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1.3.8
F.M RECEIVER
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1.3.9
SIGNAL AMPLIFIER
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1.3.10. FREQUENCY TO VOLTAGE CONVERTER
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1.3.11 POWER SUPPLY
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CHAPTER – 2 DETAILS ABOUT WIRELESS COMMUNICATION 2.1. MODEL OF COMMUNICATION SYSTEM
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2.2 COMMUNICATION CHANNEL
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2.3. MODULATOR
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2.4. DEMODULATOR
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CHAPTER – 3 DETAILS ABOUT MICORCONTROLLER 3.1. DESCRIPTION
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3.2. CHIP TECHNOLGIES
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3.3. DESCRIPTION 89C51 MICROCONTROLLER IC 3.4. FEATURES
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3.5. PIN DIAGRAM
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3.6. BLOCK DIAGRAM
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3.7. PIN DESCRIPTION
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CHAPTER-4 4.1 COMPLETE CIRCUIT DIAGRAM WITH LIST OF
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COMPONENTS 4.2 ADVANTAGES AND APPLICATIONS CONCLUSION
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REFERENCES 2
ABSTRACT The aim of the project work is to protect the distribution transformer or any other power transformer, burning due to the overload, over temperature and input high voltage. Normally most of the transformers are burning because of these three reasons; hence by incorporating this type of monitoring and control circuits, life of the transformer can be increased.
In addition to the monitoring
and control, information about these three parameters can be transmitted to the nearest electrical office where the maintenance staff of the electrical department can monitor the transformer continuously without going nearer to the transformer.
For this purpose, radio communication is utilized in this project
work, so that, due to what reason the transformer has been failed, at what time, when the power is resumed etc., can be monitored and this information can be stored in a computer at the receiving station. With the help of this kind of system, the maintenance staff of the department can have a continuous vigilance over the transformer.
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CHAPTER – 1 1.1. INTRODUCTION Nowadays, with the advancement of technology, particularly in the field of computers as well as micro-controllers, all the activities in our day to day living have become a part of information and we find computers and micro-controllers at each and every application. Thus, the trend is directing towards computer based project works. However, in this project work the basic signal processing of temperature, load current and input high voltage parameters related to the distribution transformers are monitored with analog electronics only. For measuring various parameters values, various transducers are used and the output of these transducers are converted to control the parameters. The control circuit is designed using micro-controller. The outputs of all the three parameters are fed to the analog to digital converter for converting the analog information in to the digital information and this digital information is fed to micro-controller. The output of the micro-controller is used to drive the digital display, so that the value of each parameter can be displayed. In addition to the digital display micro-controller outputs are also used to drive four relays independently. These relays energize and de-energizes automatically according to the condition of the parameter. Out of four relays one relay is treated as common relay and energizes automatically whenever any parameter exceeds its present value. This relay contact is used to break the supply to the transformer primary. The remaining three relays are used for the three different parameters, to transmit the information about the failured parameter. For example, if the load is more than the rated load, then immediately the micro-controller energizes one relay out of these three relays and this relay contact is used to provide supply to the low frequency oscillator, which produces a perfect square wave of 1 KHz approximately. This low frequency is fed to transmitter as a modulating 4
wave, which is super imposed over the carrier and transmitted as a modulated wave. Likewise for other two parameters, two different low frequencies are generated. The idea of generating three different low frequencies is to identify the failured parameter and to transmit the failured information. In the receiver, the received information in the form of low frequency as a modulated wave is demodulated, amplified and converted into proportionate DC voltage using frequency to voltage converter. The output of this F/V converter is again converted into digital pulses, which are essential for the computer. Here the computer is used at receiving end, where the receiver is installed; generally the receiving part of the system can be installed at electrical office.
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1.2 BLOCK DIAGRAM
1.3 CIRCUIT ANALYSIS 6
The detailed circuit description of the project work APPLICATION OF “SCADA” FOR DISTIBUTION TRANSFORMER PROTECTION” is explained in section wise. For better understanding the total circuit diagram is divided into various sections and each section explanation along with circuit diagram is provided in this chapter.
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1.3.1 LOAD MONITORING CIRCUIT The current transformer used in this project work is designed for 5Amps i.e., the current flowing through the primary is restricted for 5Amps. But in practical a higher rating transformer can be used according to the rated power of the distribution transformer. Most common industrial CT’s have 5 to 10 Amp current outputs and can generate high voltage levels when not connected to a burden resistor. The CT used in this project work is nothing but a step-up transformer. This transformer is designed in 1:50 ratio, so that the voltage developed across the secondary is 50 times more than the voltage induced at primary. The voltage induced at primary is proportional to the load current. The CT secondary when it is open circuited, the voltage developed across the open terminals may be very high because of the step-up ratio, and therefore, the secondary winding of the CT should always be connected to a burden resistor. The secondary AC signal, which is proportional to the current flowing through the primary, due to transformer action, is rectified with the help of a diode (Half wave rectification) and then filtered by a filter capacitor. This DC voltage is a variable voltage, which varies according to the load current. The variable voltage from the CT secondary is fed to analog to digital converter for converting the analog information into digital information. The output of the A/D converter is fed to Micro-controller unit for taking the necessary action. The current flowing through the CT primary can be measured, for this purpose, digital display is provided at the output of the Micro-controller Chip. The following is the circuit diagram of load sensing circuit.
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In the above circuit, with the help of a 470 resistor connected across the CT secondary, the ripple can be suppressed and real value can be obtained at the output of CT. This voltage can be adjusted to the required level, for this purpose 2K variable resistor is used and the final output taken from midpoint of the preset. Since it is a prototype module, in this project work for the demonstration purpose, a small transformer of 230V secondary at 1amp rating is considered, and it is treated as distribution transformer. This transformer secondary is used to drive the lamp load through the current transformer primary. For this purpose two No’s of 230V 200W, 100W AC lamps are used, one lamp is treated as nominal load and the other one is used to create a fault i.e., the transformer secondary is designed to drive only one amp load, if the load is more than one amp then the transformer may burn because of over load, to protect the transformer burning due to the over load, the output of the load monitoring circuit is used to drive the relay through the A/D converter and microcontroller. This relay contact is used to break the supply at the primary side of the transformer. So that once the transformer is overloaded automatically primary supply can be disconnected.
1.3.2 HIGH VOLTAGE MONITORING CIRCUIT The Line voltage sensing circuit used in this project work is capable to measure up to 250V AC. For this purpose a step down transformer of 6V-06V, 500mA, Center tapped secondary is used for monitoring the line voltage continuously. In the prototype module, the line voltage can be increased through the autotransformer, the output of the line voltage sensing circuit is fed to micro-controller unit through the A/D converter, so that according to the received digital information form the ADC, the micro-controller energizes relay. This relay contact is used to break the supply to the feeder cable.
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The output of the line voltage-sensing transformer is rectified and filtered for obtaining pure DC voltage. The final output is taken from the midpoint of 2K variable resistor (Preset), so that the voltage applied to the A/D converter can be controlled. As the line voltage varies, according to that output voltage also varies. This variable voltage from the potential transformer (PT) is applied to the A/D converter. The applied voltage to the ADC should not exceed more than 5V, so that the output voltage is clamped at +5V DC, for this purpose, 1W, 5V zener is used. This circuit is designed such that, the voltage applied to the transformer primary, if it is more than 245V AC then immediately the microcontroller energizes the relay and breaks the supply to the primary, by which the transformer can be protected burning due to the over voltage. Since it is a prototype module, the output of the transformer is restricted for lower voltages for the demonstration purpose, but when it is implemented for the real time applications, at that time the output of the distribution transformer will be around 220V AC, and with the help of this kind of voltage control circuit, the household electrical gadgets like TV, Fridge, Tube, Motor etc., can be protected burning due to the over voltage. The following is the circuit diagram of the High voltage Sensing
1.3.3 TEMPERATURE SENSENING CIRCUIT In this block, two op-amps are used to form two different stages. The first stage is configured as differential amplifier and the second stage is configured as gain amplifier. In the first stage an ‘NPN’ General purpose 11
transistor (SL100) is used as a temperature sensor and this transistor is having ‘TIN’ metal body so that it can absorb the heat properly. This transistor is connected in feedback loop (input to output). This first stage is designed in such a way so that, as the transistor body temperature rises, according to the temperature, the base- emitter or base-collector junction resistance decreases. This first stage is designed to generate 2mv/0C which is not sufficient for the calibration. Hence, using 2nd stage this voltage is amplified, and the gain of the 2nd stage is 10, so that (2x10) 20mv per degree centigrade can be obtained at the output of the second stage. This variable voltage (according to the temperature) from the output of second stage is fed to the analog to digital converter for converting the analog information in to the digital information and this digital information is fed to the microcontroller for taking the necessary action. The circuit design consists a basic transducer, which converts temperature in to equalent voltage. For this, transistor ‘SL100’ is used as a sensor. The transistor junction (Base & emitter or Base & collector) characteristics are depends upon the temperature. For a transistor, the maximum average power that it can dissipate is limited by the temperature that collector - base junction can with stand. Therefore, maximum allowable junction temperature should not be exceeded. The average power dissipated in collector circuit is given by the average of the product of the collector current and collector base voltage. At any other temperature the de-rating curves are supplied by the manufacturer to calculate maximum allowable power (Pj).
(Pj) = Tj-Tc Qj Where TC is case temperature, Tj is junction temperature and Qj is the thermal resistance. The entire circuit design of the temperature sensing circuit is given below. In the above circuit diagram with the help of 2K preset (variable resistor) connected at the input of first stage, the initial room temperature 12
corresponding output voltage can be adjusted for the easy calibration. The output of the second stage is clamped with 5V zener and the same output is fed to the A/D converter.
For sensing the transformer body temperature, a sensor has to chosen based on the following requirements. 1. Sensitivity and accuracy 2. Temperature Range 3. Desired life of Sensor 4. Budget In the prototype module for the simulation purpose, ‘SL100’ NPN Transistor is used as sensor because semiconductor Temperature sensor are best suited for embedded applications as they tend to be electrically and mechanically more delicate than other temperature sensor types. In the present module, as the resistance property of the transistor cannot be used directly for interfacing, this transistor is employed as a feedback element.
1.3.4 ANALOG TO DIGITAL CONVERTER
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The outputs of the various parameters are fed to A/D converter. The channel selection depends upon the address selection sent by the Microcontroller. This ADC is having three address inputs to select one out of eight channels of the ADC. This ADC 0809 is a successive approx. Analog to digital converter and the clock rate at which the conversion is fed from the IC 555 timer configured as astable multi-vibrator. The digital output after conversion is fed to Micro-controller For ADC to start converting the data after selecting the channel by sending the address inputs, the start conversion signal is to be sent by Microcontroller. Then ADC starts converting the analog signals voltage into corresponding digital data. For Ex: The following table shows the digital data corresponding to analog input.
After conversion, the ADC generates EOC (End of conversion). This indicates to Micro-controller that the conversions is completed and take the digital data corresponding to analog input. The following is Circuit diagram of A/D Converter along with its clock generator
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In the above circuit diagram 555 timer IC is used for generating the required clock pulses.
1.3.5 CLOCK GENERATOR: The required clock for the ADC is generated using 555 Timer IC which is configured as Astable multi-vibrator (Self Oscillator). In this mode of operation the required frequency can be adjusted using two external components i.e., resistor and capacitor. Keeping capacitor value constant where as by varying the value of resistor the frequency can be adjusted from 1Hz to 500 KHz. Here the required frequency is 100 KHz approximately. In the above circuit diagram 555 timer IC is used for generating the required clock pulses. Frequency can be adjusted using variable resistor 100K (Rb). In this circuit, the external capacitor charges through Ra+Rb and discharges through Rb. Thus the duty cycle may be precisely set by the ratio of these two resistors. In this mode of operation, the capacitor charges and 15
discharges between 1/3 VCC and 2/3 VCC. As in the triggered mode, the charge and discharge times, and therefore the frequency are independent of the supply voltage. Here the timing resistor is now split into two sections, RA and RB, with the discharge transistor (Pin 7) connected to junction of Ra and Rb. When the power supply is connected, the timing capacitor C charges towards 2/3 VCC through Ra and Rb. When the Capacitor voltage reaches 2/3 VCC, the upper comparator triggers the flip-flop and the capacitor starts to discharge towards ground through Rb. When the discharge reaches 1/3 VCC the lower comparator is triggered and a new cycle is started. The capacitor is then periodically charged and discharged between 2/3 VCC and 1/3 VCC respectively. The output state is high during the charging cycle for a time period t1, so that
The output state is LOW during the discharge cycle for a time period t2, given by t2 = 0.693 RbC Thus, the total period charge and discharge is T = t1 + t2 = 0.693 (Ra + 2Rb) C (Seconds)
1.3.6 DIGITAL DISPLAY The following is the Circuit diagram of Digital Display Driven by the micro-controller 16
In the above circuit diagram, four common anode 7-Segment displays are used for displaying the motor speed. The output of the Micro-controller is fed to digital display through the latches, for this purpose IC 74573 is used, this is a octal transparent D-type latches IC. To drive the displays independently 547 transistors are used. A seven segment LED is a device for display of numbers and letters. It contains seven LED bars, which can be turned on by placing the appropriate signals on the appropriate pins. In order to produce a specific number, we must light the correct segments of the LED. For example, to display the number 3, we must light segments a, b, c, d and g. By which we understand that the pattern of lit and unlit segments can be formed into a binary number.
1.3.7 F.M TRANSMITTER: The following is the circuit diagram
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In the above circuit design, the instantaneous frequency of the carrier is varied directly in accordance with the base band signal by means of a device known as VCO (Voltage controlled oscillator) one way of implementing such a device is to use a sinusoidal oscillatory having a relatively high – Q frequency. Determining net work and to control the oscillator by symmetrical incremental variation of the reactive components. Thus the tone signal modulated at 100 MHz carrier. To understand how radio wave are generated and radiated into space, consider alternating currents of suitable frequency fed into conductor or wire of suitable length called the antenna. Fast moving alternating currents produce a moving electric field around the antenna. This field in turn produces a magnetic field at right angles to it. This combination of electric and magnetic fields constitutes the radio wave or electromagnetic wave which is a form of radiant energy.
1.3.8 F.M RECEIVER The FM receiver is located at the remote end. The first stage of this remote end unit is the F.M. Radio Receiver, which is designed with Phillips IC TEA 5591A. In the circuit diagram an LED indicator is connected at Pin No.7 of 5591 IC, which glows brightly, if the receiver is tuned perfectly with the transmitter.
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The F.M. receiver, which operates at 100 MHz, will have an intermediate frequency of 10.7 MHz and bandwidth of 200 KHz. This IC consists of a built in RF amplification circuit. It matches the input impedance of the antenna. This IC consists of F.M. Detector including amplifier of modulated signal (RF amplification). Two sections of LC are provided and a ceramic filter is used to filter the IF of 10.7 MHz the FM demodulator is basically a frequency to amplitude converter, which converts the frequency deviation of the incoming carrier into an AF (Audio frequency) amplitude variation identical to that of modulating signal. In demodulation any change in amplitude of the signal fed to the FM demodulator is a spurious signal. Therefore it must be removed, if distortion is to be avoided. A limiter is a form of clipping device. It is quite possible for the amplitude limiter to be described to be inadequate to its task, because signal strength variations may easily take average signal amplitude outside the limiting range. As a result, further limiting is required. In practice, two amplitude limiters are used in cascade. This arrangement increases the limiting range satisfactory. To ensure that the signal fed to the limiter is within its range regardless of input signal limiting range strength and also to prevent overloading of the amplifier, the AGC (Automatic Gain Control) is used. Instead of designing a double limiter, the better performance is obtained by using one limiter and AGC. The frequency-modulated signal is fed to a tuned circuit whose resonant frequency is to one side of the center frequency (CF) of the FM signal, the output of this tuned circuit will have amplitude that depends on the frequency deviation of the input signal. The following is the circuit diagram of F.M. Receiver.
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1.3.9 SIGNAL AMPLIFIER For maximum power output and impedance matching the audio frequency driver transformer is used in the signal amplifier circuit. The design equation of a driver transformer is Ri = 1 Rl n2 When n = Ratio of the transformer = N2 N1 Where N1 = Primary winding and N2 = Secondary winding. The following is the circuit diagram of signal amplifier.
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The signal, which is detected by the receiver, is further amplified with the help of above audio amplifier. In this circuit, the input capacitor 0.1 MF permits complete input power to flow into the base circuit. It also blocks the DC component to flow into the base circuit. The 330K resistor works as a biasing resistor. The purpose of this biasing is as follows. The operating point may then be suitably placed in this region by proper selection or dc potentials and currents through use of external energy sources. With a properly selected operating point, the time varying component of the AC input signal. Say base current in common emitter amplifier, results in output signal of the same waveform. An improperly selected operating points results in an output signal, which differs in waveform from the input signal, such an operative point is unsatisfactory and should be rejected. The selection of suitable operating point is vital for linear amplification. The 100Ω and 330KΩ forms as a input resistance of the transformer primary. For securing maximum transfer of power from the amplifier to the load, the source impedance should match with the input impedance of the amplifier transferred to the primary of the transformer. Similarly for maximum transfer of power from the amplifier to the load, the output impedance of the amplifier is matched with the load impedance. To get large output the two secondary signals are cascaded and output is taken for further processing. The output of this signal amplifier is fed to the F/V converter. 21
1.3.10. FREQUENCY TO VOLTAGE CONVERTER The output of the signal amplifier is converted into DC voltage in proportion to the tone frequency, with the help of phase locked loop IC 4046 and Multi-plexer IC 4053. The amplified signal is fed to the in signal (Pin NO.14) of the device, which is the input of the phase comparator. The other input of the phase comparator is fed from the internally generated voltage controlled oscillator (VCO), whose frequency is set with the help of external capacitor connected between Pin 6 and 7 here PLL is used for synchronization. The output of the PLL is fed to the Multiplexer. The Signals of the phase comparator – I and phase comparator – II are fed so that the output is multi-plexed with the help of IC4053.The output of the F/V converter is fed to the Analog to digital converter circuit for converting the Analog information into digital pulses. The circuit design of phase locked loop with multiplexer and its associated circuitry is shown below.
1.3.11 POWER SUPPLY The required DC levels are derived from the mains supply for this purpose a step-down transformer of 12V-0-12V center tapped secondary transformer is used. The current rating of the transformer is 750 ma at secondary. The secondary is rectified and filtered to generate 12V smooth DC 22
which is un-regulated voltage and which is required to drive the buzzer and relay. With help of positive voltage regulators, a constant voltage source of +5V and +9V are derived, for this purpose 7805 and 7809 3Pin Voltage regulators are used so that, though the mains supply varies from 170V to 250V, the output DC levels remains constant. The following is the circuit diagram of power supply.
CHAPTER – 2 2. DETAILS ABOUT WIRELESS COMMUNICATION
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2.1. Model of a communication system: The overall purpose of the communication system is to transfer information from one point to in space and time, called the source to another point, the user destination. As a rule, the message produced by a source is not electrical. Hence an input transducer is required for converting the message to a time varying electrical quantity called a message signal. At the destination point another transducer converts the electrical waveform to the appropriate message. The information source and the destination point are usually separated in space. The channel provides the electrical connection between the information source and the user. The channel can have many different forms such as a microwave radio link over free space a pair of wires, or an optical fiber. Regardless of its type the channel degrades the transmitted single in a number of ways. The degradation is a result of signal distortion due to imperfect response of the channel and due to undesirable electrical signals (noise) and interference. Noise and signal distortion are two basic problems of electrical communication. The transmitter and the receiver in a communication system are carefully designed to avoid signal distortion and minimize the effects of noise at the receiver so that a faithful reproduction of the message emitted by the source is possible. The transmitter couples the input message signal to the channel. While it may sometimes be possible to couple the input transducer directly to the channel, it is often necessary to process and modify the input signal for efficient transmission over the channel. Signal processing operations performed by the transmitter include amplification, filtering, and modulation. The most important of these operations is modulation a process designed to match the properties of the transmitted signal to the channel through the use of a carrier wave. Modulation is the systematic variation of some attribute of a carrier waveform such as the amplitude, phase, or frequency in accordance with a 24
function of the message signal. Despite the multitude of modulation techniques, it is possible to identify two basic types of modulation: the continuous carrier wave (CW) modulation and the pulse modulation. In continuous wave (CW) carrier modulation the carrier waveform is continuous (usually a sinusoidal waveform), and a parameter of the waveform is changed in proportional to the message signal. In pulse modulation the carrier waveform is a pulse waveform (often a rectangular pulse waveform), and a parameter of the pulse waveform is changed in proportional to the message signal. In both cases the carrier attribute can be changed in continuous or discrete fashion. Discrete pulse (digital) modulation is a discrete process and is best suited for messages that are discrete in nature such as the output of a teletypewriter. Modulation is used in communication systems for matching signal characteristics to channel characteristics, for reducing noise and interference, for simultaneously transmitting several signals over a single channel, and for overcoming some equipment limitations. A considerable portion of this article is devoted to the study of how modulation schemes are designed to achieve the above tasks.. The main function of the receiver is extract the input message signal from the degraded version of the transmitted signal coming from the channel. The receiver performs this function through the process of demodulation, the reverse of the transmitter’s modulation process. Because of the presence of noise and other signal degradations, the receiver cannot recover the message signal perfectly. In addition to demodulation, the receiver usually provides amplification and filtering. Based on the type of modulation scheme used and the nature of the output of the information source, we can divide communication systems into three categories: 1. Analog communication systems designed to transmit analog information using analog modulation methods 25
2. Digital communication systems designed for transmitting digital information using digital modulation schemes and 3. Hybrid systems that use digital modulation schemes for transmitting sampled and quantized values of an analog message signal. Other ways of categorizing communication systems include the classification based on the frequency of the carrier and the nature or the communication channel
2.2. Communication Channel The Communication channel provides the electrical connection between the source and the destination. The channel may be a pair of wires or a telephone link or free space over which the information bearing signal is radiated. Due to physical limitations, communication channels have only finite bandwidth (B HZ), and the information bearing signal often suffers amplitude and phase distortion as it travels over the channel. In addition to the distortion, the signal power also decreases due to the attenuation of the channel. Furthermore, the signal is corrupted by unwanted, unpredictable electrical signals referred to as noise. While some of the degrading effects of the of the channel can be removed or compensated for, the effects of noise cannot be completely removed. From this point of view, the primary objective of a communication system design should be to suppress the bad effects of the noise as much as possible. One of the ways in which the effects of noise can be minimized is to increase the signal power. However, signal power cannot be increased beyond certain levels because of nonlinear effects that become dominant as the signal amplitude is increased. For this reason the signal-to-noise power ratio (S/N), which can be maintained at the output of a communication channel, is an important parameter of the system. Other important parameters of the channel are the usable bandwidth (B), amplitude an phase response, and the statistical properties of the noise.
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2.3. Modulator The modulator accepts a bit stream as its input and converts it to an electrical waveform suitable for transmission over the communication channel. Modulation is one of the most powerful tools in the hands of a communication systems designer. It can be effectively used to minimize the effects of channel noise, to match the frequency spectrum of the transmitted signal with channel characteristics, to provide the capability to multiplex many signals, and to overcome some equipment limitations. The important parameters of the modulator are the types of waveforms used, the duration of the waveforms, the power level, and the bandwidth used. The modulator accomplishes the task of minimizing the effects of channel noise by the use of large signal power and bandwidth, and by the use of waveforms that last for longer durations. While the use of increasingly large amounts of signal power and bandwidth to combat the effects of noise is an obvious method, these parameters cannot be increased indefinitely because of equipment and channel limitations. The use of waveforms of longer time duration to minimize the effects of channel noise is based on the well-known statistical law of large numbers. The law of large numbers states that while the outcome of a single random experiment may fluctuate wildly, the overall result of many repetitions of a random experiment can be predicted accurately. In data communications, this principle can be used to advantage by making the duration of signaling waveforms long. By averaging over longer durations of time, the effects of noise can be minimized. To illustrate the above principle, assume that the input to the modulator consists of 0’s and 1’s occurring at a rate of 1 bit/sec. The modulator can assign waveforms once every second. Notice that the information contained in the input bit is now contained in the frequency of the output waveform. To employ waveforms of longer duration, the modulator can assign waveforms once every four seconds. The number of distinct waveforms the modulator has to generate (hence the number of waveforms the demodulator has to detect) increases exponentially as the duration of the waveforms increases. This leads 27
to an increase in equipment complexity and hence the duration cannot be increased indefinitely. The number of waveforms used in commercial digital modulators available at the present time ranges from 2 to 16.
2.4. Demodulator Modulation is a reversible process, and the demodulator accomplishes the extraction of the message from the information bearing waveform produced by the modulator. For a given type of modulation, the most important parameter of the demodulator is the method of demodulation. There are a variety of techniques available for demodulating a given modulated waveform: the actual procedure used determines the equipment complexity needed and the accuracy of demodulation. Given the type and duration of waveforms used by the modulator, the power level at the modulator, he physical and noise characteristics of the channel, and the type of demodulation, we can derive unique relationship between data rate, power bandwidth requirements, and the probability of incorrectly decoding a message bit. A considerable portion of this text is devoted to the derivation of these important relationships and their use in system design.
CHAPTER – 3 DETAILS ABOUT MICORCONTROLLER 3.1. DESCRIPTION 28
The micro-controller is a chip, which has a computer processor with all its support functions, memory (both program storage and RAM), and I/O built in to the device. These built in functions minimize the need for external circuits and devices to be designed in the final applications Most micro-controllers do not require a substantial amount of time to learn how to efficiently program them, although many of them have quirks which you will have to understand before you attempt to develop your first application. Along with micro-controllers getting faster, smaller and more power efficient they are also getting more and more features. Often, the first version of microcontroller will just have memory and simple digital I/O, but as the device family matures, more and more part numbers with varying features will be available With all the 8051 manufacturer’s products taken into account, there are over two hundred different 8051 part numbers, each with different features and capabilities. For most applications, we will be able to find a device within the family that meets our specifications with a minimum of external devices, or an external but which will make attaching external devices easier, both in terms of wiring and programming. For many micro-controllers, programmers can be built very cheaply, or even built in to the final application circuit eliminating the need for a separate circuit. Also simplifying this requirement is the availability of microcontrollers with SRAM and EEPROM for control store, which will allow program development without having to remove the micro-controller from the application circuit.
3.2. CHIP TECHNOLOGIES Microcontrollers, like all other electronic products, are growing smaller, running faster, requiring less power, and are cheaper. This is primarily due to improvements in the manufacturing process and technologies used (and not 29
the adoption of different computer architectures). Virtually all microcontrollers built today use CMOS (complementary metal oxide semiconductor) logic technology to provide the computing functions and electronic interfaces. CMOS is a push-pull technology in which a PMOS and NMOS transistor are paired together. The following is the circuit diagram of push-pull configuration
When the input signal is low, the PMOS transistor will be conducting and the NMOS transistor will be ‘off’. This means that the switch (or transistor) at Vcc will be ‘ON’, providing Vcc at the signal out. If a high voltage is input to the gate, then the PMOS transistor will be turned off and the NMOS transistor will be turned on, pulling the output line to ground. During a state transition, a very small amount of current will flow through the transistors. As the frequency of operation increases, current will flow more often in a given period of time (put another way, the charge transferred per unit time, which is defined as “current”, will increase). This increased current flow will result in increased power consumption by the device. Therefore, a CMOS device should be driven at the slowest possible speed, to minimize power consumption.
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An important point with all logic families is understanding the switching point of the input signal. For CMOS devices, this is typically 1.4Volts to one half of Vcc. However, it can be at different levels for different devices. Before using any device, it is important to understand what the input threshold level is. CMOS can interface directly with most positive logic technologies, although we must be careful of low voltage logic, to make sure that a high can be differentiated from a low in all circumstances.
3.3. DESCRIPTION 89C51 Micro controller IC The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89C51 provides the following standard features: 4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.
3.4. Features 31
• 4K Bytes of In-System Reprogrammable Flash Memory– Endurance 1,000 Write/Erase Cycles • Fully Static Operation: 0 Hz to 24 MHz • Three-level Program Memory Lock • 128 x 8-bit Internal RAM • 32 Programmable I/O Lines • Two 16-bit Timer/Counters • Six Interrupt Sources • Programmable Serial Channel • Low-power Idle and Power-down Modes
3.5. Pin diagram
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3.6. BLOCK DIAGRAM 33
3.7. Pin Description 34
VCC Supply voltage. GND Ground. Port 0 Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pull ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull-ups are required during program verification. Port 1 Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 1 also receives the low-order address bytes during Flash programming and verification. Port 2 Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memories that use 16bit addresses (MOVX @ DPTR). In this application, it uses strong internal 35
pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8-bit bi-directional I/O port with internal pull-ups The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of various special features of the AT89C51 as listed below: Port Pin
Alternate Functions
P3.0
RXD (serial input port)
P3.1
TXD (serial output port)
P3.2
INT0 (external interrupt 0)
P3.3
INT1 (external interrupt 1)
P3.4
T0 (timer 0 external input)
P3.5
T1 (timer 1 external input)
P3.6
WR (external data memory write strobe)
P3.7
RD (external data memory read strobe)
Port 3 also receives some control signals for Flash programming and verification. RST 36
Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. ALE/PROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. PSEN Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.
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XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier.
Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.
Idle Mode In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory. Figure 1.
Oscillator Connections 38
Note: C1, C2 = 30 pF ± 10 pF for Crystals = 40 pF ± 10 pF for Ceramic Resonators Figure 2. External Clock Drive Configuration
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CHAPTER-4 4.1 COMPLETE CIRCUIT DIAGRAM WITH LIST OF COMPONENTS
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4.2 ADVANTAGES AND APPLICATIONS Advantages: Can avoid cable intervention. Can avoid manual intervention. Can send the data from one place to other place by minor modifications. Can monitor the system and the signal from remote places through some modifications.
Applications: In substations. In corporate and government power generation plants. In supervisory and control applications. In industrial monitoring stations.
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CONCLUSION
This project titled “SCADA IMPLEMENTED OVER POWER TRANSFORMER WITH REMOTE MONITORING SYSTEM” is a simulation model, by using Microcontroller ATMEL 89C51.
The Distribution Transformers failures are effectively protected against overload, over temperature and over voltage.
The parameters of the transformer are continuously monitored and transmitted to the nearest nearest electrical office for the necessary actions.
Wireless communication systems are used for transmitting and receiving the data from the transformer and the nearest electrical office by using RF communication.
In this project the over voltage, temperature and over load are monitored in signal system. The project is fully automated and require no manual interface.
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REFERENCES Text Books: (1) Linear Integrated Circuits
–By: D. Roy Choudhury, Shail Jain
(2) Power Electronics
- By: SEN
(3) Relays and their applications
- By: M.C.SHARMA
(4) Op-Amps Hand Book
- By: MALVIND
(5) Mechanical and Industrial Measurements
- By: R.K. Jain
(6) Computer Controlled System
- By: Karl J.ASTROM
(7) Programming and Customizing the 8051 Micro-controller - By: Myke Predko
(8) The concepts and Features of Micro-controllers
- By: Raj Kamal
(9) C++ an Introduction to Programming By: JESSE LIBERTY. JIM KEOGH 44
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