Project Report

Automatic traffic signal controller done by L.N.ARAVINDAN H.PRAVEN D.PARTHASARATHY

INTRODUCTION Now a days due to ever increasing vehicles on the road, it require a efficient control on the four way junction of road. In order to find a solution to this problem the concept of an automatic traffic controller is conceived. Apart from providing efficient control of traffic, it also eliminate chance of human errors since it function automatically. The automatic traffic controller automatically switches on the four way junction for 15 seconds for direction control. The main circuit components used are 555-Timer and 4-bit binary synchronous counter (74160). The 555-Timer generates a clock signal for 15 seconds. This signal is used to clock counter circuit. Binary counter is converted to 3 bit–counter to achieve 8 possible cases. The traffic light control is done by different Boolean function of logic gate.

CIRCUIT DIAGRAM:

COMPONENTS REQUIRED:-

Components

Specification

Quantity

1.555 Timer

4.5 to 15 V, 200mA

1

2.Capacitors

10μf,16v 0.01μf

1 1

3.Resistors

240kΩ 270kΩ 470Ω

1 1 1 8

4.LED

Green Red Yellow

10 4 4

5.IC

74160 7432 7404 7411 7408

1 2 1 3 1

6.IC base

8Pin 14Pin 16Pin

1 7 1

7.connector

SIP2 SIP3 SIP4

5 2 2

THE WORKING OF THE SYSTEM: The corresponding circuit automatically controls the traffic signal during the day as well as nights. In this system there are one 555 timer and one 74160 synchronous 4 bit counter, which is controlling whole device. Along with there are some electronic equipments like 7404, 7408, 7411 gate, capacitor, resistor, LED (yellow, green, red) etc. The time period for which green, yellow, and red traffic signals remain ‘on’ (And then repeat) for the straight moving traffic is divided into eight units of 8 seconds (or multiples thereof) each.

flow of traffic in all possible directions: Fig. above shows the flow of traffic in all permissible directions during the eight time units of 8 seconds each. For the left- and right turning traffic and pedestrians crossing from north to south, south to north, east to west ,and west to east, only green and red signals are used.

TABLE I

Table I shows the simultaneous states of the signals for all the traffic. Each row represents the status of a signal for 8 seconds. As can be observed from the table, the ratio of green, yellow, and red signals is 16:8:40 (=2:1:5) for the straight moving traffic. For the turning traffic the ratio of green and red signals is 8:56 (=1:7), while for pedestrians crossing the road the ratio of green and red signals is 16:48 (=2:6) In Table II (as well as Table I) X, Y, and Z are used as binary variables to depict the eight states of 8 seconds each. Letters A through H indicate the left and right halves of the roads in four directions as shown in Fig. 1. Two letters with a dash in between indicate the direction of permissible movement from a road. Straight

direction is indicated by St, while left and right turns are indicated by Lt and Rt, respectively. The Boolean functions for all the signal conditions are shown in Table II. The left- and the right-turn signals for the traffic have the same state, i.e. both are red or green for the same duration, so their Boolean functions are identical and they should be connected to the same control output. The circuit diagram for realizing these Boolean functions is shown in circuit diagram. Timer 555 (IC1) is wired as an astable multivibrator to generate clock signal for the 4-bit counter 74160 (IC2). The time duration of IC1 can be adjusted by varying the value of resistor R1, resistor R2, or capacitor C2 of the clock circuit. The ‘on’ time duration T is given by the following relationship: T = 0.693C2(R1+R2) IC2 is wired as a 3-bit binary counter by connecting its Q3 output to reset pin 1 via inverter N1. Binary outputs Q2, Q1, and Q0 form variables X, Y, and Z, respectively. These outputs, along with their complimentary outputs X’, Y’, and Z’, Respectively, are used as inputs to the rest of the logic circuit to realize various outputs satisfying Table I. You can simulate various traffic lights. Using green, yellow, and red LEDs and feed the outputs of the circuit to respective LEDs via current-limiting resistors of 470

ohms each to check the working of the circuit. Here, for turning traffic and pedestrians crossing the road, only green signal is 23 made available. It means that for the remaining period these signals have to be treated as ‘red’ in practice, the outputs of Fig. 2 should be connected to operate high – power bulbs. Further, if a particular signal condition (such as turning signal) is not applicable to a given road, the output of that signal condition should be connected to green signal of the next state (refer Table I).

The traffic signals can also be controlled manually, if it desired. Any signal state can be established by entering the binary value corresponding to that particular state into the parallel input pins of the 3-bit counter. Similarly, the signal can be reset at any time by providing logic 0 at the reset pin (pin 1) of the counter using an external switch.

THE 555 TIMER – NE 555 DESCRIPTION:The 8-pin 555 timer must be one of the most useful chips ever made. This is a highly stable device for generating accurate time delay or oscillation .With just a few external components it can be used to many circuits, not all of them that involve timing! A single 555 timer can provide time delay ranging from microseconds to hours whereas counter time can have maximum timing range of days. The 555 can be used with a supply voltage (Vs) in the range 4.5 to 15V (18 V absolute) and can drive load up to 200 mA. Because of wide range of supply voltage, the 555 timer is versatile and easy to use in various applications.

PIN CONFIGURATION :

Functional block diagram of 555 IC

SAMPLE GRAPH:

ASTABLE OPERATION USING 555 TIMER :

An astable circuit produces a 'square wave', this is a digital waveform with sharp transitions between low (0V) and high (+Vs). Note that the durations of the low and high states may be different. The circuit is called an astable because it is not stable in any state: the output is continually changing between 'low' and 'high'. The time period (T) of the square wave is the time for one complete cycle, but it is usually better to consider frequency (f) which is the number of cycles per second.

T=.7X(R1+2R2)XC1 f=1.4/(R1+2R2)C1 T = time period in seconds (s) f

= frequency in hertz (Hz)

R1 = resistance in ohms ( ) R2 = resistance in ohms ( ) C1 = capacitance in farads (F) The time period can be split into two parts: T = Tm + Ts Mark time (output high): Tm = 0.7 × (R1 + R2) × C1 Space time (output low): Ts = 0.7 × R2 × C1 here in this circuit we are going to design a pulse having a time period of 8 seconds therefore the total time T will be 8 seconds the value of capacitance C1=10 μF R1=240k R2=470k

T = .7 x (240k + 940k) x 10μ = 8.26 seconds

WAVEFORM :

the time for which the traffic signal should be in a particular state can be altered by altering the time period of this astable multivibrator by varying the values of the resistors and capacitors. Time period of upto to even hours can be obtained by using this 555 timer.

74160 IC:

These are synchronous counters so their outputs change precisely together on each clock pulse. This is helpful if you need to connect their outputs to logic gates because it avoids the glitches which occur with ripple counters. The count advances as the clock input becomes high (on the rising-edge). The decade counters count from 0 to 9 (0000 to 1001 in binary). The

4-bit counters count from 0 to 15 (0000 to 1111 in binary). For normal operation (counting) the reset, preset, count enable and carry in inputs should all be high. When count enable is low the clock input is ignored and counting stops. The counter may be preset by placing the desired binary number on the inputs A-D, making the preset input low, and applying a positive pulse to the clock input. The inputs A-D may be left unconnected if not required. The reset input is active-low so it should be high (+Vs) for normal operation (counting). When low it resets the count to zero (0000, QA-QD low), this happens immediately with the 74160 and 74161 (standard reset), but with the 74162 and 74163 (synchronous reset) the reset occurs on the risingedge of the clock input. Counting to less than the maximum (15 or 9) can be achieved by connecting the appropriate output(s) through a NOT or NAND gate to the reset input. For the 74162 and 74163 (synchronous reset) you must use the output(s) representing one less than the reset count you require, e.g. to reset on 7 (counting 0 to 6) use QB (2) and QC (4). 52 Connecting synchronous counters in a chain the diagram below shows how to link synchronous counters such as 74160-3, notice how all the clock (CK) inputs are linked. Carry out (CO)

is used to feed the carry in (CI) of the next counter. Carry in (CI) of the first 74160-3 counter should be high.

ADVANTAGES: 1. simple and efficient circuit. 2. working requirement is easily met. 3. no instant and direct manual operation is needed. 4. consumes very small amount of power for operation. 5. it also saves a considerable amount of power. 6. a very practical and low cost device. 7. it can make to work by using solar cell or wind cell for power requirements.

CONCLUSION : The Automatic traffic signal controller was designed by using IC 555 timer and a simple digital logic which can be modified efficiently to suit the needs of any modern traffic system.