Project Report

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1. Introduction Power line communications (PLC) refers to the concept of transmitting information using the electrical power distribution network as a communication channel. This technology allows a flow of information through the same cabling that supplies electrical power. This novel idea of communication helps in bridging the gap existing between the electrical and communication network. It offers the prospect of being able to construct intelligent buildings, which contain many devices in a Local Area Network.

During the last years the use of Internet has increased. If it would be possible to supply this kind of network communication over the power-line, the utilities could also become communication providers, a rapidly growing market. On the contrary to power related applications, network communications require very high bit rates and in some cases real-time responses are needed (such as video and TV). This complicates the design of a communication system but has been the focus of many researchers during the last years. Systems under trial exist today that claim a bit rate of 1 Mb/s, but most commercially available systems use low bit rates, about 10-100 kb/s, and provides low-demanding services such as meter reading.

The power-line was initially designed to distribute power in an efficient way, hence it is not adapted for communication and advanced communication methods are needed.

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1.1 Benefits: PLC integrates the transmission of communication signal and 50/60 Hz power signal through the same electric power cable. The major benefit is the union of two important applications on a single system. The data link appears 'transparent' to the user. Although the devices are connected through the power line, consumers perceive that there is a “separated” link available for data communications. Since the existing power lines are used for signal transmission, the initial heavy cost and investment for setting up a data communications system is avoided. Setting up such a communications system then involves installation of transmitter and/or receivers at appropriate points.

1.2 The Challenge: Since the power line was devised for transmission of power at 50/60 Hz and at most 400 Hz, the use of this medium for data transmission (especially at high frequencies) presents some technically challenging problems. It is one of the most electrically contaminated environments, which makes it very hostile for transmission of data signals. The channel is characterized by high noise levels and uncertain (or varying) levels of impedance and attenuation. In addition, the line offers limited bandwidth in comparison to cable or fiber-optic links. Power line networks are usually made of a variety of conductor types and cross sections joined almost at random. Therefore a wide variety of characteristic impedances are encountered in the network. This imposes interesting difficulties in designing the filters for these communication networks.

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1.3 Project aims: The project aims to thoroughly explore the theoretical and practical aspects of power line communications (PLC) techniques. We placed ourselves a number of goals at the start of the project.


To gain a detailed knowledge of the challenges faced by PLC techniques


To explore the theoretical and practical aspects of PLC.


To research and design a working PLC and on/off control system.

To use the design and implement a power line communications system that connects two personal computers and moreover one should be able to transmit command over the power line to switch on/off an electrical device. The PC should be able to transfer data using the power lines as their only link of communication.

1.4 Block Diagram Description The block diagram shows the two personal computers(pc) used for communication and device control connected through the powerline, which is the communication channel. Since the communication is simplex, one pc is connected through modulator and other is connected through demodulator to the powerline. The scheme of modulation and demodulation used is FSK as it is inherently immune to noise which is an important property as notoriously bad channel that has been developed without regard for any communications considerations. The pc connected through modulator to the powerline transmits data and pc connected with demodulator receives data. The devices to be controlled by the transmitter pc are connected through the I/O card of the receiver pc. The transmitter pc sends command to the receiver to on/off any specific device.

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Block Diagram

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2. Focus on PLC

2.1 Noise: The major sources of noise on power line are from electrical appliances, which utilize the 50 Hz electric supplies and generate noise components, which extend well into the high frequency spectrum. Apart from these induced radio frequency signals from broadcast, commercial, military, citizen band and amateur stations severely impair certain frequency bands on power line. The primary sources of noise in residential environments are universal motors, light dimmers and televisions. This noise can be classified as: •

50 Hz periodic noise: Noise synchronous to the sinusoidal power line carrier can be found on the line. The sources of this noise tend to be silicon-controlled rectifiers (SCRs) that switch when the power crosses a certain value, placing a voltage spike on the line. This category of noise has line spectra at multiples of 50 Hz.

•

Single-event impulse noise: This category includes spikes placed on the line by single events, such as a lightning strike or a light switch turn on or off. Capacitor banks switched in and out create impulse noise.

•

Continuous Impulsive noise: This kind of noise is produced by a variety of series wound AC motors. This type of motor is found in devices such as found in vacuum cleaners, drillers, electric shavers and many common kitchen appliances. Commutator arcing from these motors produces

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impulses at repetition rates in the several kilohertz range. Continuous impulsive noise is the most severe of all the noise sources. •

Non-synchronous periodic noise: This type of noise has line spectra uncorrelated with 50 Hz sinusoidal carriers. Television sets generate noise synchronous to their 15734 Hz horizontal scanning frequency. Multiples of this frequency must be avoided when designing a communications transceiver. It was found that noise levels in a closed residential environment fluctuate greatly as measured from different locations in the building. Noise levels tend to decrease in power level as the frequency increases; in other words, spectrum density of power line noise tends to concentrate at lower frequencies. This implies that a communications carrier frequency would compete with less noise if its frequency were higher.

•

Background Noise: This is what every subscriber sees as already present on the line, and not caused by subscriber’s appliances. Typically, this originates from the Distribution Transformer, public lighting systems etc.

2.2 Attenuation: Attenuation is the loss of signal strength as the signal travels over distance. For a transmission line the input impedance depends on the type of line, its length and the termination at the far end. The characteristic impedance of a transmission line (Zo) is the impedance measured at the input of this line when its length is infinite. Under these conditions the type of termination at the far end has no effect. A standard

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distributed parameter model can obtain the characteristic impedance of an unloaded power cable, and it is given by,

At the frequencies of interest for PLC communications (the high frequency range), this approximates to,

where L and C are the line impedance and capacitance per length.

High frequency signals can be injected on to the power line by using an appropriately designed high pass filter. Maximum signal power will be received when the impedance of the transmitter, power line and the receiver are matched. Power line networks are usually made of a variety of conductor types and cross sections joined almost at random. Therefore a wide variety of characteristic impedances are encountered in the network. Unfortunately, a uniform distributed line is not a suitable model for PLC communications, since the power line has a number of loads (appliances) of differing impedances connected to it for variable amounts of time. Channel impedance is a strongly fluctuating variable that is difficult to predict. The overall impedance of the low voltage network results from a parallel connection of all the network’s loads, so the small impedances will play a dominant role in determining

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overall impedance. Overall network impedances are not easy to predict either. The most typical coaxial cable impedances used are 50 and 75-ohm coaxial cables. A twisted pair of guage-22wire with reasonable insulation on the wires measures at about 120 ohms. Clearly, channel impedance is low, it can even be as low as 0.1Ω. A graph showing the variation of power loss with change in frequency for various load impedance is shown below.

Fig I: Power loss versus carrier frequency for various load impedances at 1000-meter line. In the above figure L [dB] is the power loss in decibels and ZL is the load impedance.

This presents significant challenges when designing a coupling network for PLC communications. Maximum power transfer theory states that the transmitter and channel impedance must be matched for maximum power transfer. With strongly varying channel impedance, this is tough. We need to design the transmitter and receiver with sufficiently low output/input impedance (respectively) to approximately match channel impedance in the majority of expected situations.

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2.3 Radiation of the Transmitted Signal: When transmitting a signal on the power-line the signal is radiated in the air. One can think of the power-line as a huge antenna, receiving signals and transmitting signals. It is important that the signal radiated from the power-line does not interfere with other communication systems. When using the frequency interval 1-20 MHz for communication the radiation is extremely important because many other radio applications are assigned in this frequency interval. It is not appropriate for a system to interfere with, e.g., airplane navigation or broadcast systems. Recent research has studied this problem and tries to set up a maximum power level of transmission. It is important that this work is finished in the near future since it limits the use of this bandwidth and the development of communication systems for the power-line channel. When the cables are below ground the radiation is small. Instead it is the radiation from the households that makes the major contribution. Wires inside households are not shielded and thus radiate heavily. A solution might be to use filters to block the communication signal from entering the household.

2.4 Relevant Regulatory Standards: Frequencies used by the devices communicating over the power line are restricted by the limitations imposed by the regulatory agencies. These regulations are developed to ensure harmonious coexistence of various electromagnetic devices in the same environment. The frequency restrictions imposed by FCC and CENELEC are shown in figures 1(a) and 1(b). Federal Communications Commission (FCC) and European Committee for Electro technical Standardization (CENELEC) govern regulatory rules in North America and Europe respectively. PDACE Glb Dept of E&CE

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Fig 1a: CENELEC frequency band allocation

Fig 1b: FCC frequency band allocation

In North America frequency band from 0 to 500 KHz can be used for power line communications. However the regulatory rules in Europe are more stringent. Here, the CENELEC standard only allows frequencies between 3 kHz and 148.5 kHz. This puts a hard restriction on powerline communications and might not be enough to support high bit rate applications, such as real-time video, depending on the performance needed. According to this standard the spectrum is divided into five bands based on the regulations. They are
3 – 9 KHz: The use of this frequency band is limited to energy provides;

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9 – 95 KHz: The use of this frequency band is limited to the energy providers and their concession-holders. This frequency band is often referred as the "A-Band".
95 – 125 KHz: The use of this frequency band is limited to the energy provider’s costumers; no access protocol is defined for this frequency band. This frequency band is often referred as the "B-Band".
125 – 140 KHz: The use of this frequency band is limited to the energy providers’ customers; in order to make simultaneous operation of several systems within this frequency band possible, a carrier sense multiple access protocol using center frequency of 132.5 KHz was defined. This frequency band is often referred to as the "C-Band".
140 – 148.5 KHz: The use of this frequency band is limited to the energy provider’s customers; no access protocol is defined for this frequency band. This frequency band is often referred to as the "D-Band". Thus in Europe power line communications is restricted to operate in the frequency range from 95 – 148.5 KHz. Apart from band allocation, regulatory bodies also impose limits on the radiations that may be emitted by these devices. These reflect as restrictions on the transmitted power in each of these frequency bands. Bandwidth is proportional to bit rate, in order to increase the bit rate, larger bandwidth may be needed. Recent research has suggested the use of frequencies in the interval between 1 and 20 MHz. If this range could be used, it would make an enormous increase in bandwidth and would perhaps allow high bit rate applications on the power-line. An important problem is that parts of this frequency band is assigned to other communication system and must not be disturbed. Other communication

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systems using these frequencies might also disturb the communication on the powerline. The power line was never intended for communications purposes. PLC device has limited use because of strong interference, varying attenuation and impedance problems. The PLCC system designer is limited in the bandwidth available for communications not only by physical properties of the power line, but also by regulatory standards imposed by governing bodies. But the applicability and the benefits of this technology are so significant that, armed with many modern communications techniques, and with careful thought, these challenges can be definitely overcome.

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3. PLC DEVICE DESIGN: PRACTIAL ISSUES For the design of any communications system, we have to address a number of important design issues. Modulation techniques and transmission methods need to be selected to give suitable performance in the communications environment of choice. Our communications environment, that is the power line network possesses some unique design issues of its own.

3.1 Modulation methods: Transmission of data across a noisy communications channel requires some manner of separating the valid data from the background noise. The most common way to accomplish this is to modulate the data at the transmission end and to demodulate the data on the reception endpoint, to make sure that that the data coming from the receiver is the same as the data being presented to the transmitter. The efficiency of the modulation/demodulation process determines the accuracy of the data coming from the receiver. Therefore, careful consideration must be given to the selection of an appropriate modulation-demodulation scheme. The modulation band selected for power line communications must meet the required data rate while maximizing resistance to noise and interference with the signal because in any power line, there are several sources of noise and interference, each with it own individual characteristics. There are many different ways to modulate a signal, each with its own advantages and disadvantages. The different types of digital modulation schemes are:

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Amplitude Shift Keying (ASK)
Frequency Shift Keying (FSK)


Phase Shift Keying (PSK)

ASK is the simplest scheme but is very rarely used, because of its relatively poor noise performance. The amplitude variations in an ASK signal becomes a source of difficulty. Such signals when amplified by nonlinear amplifiers generate spurious outof-band spectral components, which are filtered out only with difficulty.. FSK is a ‘non return to zero’ modulation method. This means that the non-modulated condition is between the “off” and “on” condition. In other words, the carrier should never be at the center frequency when modulation is present. The benefit here is noise immunity. Since FSK relies on frequency change, and not amplitude change, to indicate data states, an FSK receiver is inherently immune to amplitude noise. This increased noise immunity suggests a potential for higher data rates. In fact, FSK systems can achieve significantly higher data rates than the ASK counterparts, albeit at the sacrifice of cost and power consumption. Considering now the phase shift keying techniques, BPSK and QPSK generate discontinuities in the carrier phase, which are a further source of difficulty. When it is necessary to avoid such amplitude and phase discontinuities, frequency modulation is the feasible solution. The FSK waveform has a constant amplitude and no matter how discontinuous the modulating waveform maybe, its phase is continuous. Phase delay in the PLC channel is expected and is also unpredictable. The reliable performance of FSK with any reasonable amount of phase delay makes it the modulation scheme of choice for PLC techniques.

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3.1.1 Insight of FSK Frequency shift keying (FSK) is the most common form of digital modulation in the high-frequency radio spectrum. Binary FSK (usually referred to simply as FSK) is a modulation scheme typically used to send digital information between digital equipment such as tele-printers and computers. Data is transmitted by shifting the frequency of a continuous carrier in a binary manner to one or the other of two discrete frequencies. One frequency is designated as the “mark” frequency and the other as the “space” frequency. The mark and space correspond to binary ‘1’ and ‘0’, respectively. By convention, mark corresponds to the higher frequency but the reverse can also be done. Frequency measurements of the FSK signal are usually stated in terms of “shift” and center frequency. The shift is the frequency difference between the mark and space frequencies. The deviation is equal to the absolute value of the difference between the center frequency and the mark or space frequencies.

v(t)= A * cos[ ω* t+ d( t) *Ω* t]

Where A = amplitude

ω

= center frequency

d(t) = +1 for logic level ‘1’ d(t) = -1 for logic level ‘0’ Ω

= frequency deviation

Thus the transmitted signal is either v(t)= A * cos[ ω* t+Ωt] v(t)= A * cos[ ω* t-Ωt]

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And hence two analog waves of different frequencies are obtained.

Fig 2a: FSK input digital data

Fig 2b: FSK modulated signal

The concept of FSK can be very well explained by the figures above. Fig 2a is the digital input for the FSK modulation. As examples consider that higher frequency is used for space (i.e. logic “0”) and a lower frequency is used for mark (i.e. logic “1”). The Fig 2b shows the FSK modulated signal. One can clearly observe the variation in the frequency of the modulated signal as per the digital input.

FSK is one of the candidate modulation techniques for PLC due to inherent system physical conditions. The system consists of many noise sources as well as thermal noise such as man-made noises, effects of electrical machines, and variable loads. Phase modulations give worst performance with respect to FSK. Bit error probability Pe for coherent FSK is given by,

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where erfc(.) is the complementary error function. Eb/N0 is the energy per bit to noise density ratio and is given as,

where C is the carrier power, N is the noise power, Bw is the receiver noise bandwidth, and fb is bit rate. Carrier-to-noise ratio is given as,

where (C/N) t is the carrier-to-noise ratio due to thermal noise on the communication channel, (C/I) k is the carrier to kth interference ratio. FSK-PLC channel performances are shown in the figure below. The figures below illustrate the relationships between bit error probability and frequencies, load and distance. These results give an idea for PLC channel.

Fig 3a: Bit error probability with frequency and load impedance for 1000 meters line.

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Fig 3b: Effects of line length (meters) on the bit error probability.

The above figures illustrate the relationships between bit error probability, frequencies, loads and distance.

3.2 The Coupling Circuit Once the data signal has been generated, it needs to be placed on the power line by some kind of coupling circuit so as to avoid the circuit to be damaged by the power line high voltage. There are three possible combinations of lines on which to couple the signal:
Live to Ground,
Neutral to Live, and
Neutral to Ground.

Among all the three mentioned above the best method to avoid the 230 V AC line was to use the last option i.e. Neutral to Ground coupling. This was opted as there

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suppose to be no voltage existing between the neutral and ground terminals and hence there should be minimum noise present when compared to the other two ways of coupling the signal to power line where we use the live wire which actually carries the 230V AC!! Now as there exists no voltage between the neutral and ground the design of the coupling circuit gets reduced to nothing, just for safety a RC filter circuit with center frequency same as that of FSK modulator should be used.

3.3 Interface with the PC In our project we were aiming to transfer data and command (on/off control) over the power line in between two PC’s. To do this the hardware has to be interfaced with the PC. The best way and no doubt the simplest way to do this, was to use the serial port (COM port) of the PC. The standards used by the COM port or the serial port of the PC is the RS-232 standards. The specifications of the serial port are in Appendix A. The driver for the COM port is, in case of Windows Xp operating system, c:\windows\system32\drivers\serial.sys.

3.4 Interface with the devices for on/off control Initially while thinking of a on/off control circuit we had thought of a separate DTMF transmitter and receiver. The transmitter will be connected to the computer where as the receiver will work independently and the devices will be connected to the DTMF receiver through relays. We intended to use 4-bit dual-tone multi-frequency (DTMF) data to be sent through the mains line to switch on/off the desired appliances via eight relays. Eight 4-bit data words (0000 to 0111) are used to switch off eight appliances. Another eight 4-bit words (1000 to 1111) are used to switch on the appliances. If the MSB bit is high it is ‘on’ signal and if it is low it is ‘off ’ signal.

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The above-mentioned concept is no doubt correct but it seemed to be much more complicated when compared to device controlling using the I/O Card. I/O Card seemed to be a far better option, as it was extendable i.e. in the DTMF control we could not connect more than eight devices where as using the I/O Card the number of devices can go even up to 48! For the specifications of the I/O Card please refer to the Appendix B.

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4. PRACTICAL IMPLEMENTATION

In here we will give the details about the practical implementations of a working power line carrier communications system. The hardware and the software both will be covered. The devices that are chosen and circuits used are covered. Results of testing the individual sections of the system, the problems encountered and their solutions are discussed.

4.1 HARDWARE In the previous sections of this report we suggested that the most suitable type of modulation for transmitting data over the power line was FSK. So the first and foremost part to be designed was FSK modulator and demodulator. As we had done a similar experiment in one of our previous semester (using IC XR 2206 or 555 timer as the FSK modulator and a PLL (IC LM565) as the demodulator circuit) we thought of using the same circuit. But back in the previous semester and now also we encountered problems especially with the PLL so to enhance the hardware we decided to use a dedicated demodulator IC, which would act as a counter part to the transmitter, which is the IC XR 2211. The design equations are provided in the Appendix C. The details of each part of the hardware are as follows.

4.1.1 Implementation of FSK modulation scheme: In our final working circuit FSK modulation is performed by the application of a Voltage Controlled Oscillator (VCO). A voltage-controlled oscillator produces an AC waveform, output frequency directly proportional to the DC input voltage. By using the

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binary waveform as an input to the VCO, we can vary the frequency of the output sinusoid, giving FSK modulation. The integrated circuit employed for this purpose is the EXAR device XR-2206. The XR-2206 is a monolithic function generator IC capable of producing high quality sinusoid of high-stability and accuracy. Frequency of operation can be selected externally over a range of 0.01Hz to more than 1MHz. The circuit is ideally suited for communications, and function generator applications requiring sinusoidal tone, AM, FM, or FSK generation. The system is designed to operate at a mark ’1’ frequency of 1270 Hz and a space ‘0’ frequency of 1070 Hz. Testing of this circuit was done using a square wave input stream (representing a constantly varying 0-1-0 binary waveform). The mark and space frequencies were confirmed along with general speed and stability. The circuit diagram of FSK modulator is on next page.

XR-2206 The XR-2206 is comprised of four functional blocks; a voltage-controlled oscillator (VCO), an analog multiplier and sine-shaper; a unity gain buffer amplifier; and a set of current switches. The VCO produces an output frequency proportional to an input current, which is set by a resistor from the timing terminals to ground. With two timing pins, two discrete output frequencies can be independently produced for FSK generation applications by using the FSK input control pin. This input controls the current switches, which select one of the timing resistor currents, and routes it to the VCO. The block diagram and the pin description of IC XR-2206 is as shown in the figure on the next page.

The XR-2206 can be operated with two separate timing resistors, R1 and R2, connected to the timing Pin 7 and 8, respectively, as shown in Figure 13. Depending on the polarity of the logic signal at Pin 9, either one or the other of these timing resistors is activated. If Pin 9 is open-circuited or connected to a bias voltage ≥ 2V, only R1 is

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activated. Similarly, if the voltage level at Pin 9 is ≤1V, only R2 is activated. Thus, the output frequency can be keyed between two levels. f1 and f2, as: f1 = 1/R1C and f2 = 1/R2C

Fig 4: block diagram of XR 2206

Table 1: pin description of XR 2206

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4.1.2 Implementation of FSK demodulation scheme: The integrated circuit employed for this purpose is the EXAR device XR-2211. The XR-2211 is a monolithic phase-locked loop (PLL) system especially designed for data communications applications. It is particularly suited for FSK modem applications. It operates over a wide frequency range of 0.01Hz to 300kHz. The circuit for this design is shown in Figure on next page and the calculations of the biasing components are included later in this report in Appendix C. Testing the FSK demodulation section involved passing an FSK input into the demodulator, and tuning the phase locked loop parameters until a stable binary output was obtained. Specifically, a square wave was passed into the FSK modulator section, producing an FSK output. This output was passed directly to the demodulator section, and the demodulator output compared to the overall input. The circuit diagram of FSK modulator is on the next page.

XR-2211 The main PLL within the XR-2211 is constructed from an input preamplifier, analog multiplier used as a phase detector and a precision voltage controlled oscillator (VCO). The preamplifier is used as a limiter such that input signals above typically 10mVrms are amplified to a constant high-level signal. The multiplying-type phase detector acts as a digital exclusive or gate. Its output (unfiltered) produces sum and difference frequencies of the input and the VCO output. The VCO is actually a current controlled oscillator with its normal input current (fO) set by a resistor (R0) to ground and its driving current with a resistor (R1) from the phase detector. The output of the phase detector produces sum and difference of the input and the VCO frequencies (internally connected). When in lock, these frequencies are fIN+ fVCO (2 times fIN when in lock) and fIN - fVCO (0Hz when lock). By adding a capacitor to the phase detector output, the 2 times fIN component is reduced, leaving a DC voltage that represents the phase difference

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between the two frequencies. This closes the loop and allows the VCO to track the input frequency. The FSK comparator is used to determine if the VCO is driven above or below the center frequency (FSK comparator). This will produce both active high and active low outputs to indicate when the main PLL is in lock (quadrature phase detector and lock detector comparator). The block diagram and pin description of XR 2211 is given below.

Fig 5: block diagram of XR-2211

Table 2: pin description of XR-2211

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4.1.3 The coupling circuit: As mentioned previously the coupling circuit need not be complicated, as there exists no voltage across the neutral and ground terminals. A simple capacitor coupling is more than enough for this type of connection to couple the transmitter to the neutral and ground lines. Where as at the receiver end we added a narrow band pass filter to eliminate the noise form the signal.

4.1.4 Relay switching circuit:

The relay switching is a simple single transistor driven set up as shown in the figure on the next page. As we were describing the applications of PLC we did controlled eight devices connected to the port A. The pins of port A are connected to the relay driving circuit which in turn switches the devices. The pin connections of the FRC are

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also shown in the next page. A BC 547 transistor is used for switching to whose collector the coil of the relay is connected. A resistor is provided at the base of the transistor so as to limit the base current. A diode 1N4007 is used as a protection for the transistor mainly by the reverse voltage generated by the relay coil, also known as the fly back voltage.

4.1.5 Power supply: Power supply is an essential part of every electronic equipment. Since the healthy functioning of all stages in the equipment requires a well-designed power supply. A great many things like voltages required, current ratings, power drawn and the percentage of regulation required influence the design of a particular power supply. Generally the kind of power supply used in an instrument used is of fixed voltage type. Since the various voltages required at various points are already known. However in some rare cases, a facility to vary the power supply voltage may be provided. In general, the power supply section provides higher loads as well as line regulation along with main isolation. The power supply section mainly consists of two parts, the Transformer and the Rectifier. 4.1.5.1 Transformer: A transformer along with reducing the main voltage to required small voltage provides isolation from mains to avoid any electrical shock to the operator. We used a step down transformer (12-0-12) which steps downs the 220v AC main voltage. The current rating of the transformer is 1 amp, this was chosen as we intended to connect the device to a PC whose current are about 250-mamp and more over at the receiver we wanted to connect the relays. It is always better to go for a higher value than the exact so we went for 1 amp rather than 500-mamp transformers. PDACE Glb Dept of E&CE

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Circuit Diagram for Power Supply

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4.1.5.2 Rectifier: We designed a full wave rectifier to convert the reduced voltage AC signal to DC, but this only was not sufficient as still the signal lacked stability in it. So the best way to over come this instability was to use the IC voltage regulators available in the market. In the transmitter we required two different voltage levels +12 volts and +5 volts for the XR2206 and MAX-232 IC’s respectively. So we used regulator IC’s 7812 and 7805 respectively. Where as in the receiver we required three different voltage levels +12 volts, +5 volts and -12 volts for XR-2211, MAX-232 and the LM324 (amplifier) so we had to use regulator IC’s 7812, 7805 and 7912 respectively. The circuit diagram for combined power supply design is as shown on the previous page.

4.2 SOFTWARE The whole software for this project was written in C programming language. We developed a graphical user interface, rather than making the user to opt from the given options in a DOS like environment, to make the project easy to use. We made the user interface to look very much similar to the Windows, as almost every one is familiar to the user interface of windows. In the case of device control we even provided the privilege to the user that he/she can turn off the software but still when it is turned on the program remembers the previous state of devices (even if the power is switched off to the PC this will happen, but the devices will be switched off the instant the PC is turned off) and to do so we have maintain a file. Initially even before first time loading the software we have to initialize such that it will display as no devices as being turned on. To do so we did write a small program. The source code written in C programming language is attached in Appendix E.

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4.3 Problems Encountered We encountered several problems, as mentioned earlier we faced problems with designing a FSK modulation and demodulation circuit using 555 timer and LM 565 (PLL) and hence we had to opt for the dedicated IC’s for them (XR-2206 and XR-2211). Later on we faced a major problem with our channel. As we had decided to use the neutral and ground connections and typically speaking there should exist no voltage between them. But on the contrary we found that there existed considerable voltage between neutral and ground. We first checked in all our houses but there was at least 3vrms and then we checked in our college. In the college the voltage varied from 3-17vrms but only in the communication lab that to at a few terminals the voltage was about 1vpp (all these voltage levels were a 50Hz signals). So we had no other option other than working only in the communication lab. We tried to send over signal over the neutral and ground but we could not retrieve the signal. Upon observing the received signal we came to know that our FSK modulated signal was getting super imposed over the existing voltage between ground and neutral. Hence we amplified our transmitting FSK signal so that it would over come the existing voltage (the design has been included in Appendix F) and we also designed an active first order band pass filter and tested our project on the power line. We expected this setup to at least work and yes it did but only for about fifteen minutes. Soon after the mentioned time as if every thing collapsed nothing was wrong but we confirmed the whole setup is working or not, by removing the power line and connecting the transmitter and receiver directly every thing was working! Later on we did not achieve any thing so we decided to power amplify our signal using LM 386 and designed a fourth order active band pass filter at the receiver (rather than first order), but still we were unable to receive the signal. We once again observed the received signal

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(before the filter) on CRO and to our surprise our signal was no were to be seen! The signal was not getting super imposed on the existing voltage (between neutral and ground) we couldn’t see any trace of our signal. We could only marvel the variations in the characteristics of the power line and yes why not that could only be the reason that our setup works for some time and it doesn’t work for rest of the time. We decided not to change the setup and tried again, starting with checking for super imposition. We could observe the super imposing of FSK over the neutral line so we applied our set up (which was not changed). Once again the set up worked only for a short period of time. We could just conclude that the due to improper grounding and instability of the power line we are not able to achieve the desired results.

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5. Advantages and disadvantages Advantages: 1.

It makes use of an existing infrastructure, hence cost effective compared to other systems.

2.

There near light speed propagation makes them very powerful for fast delivery of data and control of devices.

3.

If extended it could replace the LAN connecting wires used now a days for inter connecting computers.

4.

It

utilizes

readily

available

hardware

components

for

its

implementation.

Disadvantages: 1.

Noise is generated from all loads, also broadcast radio interference with the communication.

2.

Attenuation is a parameter of physical length of the channel and impedance mismatches.

3.

Channel is time variant, complicates the design of a communication system.

4.

Communication is simplex. .

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6. Applications This project is based on power-line communication i.e. communication over the existing power-lines. The main advantage of this kind of communication system is the existing infrastructure, which simplifies the implementation. This project definitely brings to surface the tremendous potential in using the power line as a data communication link. In this section we would also like to discuss some major applications driving the Power Line Communication (PLC) technology. They are:
Automatic Meter Reading (AMR) – For the readings of Electricity, Water, Gas or any other meters in the customer premises to be transmitted to a central base station for further processing, billing etc. With tens of millions of meters to be read periodically and regularly, this alone represents an enormous market.
Home Bus- For making the buildings "Intelligent", where all appliances are to be monitored or controlled continuously and automatically for convenience comfort, safety and energy - saving. This makes use of the intra-building wiring.
Distribution Automation, and Supervisory Control and Distribution Automation (DA and SCADA) – This is for the utility companies themselves to monitor and control the Power Distribution Process.
Rural Communication Applications - Where user densities are low and distances are large which makes installation of fresh infrastructure expensive and also non-profitable. Also during the last years the use of Internet has increased. If it would be possible to supply such a kind of network communication over the power-line, it would bring this technology out of the embedded systems area right to the personal computer industry. PDACE Glb Dept of E&CE

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Systems under trial exist today that claim a bit rate of 1 Mb/s, but most commercially available systems use low bit rates, about 10-100 kb/s, and provides low-demanding services such as meter reading. With the availability of power line communications speeds, similar to those of Ethernet, the technology will soon become available in products for personal computer networking within the residence. As electric utilities begin to explore this avenue for enhanced services, a far greater value will be found in the power line than simply delivering electrical power.

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7. Conclusion The power line communications channel is a notoriously bad channel that has been developed without regard for any communications considerations. However, it is so widely distributed that considerable cost savings can be achieved, if use is made of its cable infrastructure. This project definitely brings to surface the tremendous potential in using the power line as a data communication link Trends in both the electric and telecommunications industry have lead to a climate where PLC should be a big player. These trends are driven by the customer’s demand for affordable and high speed Internet access. PLC technology is an exciting alternative to connecting to the Internet via phone and modem. Though this technology is not commercially available yet, it should be available before other broadband technologies due to the relatively low cost of its local loop. So perhaps it will not be long before the power socket on your wall doubles as a broadband communications gateway. The future will see power-line technology in business data communication applications and particularly in home automation applications.

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8. References 1. Electronics Devices and Circuit Theory. By: Robert L. Boylestad, Louis Nashelsky.( 6th edition) 2. Digital communications

By: Simon Haykin

3. IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 19, NO. 1, JANUARY 2004 4. Op-Amps and Linear Integrated Circuits. Gayakwad (Third Edition) 5. Let Us C By: Yashavant Kanetkar (3rd Edition) 6. Let Us C Graphics By: Yashavant Kanetkar 7. www.klm-tech.com 8. www.powerlineworld.com 9. www.enersearch.se/knowledgebase/ publications/thesises/PowerlineCom.pdf 10.

http://pcmag.dit.net

PDACE Glb Dept of E&CE

By: Ramakant A.

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APPENDIX – A

Serial Port Details

The RS-232 port is most commonly used in the PC. But, when we look through Web pages and catalogs at different devices designed to be connected to the PC often use the other inter faces available. The basic reason is pretty logical and obvious once we start working with RS-232.RS-232 can be used in an awful lot of different ways to interconnect devices with many different options and quirks that one has to understand before one can successfully use the PC’s serial ports to interface with other devices.

One can wire two RS-232 devices together 16 different basic ways (and when all of the small variances are taken into account, there is probably twice that number of different ways again). First the serial port is cheaper method of interfacing devices to the PC than the parallel port. Telegraphy was the first form of modern long distance electronics asynchronous serial communication which can said to be the origin of standards for RS-232. At this point, we are up to the early days of computing (the 1950s). Although data could be transmitted at high speed, it couldn’t be processed and read new incoming data back continuously. So, a set of handshaking lines and protocols were developed for what became known as RS-232 serial communications.

The PC’s serial ports consist of basically the same hardware and BIOS interface that was first introduced with the first PC in 1981. Since that time, a 9-pin connector has been specified for the port. For the most pare, the serial port has changed the least of any

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component in the PC for the last 20+ years. Usually, a PC (initially but not now) has four serial ports, called COM1, COM2, COM3 and COM4. COM1 is usually for connecting a serial mouse while COM2 is available to the user where as the rest of the two COM ports 3 and 4 are internally used by the computer. Now a days the COM ports are vanishing from the PC’s and their place is being taken by high-speed serial interface very well known as USB (Universal Serial Bus). But still we can find COM1 and COM2 ports (or at least COM1) are fitted at the backside of the PC. They can be 25-pin D-type or 9-pin D-type male connectors. The newer computers come with a 9-pin male connector. Fig 1 shows pin configurations of both the 25-pin D-type male connectors and the 9-pin D-type male connectors.

________ _________________________________ \1 2 3 4 5/ Looking at pins \ 1 2 3 4 5 6 7 8 9 10 11 12 13/ \6 7 8 9/ on male connector \ 14 15 16 17 18 19 20 21 22 23 24 25 / −−−−− −−−−−−−−−−−−−−−−−−−−−−−−−−−− Fig: 1

Serial communications require a minimum of 3 wires, one for transmitting (Tx), one for reception (Rx), and a common ground. For connection two computers together, we need at least 3 lines i.e. TXD of first computer is connected to RXD of the second and RXD pin of the first computer is connected to RXD pin of the second computer. A common ground wire is connected between Pin 7 of first computer to pin 7 of the second computer. The remaining pins are unused.

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Since in our project only one computer sends the data and the other computer only receives the data, it is in simplex mode. Only the Tx pin (pin 2) and Ground (pin 7) of the transmitting PC are used. Similarly at the receiver side RXD (pin 3) and Ground (pin 7) are used. A computer expects to communicate only thorough a modem. For this it sends out some special signals called handshaking signals o the modem. At the very beginning, it checks weather the modem is connected and is powered up. This is done by sending a signal called DTR (Data Terminal Ready) to the modem. If the modem is ready, it responds by sending a signal DSR (Data Set Ready) to the computer. Only then any communication can take place. But in our project we did short the DTR and the DSR pins. In other words, the DTR signal itself s looped back as DSR, and the computer is made to believe that a modem exists at the other end of the cable. Before sending each unit of information, the computer asks the modem “are you ready to receive?” This signal is known as RTS (Request To Send). This RTS signal is also looped back to CTS (Clear To Send) lines, which is an acknowledgement from the modem stating that it is ready to receive the data. All the handshaking signals explained above are not required in modern PC’s as these were designed at a time when the PC’s were relatively very slow compared to today’s PC’s and they could not handle the data properly which resulted in the loss of data. Hence we can very well exclude these connections with out any loss in data. This was also practically verified using a three-wire connection between two computers.

The assignment of pins for these signals is different on the 25-pin and 9-pin connectors, as shown in the table II and I.

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PIN NAME TxD RxD Gnd RTS CTS DTR DSR RI DCD

25 PIN 2 3 7 4 5 20 6 22 8

9PIN 3 2 5 7 8 4 6 9 1

I/O DIRECTION Output (O) Input (I) 0 1 0 1 1 1

TABLE I: THE PORT CONNECTOR PINS DETAILS:

PORT COM1 COM2 COM3 COM4

BASE ADDRESS 0X03F8 0X02F8 0X03E8 0X02E8

INTERRUPT NUMBER 0X00C 0X00B 0X00C 0X00B

TABLE II: SERIAL PORT BASE ADDRESSES:

The aspect of RS-232 discussed now is the speed in which data is transferred. When we first see the speeds (such as 300,2400,and 9600 bits per second), they seem rather arbitrary. The original serial data speeds were chosen for Teletypes because they gave the mechanical device enough time to print the current character and reset before the next one came in. Over time, these speeds have become standards and, as faster devices have become available, they have just been doubled (e.g.9600 bps is 300 bps doubled five times) To produce these data rates; the PC uses a 1.8432-MHz oscillator input into its serial controller. This frequency is divided by integer to get the nominal RS-232 speeds.

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APPENDIX - B

I/O CARD Advanced Electronic Systems (ALS), the premier supplier of PC ADD-ON cards for industries and educational intuitions has developed the PCI-XX cards to solve the problem of interfacing applications to the PCI local bus. It also facilitates students and beginners to get familiarized with the PCI environment. The PCI-01 is a digital I/O card. It cones in the standard PC add-on card size. It is a 4-layer board with sufficient ground plane to give high noise immunity. It is provided with 24 TTL compatible I/O channels. The PCI=01 card provides the bridge between the PCI bus and the Peripheral Bus. It enables the 8255 in the PCI-01 card to interact with the host system. It provides the control, address and data interface for the 8255 to word as a PCI compliant peripheral. The specifications of the card are, Power

: The card draws power from the PC – 500mA @ 5v.

Size

: 5.67 “ X 4.2 “

Connector : 62 X2 – pin gold plated edge connector. The I/o ports of 8255 are brought out through a 26 –pin FRC type of connector. The recommended system requirements are: •

486DX processor or better

•

Free PCI slot

•

16 MB system RAM memory

•

500 MB Hard disk

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•

3.5”Floppy Disk Drive

•

CD-ROM Drive

•

DOS 5.0 or Higher with ANSI.SYS

•

256-colour VGA DISPLAY

•

Keyboard

With reference to the component layout of PCI-01 enclosed at the of the manual, close the jumper JP2 to get VCC at the pin No25 of connector.

Connector (CN3) pin details:

Pin No 21 22 19 20 17 18 15 16 13 14 11 12 9 10 7 8 5 6 3 4 1 2 23 24 25 26

Circuit Ref U4/4 U4/3 U4/2 U4/1 U4/40 U4/39 U4/38 U4/37 U4/37 U4/18 U4/19 U4/20 U4/21 U4/22 U4/23 U4/25 U4/14 U4/15 U4/16 U4/17 U4/13 U4/12 U4/11 U4/10

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Signal description Port A, Bit0 Port A, Bit1 Port A, Bit2 Port A, Bit3 Port A, Bit4 Port A, Bit5 Port A, Bit6 Port A, Bit7 Port B, Bit0 Port B, Bit1 Port B, Bit2 Port B, Bit3 Port B, Bit4 Port B, Bit5 Port B, Bit6 Port B, Bit7 Port C, Bit0 Port C, Bit1 Port C, Bit2 Port C, Bit3 Port C, Bit4 Port C, Bit5 Port C, Bit6 Port C, Bit7 VCC through JP2 Ground

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8255 INTERFACE DETAILS

The Intel 8255 is a general purpose programmable I/O device designed for use with Intel microprocessor and microcontrollers .It has 24 I/O pins, which may be individually programmed in 2 Groups i.e. Group A consisting of PORT B (8 pins) and PORT C lower (4 pins) and Group B consisting of PORT B (8 pins) and PORT C lower (4 pins) and used in 3 modes of operation.

MODE 0:is called as simple input /output mode. In this mode (MODE 0), each group of 12 I/O pins may be programmed in sets of 4 to be input or output. That is, PORT A, PORT C (upper), PORT B and PORT C (lower) may be configured as I/P ports or o/p ports.

MODE 1:is called as strobed input/output mode. In MODE 1,the second mode, each group is programmed to have 8 lines of input or output (i.e. either of the 2ports PORT A or PORT B may be used as I/P or O/P). The remaining 4 pins of PORT C (lower), 3 are used for handshaking and interrupt control signals for strobed O/P operation.

MODE 2:is called as bi-directional strobed input/output mode. The third mode of operation (MODE 2) is a bi-directional bus mode, which has 8 lines for a bi-directional bus, and 5 control lines, borrowing one from the other group, for handshaking. To program the 8255ports the fallowing Control word register format:

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D7

D6

D5

D4

D3

D2

D1

D0

D0

PORT C (LOWER) 1=I/P, 0=O/P

D1

PORT B 1=I/P, 0=O/P

D2

MODE SELECTION 0=MODE 0,1=MODE 1

D3

PORTC (UPPER) 1=I/P, 0=-O/P

D4

PORT A1=I/P, 0=O/P

D5

D6

D7

MODE SELECTION 00=MODE 0 01=MODE 1 1X=MODE 2

MODE SET FLAG 1=ACTIVE

For ex: If PORT A is taken as output port, PORT B is taken as output port, PORT C lower is taken as output port, the control word is 80h.

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APPENDIX - C Design calculations for modulator and demodulator Design for modulator: The XR-2206 can be operated with two separate timing resistors, R1 and R2, connected to the timing Pin 7 and 8, respectively. Depending on the polarity of the logic signal at Pin 9, either one or the other of these timing resistors is activated. If Pin 9 is open-circuited or connected to a bias voltage ≥ 2V, only R1 is activated. Similarly, if the voltage level at Pin 9 is ≤1V, only R2 is activated. Thus, the output frequency can be keyed between two levels. f1 and f2, as: f1 = 1/R1C and f2 = 1/R2C

Let C = .039 µF

For any given pair of mark and space frequencies, there is a limit to the baud rate that can be achieved. When maximum spacing between the mark and space frequencies is used (the ratio is close to 2:1) the relation ship, Mark-space frequency difference (Hz) Maximum baud rate

≥ 83%

should be observed. For narrow spacing the minimum spacing should be around 66%. We chose frequencies 1070 Hz (fL) and 1270 Hz (f H), to minimize the bandwidth so that at the receiver we could filter out the required signal.

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As we were not aiming at high-speed data transmission, we wanted to achieve a baud rate of 300. So for the specified frequencies the ratio of mark-space frequency difference to maximum baud rate comes to about 66.66%, which is above the required ratio for narrow band spacing.

Design for demodulator: For the demodulator section we first need to know the center f0 frequency of our FSK data transmission. f0 = ( f H + fL)/2 = (1070+1270)/2 f0 = 1170.0 Hz The timing resistor for center frequency can be given as, R4 = RC = 1/(C0 f0) Let C0 = .039 µF R4 = RC = 20.189 KΩ Hence now RA is given as, R5 = RA = RC * f0 / ∆f Where ∆f is, ∆f = f H - fL = 1270 – 1070 = 200 Hz therefore, RA = RC * f0 / ∆f = 20.189 KΩ * 1170 Hz / 200 Hz = 118.1 KΩ To obtain CF we use τF = 0.3 / baud rate = 0.3 / 300 = 1 m second The FSK output filter time constant (τF ) remover chatter from the FSK output.

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But τF = CF * RF Let CF = 0.01 µF Then RF = 100 KΩ The lock-detect filter capacitor (CD ) removes chatter from the lock-detect output. With RD = 510 KΩ or 470 KΩ the minimum value of CD can be determined by, CD (µF) = 16 / capture range in Hz Actual lock range, ∆f = R4 * f0 / R5 ∆f = 40.378 Hz If we assume a capture range of 60% ∆fC = 24 Hz therefore, our total capture range of ±∆fC is 48 Hz. Our minimum value of CD is = 16 / 48 µF = .33 µF The above mentioned value is minimum required so to be on a safer side we took the value of CD as 0.5 µF.

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APPENDIX-D

File initializes source code /*program to initialize the file containing the status of all the eight devises*/ #include void main() { FILE *p; int a,b,c; p=fopen("control.txt","wt"); scanf("%d",&a); /* enter the initial value for ex: zero to switch off all the devices */ fputc(a,p); getch(); }

PDACE Glb Dept of E&CE