Download PCS-9611 X Instruction Manual en Overseas General X R1.01 (en DYBH5301.0086.0002)...
PCS-9611 Feeder Relay Instruction Manual
NR Electric Co., Ltd.
Preface
Preface Introduction This guide and the relevant operating or service manual documentation for the equipment provide full information on safe handling, commissioning and testing of this equipment. Documentation for equipment ordered from NR Electric Co., Ltd. is dispatched separately from manufactured goods and may not be received at the same time. Therefore this guide is provided to ensure that printed information normally present on equipment is fully understood by the recipient. Before carrying out any work on the equipment, the user should be familiar with the contents of this manual and read relevant chapters carefully. This chapter describes the safety precautions recommended when using the equipment. Before installing and using the equipment, this chapter must be thoroughly read and understood.
Health and Safety The information in this chapter of the equipment documentation is intended to ensure that equipment is properly installed and handled in order to maintain it in a safe condition. When electrical equipment is in operation, dangerous voltages will be present in certain parts of the equipment. Failure to observe warning notices, incorrect use, or improper use may endanger personnel and equipment and cause personal injury or physical damage. Before working in the terminal strip area, the equipment must be isolated. Proper and safe operation of the equipment depends on appropriate shipping and handling, proper storage, installation and commissioning, and on careful operation, maintenance and servicing. For this reason only qualified personnel may work on or operate the equipment. Qualified personnel are individuals who: z
Are familiar with the installation, commissioning, and operation of the equipment and of the system to which it is being connected;
z
Are able to safely perform switching operations in accordance with accepted safety engineering practices and are authorized to energize and de-energize equipment and to isolate, ground, and label it;
z
Are trained in the care and use of safety apparatus in accordance with safety engineering practices;
z
Are trained in emergency procedures (first aid).
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PCS-9611 Feeder Relay Date: 2011-08-29
Preface
Instructions and Warnings The following indicators and standard definitions are used: DANGER
means that death, severe personal injury, or considerable equipment damage will occur if safety precautions are disregarded.
WARNING
means that death, severe personal, or considerable equipment damage could occur if safety precautions are disregarded.
CAUTION
means that light personal injury or equipment damage may occur if safety precautions are disregarded. This particularly applies to damage to the device and to resulting damage of the protected equipment.
WARNING! The firmware may be upgraded to add new features or enhance/modify existing features, please make sure that the version of this manual is compatible with the product in your hand. WARNING! During operation of electrical equipment, certain parts of these devices are under high voltage. Severe personal injury or significant equipment damage could result from improper behavior. Only qualified personnel should work on this equipment or in the vicinity of this equipment. These personnel must be familiar with all warnings and service procedures described in this manual, as well as safety regulations. In particular, the general facility and safety regulations for work with high-voltage equipment must be observed. Noncompliance may result in death, injury, or significant equipment damage. DANGER! Never allow the current transformer (CT) secondary circuit connected to this equipment to be opened while the primary system is live. Opening the CT circuit will produce a dangerously high voltage. WARNING! z
Exposed terminals Do not touch the exposed terminals of this equipment while the power is on, as the high voltage generated is dangerous.
z
Residual voltage Hazardous voltage can be present in the DC circuit just after switching off the power supply. It takes a few seconds for the voltage to discharge.
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PCS-9611 Feeder Relay Date: 2011-08-29
Preface
CAUTION! z
Earthing The earthing terminal of the equipment must be securely earthed.
z
Operating environment The equipment must only be used within the range of ambient environment detailed in the specification and in an environment free of abnormal vibration.
z
Ratings Before applying AC voltage and current or the power supply to the equipment, check that they conform to the equipment ratings.
z
Printed circuit board Do not attach and remove printed circuit boards when the power supply to the equipment is on, as this may cause the equipment to malfunction.
z
External circuit When connecting the output contacts of the equipment to an external circuit, carefully check the supply voltage used in order to prevent the connected circuit from overheating.
z
Connection cable Carefully handle the connection cable without applying excessive force.
Typographic and Graphical Conventions The following symbols are used in drawings: Input signal of a function block, such as a logic setting, a blocking signal or a analog comparator signal etc. Input inversion signal of a function block, such as a logic setting, a blocking signal or a analog comparator signal etc.
AND gate: all the input signals are “1”, then the output is “1”
OR gate: anyone the input signals is “1”, then the output is “1”
RS flipflop (static memory): setting input (S), resetting input (R), output (Q) and inverted output (Q)
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PCS-9611 Feeder Relay Date: 2011-08-29
Preface
Timer: pickup with delay “t”, dropout without delay
Timer: pickup without delay, dropout with delay “t”
Timer: pickup with delay “t1”, dropout with delay “t2”
Junction (connection point)
Copyright Version: 1.01
NR ELECTRIC CO., LTD. 69 Suyuan Avenue. Jiangning, Nanjing 211102, China
P/N: EN_DYBH5301.0086.0002
Tel: +86-25-87178185,
Fax: +86-25-87178208
Website: www.nrelect.com, www.nari-relays.com Copyright © NR 2011. All rights reserved
Email:
[email protected]
We reserve all rights to this document and to the information contained herein. Improper use in particular reproduction and dissemination to third parties is strictly forbidden except where expressly authorized. The information in this manual is carefully checked periodically, and necessary corrections will be included in future editions. If nevertheless any errors are detected, suggestions for correction or improvement are greatly appreciated. We reserve the rights to make technical improvements without notice.
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PCS-9611 Feeder Relay Date: 2011-08-29
Preface
Documentation Structure The manual provides a functional and technical description of this relay and a comprehensive set of instructions for the relay’s use and application. The chapter contents are summarized as below:
1 Introduction Briefly introduce the application, functions and features about this relay.
2 Technical Data Introduce the technical data about this relay, such as electrical specifications, mechanical specifications, ambient temperature and humidity range, communication port parameters, type tests, setting ranges and accuracy limits and the certifications that our products have passed.
3 Operation Theory Introduce a comprehensive and detailed functional description of all protective elements.
4 Supervision Introduce the automatic self-supervision function of this relay.
5 Management Function Introduce the management functions (such as metering, control and recording etc.) of this relay.
6 Hardware Introduce the main function carried out by each module of this relay and providing the definition of pins of each module.
7 Settings List of all the settings and their ranges and step sizes, together with a brief explanation of each setting and some notes about the setting application.
8 Human Machine Interface Introduce the hardware of the human machine interface (HMI) module and a detailed guide for the user how to use this relay through the HMI. It also lists all the information which can be view through the HMI, such as settings, measurements, all kinds of reports etc.
9 Configurable Function Introduce the configurable function (such as protection function configuration, LED configuration, binary input configuration and binary output configuration etc.) of this relay.
10 Communication Introduce the communication port and protocol which this relay can support, the IEC60870-5-103, IEC61850 and DNP3.0 protocols are introduced in details. V
PCS-9611 Feeder Relay Date: 2011-08-29
Preface
11 Installation Introduce the recommendations on unpacking, handling, inspection and storage of this relay. A guide to the mechanical and electrical installation of this relay is also provided, incorporating earthing recommendations. A typical wiring connection to this relay is indicated.
12 Commissioning Introduce how to commission this relay, comprising checks on the calibration and functionality of this relay.
13 Maintenance A general maintenance policy for this relay is outlined.
14 Decommissioning and Disposal A general decommissioning and disposal policy for this relay is outlined.
15 Manual Version History List the instruction manual version and the modification history records.
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PCS-9611 Feeder Relay Date: 2011-08-29
1 Introduction
1 Introduction Table of Contents 1.1 Application ........................................................................................................1-1 1.2 Functions ..........................................................................................................1-1 1.3 Features ............................................................................................................1-3
List of Figures Figure 1.1-1 Functional diagram of PCS-9611 ........................................................................ 1-1
1-a
PCS-9611 Feeder Relay Date: 2011-08-29
1 Introduction
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PCS-9611 Feeder Relay Date: 2011-08-29
1 Introduction
1.1 Application The PCS-9611 relay is a protection, control and monitoring unit for various primary equipments (such as overhead line, underground cable and transformer etc.) on solidly grounded, impedance grounded, Peterson coil grounded and ungrounded system. This relay is suitable for wall surface mounted indoors or outdoors or flush mounted into a control panel. This relay can sample the analog values from the traditional instrument transformers, or receive the sampled values from the electronic current and voltage transformers (via a merging unit). The binary inputs and outputs of this relay can be configured according to the demands of a practical engineering through the PCS-PC configuration tool auxiliary software, which can meet some special requirements of protection and control functions. This relay can fully support the IEC61850 communication protocol and GOOSE function, and can completely meet the demands of a modern digitalized substation. The function diagram of this relay is shown in Figure 1.1-1.
Figure 1.1-1 Functional diagram of PCS-9611
1.2 Functions The functions of this relay include protective functions, management functions and auxiliary testing functions, and the functions of this relay are listed in the following tables. z
Protective functions 1-1
PCS-9611 Feeder Relay Date: 2011-08-29
1 Introduction Protective Functions 50P
Instantaneous overcurrent protection
51P
Time overcurrent protection
67P
Directional overcurrent protection
50G
Instantaneous zero sequence overcurrent protection
51G
Time zero sequence overcurrent protection
67G
Directional zero sequence overcurrent protection
51SG
Sensitive earth fault protection
67SG
Directional sensitive earth fault protection
27
Undervoltage protection
59
Overvoltage protection
47
Negative sequence overvoltage protection
59G
Zero sequence overvoltage protection
49
Thermal overload protection
46
Negative sequence overcurrent protection
46BC
Broken conductor protection
81U
Under-frequency protection
81O
Over-frequency protection
81R
Frequency rate-of-change protection
50BF
Breaker failure Protection
79
Three-pole auto-recloser (Up to 4 shots)
25
Synchronism check function
SOTF
Switch onto fault logic
MR
Mechanical protection
AI
Analog inputs Voltage and current drift auto adjustment Self supervision
VTS
Voltage transformer supervision
CTS
Current transformer supervision Binary inputs Binary outputs
z
Management functions Management Functions Metering Circuit breaker status monitoring 2
Circuit breaker control
TCS
Tripping circuit supervision Multiple setting groups Control inputs 64 Protection operation reports 1024 Supervision alarm records 1024 Control operation records
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1 Introduction 1024 User operation records FDR
64 Fault and disturbance records 1024 latest SOE records, latest records of the following elements
SOE
state changing: operating abnormality alarm elements, supervision alarm elements, protection elements and binary input elements. Rear communication ports: Ethernet, RS-485, Printer port Time synchronization port: RS-485
z
Auxiliary testing functions Auxiliary Testing Functions Virtual tripping report generation and communication testing Virtual self-supervision report generation and communication testing Virtual binary input state change report generation and communication testing Virtual metering values generation and communication testing
1.3 Features z
This device is based on a 32-bit high performance dual-core processor, internal high speed bus and intelligent I/O ports, and the hardware is in module design and can be configured flexibly, featuring interchangeability and easy extension and maintenance.
z
Modularized hardware design makes this relay be easily upgraded or repaired by a qualified service person. Various function optional modules can satisfy various situations according to the different requirements of the users.
z
The adoption of 16-bit A/D converter and the dual-channel sampling technology can ensure the accuracy and reliability of protection sampling and the correctness of protection operation. It is also provides dedicated current transformers for metering, and ensures the high accuracy of telemetering with 48-point high speed sampling rate per cycle.
z
This device can sample the analog values from the traditional instrument transformers, or receive the sampled values from the electronic transformers. It can support the protocol IEC60044-8, IEC61850-9-2 and GOOSE.
z
Various algorithms for protection and measurement have been completed in this device for the feature of electronic transformer sampling, such as the error prevention method of multi-algorithms data anomaly for the digital channels, to realize high accuracy and reliability under various conditions of network faults or communication interruption.
z
This device has powerful GOOSE functions, and the connection and cooperation between some devices can be realized without using electrical cables, to facilitate the realization of such functions as simple bus differential protection, overload interlock shedding function and backup automatic transfer function etc.
z
This device has fully realized the technology to integrate six functions into one device: protection, measurement, control, remote signaling, merging unit function and remote module
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PCS-9611 Feeder Relay Date: 2011-08-29
1 Introduction
functions, to improve the reliability. z
Various methods of GPS time synchronization are supported in this relay, including SNTP, IEEE1588 (V2), pulse per second (PPS) and IRIG-B synchronization.
z
The protection modules are completely separated from other modules, and are independent in both hardware and software. The protection functions do not depend on the communication network, so the failure of communication network will not affect the normal operation of the protection functions.
z
Mature protection configuration, fast speed and high security performance can meet the practical requirements. Each protective element is independent, so it is very convenient for whether adopting the selected protective element.
z
This device constantly measures and calculates a large amount of analog quantities, such as phase voltage, phase-to-phase voltage, neutral voltage, phase current, neutral current, active power, reactive power, power factor and frequency etc.
z
The human machine interface (HMI) with a small control module (a 240×128-dot LCD, a 9-key keypad and 20 LED indicators) on the front panel is very friendly and convenient to the user.
z
This device can communicate with a SAS or RTU via different communication intermediates: Ethernet network, RS-485 serial ports. The communication protocol of this device is optional: IEC61850, IEC60870-5-103 or DNP3.0.
z
This device can detect the tripping circuit of the circuit breaker and monitor the operation (close or trip) time of a circuit breaker by checking the auxiliary contacts of the circuit breaker.
z
Complete event recording function is provided: 64 latest protection operation reports, 1024 latest supervision records, 1024 latest control operation records, 1024 latest user operation records and 1024 latest records of time tagged sequence of event (SOE) can be recorded.
z
Powerful fault and disturbance recording function is supported: 64 latest fault or disturbance waves, the duration of a wave recording is configurable.
PCS-9611 Feeder Relay
1-4 Date: 2011-08-29
2 Technical Data
2 Technical Data Table of Contents 2.1 General Specification.......................................................................................2-1 2.1.1 Electrical Specifications ..................................................................................................... 2-1 2.1.2 Mechanical Specifications.................................................................................................. 2-2 2.1.3 Ambient Temperature and Humidity ................................................................................... 2-2 2.1.4 Communication Interfaces ................................................................................................. 2-3 2.1.5 Type Test ........................................................................................................................... 2-4
2.2 Protective Functions ........................................................................................2-6 2.2.1 Overcurrent Protection....................................................................................................... 2-6 2.2.2 Voltage Control Element .................................................................................................... 2-6 2.2.3 Phase Directional Element................................................................................................. 2-6 2.2.4 IDMT Overcurrent Protection ............................................................................................. 2-6 2.2.5 Zero Sequence Overcurrent Protection ............................................................................. 2-6 2.2.6 Zero Sequence Directional Element .................................................................................. 2-7 2.2.7 Zero Sequence IDMT Overcurrent Protection.................................................................... 2-7 2.2.8 Sensitive Earth Fault Protection......................................................................................... 2-7 2.2.9 Sensitive Earth Fault Directional Element.......................................................................... 2-7 2.2.10 Sensitive Earth Fault IDMT Protection ............................................................................. 2-8 2.2.11 Negative Sequence Overcurrent Protection..................................................................... 2-8 2.2.12 Thermal Overload Protection ........................................................................................... 2-8 2.2.13 Undervoltage Protection .................................................................................................. 2-8 2.2.14 Overvoltage Protection .................................................................................................... 2-9 2.2.15 Zero Sequence Overvoltage Protection ........................................................................... 2-9 2.2.16 Negative Sequence Overvoltage Protection .................................................................... 2-9 2.2.17 Frequency Protection....................................................................................................... 2-9 2.2.18 Frequency Rate-of-change Protection ........................................................................... 2-10 2.2.19 SOTF Overcurrent Protection ........................................................................................ 2-10 2-a
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2 Technical Data
2.2.20 Zero Sequence SOTF Overcurrent Protection ...............................................................2-10 2.2.21 Breaker Failure Protection..............................................................................................2-10 2.2.22 Broken Conductor Protection ......................................................................................... 2-11
2.3 Management Functions................................................................................. 2-11 2.3.1 Metering Scope and Accuracy.......................................................................................... 2-11 2.3.2 Control Performance ........................................................................................................ 2-11 2.3.3 Clock Performance ...........................................................................................................2-12 2.3.4 Fault and Disturbance Recording .....................................................................................2-12 2.3.5 Binary Input Signal ...........................................................................................................2-12 2.3.6 Transient Overreach .........................................................................................................2-12
2.4 Certification.................................................................................................... 2-12
2-b
PCS-9611 Feeder Relay Date: 2011-08-29
2 Technical Data
2.1 General Specification 2.1.1 Electrical Specifications 2.1.1.1 Power Supply Standard
IEC60255-11: 2008
Rated voltage
110/125Vdc, 220/250Vdc, 220Vac
Variation
80% ~ 120%
Permissible ripple voltage
Max 15% of the rated voltage (DC power supply)
Burden
Traditional AC inputs
< 10W @ Quiescent condition; < 15W @ Operating condition
Digital AC inputs
< 15W @ Quiescent condition; < 20W @ Operating condition
2.1.1.2 Analog Current Input Ratings Phase rotation
ABC
Rated frequency (fn)
50Hz, 60Hz
Nominal range
fn ± 5Hz
Application object
For protection
Rated current (In) Linear to Thermal withstand capability
1A
For metering 5A
1A
5A
30×In
30×In
2×In
2×In
continuously
3×In
3×In
2×In
2×In
for 10s
30×In
30×In
12×In
12×In
for 1s
100×In
100×In
30×In
30×In
for half a cycle
250×In
250×In
75×In
75×In
< 0.10VA/phase
< 0.20VA/phase
< 0.20VA/phase
< 0.40VA/phase
Burden (@ In)
2.1.1.3 Analog Voltage Input Ratings Phase rotation
ABC
Rated frequency (fn)
50Hz, 60Hz
Nominal range
fn ± 5Hz
Rated voltage (Un)
100V ~ 130V (phase-to-phase voltage)
Linear to
130V
Thermal
continuously
130V
withstand
10s
200V
capability
1s
250V
Burden
< 0.10VA / phase
2.1.1.4 Binary Input Binary input number
Up to 38
Rated voltage
24V
48V
110V
125V
220V
250V
Rated current
1.20mA
2.40mA
1.10mA
1.25mA
2.20mA
2.50mA
Pickup voltage
55% ~ 70% rated voltage
Dropout voltage
55% rated voltage
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PCS-9611 Feeder Relay Date: 2011-08-29
2 Technical Data Maximum permitted voltage
120% rated voltage
High voltage withstand
2000Vac, 2800Vdc
Resolving time for logic input
< 1ms
2.1.1.5 Binary Output Item
Tripping output
Signal output
Binary output number
Up to 25
Up to 10
Output model
Potential-free contact
Potential-free contact
Max system voltage
380Vac, 250Vdc
380Vac, 250Vdc
Voltage across open contact
1000V RMS for 1min
1200V RMS for 1min
Continuous carry
5.0A @ 380Vac; 5.0A @ 250Vdc
8.0A @ 380Vac; 8.0A @ 250Vdc
Short duration current
6A for 3000ms; 15A for 500ms
10A for 3000ms; 20A for 500ms
0.6A @ 48Vdc, L/R=40ms
0.6A @ 48Vdc, L/R=40ms
0.1A @ 110Vdc, L/R=40ms
0.3A @ 110Vdc, L/R=40ms
0.05A @ 220Vdc, L/R=40ms
0.2A @ 220Vdc, L/R=40ms
Pickup time
< 8ms
< 10ms
Dropout time
< 5ms
< 8ms
Bounce time
1ms
1ms
loaded contact
100,000 operations minimum
100,000 operations minimum
unloaded contact
10,000,000 operations minimum
10,000,000 operations minimum
Breaking capacity
Durability
2.1.2 Mechanical Specifications Enclosure dimensions
225.00×177.00×224.80 (W×H×D, unit: mm)
Trepanning dimensions
226.00×178.00, M5 screw (W×H, unit: mm)
Mounting way
Flush mounted
Weight per device
Approx. 7.0kg (fully equipped)
Local control panel
Small control module: a 240×128-dot LCD, a 9-key keypad and 20 LEDs
Display language
Optional: Chinese, English
Housing material
Aluminum
Housing color
Silver grey
Location of terminals
Rear panel of the device Front side: IP40, up to IP51
Protection class
IEC60225-1: 2009
Rear side, connection terminals: IP20 Other Sides: IP30
2.1.3 Ambient Temperature and Humidity Standard
IEC60225-1: 2009
Operating temperature range
-40°C ~ +70°C
Transport and storage temperature range
-40°C ~ +70°C
Permissible humidity
5% ~ 95%, condensation not permissible
Altitude
< 3000m
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PCS-9611 Feeder Relay Date: 2011-08-29
2 Technical Data
2.1.4 Communication Interfaces 2.1.4.1 Ethernet Port for RTU/SCADA Medium
Electrical
Ethernet
Optical
Parameters Port number
2 or 4
Connector type
RJ-45
Transmission rate
100Mbits/s
Transmission standard
100Base-TX
Transmission distance
< 100m
Protocol
IEC60870-5-103:1997 or IEC61850
Safety level
Isolation to ELV level
Port number
2
Connector type
SC
Transmission rate
100Mbits/s
Transmission standard
100Base-FX
Optical fiber type
Multi-mode
Wavelength
1300nm
Transmission distance
< 1500m
Protocol
IEC60870-5-103:1997 or IEC61850
2.1.4.2 Serial Port for RTU/SCADA Medium
RS-485 (EIA)
Parameters Port number
0 or 2
Baud rate
4800 ~ 115200bps
Transmission distance
< 1000m @ 4800bps
Maximal capacity
32
Protocol
IEC60870-5-103:1997 or DNP3.0
Safety level
Isolation to ELV level
2.1.4.3 Serial Port for Printer Medium
RS-232 (EIA)
Parameters Port number
1
Baud rate
4800 ~ 115200bps
Printer type
EPSON® LQ-300K
Safety level
Isolation to ELV level
2.1.4.4 Serial Port for Time Synchronization Medium
RS-485 (EIA)
Parameters Port number
1
Transmission distance
< 500m
Maximal capacity
32
Timing standard
PPS, IRIG-B
Safety level
Isolation to ELV level
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PCS-9611 Feeder Relay Date: 2011-08-29
2 Technical Data
2.1.4.5 Ethernet Port for Debugging Medium
Electrical Ethernet (in front panel)
Parameters Port number
1
Connector type
RJ-45
Transmission rate
100Mbits/s
Transmission standard
100Base-TX
Transmission distance
< 100m
Safety level
Isolation to ELV level
2.1.4.6 Process Level Interface Medium
Optical Ethernet
Parameters Optical fiber material
Glass fiber
Optical fiber type
Multi-mode
Connector type
LC
ST
Wavelength
1310nm
820nm
Transmission distance
< 2000m
Minimum transmission power
-20dBm
Reception sensitivity
-30dBm
2.1.5 Type Test 2.1.5.1 Environmental Tests Dry cold test
IEC60068-2-1: 2007, 16h at -25°C
Dry heat test
IEC60068-2-2: 2007, 16h at +55°C
Damp heat test
IEC60068-2-78: 2001, 10 days, 93%RH, +55°C
Cyclic temperature with
IEC60068-2-30: 2005, six (12+12hours) cycles, 95%RH,
humidity test
low temperature +25°C, high temperature +55°C
2.1.5.2 Electrical Tests Dielectric test Impulse voltage test
IEC60255-27: 2005, test voltage: 2kV, 50Hz, 1min IEC60255-5: 2000, test voltage: 5kV, unipolar impulses, waveform 1.2/50μs, source energy 0.5J
Overvoltage category
IEC60255-5: 2000, Class III
Insulation measurement
IEC60255-5: 2000, insulation resistance >100MΩ @ 500Vdc
Pollution degree
IEC60225-1: 2009, Class II
2.1.5.3 Electromagnetic Compatibility 1MHz burst disturbance tests
IEC60255-22-1: 2007, Class III
- Common mode
2.5kV
- Differential mode
1.0kV
Electrostatic discharge tests
IEC60255-22-2: 2008, Class IV
- For contact discharge
8.0kV
- For air discharge
15.0kV
2-4
PCS-9611 Feeder Relay Date: 2011-08-29
2 Technical Data Radio frequency interference tests
IEC60255-22-3: 2007, Class III
- Frequency sweep - Radiated amplitude-modulated
10V/m(RMS), f=80…1000MHz
- Spot frequency - Radiated amplitude-modulated - Radiated pulse-modulated Fast transient disturbance tests
10Vm(RMS), f=80/160/450/900MHz 10Vm(RMS), f=900MHz IEC60255-22-4: 2008, Class IV
- Power supply, I/O & Earth terminals
4kV, 2.5kHz, 5/50ns
- Communication terminals
2kV, 5.0kHz, 5/50ns
Surge immunity tests - Power supply, AC inputs, I/O terminals
IEC60255-22-5: 2008, Class IV 1.2/50us, 4kV, line-to-ground 2kV, line-to-line
Conducted RF electromagnetic disturbance - Power supply, AC, I/O, Comm. terminals Power frequency field immunity
IEC60255-22-6: 2001, Class III 10V(RMS), 150kHz~80MHz IEC60255-22-7: 2003, Class A 10s 300V, line-to-ground 150V, line-to-line
Conducted emission limits
IEC60255-25: 2000, Class A
Radiated emission limits
IEC60255-25: 2000, Class A
Auxiliary power supply performance
IEC60255-11: 2008
- Voltage dips
Up to 500ms for dips to 40% of rated voltage without reset
- Voltage short interruptions Power frequency magnetic field immunity
100ms for interruption without rebooting IEC61000-4-8: 2001, Class V 100A/m for 1min 1000A/m for 3s
Pulse magnetic field immunity
IEC61000-4-9: 2001, Class V 6.4/16us, 1000A/m for 3s
Damped oscillatory magnetic field immunity
IEC61000-4-10: 2001, Class V 100kHz & 1MHz – 100A/m
Ring wave immunity - Power supply, I/O terminals
IEC61000-4-12: 2006, Class III 1MHz 2kV, line-to-ground 1kV, line-to-line
2.1.5.4 Mechanical Tests Vibration test
IEC60255-21-1:1988, Class I
Shock test
IEC60255-21-2:1988, Class I
Bump test
IEC60255-21-2:1988, Class I
Seismic test
IEC60255-21-3:1988, Class I
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PCS-9611 Feeder Relay Date: 2011-08-29
2 Technical Data
2.2 Protective Functions 2.2.1 Overcurrent Protection Current setting
0.05×In ~ 30.0×In
Pickup current
1.00×Setting
Dropout current
0.95×Setting
Tolerance of current setting
≤ 2.5% Setting or 0.01×In, whichever is greater
Time setting
0.00s ~ 100.00s
Pickup time
≤ 35ms
Dropout time
≤ 35ms
Tolerance of time setting
≤ 1% Setting + 35ms
2.2.2 Voltage Control Element Negative overvoltage element setting
2.00V ~ 70.00V
Undervoltage element setting
2.00V ~ 120.00V
Tolerance of voltage setting
≤ 2.5% Setting or 0.10V, whichever is greater
Operating time
≤ 35ms
2.2.3 Phase Directional Element Directionality
Optional: Forward, Reverse
Characteristic angle
Configurable: -180°~179°, step is 1°
Boundary and angle accuracy
±3°
Block logic
Permission or block selectable by setting
Operating time
≤ 35ms
2.2.4 IDMT Overcurrent Protection Current threshold setting
0.05×In ~ 4.0×In
Pickup current
1.00×Setting
Dropout current
0.95×Setting
Tolerance of current threshold setting
≤ 2.5% Setting or 0.01×In, whichever is greater
Time multiplier setting
0.05 ~ 100.00
Pickup time
≤ 35ms
Dropout time
≤ 35ms
Tolerance of trip time for 1.2 < I/Ip < 30
≤ 5% of reference (calculated) value + 2.5% current tolerance or 35ms, whichever is greater
2.2.5 Zero Sequence Overcurrent Protection Current setting
0.05×In ~ 30.0×In
Pickup current
1.00×Setting
Dropout current
0.95×Setting
Tolerance of current setting
≤ 2.5% Setting or 0.01×In, whichever is greater
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PCS-9611 Feeder Relay Date: 2011-08-29
2 Technical Data Time setting
0.00s ~ 100.00s
Pickup time
≤ 35ms
Dropout time
≤ 35ms
Tolerance of time setting
≤ 1% Setting + 35ms
2.2.6 Zero Sequence Directional Element Directionality
Optional: Forward, Reverse
Characteristic angle
Configurable: -180°~179°, step is 1°
Boundary and angle accuracy
±3°
Block logic
Permission or block selectable by setting
Operating time
≤ 35ms
2.2.7 Zero Sequence IDMT Overcurrent Protection Current threshold setting
0.05×In ~ 4.0×In
Pickup current
1.00×Setting
Dropout current
0.95×Setting
Tolerance of current threshold setting
≤ 2.5% Setting or 0.01×In, whichever is greater
Time multiplier setting
0.05 ~ 100.00
Pickup time
≤ 35ms
Dropout time
≤ 35ms ≤ 5% of reference (calculated) value + 2.5% current
Tolerance of trip time for 1.2 < I/Ip < 30
tolerance or 35ms, whichever is greater
2.2.8 Sensitive Earth Fault Protection Current setting
0.005A ~ 0.400A, dedicated CT
Pickup current
1.00×Setting
Dropout current
0.95×Setting
Tolerance of current setting
≤ 1.5% Setting or 1mA, whichever is greater
Time setting
0.00s ~ 100.00s
Pickup time
≤ 35ms
Dropout time
≤ 35ms
Tolerance of time setting
≤ 1% Setting + 35ms
2.2.9 Sensitive Earth Fault Directional Element Directionality
Optional: Forward, Reverse
Characteristic angle
Configurable: -180°~179°, step is 1°
Boundary and angle accuracy
±3°
Block logic
Permission or block selectable by setting
Operating time
≤ 35ms
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2.2.10 Sensitive Earth Fault IDMT Protection Current threshold setting
0.005A ~ 0.400A, dedicated CT
Pickup current
1.00×Setting
Dropout current
0.95×Setting
Tolerance of current threshold setting
≤ 1.5% Setting or 1mA, whichever is greater
Time multiplier setting
0.05 ~ 100.00
Pickup time
≤ 35ms
Dropout time
≤ 35ms ≤ 5% of reference (calculated) value + 1.5% current
Tolerance of trip time for 1.2 < I/Ip < 30
tolerance or 35ms, whichever is greater
2.2.11 Negative Sequence Overcurrent Protection Current setting
0.05×In ~ 4.0×In
Pickup current
1.00×Setting
Dropout current
0.95×Setting
Tolerance of current setting
≤ 2.5% Setting or 0.01×In, whichever is greater
Time setting
0.00s ~ 100.00s
Pickup time
≤ 50ms
Dropout time
≤ 50ms
Tolerance of time setting
≤ 1% Setting + 50ms
2.2.12 Thermal Overload Protection Reference current setting
0.05×In ~ 3.0×In
Pickup current
1.00×Setting
Dropout current
0.98×Setting
Tolerance of reference current setting
≤ 2.5% Setting or 0.01×In, whichever is greater
Time constant setting
0.01s ~ 6000.00s
Pickup time
≤ 35ms
Dropout time
≤ 35ms
Tolerance of trip time for 1.2 < I/(k×Ib) < 20
≤ 5% of reference (calculated) value + 2.5% current tolerance or 35ms, whichever is greater
2.2.13 Undervoltage Protection Voltage setting
2.00V ~ 120.00V
Pickup voltage
1.00×Setting
Dropout voltage
Configurable: 1.03×Setting ~ 3.00×Setting
Tolerance of voltage setting
≤ 2.5% Setting or 0.10V, whichever is greater
Time setting
0.00s ~ 100.00s
Pickup time
≤ 80ms
Dropout time
≤ 80ms
Tolerance of time setting
≤ 1% Setting + 80ms
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2.2.14 Overvoltage Protection Voltage setting
57.70V ~ 200.00V
Pickup voltage
1.00×Setting
Dropout voltage
Configurable: 0.93×Setting ~ 0.97×Setting
Tolerance of voltage setting
≤ 2.5% Setting or 0.10V, whichever is greater
Time setting
0.00s ~ 100.00s
Pickup time
≤ 50ms
Dropout time
≤ 50ms
Tolerance of time setting
≤ 1% Setting + 50ms
2.2.15 Zero Sequence Overvoltage Protection Voltage setting
2.00V ~ 160.00V
Pickup voltage
1.00×Setting
Dropout voltage
0.95×Setting
Tolerance of voltage setting
≤ 2.5% or 0.10V, whichever is greater
Time setting
0.00s ~ 100.00s
Pickup time
≤ 50ms
Dropout time
≤ 50ms
Tolerance of time setting
≤ 1% Setting + 50ms
2.2.16 Negative Sequence Overvoltage Protection Voltage setting
2.00V ~ 120.00V
Pickup voltage
1.00×Setting
Dropout voltage
0.95×Setting
Tolerance of voltage setting
≤ 2.5% or 0.10V, whichever is greater
Time setting
0.00s ~ 100.00s
Pickup time
≤ 50ms
Dropout time
≤ 50ms
Tolerance of time setting
≤ 1% Setting + 50ms
2.2.17 Frequency Protection Under-frequency setting
45.00Hz ~ 60.00Hz
Over-frequency setting
50.00Hz ~ 65.00Hz
Pickup frequency
1.00×Setting
Dropout frequency
1.00×Setting
Tolerance of frequency setting
≤ 0.01Hz
Time setting
0.00s ~ 100.00s
Pickup time
≤ 50ms
Dropout time
≤ 50ms
Tolerance of time setting
≤ 1% Setting + 50ms
Blocking element Undervoltage blocking setting
10.00V ~ 120.00V
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2 Technical Data Operating time
≤ 35ms
Tolerance of undervoltage blocking setting
≤ 2.5% Setting or 0.10V, whichever is greater
2.2.18 Frequency Rate-of-change Protection Frequency Rate-of-change setting
-10.00Hz/s ~ 10.00Hz/s
Pickup frequency rate-of-change
1.00×Setting
Dropout frequency rate-of-change
1.00×Setting
Tolerance of frequency rate-of-change setting
≤ 0.20Hz/s
Time setting
0.00s ~ 100.00s
Pickup time
≤ 50ms
Dropout time
≤ 50ms
Tolerance of time setting
≤ 1% Setting + 50ms
2.2.19 SOTF Overcurrent Protection Current setting
0.05×In ~ 30.0×In
Pickup current
1.00×Setting
Dropout current
0.97×Setting
Tolerance of current setting
≤ 2.5% Setting or 0.01×In, whichever is greater
Time setting
0.00s ~ 100.00s
Pickup time
≤ 35ms
Dropout time
≤ 35ms
Tolerance of time setting
≤ 1% Setting + 35ms
2.2.20 Zero Sequence SOTF Overcurrent Protection Current setting
0.05×In ~ 30.0×In
Pickup current
1.00×Setting
Dropout current
0.97×Setting
Tolerance of current setting
≤ 2.5% Setting or 0.01×In, whichever is greater
Time setting
0.00s ~ 100.00s
Pickup time
≤ 35ms
Dropout time
≤ 35ms
Tolerance of time setting
≤ 1% Setting + 35ms
2.2.21 Breaker Failure Protection Current setting
0.05×In ~ 5.0×In
Pickup current
1.00×Setting
Dropout current
0.90×Setting
Tolerance of current setting
≤ 2.5% Setting or 0.01×In, whichever is greater
Time setting
0.00s ~ 100.00s
Pickup time
≤ 35ms
Dropout time
≤ 35ms
Tolerance of time setting
≤ 1% Setting + 35ms
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2.2.22 Broken Conductor Protection I2/I1 Ratio setting
0.10 ~ 1.00
Pickup ratio
1.00×Setting
Dropout ratio
0.95×Setting
Tolerance of current setting
≤ 2.5% Setting
Time setting
0.00s ~ 200.00s
Pickup time
≤ 70ms
Dropout time
≤ 70ms
Tolerance of time setting
≤ 1% Setting + 70ms
2.3 Management Functions 2.3.1 Metering Scope and Accuracy Metering Item
Range
Accuracy
Phase range
0° ~ 360°
≤ 0.5% or ±1°
Frequency
35.00Hz ~ 70.00Hz
≤ 0.01Hz
Currents from dedicated metering current transformers Current
0.05 ~ 1.40×In
≤ 0.2% of reading
Voltage
0.05 ~ 1.40×Un
≤ 0.5% of reading
Active power (W)
0.20 ~ 1.40×Un, 0.05 ~ 1.40×In
≤ 0.5% of reading at unity power factor
Reactive Power (Vars)
0.20 ~ 1.40×Un, 0.05 ~ 1.40×In
≤ 0.5% of reading at zero power factor
Apparent Power (VA)
0.20 ~ 1.40×Un, 0.05 ~ 1.40×In
≤ 0.5% of reading
Energy (Wh)
0.20 ~ 1.40×Un, 0.05 ~ 1.40×In
≤ 0.5% of reading at unity power factor
Energy (Varh)
0.20 ~ 1.40×Un, 0.05 ~ 1.40×In
≤ 0.5% of reading at zero power factor
Currents from protection measurement current transformers Current
0.05 ~ 1.40×In
≤ 2.0% of reading
Voltage
0.05 ~ 1.40×Un
≤ 0.5% of reading
Active power (W)
0.20 ~ 1.40×Un, 0.05 ~ 1.40×In
≤ 3.0% of reading at unity power factor
Reactive Power (Vars)
0.20 ~ 1.40×Un, 0.05 ~ 1.40×In
≤ 3.0% of reading at zero power factor
Apparent Power (VA)
0.20 ~ 1.40×Un, 0.05 ~ 1.40×In
≤ 3.0% of reading
Energy (Wh)
0.20 ~ 1.40×Un, 0.05 ~ 1.40×In
≤ 3.0% of reading at unity power factor
Energy (Varh)
0.20 ~ 1.40×Un, 0.05 ~ 1.40×In
≤ 3.0% of reading at zero power factor
2.3.2 Control Performance Control mode
Local or remote
Accuracy of local control
≤ 1s
Accuracy of remote control
≤ 3s
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2 Technical Data
2.3.3 Clock Performance Real time clock accuracy
≤ 3s/day
Accuracy of GPS synchronization
≤ 1ms
External time synchronization
IRIG-B (200-98), PPS, IEEE1588 or SNTP protocol
2.3.4 Fault and Disturbance Recording Magnitude and relative phases
≤ 2.5% of applied quantities
Maximum duration
10000 sampled points (24 sampled points per cycle)
Recording position
5 cycles before pickup of trigger element
2.3.5 Binary Input Signal Resolution of binary input signal
≤ 1ms
Binary input mode
Potential-free contact
Resolution of SOE
≤ 2ms
2.3.6 Transient Overreach Transient overreach (DC offset)
≤ 5% for X/R ≤ 100
2.4 Certification z
ISO9001: 2000
z
ISO14001: 2004
z
OHSAS18001: 1999
z
ISO10012: 2003
z
CMMI L4
z
EMC: 89/336/EEC, EN50263: 2000
z
Products safety(PS): 73/23/EEC, EN61010-1: 2001, EN60950: 2002
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3 Operation Theory
3 Operation Theory Table of Contents 3.1 Overview ...........................................................................................................3-1 3.2 Fault Detectors .................................................................................................3-1 3.3 Overcurrent Protection ....................................................................................3-4 3.3.1 Definite Time Overcurrent Protection................................................................................. 3-4 3.3.2 Inverse Definite Minimum Time Overcurrent Protection..................................................... 3-6 3.3.3 Voltage Control Element for Overcurrent Protection .......................................................... 3-8 3.3.4 Directional Element for Overcurrent Protection.................................................................. 3-9 3.3.5 Harmonic Blocking Element for Overcurrent Protection....................................................3-11 3.3.6 Overcurrent Protection Settings....................................................................................... 3-12
3.4 Thermal Overload Protection ........................................................................3-14 3.4.1 Thermal Overload Protection Theory ............................................................................... 3-14 3.4.2 Thermal Overload Protection Settings ............................................................................. 3-16
3.5 Zero Sequence Overcurrent Protection........................................................3-16 3.5.1 Definite Time Zero Sequence Overcurrent Protection ..................................................... 3-16 3.5.2 IDMT Zero Sequence Overcurrent Protection.................................................................. 3-18 3.5.3 Directional Element for Zero Sequence Overcurrent Protection ...................................... 3-19 3.5.4 Harmonic Blocking Element for ROC Protection.............................................................. 3-20 3.5.5 Zero Sequence Overcurrent Protection Settings ............................................................. 3-21
3.6 Sensitive Earth Fault Protection ...................................................................3-24 3.6.1 Definite Time Sensitive Earth Fault Protection................................................................. 3-24 3.6.2 IDMT Sensitive Earth Fault Protection ............................................................................. 3-25 3.6.3 Directional Element for Sensitive Earth Fault Protection ................................................. 3-26 3.6.4 Sensitive Earth Fault Protection Settings......................................................................... 3-27
3.7 Negative Sequence Overcurrent Protection ................................................3-28 3.7.1 Definite Time Negative Sequence Overcurrent Protection............................................... 3-28 3.7.2 IDMT Negative Sequence Overcurrent Protection ........................................................... 3-29 3-a
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3 Operation Theory
3.7.3 Negative Sequence Overcurrent Protection Settings .......................................................3-30
3.8 Broken Conductor Protection....................................................................... 3-31 3.8.1 Broken Conductor Protection Theory ...............................................................................3-31 3.8.2 Broken Conductor Protection Settings..............................................................................3-31
3.9 Breaker Failure Protection ............................................................................ 3-32 3.9.1 Breaker Failure Protection Theory....................................................................................3-32 3.9.2 Breaker Failure Protection Settings ..................................................................................3-34
3.10 Switch Onto Fault (SOTF) Protection......................................................... 3-34 3.10.1 SOTF Protection Theory.................................................................................................3-34 3.10.2 SOTF Protection Settings...............................................................................................3-36
3.11 Cold Load Pickup Logic .............................................................................. 3-36 3.11.1 Cold Load Pickup Logic Theory ......................................................................................3-36 3.11.2 Cold Load Pickup Logic Settings ....................................................................................3-37
3.12 Undervoltage Protection ............................................................................. 3-39 3.12.1 Undervoltage Protection Theory .....................................................................................3-39 3.12.2 Undervoltage Protection Settings ...................................................................................3-40
3.13 Overvoltage Protection ............................................................................... 3-41 3.13.1 Overvoltage Protection Theory .......................................................................................3-41 3.13.2 Overvoltage Protection Settings .....................................................................................3-42
3.14 Zero Sequence Overvoltage Protection ..................................................... 3-43 3.14.1 Zero Sequence Overvoltage Protection Theory..............................................................3-43 3.14.2 Zero Sequence Overvoltage Protection Settings............................................................3-44
3.15 Negative Sequence Overvoltage Protection.............................................. 3-44 3.15.1 Negative Sequence Overvoltage Protection Theory.......................................................3-44 3.15.2 Negative Sequence Overvoltage Protection Settings .....................................................3-45
3.16 Frequency Protection .................................................................................. 3-45 3.16.1 Under-frequency Protection............................................................................................3-46 3.16.2 Over-frequency Protection..............................................................................................3-46 3.16.3 Frequency Rate-of-change Protection............................................................................3-47 3.16.4 Frequency Protection Settings .......................................................................................3-48 3-b
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3 Operation Theory
3.17 Auto-recloser ................................................................................................3-51 3.17.1 Auto-recloser Theory...................................................................................................... 3-51 3.17.2 Auto-recloser Ready Conditions .................................................................................... 3-53 3.17.3 Auto-recloser Startup Condition ..................................................................................... 3-54 3.17.4 Auto-recloser Check Mode............................................................................................. 3-55 3.17.5 Auto-recloser Blocking Logic.......................................................................................... 3-57 3.17.6 Auto-recloser Settings.................................................................................................... 3-57
3.18 Manual Closing Function.............................................................................3-59 3.18.1 Manual Closing Theory .................................................................................................. 3-59 3.18.2 Check Mode for Manual Closing Function ..................................................................... 3-60 3.18.3 Manual Closing Function Settings ................................................................................. 3-62
3.19 Mechanical Protection .................................................................................3-63 3.19.1 Mechanical Protection Theory ....................................................................................... 3-63 3.19.2 Mechanical Protection Settings...................................................................................... 3-63
List of Figures Figure 3.3-1 Demonstration characteristic of the overcurrent protection ........................... 3-5 Figure 3.3-2 Logic diagram of the stage 1 overcurrent protection ....................................... 3-5 Figure 3.3-3 Logic diagram of the stage 4 overcurrent protection ....................................... 3-7 Figure 3.3-4 Logic diagram of the OC1 phase A voltage control element ........................... 3-9 Figure 3.3-5 Operation characteristic of the OC directional element ................................. 3-10 Figure 3.3-6 Logic diagram of the OC1 phase A directional element ................................. 3-10 Figure 3.3-7 Logic diagram of the OC1 phase A harmonic blocking element ....................3-11 Figure 3.4-1 Characteristic curve of the thermal overload model ...................................... 3-15 Figure 3.4-2 Logic diagram of the thermal overload protection ......................................... 3-15 Figure 3.5-1 Logic diagram of the No.1 zero sequence overcurrent protection................ 3-17 Figure 3.5-2 Logic diagram of the No.1 zero sequence IDMT overcurrent protection ...... 3-18 Figure 3.5-3 Operation characteristic of the ROC directional element .............................. 3-19 Figure 3.5-4 Logic diagram of the directional element for the No.1 ROC1 protection...... 3-20 Figure 3.5-5 Logic diagram of the No.1 ROC1 harmonic blocking element....................... 3-20
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3 Operation Theory
Figure 3.6-1 Logic diagram for the stage 1 sensitive earth fault protection ......................3-25 Figure 3.6-2 Logic diagram of the IDMT sensitive earth fault protection ...........................3-25 Figure 3.6-3 Operation characteristic of the SEF directional element ................................3-26 Figure 3.6-4 Logic diagram of the directional element for the stage 1 SEF protection.....3-27 Figure 3.7-1 Logical diagram of the stage 1 NOC protection...............................................3-29 Figure 3.7-2 Logic diagram of the IDMT negative sequence overcurrent protection ........3-30 Figure 3.8-1 Logic diagram of the broken conductor protection ........................................3-31 Figure 3.9-1 Logic diagram of the breaker failure protection ..............................................3-33 Figure 3.9-2 Timing for a typical breaker failure scenario ...................................................3-33 Figure 3.10-1 Logic diagram of the SOTF protection ...........................................................3-35 Figure 3.11-1 Logic diagram of the cold load pickup function ............................................3-37 Figure 3.12-1 Logic diagram of the system lost voltage for the UV1 protection................3-39 Figure 3.12-2 Logic diagram of the stage 1 undervoltage protection .................................3-40 Figure 3.13-1 Logic diagram of the stage 1 overvoltage protection ...................................3-42 Figure 3.14-1 Logic diagram of the stage 1 ROV protection................................................3-43 Figure 3.15-1 Logic diagram of the NOV protection .............................................................3-45 Figure 3.16-1 Logic diagram of the stage 1 under-frequency protection ...........................3-46 Figure 3.16-2 Logic diagram of the stage 1 over-frequency protection..............................3-47 Figure 3.16-3 Logic diagram of the stage 1 frequency rate-of-change protection.............3-47 Figure 3.17-1 Timing diagram for a successful second reclosing ......................................3-52 Figure 3.17-2 Timing diagram for an unsuccessful one-shot reclosing .............................3-52 Figure 3.17-3 Logic diagram of the auto-recloser ................................................................3-53 Figure 3.17-4 Logic diagram of the auto-recloser ready conditions ...................................3-54 Figure 3.17-5 Logic diagram of the synchronism check element for AR ...........................3-55 Figure 3.17-6 Logic diagram of the dead check element for AR .........................................3-56 Figure 3.18-1 Logic diagram of the manual closing function ..............................................3-59 Figure 3.18-2 Logic diagram of the synchronism check element for manual closing.......3-60 Figure 3.18-3 Logic diagram of the dead check element for manual closing ....................3-61 Figure 3.19-1 Logic diagram of the No.1 mechanical protection ........................................3-63
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3 Operation Theory
3.1 Overview The PCS-9611 relay is a microprocessor based relay which can provide mature protection for various primary equipments (such as overhead line, underground cable and transformer etc.). The following sections detail the individual protection functions of this relay. NOTE! In each functional element, the signal input [XXXX.En1] is used for inputting the enabling signals; and the signal input [XXXX.Blk] is used for inputting the blocking signals. The “XXXX” is the name code of the functional element (such as “50/51P1”, “49”, “50/51G2” etc.). They can be configured through PCS-PC configuration tool auxiliary software. If the signal input [XXXX.En1] is not used, its default value is “1”; and if the signal input [XXXX.Blk] is not used, its default value is “0”.
3.2 Fault Detectors The fault detector will operate if any of the following conditions is satisfied. 1.
The startup conditions of the auto-recloser are satisfied if the auto-recloser is enabled and ready for operating.
2.
Any one of the phase currents is in excess of the setting of the stage 1 overcurrent protection multiplied by 0.95 if the stage 1 overcurrent protection is enabled.
3.
Any one of the phase currents is in excess of the setting of the stage 2 overcurrent protection multiplied by 0.95 if the stage 2 overcurrent protection is enabled.
4.
Any one of the phase currents is in excess of the setting of the stage 3 overcurrent protection multiplied by 0.95 if the stage 3 overcurrent protection is enabled.
5.
Any one of the phase currents is in excess of the setting of the stage 4 overcurrent protection multiplied by 0.95 if the stage 4 overcurrent protection is enabled.
6.
The No.1 zero sequence current is in excess of the setting of the stage 1 of the No.1 zero sequence overcurrent protection multiplied by 0.95 if the stage 1 of the No.1 zero sequence overcurrent protection is enabled.
7.
The No.1 zero sequence current is in excess of the setting of the stage 2 of the No.1 zero sequence overcurrent protection multiplied by 0.95 if the stage 2 of the No.1 zero sequence overcurrent protection is enabled.
8.
The No.1 zero sequence current is in excess of the setting of the stage 3 of the No.1 zero sequence overcurrent protection multiplied by 0.95 if the stage 1 of the No.3 zero sequence overcurrent protection is enabled.
9.
The No.1 zero sequence current is in excess of the setting of the stage 4 of the No.1 zero sequence overcurrent protection multiplied by 0.95 if the stage 1 of the No.4 zero sequence overcurrent protection is enabled. 3-1
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3 Operation Theory
10. The No.2 zero sequence current is in excess of the setting of the stage 1 of the No.2 zero sequence overcurrent protection multiplied by 0.95 if the stage 1 of the No.2 zero sequence overcurrent protection is enabled. 11. The No.2 zero sequence current is in excess of the setting of the stage 2 of the No.2 zero sequence overcurrent protection multiplied by 0.95 if the stage 2 of the No.2 zero sequence overcurrent protection is enabled. 12. The No.2 zero sequence current is in excess of the setting of the stage 3 of the No.2 zero sequence overcurrent protection multiplied by 0.95 if the stage 3 of the No.2 zero sequence overcurrent protection is enabled. 13. The No.2 zero sequence current is in excess of the setting of the stage 4 of the No.2 zero sequence overcurrent protection multiplied by 0.95 if the stage 4 of the No.2 zero sequence overcurrent protection is enabled. 14. The negative sequence current is in excess of the setting of the stage 1 negative sequence overcurrent protection multiplied by 0.95 if the stage 1 negative sequence overcurrent protection is enabled. 15. The negative sequence current is in excess of the setting of the stage 2 negative sequence overcurrent protection multiplied by 0.95 if the stage 2 negative sequence overcurrent protection is enabled. 16. The sensitive earth fault current is in excess of the current setting of the stage 1 sensitive earth fault protection multiplied by 0.95 if the stage 1 sensitive earth fault protection is enabled. 17. The sensitive earth fault current is in excess of the current setting of the stage 2 sensitive earth fault protection multiplied by 0.95 if the stage 2 sensitive earth fault protection is enabled. 18. The sensitive earth fault current is in excess of the current setting of the stage 3 sensitive earth fault protection multiplied by 0.95 if the stage 3 sensitive earth fault protection is enabled. 19. The sensitive earth fault current is in excess of the current setting of the stage 4 sensitive earth fault protection multiplied by 0.95 if the stage 4 sensitive earth fault protection is enabled. 20. Any one of the phase currents is in excess of the setting of the SOTF overcurrent protection multiplied by 0.97 if the SOTF overcurrent protection is enabled. 21. The No.1 zero sequence current is in excess of the setting of the zero sequence SOTF overcurrent protection multiplied by 0.97 if the zero sequence SOTF overcurrent protection is enabled. 22. Any one of the phase currents is in excess of [49.K_Trp]×[49.Ib_Set] if the thermal overload protection is enabled. 23. The ratio of negative to positive phase sequence current (I2/I1) is in excess of the ratio setting 3-2
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3 Operation Theory
of the broken conductor protection multiplied by 0.95 if the broken conductor protection is enabled. 24. Any one of the initiation signals of the breaker failure protection is detected if the breaker failure protection is enabled. 25. The voltages are less than the setting of the stage 1 undervoltage protection multiplied by the dropout coefficient setting of the stage 1 undervoltage protection if the stage 1 undervoltage protection is enabled. 26. The voltages are less than the setting of the stage 2 undervoltage protection multiplied by the dropout coefficient setting of the stage 2 undervoltage protection if the stage 1 undervoltage protection is enabled. 27. The voltages are greater than the setting of the stage 1 overvoltage protection multiplied by the dropout coefficient setting of the stage 1 overvoltage protection if the stage 1 overvoltage protection is enabled. 28. The voltages are greater than the setting of the stage 2 overvoltage protection multiplied by the dropout coefficient setting of the stage 2 overvoltage protection if the stage 2 overvoltage protection is enabled. 29. The zero sequence voltage is greater than the setting of the stage 1 zero sequence overvoltage protection multiplied by 0.95 if the stage 1 zero sequence overvoltage protection is enabled. 30. The zero sequence voltage is greater than the setting of the stage 2 zero sequence overvoltage protection multiplied by 0.95 if the stage 2 zero sequence overvoltage protection is enabled. 31. The negative sequence voltage is greater than the setting of the negative sequence overvoltage protection multiplied by 0.95 if the negative sequence overvoltage protection is enabled. 32. The frequency is less than the setting of the stage 1 under-frequency protection and all the phase-to-phase voltages are greater than the voltage setting of the voltage blocking element of the frequency protection if the stage 1 under-frequency protection is enabled and ready for operating. 33. The frequency is less than the setting of the stage 2 under-frequency protection and all the phase-to-phase voltages are greater than the voltage setting of the voltage blocking element of the frequency protection if the stage 2 under-frequency protection is enabled and ready for operating. 34. The frequency is less than the setting of the stage 3 under-frequency protection and all the phase-to-phase voltages are greater than the voltage setting of the voltage blocking element of the frequency protection if the stage 3 under-frequency protection is enabled and ready for operating. 35. The frequency is less than the setting of the stage 4 under-frequency protection and all the
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3 Operation Theory
phase-to-phase voltages are greater than the voltage setting of the voltage blocking element of the frequency protection if the stage 4 under-frequency protection is enabled and ready for operating. 36. The frequency is greater than the setting of the stage 1 over-frequency protection and all the phase-to-phase voltages are greater than the voltage setting of the voltage blocking element of the frequency protection if the stage 1 over-frequency protection is enabled and ready for operating. 37. The frequency is greater than the setting of the stage 2 over-frequency protection and all the phase-to-phase voltages are greater than the voltage setting of the voltage blocking element of the frequency protection if the stage 2 over-frequency protection is enabled and ready for operating. 38. The rate-of-change of frequency is greater than the setting of the stage 1 frequency rate-of-change protection if the stage 1 frequency rate-of-change protection is enabled. 39. The rate-of-change of frequency is greater than the setting of the stage 2 frequency rate-of-change protection if the stage 2 frequency rate-of-change protection is enabled. 40. The rate-of-change of frequency is greater than the setting of the stage 3 frequency rate-of-change protection if the stage 3 frequency rate-of-change protection is enabled. 41. The rate-of-change of frequency is greater than the setting of the stage 4 frequency rate-of-change protection if the stage 4 frequency rate-of-change protection is enabled. 42. If anyone the binary inputs of the mechanical protections is energized if the corresponding mechanical protection is enabled. The FD (Fault Detector) element will reset to normal operation status 10s later if the auto-recloser is enabled or 500ms later if the auto-recloser is disabled, after the last one of the above items is reverted.
3.3 Overcurrent Protection 3.3.1 Definite Time Overcurrent Protection The overcurrent protection in this relay provides a four-stage phase overcurrent protection with independent definite time characteristics. Each stage can be enabled or disabled independently by the logic settings respectively. All overcurrent element, directional element, voltage control element and harmonic blocking element settings apply to all three phases but are independent for each of the four stages. Configuring the relevant settings can enable or disable the corresponding protection. The first three stages of overcurrent protection only have definite time characteristics, and they have the same protective functional logic. The stage 4 overcurrent protection can be set as either definite time (DT) or inverse definite minimum time (IDMT). The demonstration characteristic figure of the DT overcurrent protection and IDMT overcurrent protection is shown as below.
3-4
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3 Operation Theory tDelay
DT OC
tDelay
IDMT OC
50/51P2.t_Op
50/51P1.t_Op
50/51P2.I_Set
50/51P1.I_Set
Inom
Inom
Figure 3.3-1 Demonstration characteristic of the overcurrent protection
The logic diagram of the stage 1 overcurrent protection is shown in Figure 3.3-2. The overcurrent block is a level detector that detects whether the current magnitude is above the threshold. The stage 2 overcurrent protection and the stage 3 overcurrent protection have the same logic diagrams with the stage 1 overcurrent protection, but the operation thresholds are [50/51P2.I_Set] and [50/51P3.I_Set] respectively. The logic diagram of the stage 4 overcurrent protection with definite time characteristic is shown in Figure 3.3-3, if the setting [50/51P4.Opt_Curve] is set as “0”.
Figure 3.3-2 Logic diagram of the stage 1 overcurrent protection
Where: [50/51P1.I_Set] is the current setting of the stage 1 overcurrent protection; “tOC1” is the setting [50/51P1.t_Op], the time setting of the stage 1 overcurrent protection; [50/51P1.En] is the logic setting of the stage 1 overcurrent protection; [50/51P1.En1] is the binary signal for enabling the stage 1 overcurrent protection; [50/51P1.Blk] is the binary signal for blocking the stage 1 overcurrent protection; “50/51P1.VCE_x (x: A, B, C)” denotes the state of the voltage control element of the stage 1 overcurrent protection, see Section 3.3.3 for more details about the voltage control element; 3-5
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“50/51P1.Dir_x (x: A, B, C)” denotes the state of the directional element of the stage 1 overcurrent protection, see Section 3.3.4 for more details about the directional element; “50/51P1.HmBlk_x (x: A, B, C)” denotes the harmonic blocking element of the stage 1 overcurrent protection, see Section 3.3.5 for more details about the harmonic blocking element.
3.3.2 Inverse Definite Minimum Time Overcurrent Protection The stage 4 overcurrent protection also can be used as inverse definite minimum time (IDMT) overcurrent protection if the setting [50/51P4.Opt_Curve] is not set as “0”. Various methods are available to achieve correct relay coordination on a system; by means of time alone, current alone or a combination of both time and current. Grading by means of current is only possible where there is an appreciable difference in fault level between the two relay locations. Grading by time is used by some utilities but can often lead to excessive fault clearance times at or near source substations where the fault level is highest. For these reasons the most commonly applied characteristic in coordinating overcurrent relays is the IDMT type. The inverse time delayed characteristics comply with the following formula (based on IEC60255-3 and IEEE Std C37.112-1996 standard).
⎛ ⎞ k ⎟ × Tp + t =⎜ C ⎜ ( I / I )α − 1 ⎟ p ⎝ ⎠ Where: k = Constant, the setting [50/51P4.K]. α = Constant, the setting [50/51P4.Alpha]. C = Constant, the setting [50/51P4.C]. t = Operation time. I = Measured phase current. Ip is the current threshold setting; the current setting of the stage 4 overcurrent [50/51P4.I_Set] is used as the Ip in this relay. If the stage 4 overcurrent protection is used as IDMT overcurrent protection, the range of the setting [50/51P4.I_Set] is 0.05×In ~ 4×In. Tp is the time multiplier setting; the multiplier setting of the IDMT overcurrent protection [50/51P4.TMS] is used as Tp in this relay. If the stage 4 overcurrent protection is used as IDMT overcurrent protection, the range of the setting [50/51P4.TMS] is 0.05 ~ 100.00. Some recommended types of IDMT characteristic curves are applied in this relay. It is also can be programmed according to the demand of the special practical application through the PCS-PC configuration tool auxiliary software. The setting [50/51P4.Opt_Curve] can be used to select the expected curve.
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Standard
0
Time Characteristic Definite Time
k
α
C
×
×
×
1
IEC
Standard Inverse
0.14
0.02
0.00
2
IEC
Very Inverse
13.5
1.00
0.00
3
IEC
Extremely Inverse
80.0
2.00
0.00
4
IEC
Short Time Inverse
0.05
0.04
0.00
5
IEC
Long Time Inverse
120.0
1.00
0.00
6
IEEE (ANSI)
Extremely Inverse
28.20
2.00
0.1217
7
IEEE (ANSI)
Very Inverse
19.61
2.00
0.491
8
IEEE (ANSI)
Inverse
0.0086
0.02
0.0185
9
IEEE (ANSI)
Moderately Inverse
0.0515
0.02
0.114
10
IEEE (ANSI)
Long Time Extremely Inverse
64.07
2.00
0.25
11
IEEE (ANSI)
Long Time Very Inverse
28.55
2.00
0.712
12
IEEE (ANSI)
Long Time Inverse
0.086
0.02
0.185
13
User Programmable
If the setting [50/51P4.Opt_Curve] is set as “1” to “12”, these settings [50/51P4.K], [50/51P4.Alpha] and [50/51P4.C] do not need to be set, and this relay will use these values as listed in above table. The logic diagram of the stage 4 overcurrent protection is shown in Figure 3.3-3. The overcurrent block is a level detector that detects whether the current magnitude is above the threshold.
Figure 3.3-3 Logic diagram of the stage 4 overcurrent protection
Where: [50/51P4.I_Set] is the current setting of the stage 4 overcurrent protection; “tOC4” is the setting [50/51P4.t_Op], the time setting of the stage 4 overcurrent protection; [50/51P4.En] is the logic setting of the stage 4 overcurrent protection; [50/51P4.En1] is the binary signal for enabling the stage 4 overcurrent protection;
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[50/51P4.Blk] is the binary signal for blocking the stage 4 overcurrent protection; [50/51P4.Opt_Curve] is the setting for selecting the inverse time characteristic curve; “50/51P4.VCE_x (x: A, B, C)” denotes the state of the voltage control element of the stage 4 overcurrent protection, see Section 3.3.3 for more details about the voltage control element; “50/51P4.Dir_x (x: A, B, C)” denotes the state of the directional element of the stage 4 overcurrent protection, see Section 3.3.4 for more details about the directional element; “50/51P4.HmBlk_x (x: A, B, C)” denotes the harmonic blocking element of the stage 4 overcurrent protection, see Section 3.3.5 for more details about the harmonic blocking element.
3.3.3 Voltage Control Element for Overcurrent Protection If the current detected by a local relay for a remote fault condition is below its overcurrent setting, a voltage controlled overcurrent (VCO) element may be used to increase the relay sensitivity to such faults. In this case, a reduction in system voltage will occur; this may then be used to reduce the pick up level of the overcurrent protection. The VCO function can be selectively enabled on the four stages of the main overcurrent element, which was described in Section 3.3.1. When the VCO is enabled, the overcurrent setting can be modified just to be in excess of the maximum value of the load current. Overcurrent Element
Voltage for Controlling
Ia>
Uab< or Uca< or U2>
Ib>
Ubc< or Uab< or U2>
Ic>
Uca< or Ubc< or U2>
Note that the voltage dependent overcurrent relays are more often applied in practical protection applications in order to give adequate overcurrent relay sensitivity for close up fault conditions. The fault characteristic of this protection must then coordinate with any of the downstream overcurrent relays that are responsive to the current decrement condition. It therefore follows that if this relay is to be applied on an outgoing feeder from a generator station, the use of voltage controlled overcurrent protection in the feeder relay may allow better coordination with the VCO relay on the generator. For the operation accuracy of the VCO protection, it is necessary to take the status of the voltage transformer into account. If the voltage transformer has a fault, the numerical relay will issue an [VTS.Alm] signal and block all the elements that relate to the voltage measurement. The logic diagram of the voltage control overcurrent protection is shown in Figure 3.3-2. Each stage of the overcurrent protection can be set with voltage control by its relevant independent setting respectively. The detailed logic diagram for the voltage control element of phase A for the stage 1 overcurrent protection is shown as below. The logic diagrams for voltage control elements of phase B and phase C can be gotten on the analogy of this.
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Figure 3.3-4 Logic diagram of the OC1 phase A voltage control element
Where: [50/51P.Upp_VCE] is the voltage setting of the undervoltage control element; [50/51P.U2_VCE] is the voltage setting of the negative sequence overvoltage control element; [VTS.En] is the logic setting of the protection voltage transformer supervision function; [50/51P1.En_VCE] is the logic setting of the voltage control element for the OC1 protection; [50/51P.En_VTS_Blk] is the logic setting of the function which can block all the OC protective elements that relate to the voltage measurement when the voltage transformer is failed; [VTS.Alm] is the alarm signal of the protection voltage transformer supervision.
3.3.4 Directional Element for Overcurrent Protection The phase fault elements of this relay are internally polarized by the quadrature phase-to-phase voltages, as shown in the table below: Phase of Protection
Operate Current
Polarizing Voltage
A Phase
Ia
Ubc
B Phase
Ib
Uca
C Phase
Ic
Uab
Under system fault conditions, the fault current vector will lag its nominal phase voltage by an angle dependent upon the system X/R ratio. It is therefore a requirement that the relay operates with maximum sensitivity for currents lying in this region. This is achieved by means of the relay characteristic angle (RCA) setting; this defines the angle by which the current applied to the relay must be displaced from the voltage applied to the relay to obtain maximum relay sensitivity. For a close up three-phase fault, all three voltages will collapse to zero and no healthy phase voltages will be present. For this reason, the relay includes a synchronous polarization feature that stores the pre-fault positive sequence voltage information and continues to apply it to the directional overcurrent elements for a time period of 25 fundamental wave cycles, after which, it will keep the result of the directional element, this ensures that either the instantaneous or the time delayed directional overcurrent elements will be allowed to operate, even with a three-phase voltage collapse. The relay characteristic angle (RCA) is configurable through the setting [50/51P.RCA]. A directional check is performed based on the following criteria:
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Directional forward
z
-90° < (angle(U) - angle(I) - RCA) < 90° Directional reverse
z
-90° > (angle(U) - angle(I) - RCA) > 90° Reverse
O
U
RCA I Forward
Figure 3.3-5 Operation characteristic of the OC directional element
The setting [50/51Px.Opt_Dir] (x: 1~4) is used to select the directional mode for the stage x (x: 1~4) overcurrent protection respectively. Setting Value Directional Mode
0
1
2
Non-directional
Forward directional
Reverse directional
Any of the four overcurrent stages may be configured to be directional. When the element is selected as directional, a VTS block option is available. When the relevant setting is set as “1”, operation of the voltage transformer supervision (VTS) will block the stage if the relevant directional element is in service. When the relevant setting is set as “0”, the stage will revert to non-directional upon operation of the VTS. The logic diagram of the phase directional overcurrent protection is shown in Figure 3.3-2. Each stage of the overcurrent protection can be set with directional element control by its relevant independent setting respectively. The detailed logic diagram for the phase A directional element for the stage 1 overcurrent protection is shown as below. The logic diagrams of voltage control elements of phase B and phase C can be gotten on the analogy of this. [50/51P.En_VTS_Blk] [VTS.En] [VTS.Alm] Ia (present measure) Ubc(present measure) Ubc(in memory)
& Phase A Direction Check
50/51P1.Dir_A
[50/51P1.Opt_Dir] ≠ 0
Figure 3.3-6 Logic diagram of the OC1 phase A directional element
Where: [50/51P1.Opt_Dir] is the setting which is used to select the directional mode (non-directional, forward, reverse) of the directional element for the stage 1 overcurrent protection;
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[VTS.En] is the logic setting of the protection voltage transformer supervision function; [50/51P.En_VTS_Blk] is the logic setting of the function which can block all the OC protective elements that relate to the voltage measurement when the voltage transformer is failed; [VTS.Alm] is the alarm signal of the protection voltage transformer supervision.
3.3.5 Harmonic Blocking Element for Overcurrent Protection To prevent maloperation of the overcurrent protection when the transformer is energized without any load, this relay provides a 2nd harmonic blocking function for resolving such a problem. The percent threshold of the 2nd harmonic blocking element to the fundamental wave can be set through the setting [50/51P.K_Hm2]. The harmonic blocking mode can be selected through the setting [50/51P.Opt_Hm_Blk].
Setting Value
Harmonic Blocking Criterion Phase A
Phase B
1
Phase blocking
Ia2/ Ia1 >
Ib2/ Ib1 >
2
Cross blocking
(Ia2/ Ia1 >) or (Ib2/ Ib1 >) or (Ic2/ Ic1 >)
3
Maximum blocking
Max(Ia2, Ib2, Ic2)/ Ia1 >
Max(Ia2, Ib2, Ic2)/ Ib1 >
Phase C Ic2/ Ic1 > Max(Ia2, Ib2, Ic2)/ Ic1 >
When the fundamental current is greater than the setting [50/51P.I_Rls_HmBlk], the harmonic blocking element of the corresponding phase is released. The following figure shows the logic diagram of the harmonic blocking element of phase A for the stage 1 overcurrent protection. The logic diagrams of the harmonic blocking elements of phase B and phase C can be gotten on the analogy of this.
Figure 3.3-7 Logic diagram of the OC1 phase A harmonic blocking element
Where: [50/51P1.En_HarmBlk] is the logic setting of the harmonic blocking element of the stage 1 overcurrent protection; [50/51P.K_Hm2] is the percent setting of the harmonic blocking element for OC protection; [50/51P.I_Rls_HmBlk] is the current setting for releasing the harmonic blocking element; [50/51P.Opt_Hm_Blk] is the setting for selecting the harmonic blocking criterion;
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“Ix1” (x: a, b or c) is the fundamental current; “Ix2” (x: a, b or c) is the 2nd harmonic current; “Imax” is the maximum phase current; “Imax2” is the maximum 2nd harmonic current.
3.3.6 Overcurrent Protection Settings All the settings of the overcurrent protection are listed in following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
50/51P.U2_VCE
2
50/51P.Upp_VCE
3
50/51P.RCA
Explanation The voltage setting of the negative sequence voltage blocking element (phase voltage) The voltage setting of the low voltage blocking element (phase-to-phase voltage) The relay characteristic angle for the directional overcurrent protection
Range
Step
2~70V
0.001V
2~120V
0.001V
-180°~179°
1°
0~1
1
0.05~1.00
0.001
0.05In~30In
0.001A
1~3
1
0.05In~30In
0.001A
0~100s
0.001s
0~1
1
0~2
1
0~1
1
0~1
1
The logic setting of the function which can block 4
50/51P.En_VTS_Blk
the OC protection related voltage measurement when the voltage transformer is failed
5
50/51P.K_Hm2
6
50/51P.I_Rls_HmBlk
7
50/51P.Opt_Hm_Blk
8
50/51P1.I_Set
9
50/51P1.t_Op
10
50/51P1.En_VCE
The percent setting of the harmonic blocking element for OC protection The current setting for releasing the harmonic blocking element of the OC protection The setting is used to select the harmonic blocking mode of the OC protection The current setting of the stage 1 overcurrent protection The time setting of the stage 1 overcurrent protection The logic setting of the voltage control element for the stage 1 overcurrent protection The setting is used to select the directional mode
11
50/51P1.Opt_Dir
for the stage 1 overcurrent protection, see Section 3.3.4
12
50/51P1.En_Hm_Blk
13
50/51P1.En
14
50/51P1.OutMap
15
50/51P2.I_Set
16
50/51P2.t_Op
The logic setting of the harmonic blocking element for the stage 1 overcurrent protection The logic setting of the stage 2 overcurrent protection The output matrix setting of the stage 1
0x00000000 ~
overcurrent protection
0x7FFFFFFF
The current setting of the stage 2 overcurrent protection The time setting of the stage 2 overcurrent protection
3-12
1
0.05In~30In
0.001A
0~100s
0.001s
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50/51P2.En_VCE
The logic setting of the voltage control element for the stage 2 overcurrent protection
0~1
1
0~2
1
0~1
1
0~1
1
The setting is used to select the directional mode 18
50/51P2.Opt_Dir
for the stage 2 overcurrent protection, see Section 3.3.4
19
50/51P2.En_Hm_Blk
20
50/51P2.En
21
50/51P2.OutMap
22
50/51P3.I_Set
23
50/51P3.t_Op
24
50/51P3.En_VCE
The logic setting of the harmonic blocking element for the stage 2 overcurrent protection The logic setting of the stage 2 overcurrent protection The output matrix setting of the stage 2
0x00000000 ~
overcurrent protection
0x7FFFFFFF
The current setting of the stage 3 overcurrent protection The time setting of the stage 3 overcurrent protection The logic setting of the voltage control element for the stage 3 overcurrent protection
1
0.05In~30In
0.001A
0~100s
0.001s
0~1
1
0~2
1
0~1
1
0~1
1
The setting is used to select the directional mode 25
50/51P3.Opt_Dir
for the stage 3 overcurrent protection, see Section 3.3.4
26
50/51P3.En_Hm_Blk
27
50/51P3.En
28
50/51P3.OutMap
29
50/51P4.I_Set
30
50/51P4.t_Op
31
50/51P4.En_VCE
The logic setting of the harmonic blocking element for the stage 3 overcurrent protection The logic setting of the stage 3 overcurrent protection The output matrix setting of the stage 3
0x00000000 ~
overcurrent protection
0x7FFFFFFF
The current setting of the stage 4 overcurrent protection The time setting of the stage 4 overcurrent protection The logic setting of the voltage control element for the stage 4 overcurrent protection
1
0.05In~30In
0.001A
0~100s
0.001s
0~1
1
0~2
1
0~1
1
0~1
1
The setting is used to select the directional mode 32
50/51P4.Opt_Dir
for the stage 4 overcurrent protection, see Section 3.3.4
33
50/51P4.En_Hm_Blk
34
50/51P4.En
35
50/51P4.OutMap
36
50/51P4.Opt_Curve
The logic setting of the harmonic blocking element for the stage 4 overcurrent protection The logic setting of the stage 4 overcurrent protection The output matrix setting of the stage 4
0x00000000 ~
overcurrent protection
0x7FFFFFFF
The setting is for selecting the inverse time characteristic curve for OC4 protection
0~13
1 1
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50/51P4.TMS
38
50/51P4.tmin
39
50/51P4.K
40
50/51P4.C
41
50/51P4.Alpha
The time multiplier setting of the IDMT overcurrent protection The minimum operation time setting of the IDMT overcurrent protection Constant “k” for the IDMT overcurrent protection, see Section 3.3.2 Constant “C” for the IDMT overcurrent protection, see Section 3.3.2 Constant “α” for the IDMT overcurrent protection, see Section 3.3.2
0.05~100.0
0.001
0~100s
0.001s
0.001~120.0
0.0001
0.00~1.00
0.0001
0.01~3.00
0.0001
3.4 Thermal Overload Protection 3.4.1 Thermal Overload Protection Theory The relay incorporates a current based thermal replica, using load current to model heating and cooling of the protected plant. The heat generated within an item of the plant, such as a cable or a transformer, is the resistive loss (Ι2R×t). Thus, heating is directly proportional to current squared. The thermal time characteristic used in the relay is therefore based on current squared, integrated over time. The relay automatically uses the largest phase current for input to the thermal model. Equipment is designed to operate continuously at a temperature corresponding to its full load rating, where heat generated is balanced with heat dissipated by radiation etc. This relay provides a thermal overload model which is based on the IEC60255-8 standard. The thermal overload formulas are shown as below. z
Criterion of cooling start characteristic:
T = τ × ln z
I2 I 2 − (k × I B ) 2
Criterion of hot start characteristic:
T = τ × ln
I 2 − I p2 I 2 − (k × I B ) 2
Where: T = Time to trip (in seconds);
τ = Thermal time constant of the equipment to be protected, the setting [49.Tau]; IB = Full load current rating, the setting [49.Ib_Set]; I = The RMS value of the largest phase current; 3-14
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IP = Steady state pre-loading before application of the overload; k = Factor associated to the thermal state formula, the setting [49.K_Trp] and [49.K_Alm]. The characteristic curve of thermal overload model is shown in Figure 3.4-1.
Figure 3.4-1 Characteristic curve of the thermal overload model
The 1st ~ 7th harmonics of the phase current is taken into account in the calculation of the RMS value of the largest phase current. The input signal [49.Clr] (it can be led from a binary input of this relay) can clear the thermal accumulation without blocking the thermal overload protection, if it is energized. The thermal overload protection also can be used to issue an alarm signal [49.Alm], if the logic setting [49.En_Alm] is set as “1”. The logic diagram of the thermal overload protection is shown as below.
Figure 3.4-2 Logic diagram of the thermal overload protection
Where: “Imax_rms” is the maximum RMS phase current; [49.K_Trp] is the factor setting of the thermal overload protection; [49.Ib_Set] is the reference current setting of the thermal overload protection;
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[49.K_Alm] is the factor setting of the thermal overload alarm element; [49.En_Trp] is the logic setting of the thermal overload protection; [49.En_Alm] is the logic setting of the thermal overload alarm element; [49.En1] is the binary signal for enabling the thermal overload protection; [49.Blk] is the binary signal for blocking the thermal overload protection; [49.Clr] is the binary signal for clearing the thermal accumulation.
3.4.2 Thermal Overload Protection Settings All the settings of the thermal overload protection are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
49.Ib_Set
2
49.Tau
3
49.K_Trp
Explanation The reference current setting of the thermal overload protection The time constant setting of the IDMT overload protection
Range
Step
0.05In~3.0In
0.001A
10~6000s
0.001s
1.0~3.0
0.001
1.0~3.0
0.001
0~1
1
0~1
1
The factor setting of the thermal overload protection which is associated to the thermal state formula The factor setting of the thermal overload alarm 4
49.K_Alm
element which is associated to the thermal state formula
5
49.En_Trp
6
49.En_Alm
7
49.OutMap
The logic setting of the thermal overload protection for tripping The logic setting of the thermal overload protection for alarming The output matrix setting of the thermal overload
0x00000000 ~
protection
0x7FFFFFFF
1
3.5 Zero Sequence Overcurrent Protection 3.5.1 Definite Time Zero Sequence Overcurrent Protection The zero sequence overcurrent protection in this relay provides two groups of four-stage zero sequence overcurrent protections with independent definite time delay characteristics. Each stage can be enabled or disabled independently by the corresponding logic setting respectively, and can be controlled with the directional element, harmonic blocking element respectively. The zero sequence current of the No.1 zero sequence overcurrent protection can be led from one dedicated zero sequence current transformer or be self-calculated (through the setting [Opt_3I0]), and the zero sequence current of the No.2 zero sequence overcurrent protection only can be led from another dedicated zero sequence current transformer.
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When this relay is used in non-effective grounding (such as the delta side of a transformer) or small current grounding system, the grounding zero sequence current during earth fault is basically small capacitive current. Correct selection of faulty phase in zero sequence protection can not be ensured by detection of such a current. Since all protection equipments are connected with each other via network and information resource can be shared in the substation automation system, so the faulty feeder can be identified firstly by comparing information from various feeders which are connected to the same busbar and then decided finally by trial tripping of the circuit breaker of the selected feeder. In this case, the zero sequence current has to be led from a zero sequence current transformer. When this relay is used in small resistance grounding system, the grounding zero sequence current during earth fault is larger and can be used for tripping directly. All stages are equipped for the zero sequence current protection. In this case, the zero sequence current for tripping can be calculated or directly led from a zero sequence current transformer. Here, take the No.1 zero sequence overcurrent protection as an example to explain the operation theory of the zero sequence overcurrent protection. The operation theory of the No.2 zero sequence overcurrent protection can be gotten on the analogy of this. The following figure shows the logic diagram of the No.1 zero sequence protection. The No.2 zero sequence protection has the same logic diagram with the No.1 zero sequence protection.
Figure 3.5-1 Logic diagram of the No.1 zero sequence overcurrent protection
Where:
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[50/51Gx.3I0_Set] (x: 1~4) is the current setting of the stage x (x: 1~4) zero sequence overcurrent protection; “tROCx” (x: 1~4) is the setting [50/51Gx.t_Op] (x: 1~4), the time setting of the stage x (x: 1~4) zero sequence overcurrent protection; [50/51Gx.En] (x: 1~4) is the logic setting of the stage x (x: 1~4) zero sequence overcurrent protection; [50/51Gx.En1] (x: 1~4) is the binary signal for enabling the stage x (x: 1~4) zero sequence overcurrent protection; [50/51Gx.Blk] (x: 1~4) is the binary signal for blocking the stage x (x: 1~4) zero sequence overcurrent protection; [50/51G4.Opt_Curve] is the setting for selecting the inverse time characteristic curve; “50/51Gx.Dir” (x: 1~4) denotes the status of the zero sequence directional element, see Section 3.5.3 for more details about the directional element; “50/51Gx.HmBlk” (x: 1~4) denotes the status of the harmonic blocking element, see Section 3.5.4 for more details about the harmonic blocking element.
3.5.2 IDMT Zero Sequence Overcurrent Protection The stage 4 zero sequence overcurrent protection also can be used as zero sequence inverse definite minimum time (IDMT) overcurrent protection. It has the same inverse time characteristic with the IDMT overcurrent protection (see Section 3.3.2), and the setting [50/51G4.Opt_Curve] can be used to select the expected curve. The logic diagram of the No.1 zero sequence IDMT overcurrent protection is shown as below. The zero sequence overcurrent block is a level detector that detects whether the current magnitude is above the threshold.
Figure 3.5-2 Logic diagram of the No.1 zero sequence IDMT overcurrent protection
Where: [50/51G4.3I0_Set] is the current setting of the No.1 stage 4 ROC protection; [50/51G4.En] is the logic setting of the No.1 stage 4 ROC protection; [50/51G4.En1] is the binary signal for enabling the stage 4 ROC protection; [50/51G4.Blk] is the binary signal for blocking the stage 4 ROC protection; 3-18
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3 Operation Theory
[50/51G4.Opt_Curve] is the setting for selecting the inverse time characteristic curve; “50/51G4.Dir” denotes the status of the zero sequence directional element for the No.1 stage 4 zero sequence overcurrent protection, see Section 3.5.3 for more details about the directional element; “50/51G4.HmBlk” denotes the status of the harmonic blocking element for the No.1 stage 4 zero sequence overcurrent protection, see Section 3.5.4 for more details about the harmonic blocking element.
3.5.3 Directional Element for Zero Sequence Overcurrent Protection The residual voltage is used to polarize the directional earth fault (DEF) protection. With earth fault protection, the polarizing signal is required to be a representative of the earth fault condition. As residual voltage is generated during earth fault conditions, this quantity is commonly used to polarize DEF elements. This relay internally derives this voltage from the 3-phase voltage input that must be supplied from three single-phase voltage transformers. These types of VT design allow the passage of residual flux and consequently permit the relay to derive the required residual voltage. In addition, the primary star point of the VT must be earthed. It is possible that small levels of residual voltage will be present under normal system conditions due to system imbalances, VT inaccuracies, relay tolerances etc. The zero sequence relay characteristic angle (ZS-RCA) is configurable through the setting [50/51G.RCA]. A directional check is performed based on the following criteria: z
Directional forward -90° < (angle(U0) - angle(I01) - ZS-RCA) < 90°
z
Directional reverse -90° > (angle(U0) - angle(I01) - ZS-RCA) > 90°
Figure 3.5-3 Operation characteristic of the ROC directional element
The setting [50/51Gx.Opt_Dir] (x: 1~4) is used to select the directional mode for the stage x (x: 1~4) zero sequence overcurrent protection respectively.
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3 Operation Theory Setting Value Directional Mode
0
1
2
Non-directional
Forward directional
Reverse directional
When the element is selected as directional, a VTS block option is available. When the relevant setting is set as “1”, operation of the voltage transformer supervision (VTS) will block the stage if the relevant directional element is in service. When the relevant setting is set as “0”, the stage will revert to non-directional upon operation of the VTS. The detailed logic diagram of the zero sequence directional element of the stage 1 zero sequence overcurrent protection is shown as below.
Figure 3.5-4 Logic diagram of the directional element for the No.1 ROC1 protection
Where: [50/51G1.Opt_Dir] is the setting which is used to select the directional mode (non-directional, forward, reverse) of the directional element for the stage 1 ROC protection; [VTS.En] is the logic setting of the protection voltage transformer supervision function; [50/51G.En_VTS_Blk] is the logic setting of the function which blocks all the 1ROC protective elements that relate to the voltage measurement when the voltage transformer is failed; [VTS.Alm] is the alarm signal of the protection voltage transformer supervision.
3.5.4 Harmonic Blocking Element for ROC Protection To prevent maloperation of the zero sequence overcurrent protection when the transformer is energized without any load, this relay provides a 2nd harmonic blocking function for resolving such a problem. The percent threshold of the 2nd harmonic blocking element to the fundamental wave can be set through the setting [50/51G.K_Hm2]. When the fundamental current is greater than the setting [50/51G.3I0_Rls_HmBlk], the harmonic blocking element for the zero sequence protection is released. The following figure shows the logic diagram of the harmonic blocking element for the stage 1 zero sequence overcurrent protection.
Figure 3.5-5 Logic diagram of the No.1 ROC1 harmonic blocking element
3-20
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3 Operation Theory
Where: [50/51G1.En_Hm_Blk] is the logic setting of the harmonic blocking element; [50/51G.K_Hm2] is the percent setting of the harmonic blocking element; [50/51G.3I0_Rls_HmBlk] is the current setting for releasing the harmonic blocking element; “I01” is the No.1 zero sequence current; “I012” is the 2nd harmonic of the No.1 zero sequence current.
3.5.5 Zero Sequence Overcurrent Protection Settings For the information about the common explanation of the settings, see Section 7.3. All the settings of the No.1 zero sequence overcurrent protection are listed in the following table. No.
Menu text
1
50/51G.RCA
2
50/51G.En_VTS_Blk
Explanation The relay characteristic angle for the No.1 directional zero sequence overcurrent protection
Range
Step
-180°~179°
1°
0~1
1
0.05~1.00
0.001
0.05In~30In
0.001A
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
The logic setting of the function which blocks the 1ROC protection related voltage measurement when the voltage transformer is failed 3
50/51G.K_Hm2
4
50/51G.3I0_Rls_HmBlk
5
50/51G1.3I0_Set
6
50/51G1.t_Op
7
50/51G1.Opt_Dir
8
50/51G1.En_Hm_Blk
9
50/51G1.En
10
50/51G1.OutMap
11
50/51G2.3I0_Set
12
50/51G2.t_Op
13
50/51G2.Opt_Dir
14
50/51G2.En_Hm_Blk
The percent setting of the harmonic blocking element for the No.1 ROC protection The current setting for releasing the harmonic blocking element of the No.1 ROC protection The current setting of the No.1 stage 1 zero sequence overcurrent protection The time setting of the No.1 stage 1 zero sequence overcurrent protection The setting is used to select the directional mode for the No.1 ROC1 protection, see Section 3.5.3 The logic setting of the harmonic blocking element for the No.1 ROC1 protection The logic setting of the No.1 stage 1 zero sequence overcurrent protection The output matrix setting of the No.1 stage 1 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.1 stage 2 zero sequence overcurrent protection The time setting of the No.1 stage 2 zero sequence overcurrent protection The setting is used to select the directional mode for the No.1 ROC2 protection, see Section 3.5.3 The logic setting of the harmonic blocking element for the No.1 ROC2 protection
1
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
3-21
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50/51G2.En
16
50/51G2.OutMap
17
50/51G3.3I0_Set
18
50/51G3.t_Op
19
50/51G3.Opt_Dir
20
50/51G3.En_Hm_Blk
21
50/51G3.En
22
50/51G3.OutMap
23
50/51G4.3I0_Set
24
50/51G4.t_Op
25
50/51G4.Opt_Dir
26
50/51G4.En_Hm_Blk
27
50/51G4.En
28
50/51G4.OutMap
29
50/51G4.Opt_Curve
30
50/51G4.TMS
31
50/51G4.tmin
32
50/51G4.K
33
50/51G4.C
34
50/51G4.Alpha
The logic setting of the No.1 stage 2 zero sequence overcurrent protection
0~1
1
The output matrix setting of the No.1 stage 2 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.1 stage 3 zero sequence overcurrent protection The time setting of the No.1 stage 3 zero sequence overcurrent protection The setting is used to select the directional mode for the No.1 ROC3 protection, see Section 3.5.3 The logic setting of the harmonic blocking element for the No.1 ROC3 protection The logic setting of the No.1 stage 3 zero sequence overcurrent protection
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
The output matrix setting of the No.1 stage 3 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.1 stage 4 zero sequence overcurrent protection The time setting of the No.1 stage 4 zero sequence overcurrent protection The setting is used to select the directional mode for the No.1 ROC4 protection, see Section 3.5.3 The logic setting of the harmonic blocking element for the No.1 ROC4 protection The logic setting of the No.1 stage 4 zero sequence overcurrent protection
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
characteristic curve for the No.1 ROC4 protection The time multiplier setting of the No.1 zero sequence IDMT overcurrent protection The minimum operation time setting of the No.1 zero sequence IDMT overcurrent protection Constant “k” for the No.1 zero sequence IDMT overcurrent protection, see Section 3.5.2 Constant “C” for the No.1 zero sequence IDMT overcurrent protection, see Section 3.5.2 Constant “α” for the No.1 zero sequence IDMT overcurrent protection, see Section 3.5.2
3-22
1
0.05In~30In
The output matrix setting of the No.1 stage 4 zero The setting is for selecting the inverse time
1
1
0~13
1
0.05~100.0
0.001
0~100s
0.001s
0.001~120.0
0.0001
0.00~1.00
0.0001
0.01~3.00
0.0001
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3 Operation Theory
All the settings of the No.2 zero sequence overcurrent protection are listed in the following table. No. 1
Menu text A.50/51G.RCA
Explanation The relay characteristic angle for the No.2 directional zero sequence overcurrent protection
Range
Step
-180°~179°
1°
0~1
1
0.05~1.00
0.001
0.05In~30In
0.001A
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
The logic setting of the function which blocks the 2
A.50/51G.En_VTS_Blk
2ROC protection related voltage measurement when the voltage transformer is failed
3
A.50/51G.K_Hm2
4
A.50/51G.3I0_Rls_HmBlk
5
A.50/51G1.3I0_Set
6
A.50/51G1.t_Op
7
A.50/51G1.Opt_Dir
8
A.50/51G1.En_Hm_Blk
9
A.50/51G1.En
10
A.50/51G1.OutMap
11
A.50/51G2.3I0_Set
12
A.50/51G2.t_Op
13
A.50/51G2.Opt_Dir
14
A.50/51G2.En_Hm_Blk
15
A.50/51G2.En
16
A.50/51G2.OutMap
17
A.50/51G3.3I0_Set
18
A.50/51G3.t_Op
19
A.50/51G3.Opt_Dir
20
A.50/51G3.En_Hm_Blk
The percent setting of the harmonic blocking element for the No.2 ROC protection The current setting for releasing the harmonic blocking element of the No.2 ROC protection The current setting of the No.2 stage 1 zero sequence overcurrent protection The time setting of the No.2 stage 1 zero sequence overcurrent protection The setting is used to select the directional mode for the No.2 ROC1 protection The logic setting of the harmonic blocking element for the No.2 ROC1 protection The logic setting of the No.2 stage 1 zero sequence overcurrent protection The output matrix setting of the No.2 stage 1 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.2 stage 2 zero sequence overcurrent protection The time setting of the No.2 stage 2 zero sequence overcurrent protection The setting is used to select the directional mode for the No.2 ROC2 protection The logic setting of the harmonic blocking element for the No.2 ROC2 protection The logic setting of the No.2 stage 2 zero sequence overcurrent protection
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
The output matrix setting of the No.2 stage 2 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.2 stage 3 zero sequence overcurrent protection The time setting of the No.2 stage 3 zero sequence overcurrent protection The setting is used to select the directional mode for the No.2 ROC3 protection The logic setting of the harmonic blocking element for the No.2 ROC3 protection
1
1
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
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A.50/51G3.En
22
A.50/51G3.OutMap
23
A.50/51G4.3I0_Set
24
A.50/51G4.t_Op
25
A.50/51G4.Opt_Dir
26
A.50/51G4.En_Hm_Blk
27
A.50/51G4.En
28
A.50/51G4.OutMap
29
A.50/51G4.Opt_Curve
30
A.50/51G4.TMS
31
A.50/51G4.tmin
32
A.50/51G4.K
33
A.50/51G4.C
34
A.50/51G4.Alpha
The logic setting of the No.2 stage 3 zero sequence overcurrent protection
0~1
1
The output matrix setting of the No.2 stage 3 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.2 stage 4 zero sequence overcurrent protection The time setting of the No.2 stage 4 zero sequence overcurrent protection The setting is used to select the directional mode for the No.2 ROC4 protection The logic setting of the harmonic blocking element for the No.2 ROC4 protection The logic setting of the No.2 stage 4 zero sequence overcurrent protection
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
The output matrix setting of the No.2 stage 4 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The setting is for selecting the inverse time characteristic curve for the No.2 ROC4 protection The time multiplier setting of the No.2 zero sequence IDMT overcurrent protection The minimum operation time setting of the No.2 zero sequence IDMT overcurrent protection Constant “k” for the No.2 zero sequence IDMT overcurrent protection, see Section 3.5.2 Constant “C” for the No.2 zero sequence IDMT overcurrent protection, see Section 3.5.2 Constant “α” for the No.2 zero sequence IDMT overcurrent protection, see Section 3.5.2
1
1
0~13
1
0.05~100.0
0.001
0~100s
0.001s
0.001~120.0
0.0001
0.00~1.00
0.0001
0.01~3.00
0.0001
3.6 Sensitive Earth Fault Protection 3.6.1 Definite Time Sensitive Earth Fault Protection This relay provides a four-stage sensitive earth fault protection with independent definite time delay characteristics. Each stage can be enabled or disabled independently by the corresponding logic setting respectively, and can be controlled by the directional element respectively. The stage 4 SEF also can be set with inverse definite minimum time (IDMT) characteristic. Each stage can be used for tripping or alarming through the PCS-PC and the default is for tripping. When this relay is used in non-effective grounding (such as the delta side of a transformer) or small current grounding system, the grounding zero sequence current during earth fault is basically small capacitive current. Correct selection of faulty phase in zero sequence protection can not be ensured by detection of such a current. One current transformer input is dedicated to the sensitive earth fault (SEF) protection. The input CT is designed specially to operate at very low 3-24
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3 Operation Theory
current magnitudes. The following figure shows the stage 1 sensitive earth fault protection logic diagram, other stage has the same logic diagram.
Figure 3.6-1 Logic diagram for the stage 1 sensitive earth fault protection
Where: [50/51SEF1.3I0_Set] is the current setting of the stage 1 sensitive earth fault protection; “tSEF1” is the setting [50/51SEF1.t_Op], the time setting of the SEF1 protection; [50/51SEF1.En] is the logic setting of the stage 1 sensitive earth fault protection; [50/51SEF1.En1] is the binary signal for enabling the stage 1 sensitive earth fault protection; [50/51SEF1.Blk] is the binary signal for blocking the stage 1 sensitive earth fault protection; “50/51SEF1.Dir” denotes the status of the directional element for the stage 1 sensitive earth fault protection, see Section 3.6.3 for more details about the directional element.
3.6.2 IDMT Sensitive Earth Fault Protection The stage 4 sensitive earth fault protection also can be used as inverse definite minimum time (IDMT) sensitive earth fault protection. It has the same inverse time characteristic with the IDMT overcurrent protection (see Section 3.3.2), and the setting [50/51SEF4.Opt_Curve] can be used to select the expected curve. The logic diagram of the IDMT sensitive earth fault protection is shown as below. The sensitive earth fault current block is a level detector that detects whether the current magnitude is above the threshold.
Figure 3.6-2 Logic diagram of the IDMT sensitive earth fault protection
Where: [50/51SEF4.3I0_Set] is the current setting of the stage 4 sensitive earth fault protection; [50/51SEF4.En] is the logic setting of the stage 4 sensitive earth fault protection; 3-25
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[50/51SEF4.En1] is the binary signal for enabling the stage 4 sensitive earth fault protection; [50/51SEF4.Blk] is the binary signal for blocking the stage 4 sensitive earth fault protection; [50/51SEF4.Opt_Curve] is the setting for selecting the inverse time characteristic curve; “50/51SEF4.Dir” denotes the status of the directional element for the stage 4 sensitive earth fault protection, see Section 3.6.3 for more details about the directional element.
3.6.3 Directional Element for Sensitive Earth Fault Protection The residual voltage is used to polarize the directional element for the SEF protection. With earth fault protection, the polarizing signal is required to be a representative of the earth fault condition. As residual voltage is generated during earth fault conditions, this quantity is commonly used to polarize directional elements. The residual voltage is also derived from the 3-phase voltage input, which are same with the directional element for the zero sequence overcurrent protection. The sensitive earth fault relay characteristic angle (SEF-RCA) is configurable through the setting [50/51SEF.RCA]. A directional check is performed based on the following criteria: Directional forward
z
-90° < (angle(U0) - angle(I0S) - SEF-RCA) < 90° Directional reverse
z
-90° > (angle(U0) - angle(I0S) - SEF-RCA) > 90°
Figure 3.6-3 Operation characteristic of the SEF directional element
The setting [50/51SEFx.Opt_Dir] (x: 1~4) is used to select the directional mode for the stage x (x: 1~4) sensitive earth fault protection respectively. Setting Value Directional Mode
0
1
2
Non-directional
Forward directional
Reverse directional
When the element is selected as directional, a VTS block option is available. When the relevant setting is set as “1”, operation of the voltage transformer supervision (VTS) will block the stage if the relevant directional element is in service. When the relevant setting is set as “0”, the stage will revert to non-directional upon operation of the VTS. The detailed logic diagram of the directional element of the stage 1 sensitive earth fault protection 3-26
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3 Operation Theory
is shown as below.
Figure 3.6-4 Logic diagram of the directional element for the stage 1 SEF protection
Where: [50/51SEF1.Opt_Dir] is the setting which is used to select the directional mode (non-directional, forward, reverse) of the directional element for the stage 1 SEF protection; [VTS.En] is the logic setting of the protection voltage transformer supervision function; [50/51SEF.En_VTS_Blk] is the logic setting of the function which can block all the SEF protection that relate to the voltage measurement when the voltage transformer is failed; [VTS.Alm] is the alarm signal of the protection voltage transformer supervision.
3.6.4 Sensitive Earth Fault Protection Settings All the settings of the sensitive earth fault protection are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No. 1
Menu text 50/51SEF.RCA
Explanation The relay characteristic angle for the directional sensitive earth fault protection
Range
Step
-180°~179°
1°
0~1
1
0.005~0.4A
0.001A
0~100s
0.001s
0~2
1
0~1
1
The logic setting of the function which blocks the 2
50/51SEF.En_VTS_Blk
SEF protection related voltage measurement when the voltage transformer is failed
3
50/51SEF1.3I0_Set
4
50/51SEF1.t_Op
5
50/51SEF1.Opt_Dir
6
50/51SEF1.En
7
50/51SEF1.OutMap
8
50/51SEF2.3I0_Set
9
50/51SEF2.t_Op
The current setting of the stage 1 sensitive earth fault protection The time setting of the stage 1 sensitive earth fault protection The setting is used to select the directional mode for the stage 1 SEF protection, see Section 3.6.3 The logic setting of the stage 1 sensitive earth fault protection The output matrix setting of the stage 1 sensitive
0x00000000 ~
earth fault protection
0x7FFFFFFF
The current setting of the stage 2 sensitive earth fault protection The time setting of the stage 2 sensitive earth fault protection
1
0.005~0.4A
0.001A
0~100s
0.001s
3-27
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3 Operation Theory 10
50/51SEF2.Opt_Dir
11
50/51SEF2.En
12
50/51SEF2.OutMap
13
50/51SEF3.3I0_Set
14
50/51SEF3.t_Op
15
50/51SEF3.Opt_Dir
16
50/51SEF3.En
17
50/51SEF3.OutMap
18
50/51SEF4.3I0_Set
19
50/51SEF4.t_Op
20
50/51SEF4.Opt_Dir
21
50/51SEF4.En
22
50/51SEF4.OutMap
23
50/51SEF4.Opt_Curve
24
50/51SEF4.TMS
25
50/51SEF4.tmin
26
50/51SEF4.K
27
50/51SEF4.C
28
50/51SEF4.Alpha
The setting is used to select the directional mode for the stage 2 SEF protection, see Section 3.6.3 The logic setting of the stage 2 sensitive earth fault protection
0~2
1
0~1
1
The output matrix setting of the stage 2 sensitive
0x00000000 ~
earth fault protection
0x7FFFFFFF
The current setting of the stage 3 sensitive earth fault protection The time setting of the stage 3 sensitive earth fault protection The setting is used to select the directional mode for the stage 3 SEF protection, see Section 3.6.3 The logic setting of the stage 3 sensitive earth fault protection
0.005~0.4A
0.001A
0~100s
0.001s
0~2
1
0~1
1
The output matrix setting of the stage 3 sensitive
0x00000000 ~
earth fault protection
0x7FFFFFFF
The current setting of the stage 4 sensitive earth fault protection The time setting of the stage 4 sensitive earth fault protection The setting is used to select the directional mode for the stage 4 SEF protection, see Section 3.6.3 The logic setting of the stage 4 sensitive earth fault protection
0.001A
0~100s
0.001s
0~2
1
0~1
1
0x00000000 ~
earth fault protection
0x7FFFFFFF
characteristic curve for SEF4 protection The time multiplier setting of the IDMT sensitive earth fault protection The minimum operation time setting of the IDMT sensitive earth fault protection Constant “k” for the IDMT sensitive earth fault protection, see Section 3.6.2 Constant “C” for the IDMT sensitive earth fault protection, see Section 3.6.2 Constant “α” for the IDMT sensitive earth fault protection, see Section 3.6.2
1
0.005~0.4A
The output matrix setting of the stage 4 sensitive The setting is for selecting the inverse time
1
1
0~13
1
0.05~100.0
0.001
0~100s
0.001s
0.001~120.0
0.0001
0.00~1.00
0.0001
0.01~3.00
0.0001
3.7 Negative Sequence Overcurrent Protection 3.7.1 Definite Time Negative Sequence Overcurrent Protection The application of negative sequence overcurrent protection to motors has a special significance. 3-28
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3 Operation Theory
Unbalanced loads create counter-rotating fields in three-phase induction motors, which act on the rotor at double frequency. Eddy currents are induced on the rotor surface, which causes local overheating in rotor end zones and the slot wedges. This especially goes for motors which are tripped via vacuum contactors with fuses connected in series. With single phasing due to operation of a fuse, the motor only generates small and pulsing torques such that it soon is thermally strained assuming that the torque required by the machine remains unchanged. In addition, the unbalanced supply voltage introduces the risk of thermal overload. Due to the small negative sequence reactance even small voltage asymmetries lead to large negative sequence currents. This relay provides a two-stage negative sequence overcurrent protection with definite time delay characteristics. Each stage can be enabled or disabled by scheme logic settings independently. The two stages have same protection logics if they are set with definite time characteristics. The logic diagram for the stage 1 negative sequence overcurrent protection is shown as below. The negative sequence overcurrent block is a level detector that detects whether the negative sequence current magnitude is above the threshold.
Figure 3.7-1 Logical diagram of the stage 1 NOC protection
Where: [50/51Q1.I2_Set] is the current setting of the stage 1 negative sequence overcurrent protection; “tNOC1” is the setting [50/51Q1.t_Op], the time setting of the stage 1 negative sequence overcurrent protection; [50/51Q1.En] is the logic setting of the stage 1 negative sequence overcurrent protection; [50/51Q1.En1] is the binary signal for enabling the NOC1 protection; [50/51Q1.Blk] is the binary signal for blocking the NOC1 protection.
3.7.2 IDMT Negative Sequence Overcurrent Protection The stage 2 negative sequence overcurrent protection also can be set with inverse definite minimum time (IDMT) characteristic. It has the same inverse time characteristic with the IDMT overcurrent protection (see Section 3.3.2), and the setting [50/51Q2.Opt_Curve] can be used to select the expected curve. The logic diagram of the negative sequence overcurrent protection is shown as below. The negative sequence current block is a level detector that detects whether the current magnitude is above the threshold.
3-29
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3 Operation Theory
Figure 3.7-2 Logic diagram of the IDMT negative sequence overcurrent protection
Where: [50/51Q2.I2_Set] is the current setting of the stage 2 negative sequence overcurrent protection; [50/51Q2.En] is the logic setting of the stage 2 negative sequence overcurrent protection; [50/51Q2.Opt_Curve] is the setting for selecting the inverse time characteristic curve; [50/51Q2.En1] is the binary signal for enabling the NOC2 protection; [50/51Q2.Blk] is the binary signal for blocking the NOC2 protection.
3.7.3 Negative Sequence Overcurrent Protection Settings All the settings of the negative sequence overcurrent protection are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
50/51Q1.I2_Set
2
50/51Q1.t_Op
3
50/51Q1.En
4
50/51Q1.OutMap
5
50/51Q2.I2_Set
6
50/51Q2.t_Op
7
50/51Q2.En
8
50/51Q2.OutMap
9
50/51Q2.Opt_Curve
10
50/51Q2.TMS
11
50/51Q2.tmin
Explanation The current setting of the stage 1 negative sequence overcurrent protection The time setting of the stage 1 negative sequence overcurrent protection The logic setting of the stage 1 negative sequence overcurrent protection
Range
Step
0.05In~4In
0.001A
0~100s
0.001s
0~1
1
The output matrix setting of the stage 1 negative
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the stage 2 negative sequence overcurrent protection The time setting of the stage 2 negative sequence overcurrent protection The logic setting of the stage 2 negative sequence overcurrent protection
0.05In~4In
0.001A
0~100s
0.001s
0~1
1
The output matrix setting of the stage 2 negative
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The setting is for selecting the inverse time characteristic curve for the NOC2 protection The time multiplier setting of the negative sequence IDMT overcurrent protection The minimum operation time setting of the negative sequence IDMT overcurrent protection
3-30
1
1
0~13
1
0.05~100.0
0.001
0~100s
0.001s
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3 Operation Theory 12
50/51Q2.K
13
50/51Q2.C
14
50/51Q2.Alpha
Constant “k” for the negative sequence IDMT overcurrent protection, see Section 3.7.2 Constant “C” for the negative sequence IDMT overcurrent protection, see Section 3.7.2 Constant “α” for the negative sequence IDMT overcurrent protection, see Section 3.7.2
0.001~120.0
0.0001
0.00~1.00
0.0001
0.01~3.00
0.0001
3.8 Broken Conductor Protection 3.8.1 Broken Conductor Protection Theory The relay incorporates an element which measures the ratio of negative to positive phase sequence current (Ι2/Ι1). This will be affected to a lesser extent than the measurement of negative sequence current alone, since the ratio is approximately constant with variations in load current. Hence, a more sensitive setting may be achieved. At the moment when the circuit breaker is closed, because the three poles of the circuit breaker are discrepant for a very short time, and if the broken conductor protection is enabled, it is easy to make the broken conductor protection pick up, and it will restore after the load current is stable. The logic diagram is as shown below. The ratio of I2/I1 is calculated and is compared with the threshold and if the threshold is exceeded then the delay timer is initiated.
Figure 3.8-1 Logic diagram of the broken conductor protection
Where: [50BC.I2/I1_Set] is the ratio setting of the broken conductor protection; “tBCP” is the setting [50BC.t_Op], the time setting of the broken conductor protection; [50BC.En] is the logic setting of the broken conductor protection; [50BC.En1] is the binary signal for enabling the broken conductor protection; [50BC.Blk] is the binary signal for blocking the broken conductor protection.
3.8.2 Broken Conductor Protection Settings All the settings of the broken conductor protection are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No. 1
Menu text 50BC.I2/I1_Set
Explanation The ratio setting for the broken conductor protection
Range 0.10~1.00
Step 0.001
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3 Operation Theory 2
50BC.t_Op
3
50BC.En
4
50BC.OutMap
The time setting for the broken conductor protection The logic setting for the broken conductor protection
0~200s
0.001s
0~1
1
The output matrix setting of the broken conductor
0x00000000 ~
protection
0x7FFFFFFF
1
3.9 Breaker Failure Protection 3.9.1 Breaker Failure Protection Theory The circuit breaker failure protection is specially for re-tripping the circuit breaker, when the relay has transmitted the tripping command to the circuit breaker, but it also can detect the fault is still existed in the system or the circuit breaker is still closed after an appointed time delay. The breaker failure protection in this relay has two independent definite time delay characteristics. It is controlled by the external initiation signal “50BF.In_BFP1” (such as the external binary input trigger signal) or the inner initiation signal “50BF.In_BFP2” (such as the relay tripping operation signal). The signal “50BF.In_BFP1” and “50BF.In_BFP2” can be configured through the PCS-PC software. For some special faults (for example, mechanical protection or overvoltage protection operating), maybe the faulty current is very small and the current criterion of the breaker failure protection can not be satisfied, in order to make the breaker failure protection can operate in such a situation, the auxiliary contact of the circuit breaker can be taken into account. So this relay provides four criteria logics to meet different requirements. Four criteria logics based on the phase currents and the circuit breaker state (based on the binary input [BI_52b]) are selectable through the setting [50BF.Opt_LogicMode]. The criteria conditions are list as below: (A) the maximum phase current is greater than the setting [50BF.I_Set]; (B) the circuit breaker is still closed ([BI_52b] = 0). Setting Value
Criteria Condition Logic
1
Ipmax > [50BF.I_Set]
Only A
2
NOT([BI_52b])
Only B
3
(Ipmax > [50BF.I_Set]) OR (NOT([BI_52b]))
A OR B
4
(Ipmax > [50BF.I_Set]) AND (NOT([BI_52b]))
A AND B
The logic diagram of the breaker failure protection is shown as below.
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3 Operation Theory Ia > [50BF.I_Set] Ib > [50BF.I_Set]
1 ONLY A A
Ic > [50BF.I_Set] [BI_52b]
2 ONLY B 3 A OR B
B
[50BF.St]
4 A AND B
[50BF.Opt_LogicMode] 50BF.In_BFP1
&
tBFP1
0
[50BF.Op]
tBFP2
0
[50BF.ReTrp]
50BF.In_BFP2 [50BF.En] [50BF.En1]
&
[50BF.En_ReTrp]
Figure 3.9-1 Logic diagram of the breaker failure protection
Where: [50BF.I_Set] is the current setting of the breaker failure protection; “tBFP1” is the setting [50BF.t_Op], the time setting of the breaker failure protection; “tBFP2” is the setting [50BF.t_ReTrp] is the re-trip time setting of the breaker failure protection; [50BF.En] is the logic setting of the breaker failure protection; [50BF.En1] is the binary signal for enabling the breaker failure protection; [50BF.En_ReTrp] is the logic setting of re-trip function the breaker failure protection; [50BF.Opt_LogicMode] is the setting for selecting the BFP criterion logic; [BI_52b] is the binary input from the auxiliary normal close contact of the circuit breaker; “50BF.In_BFP1” is the external initiation signal such as the external binary input trigger signal, and the external binary input which is used to initiate the breaker failure protection can be configured through the PCS-PC configuration tool auxiliary software. “50BF.In_BFP2” is the inner initiation signal such as the relay tripping operation signal, and the tripping elements which are used to initiate the breaker failure protection can be configured through the PCS-PC configuration tool auxiliary software. The time setting of the breaker failure protection should be based on the maximum circuit breaker operating time plus the dropout time of the current flow monitoring element plus a safety margin which takes into consideration the tolerance of the time delay.
Figure 3.9-2 Timing for a typical breaker failure scenario
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3 Operation Theory
3.9.2 Breaker Failure Protection Settings All the settings of the breaker failure protection are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
50BF.I_Set
2
50BF.t_Op
3
50BF.t_ReTrp
4
50BF.Opt_LogicMode
5
50BF.En
6
50BF.En_ReTrp
7
50BF.OutMap
8
50BF.OutMap_ReTrp
Explanation The current setting of the breaker failure protection The time setting of the breaker failure protection The re-trip time setting of the breaker failure protection The setting for selecting the criteria logic of the breaker failure protection The logic setting of the breaker failure protection The logic setting of the re-trip function of the breaker failure protection
Range
Step
0.05In~5.0In
0.001A
0~100s
0.001s
0~100s
0.001s
1~4
1
0~1
1
0~1
1
The output matrix setting of the breaker failure
0x00000000 ~
protection
0x7FFFFFFF
The output matrix setting of the re-trip function of
0x00000000 ~
the breaker failure protection
0x7FFFFFFF
1 1
3.10 Switch Onto Fault (SOTF) Protection 3.10.1 SOTF Protection Theory In some feeder applications, three-pole fast tripping may be required if a fault is present on the feeder when it is energized. Such faults may be due to a fault condition not having been removed from the feeder, or due to earthing clamps having been left on the following maintenance. In either case, it may be desirable to clear the fault condition in an accelerated time, rather than waiting for the time delay associated with overcurrent protection. Switch onto fault overcurrent protection and zero sequence accelerated overcurrent protection are equipped in this equipment. Acceleration before or after tripping can be configured by setting the logic setting [SOTF.Opt_Mode]. Acceleration after tripping includes accelerated tripping for manual switching-onto-fault or automatic reclosing-onto-fault. Current settings and delays of these two accelerated tripping protections can be configured independently. If acceleration after tripping is selected, the SOTF element is enabled for the predefined time [SOTF.t_En] after the auto-recloser operates. And the SOTF element is enabled for the predefined time [SOTF.t_En] fixedly after manual closing signal is issued, and the typical value is “3s”. The logic diagram of the switch onto fault protection is shown as below.
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3 Operation Theory Ia > [50PSOTF.I_SetF] Ib > [50PSOTF.I_SetF] Ic > [50PSOTF.I_SetF] [50PSOTF.En]
&
[50PSOTF.St]
[50PSOTF.En1]
&
[50PSOTF.Blk] [79.Ready] [SOTF.Opt_Mode] [79.Close_3PSx] (x:1~4)
tSOTFOC
0
& &
0
tEnSOTF
[50GSOTF.St]
SOTF.ManClsCB
&
I10 > [50GSOTF.3I0_Set] [50GSOTF.En] [50GSOTF.En1]
[50PSOTF.Op]
tSOTFROC
0
[50GSOTF.Op]
&
[50GSOTF.Blk]
Figure 3.10-1 Logic diagram of the SOTF protection
Where: [50PSOTF.I_Set] is the current setting of the SOTF overcurrent protection; “tSOTFOC” is the setting [50PSOTF.t_Op], the time setting of the SOTF overcurrent protection; [50PSOTF.En] is the logic setting of the SOTF overcurrent protection; [50PSOTF.En1] is the binary signal for enabling the SOTF overcurrent protection; [50PSOTF.Blk] is the binary signal for blocking the SOTF overcurrent protection; [50GSOTF.3I0_Set] is the current setting of the zero sequence SOTF overcurrent protection; “tSOTFROC” is the setting [50GSOTF.t_Op], the time setting of the zero sequence SOTF overcurrent protection; [50GSOTF.En] is the logic setting of the zero sequence SOTF overcurrent protection; [50GSOTF.En1] is the binary signal for enabling the zero sequence SOTF overcurrent protection; [50GSOTF.Blk] is the binary signal for blocking the zero sequence SOTF overcurrent protection; [SOTF.Opt_Mode] is the setting for selecting the acceleration mode of the SOTF protection; “tEnSOTF” is the setting [SOTF.t_En], the enabling time setting of the SOTF protection; [79.Ready] is used to denote the auto-recloser is ready for operating; [79.Close_3PSx] (x:1~4) means that the auto-recloser operates; “SOTF.ManClsCB” denotes the circuit breaker is closed manually (local or remote), for example, the circuit breaker is closed by the remote closing command from the SAS or SCADA, or by pressing the closing button on the control panel.
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3.10.2 SOTF Protection Settings All the settings of the SOTF protection are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
SOTF.t_En
2
SOTF.Opt_Mode
3
50PSOTF.I_Set
4
50PSOTF.t_Op
5
50PSOTF.En
6
50PSOTF.OutMap
7
50GSOTF.3I0_Set
8
50GSOTF.t_Op
9
50GSOTF.En
10
50GSOTF.OutMap
Explanation The enabling time setting of the SOTF protection The setting for selecting the acceleration tripping mode of the SOTF protection The current setting of the SOTF overcurrent protection The time setting of the SOTF overcurrent protection The logic setting of the SOTF overcurrent protection
Range 0~100s
0.001s
0~1
1
0.05In~30In
0.001A
0~100s
0.001s
0~1
1
The output matrix setting of the SOTF overcurrent
0x00000000 ~
protection
0x7FFFFFFF
The current setting of the zero sequence SOTF overcurrent protection The time setting of the zero sequence SOTF overcurrent protection The logic setting of the zero sequence SOTF overcurrent protection
Step
1
0.05In~30In
0.001A
0~100s
0.001s
0~1
1
The output matrix setting of the zero sequence
0x00000000 ~
SOTF overcurrent protection
0x7FFFFFFF
1
3.11 Cold Load Pickup Logic 3.11.1 Cold Load Pickup Logic Theory The cold load pickup (CLP) logic which is included within this relay serves to either inhibit the selected protective elements for an appointed duration, or to raise the settings of the selected protective elements. Therefore, it allows the protection settings to be set closer to the load profile by automatically increasing them following circuit energization. The CLP logic thus provides stability, whilst maintaining protection during starting. The CLP function acts upon the overcurrent protection and the No.1 group of zero sequence overcurrent protection. The output signal of the CLP logic also can be used as a blocking signal for a selected protective element through the PCS-PC configuration tool software. The logic diagram of the cold load pickup function is shown in Figure 3.11-1. The cold load pickup logic operates when the circuit breaker remains open for a time greater than [CLP.t_Cold] and is subsequently closed. The CLP operation is applied after [CLP.t_Cold] and remains for a time delay [CLP.t_Rst] after the circuit breaker is closed. The status of the circuit breaker is provided either by means of the load current ([CLP.LogicMode] = 1) or by means of the 3-36
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CB auxiliary contact ([CLP.LogicMode] = 2). The signal [CLP.OnLoad] can be gotten from the signal “Prot.OnLoad” through the PCS-PC. If the CLP output “CLP.St” is “1”, the CLP settings are enabled for the overcurrent protection and the No.1 group of zero sequence overcurrent protection respectively. After the delay [CLP.t_Rst] has elapsed, the normal protection settings are applied. And if a fast resetting signal is received, the normal protection settings are applied after the delay [CLP.t_ShortRst]. [CLP.OnLoad] [CLP.Opt_LogicMode] = 1 [BI_52b] [CLP.Opt_LogicMode] = 2
[CLP.ShortRst]
& tCold
0
S R
& tRst
0
&
tShortRst
0
Q Q
& &
[CLP.St_50/51]
[CLP.St]
[CLP.Init] [CLP.En] [CLP.Blk]
Figure 3.11-1 Logic diagram of the cold load pickup function
Where: [CLP.OnLoad] is the signal denotes anyone of the phase currents is greater than 0.04In; [CLP.LogicMode] is used for selecting the cold load condition mode; [BI_52b] is the binary input for inputting the normal close contact of the circuit breaker; [CLP.ShortRst] is the binary signal of the short resetting function; [CLP.St_50/51] is the binary signal which denotes anyone of the selected protective elements picked up; [CLP.Init] is the binary signal for initiating the cold load pickup logic function (for example, a binary input signal from other relevant relay); [CLP.En] is the logic setting of the cold load pickup logic function; [CLP.Blk] is the binary signal for blocking the cold load pickup logic function; “tCold” is the setting [CLP.t_Cold], the time setting for ensuring the cold load condition is met; “tRst” is the setting [CLP.t_Rst], the time setting for resetting the cold load pickup logic function; “tShortRst” is the setting [CLP.t_ShortRst], the time setting for fast resetting the cold load pickup logic function.
3.11.2 Cold Load Pickup Logic Settings All the settings of the cold load pickup logic are listed in the following table. For the information 3-37
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3 Operation Theory
about the common explanation of the settings, see Section 7.3. No.
Menu text
1
CLP.Opt_LogicMode
2
CLP.t_Cold
3
CLP.t_Rst
4
CLP.t_ShortRst
5
CLP.En
6
50/51P1.CLP.IMult
7
50/51P1.CLP.t_Op
8
50/51P2.CLP.IMult
9
50/51P2.CLP.t_Op
10
50/51P3.CLP.IMult
11
50/51P3.CLP.t_Op
12
50/51P4.CLP.IMult
13
50/51P4.CLP.t_Op
14
50/51P4.CLP.TMS
15
50/51G1.CLP.IMult
16
50/51G1.CLP.t_Op
17
50/51G2.CLP.IMult
18
50/51G2.CLP.t_Op
19
50/51G3.CLP.IMult
20
50/51G3.CLP.t_Op
21
50/51G4.CLP.IMult
Explanation The setting for selecting the cold load condition The time setting for ensuring the cold load condition is met The time setting for resetting the cold load pickup logic The time setting for fast resetting the cold load pickup logic The logic setting of the cold load pickup logic function The multiple setting of the stage 1 overcurrent protection when CLP is active The time setting of the stage 1 overcurrent protection when CLP is active The multiple setting of the stage 2 overcurrent protection when CLP is active The time setting of the stage 2 overcurrent protection when CLP is active The multiple setting of the stage 3 overcurrent protection when CLP is active The time setting of the stage 3 overcurrent protection when CLP is active The multiple setting of the stage 4 overcurrent protection when CLP is active The time setting of the stage 4 overcurrent protection when CLP is active The time multiplier setting of the IDMT overcurrent protection when CLP is active The multiple setting of the stage 1 zero sequence overcurrent protection when CLP is active The time setting of the stage 1 zero sequence overcurrent protection when CLP is active The multiple setting of the stage 2 zero sequence overcurrent protection when CLP is active The time setting of the stage 2 zero sequence overcurrent protection when CLP is active The multiple setting of the stage 3 zero sequence overcurrent protection when CLP is active The time setting of the stage 3 zero sequence overcurrent protection when CLP is active The multiple setting of the stage 4 zero sequence overcurrent protection when CLP is active
3-38
Range
Step
1~2
1
0~4000s
0.001s
0~4000s
0.001s
0~600s
0.001s
0~1
1
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
0~100s
0.001s
0.05~100.0
0.001
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
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3 Operation Theory 22
50/51G4.CLP.t_Op
23
50/51G1.CLP.TMS
The time setting of the stage 4 zero sequence overcurrent protection when CLP is active The time multiplier setting of the zero sequence IDMT overcurrent protection when CLP is active
0~100s
0.001s
0.05~100.0
0.001
3.12 Undervoltage Protection 3.12.1 Undervoltage Protection Theory This relay provides a two-stage undervoltage protection with definite time delay characteristics. The two stages have same protection logics. Each stage can be used for tripping or alarming through the PCS-PC and the default is for tripping. This protection can support all kinds of VT connection: three phase voltage (Ua, Ub, Uc), three phase-to-phase voltages (Uab, Ubc, Uca), two phase-to-phase voltages (Uab, Ubc), anyone of three phase voltages or anyone of three phase-to-phase voltages. Two methods are used to check the undervoltage condition by the setting [27P.Opt_1P/3P]. If setting [27P.Opt_1P/3P] is set as “0”, and all of the three voltage values are less than the voltage setting, the undervoltage protection will operates after the appointed time delay; and if the setting [27P.Opt_1P/3P] is set as “1”, and anyone of the three voltage values is less than the voltage setting, the undervoltage protection will operates after the appointed time delay. The setting [27P.Opt_Up/Upp] is used to decide the voltage input mode. If it is set as “1”, the input voltage is phase-to-phase voltage; and if it is set as “0”, the input voltage is phase voltage. So the voltage setting must be set in accordance with the setting [27P.Opt_Up/Upp]; i.e. if the setting [27P.Opt_Up/Upp] is set as “1”, the voltage setting is set according to phase-to-phase voltage; and if the setting [27P.Opt_Up/Upp] is set as “0”, the voltage setting is set according to phase voltage. The circuit breaker state (based on the binary input [BI_52b]) is taken into account in the undervoltage protection logic; when the circuit breaker is opened ([BI_52b] = 1), the undervoltage protection is not in service. If the system voltage is lost, the undervoltage protection is blocked. The criterion of the system voltage lost detects that all the three phase voltages are less than 15V, and the load current can be taken into account according to the application demands through [27P1.OnLoad] which denotes whether there has load current (anyone of the three phase currents is greater than 0.04In). The signal [27P1.OnLoad] can be gotten from the signal “Prot.OnLoad” through the PCS-PC.
Figure 3.12-1 Logic diagram of the system lost voltage for the UV1 protection
The following figure shows the logic diagram of the stage 1 undervoltage protection.
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Figure 3.12-2 Logic diagram of the stage 1 undervoltage protection
Where: [27P1.U_Set] is the voltage setting of the stage 1 undervoltage protection; “tUV1” is the setting [27P1.t_Op], the time setting of the stage 1 undervoltage protection; [27P.Opt_1P/3P] is the logic setting for selecting the undervoltage calculation method; [27P.Opt_Up/Upp] is the logic setting for deciding the voltage input mode; [27P1.En] is the logic setting of the stage 1 undervoltage protection; [27P1.En1] is the binary signal for enabling the stage 1 undervoltage protection; [27P1.Blk] is the binary signal for blocking the stage 1 undervoltage protection; [BI_52b] is the binary input from the auxiliary normal close contact of the circuit breaker; “27P1.LostVolt” denotes whether the system voltage is lost.
3.12.2 Undervoltage Protection Settings All the settings of the undervoltage protections are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
27P.Opt_1P/3P
2
27P.Opt_Up/Upp
3
27P1.U_Set
Explanation The
setting
for
selecting
Range the
undervoltage
protection calculation method The setting for selecting the voltage input mode for the undervoltage protection The voltage setting of the stage 1 undervoltage protection
3-40
Step
0~1
1
0~1
1
2~120V
0.001V
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3 Operation Theory 4
27P1.t_Op
5
27P1.K_DropOut
6
27P1.En
7
27P1.OutMap
8
27P2.U_Set
9
27P2.t_Op
10
27P2.K_DropOut
11
27P2.En
12
27P2.OutMap
The time setting of the stage 1 undervoltage protection The dropout coefficient setting of the stage 1 undervoltage protection The logic setting of the stage 1 undervoltage protection
0~100s
0.001s
1.03~3.0
0.001
0~1
1
The output matrix setting of the stage 1
0x00000000 ~
undervoltage protection
0x7FFFFFFF
The voltage setting of the stage 2 undervoltage protection The time setting of the stage 2 undervoltage protection The dropout coefficient setting of the stage 2 undervoltage protection The logic setting of the stage 2 undervoltage protection
1
2~120V
0.001V
0~100s
0.001s
1.03~3.0
0.001
0~1
1
The output matrix setting of the stage 2
0x00000000 ~
undervoltage protection
0x7FFFFFFF
1
If the voltage is greater than [27Px.U_Set]×[27Px.K_DropOut] (x: 1~2), the corresponding undervoltage protection will drop out. The dropout coefficient [27Px.K_DropOut] (x: 1~2) for setting the dropout value of the corresponding undervoltage protection, and its typical value is “1.03”.
3.13 Overvoltage Protection 3.13.1 Overvoltage Protection Theory This relay provides a two-stage overvoltage protection with definite time delay characteristics. The two stages have same protection logics. Each stage can be used for tripping or alarming through the PCS-PC and the default is for tripping. This protection can support all kinds of VT connection: three phase voltage (Ua, Ub, Uc), three phase-to-phase voltages (Uab, Ubc, Uca), two phase-to-phase voltages (Uab, Ubc), anyone of three phase voltages or anyone of three phase-to-phase voltages. Two methods are used to check the overvoltage condition by the setting [59P.Opt_1P/3P]. If setting [59P.Opt_1P/3P] is set as “0”, and all of the three voltage values are greater than the voltage setting, the overvoltage protection will operates after the appointed time delay; and if the setting [59P.Opt_1P/3P] is set as “1”, and anyone of the three voltage values is greater than the voltage setting, the overvoltage protection will operates after the appointed time delay. The setting [59P.Opt_Up/Upp] is used to decide the voltage input mode. If it is set as “1”, the input voltage is phase-to-phase voltage; and if it is set as “0”, the input voltage is phase voltage. So the voltage setting must be set in accordance with the setting [59P.Opt_Up/Upp]; i.e. if the setting [59P.Opt_Up/Upp] is set as “1”, the voltage setting is set according to phase-to-phase voltage; and if the setting [59P.Opt_Up/Upp] is set as “0”, the voltage setting is set according to phase voltage. 3-41
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The following figure shows the logic diagram of the stage 1 overvoltage protection.
Figure 3.13-1 Logic diagram of the stage 1 overvoltage protection
Where: [59P1.U_Set] is the voltage setting of the stage 1 overvoltage protection; “tOV1” is the setting [59P1.t_Op], the time setting of the stage 1 overvoltage protection; [59P.Opt_1P/3P] is the logic setting for selecting the overvoltage calculation method; [59P.Opt_Up/Upp] is the logic setting for deciding the voltage input mode; [59P1.En] is the logic setting of the stage 1 overvoltage protection; [59P1.En1] is the binary signal for enabling the stage 1 overvoltage protection; [59P1.Blk] is the binary signal for blocking the stage 1 overvoltage protection.
3.13.2 Overvoltage Protection Settings All the settings of the overvoltage and undervoltage protections are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
59P.Opt_1P/3P
2
59P.Opt_Up/Upp
3
59P1.U_Set
4
59P1.t_Op
5
59P1.K_DropOut
Explanation The
setting
for
selecting
Range the
overvoltage
protection calculation method The setting for selecting the voltage input mode for the overvoltage protection The voltage setting of the stage 1 overvoltage protection The time setting of the stage 1 overvoltage protection The dropout coefficient setting of the stage 1 overvoltage protection
3-42
Step
0~1
1
0~1
1
57.7~200V
0.001V
0~100s
0.001s
0.93~0.97
0.001
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3 Operation Theory 6
59P1.En
7
59P1.OutMap
8
59P2.U_Set
9
59P2.t_Op
10
59P2.K_DropOut
11
59P2.En
12
59P2.OutMap
The logic setting of the stage 1 overvoltage protection
0~1
The output matrix setting of the stage 1
0x00000000 ~
overvoltage protection
0x7FFFFFFF
The voltage setting of the stage 2 overvoltage protection The time setting of the stage 2 overvoltage protection The dropout coefficient setting of the stage 2 overvoltage protection The logic setting of the stage 2 overvoltage protection
1 1
57.7~200V
0.001V
0~100s
0.001s
0.93~0.97
0.001
0~1
1
The output matrix setting of the stage 2
0x00000000 ~
overvoltage protection
0x7FFFFFFF
1
If the voltage is less than [59Px.U_Set]×[59Px.K_DropOut] (x: 1~2), the corresponding overvoltage protection will drop out. The dropout coefficient [59Px.K_DropOut] (x: 1~2) for setting the dropout value of the corresponding overvoltage protection, and its typical value is “0.97”.
3.14 Zero Sequence Overvoltage Protection 3.14.1 Zero Sequence Overvoltage Protection Theory On a healthy three-phase power system, the addition of each of the three-phase to earth voltages is nominally zero. However, when an earth fault occurs on the primary system, the balance is upset and a residual voltage is produced. Hence, a zero sequence overvoltage protection can be used to offer earth fault protection on such a system. The residual voltage could be measured at the secondary terminals of a voltage transformer having a “broken delta” secondary connection, or it can be calculated from the three phase voltages; which is decided by the setting [Opt_3U0]. This relay provides a two-stage zero sequence overvoltage protection with definite time delay characteristics. The two stages have same protection logics. The following figure shows the logic diagram of the stage 1 zero sequence overvoltage protection.
Figure 3.14-1 Logic diagram of the stage 1 ROV protection
Where: [59G1.3U0_Set] is the voltage setting of the stage 1 zero sequence overvoltage protection;
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“tROV1” is the setting [59G1.t_Op], the time setting of the stage 1 zero sequence overvoltage protection; [59G1.En] is logic setting of the stage 1 zero sequence overvoltage protection. [59G1.En1] is the binary signal for enabling the stage 1 zero sequence overvoltage protection; [59G1.Blk] is the binary signal for blocking the stage 1 zero sequence overvoltage protection.
3.14.2 Zero Sequence Overvoltage Protection Settings All the settings of the zero sequence overvoltage protection are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
59G1.3U0_Set
2
59G1.t_Op
3
59G1.En
4
59G1.OutMap
5
59G2.3U0_Set
6
59G2.t_Op
7
59G2.En
8
59G2.OutMap
Explanation The voltage setting of the stage 1 zero sequence overvoltage protection The time setting of the stage 1 zero sequence overvoltage protection The logic setting of the stage 1 zero sequence overvoltage protection
Range 2~160V
0.001V
0~100s
0.001s
0~1
1
The output matrix setting of the stage 1 zero
0x00000000 ~
sequence overvoltage protection
0x7FFFFFFF
The voltage setting of the stage 2 zero sequence overvoltage protection The time setting of the stage 2 zero sequence overvoltage protection The logic setting of the stage 2 zero sequence overvoltage protection
Step
1
2~160V
0.001V
0~100s
0.001s
0~1
1
The output matrix setting of the stage 2 zero
0x00000000 ~
sequence overvoltage protection
0x7FFFFFFF
1
3.15 Negative Sequence Overvoltage Protection 3.15.1 Negative Sequence Overvoltage Protection Theory On a healthy three-phase power system, the negative sequence voltage is nominally zero. However, when an unbalance situation occurs on the primary system, the negative sequence voltage is produced. This relay provides a one-stage negative sequence overvoltage protection with definite time delay characteristic. The negative sequence voltage is self-calculated. The following figure shows the logic diagram of the negative sequence overvoltage protection.
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Figure 3.15-1 Logic diagram of the NOV protection
Where: [59Q.U2_Set] is the voltage setting of the negative sequence overvoltage protection; “tNOV” is the setting [59Q.t_Op], the time setting of the negative sequence overvoltage protection; [59Q.En] is logic setting of the negative sequence overvoltage protection. [59Q.En1] is the binary signal for enabling the negative sequence overvoltage protection; [59Q.Blk] is the binary signal for blocking the negative sequence overvoltage protection.
3.15.2 Negative Sequence Overvoltage Protection Settings All the settings of the negative sequence overvoltage protection are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
59Q.U2_Set
2
59Q.t_Op
3
59Q.En
4
59Q.OutMap
Explanation The voltage setting of the negative sequence overvoltage protection The time setting of the negative sequence overvoltage protection The logic setting of the negative sequence overvoltage protection
Range
Step
2~120V
0.001V
0~100s
0.001s
0~1
1
The output matrix setting of the negative
0x00000000 ~
sequence overvoltage protection
0x7FFFFFFF
1
3.16 Frequency Protection The frequency protection detects abnormally high and low frequencies in the power system or in electrical machines. If the frequency is out of the allowable range, the appropriate actions are initiated, such as load shedding or separating a generator from the system. A decrease in system frequency occurs when the system experiences an increase in the real power demand, or when a malfunction occurs with a generator governor or automatic generation control (AGC) system. The frequency protection function is also used for generators, which (for a certain time) operate to an island network. This is due to the fact that the reverse power protection cannot operate in case of a drive power failure. The generator can be disconnected from the power system using the frequency decrease protection. An increase in system frequency occurs, e.g. when large blocks of load (island network) are 3-45
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removed from the system, or again when a malfunction occurs with a generator governor. This entails risk of self-excitation for generators feeding long lines under no-load conditions.
3.16.1 Under-frequency Protection The feeder relay includes under-frequency protection to facilitate load shedding and subsequent restoration. It provides a four-stage under-frequency protection with independent definite time delay characteristics in this relay, and the four stages have same protection logics. This protection can be enabled after 100ms only when the frequency is greater than the frequency setting [81Ux.f_Set] (x: 1~4) and three phase-to-phase voltages are greater than the setting [81.Upp_VCE]. Meanwhile, this protection will be blocked when the system frequency is less than 35.00Hz or greater than 70.00Hz and this situation keeps for longer than 200ms. The logic diagram of the stage 1 under-frequency protection is shown as below.
Figure 3.16-1 Logic diagram of the stage 1 under-frequency protection
Where: [81U1.f_Set] is the frequency setting of the stage 1 under-frequency protection; “tUF1” is the setting [81U1.t_Op], the time setting of the stage 1 under-frequency protection; [81.Upp_VCE] is the under voltage blocking setting of the frequency protection; [81U1.En] is the logic setting of the stage 1 under-frequency protection; [81U1.En1] is the binary signal for enabling the stage 1 under-frequency protection; [81U1.Blk] is the binary signal for blocking the stage 1 under-frequency protection.
3.16.2 Over-frequency Protection The feeder relay provides a two-stage over-frequency protection with independent definite time delay characteristics, and the two stages have same protection logics. This protection can be enabled after 100ms only when the frequency is less than the frequency setting [81Ox.f_Set] (x: 1~4) and three phase-to-phase voltages are greater than the setting [81.Upp_VCE]. Meanwhile, this protection will be blocked when the power frequency is less than 35.00Hz or greater than 70.00Hz and this situation keeps for longer than 200ms. The logic diagram of the stage 1 over-frequency protection is shown as below.
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Figure 3.16-2 Logic diagram of the stage 1 over-frequency protection
Where: [81O1.f_Set] is the frequency setting of the stage 1 over-frequency protection; “tOF1” is the setting [81O1.t_Op], the time setting of the stage 1 over-frequency protection; [81.Upp_VCE] is the under voltage blocking setting of the frequency protection; [81O1.En] is the logic setting of the stage 1 over-frequency protection; [81O1.En1] is the binary signal for enabling the stage 1 over-frequency protection; [81O1.Blk] is the binary signal for blocking the stage 1 over-frequency protection.
3.16.3 Frequency Rate-of-change Protection This relay provides a four-stage rate-of-change of frequency protection with independent definite time delay characteristic, and the four stages have same protection logics. Depending upon whether the rate-of-change of frequency threshold is set above or below zero, each stage can respond to either rising or falling rate-of-change of frequency conditions: if the setting [81Rx.df/dt_Set] (x: 1~4) is less than zero, the corresponding rate-of-change of frequency protection is used as falling rate-of-change of frequency protection; and if the setting [81Rx.df/dt_Set] (x: 1~4) is greater than zero, the corresponding rate-of-change of frequency protection is used as rising rate-of-change of frequency protection. The logic diagram of the stage 1 frequency rate-of-change protection is shown as below.
Figure 3.16-3 Logic diagram of the stage 1 frequency rate-of-change protection
Where: [81R1.df/dt_Set] is the setting of the stage 1 frequency rate-of-change protection; 3-47
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“tFRCP1” is the setting [81R1.t_Op], the time setting of the stage 1 frequency rate-of-change protection; [81R1.f_Pkp] is the pickup frequency setting of the stage 1 frequency rate-of-change protection; [81R1.En] is the logic setting of the stage 1 frequency rate-of-change protection; [81R1.En1] is the binary signal for enabling the stage 1 frequency rate-of-change protection; [81R1.Blk] is the binary signal for blocking the stage 1 frequency rate-of-change protection. The calculation of the rate-of-change of frequency is based on the voltage sampled values. How many cycles of the voltage sampled values are adopted for the calculation of the rate-of-change of frequency is decided by the setting [81R.dt_Set] (range: 3 ~ 8). For example, if the setting [81R.dt_Set] is set as “4”, it means that the 4 cycles of the voltage sampled values are adopted for the calculation of the rate-of-change of frequency.
3.16.4 Frequency Protection Settings All the settings of the frequency protection are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
81.Upp_VCE
2
81U1.f_Set
3
81U1.t_Op
4
81U1.En
5
81U1.OutMap
6
81U2.f_Set
7
81U2.t_Op
8
81U2.En
9
81U2.OutMap
10
81U3.f_Set
11
81U3.t_Op
12
81U3.En
Explanation
Range
The setting of the low voltage blocking element of the frequency protection (phase-to-phase voltage) The
frequency
setting
of
the
stage
1
under-frequency protection The time setting of the stage 1 under-frequency protection The logic setting of the stage 1 under-frequency protection
10~120V
0.001V
45~60Hz
0.001Hz
0~100s
0.001s
0~1
1
The output matrix setting of the stage 1
0x00000000 ~
under-frequency protection
0x7FFFFFFF
The
frequency
setting
of
the
stage
2
under-frequency protection The time setting of the stage 2 under-frequency protection The logic setting of the stage 2 under-frequency protection
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
under-frequency protection
0x7FFFFFFF
frequency
setting
of
the
stage
3
under-frequency protection The time setting of the stage 3 under-frequency protection The logic setting of the stage 3 under-frequency protection
3-48
1
45~60Hz
The output matrix setting of the stage 2 The
Step
1
45~60Hz
0.001Hz
0~100s
0.001s
0~1
1
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81U3.OutMap
14
81U4.f_Set
15
81U4.t_Op
16
81U4.En
17
81U4.OutMap
18
81O1.f_Set
19
81O1.t_Op
20
81O1.En
21
81O1.OutMap
22
81O2.f_Set
23
81O2.t_Op
24
81O2.En
25
81O2.OutMap
26
81O3.f_Set
27
81O3.t_Op
28
81O3.En
29
81O3.OutMap
30
81O4.f_Set
31
81O4.t_Op
32
81O4.En
33
81O4.OutMap
34
81R.dt_Set
The output matrix setting of the stage 3
0x00000000 ~
under-frequency protection
0x7FFFFFFF
The
frequency
setting
of
the
stage
4
under-frequency protection The time setting of the stage 4 under-frequency protection The logic setting of the stage 4 under-frequency protection
45~60Hz
0.001Hz
0~100s
0.001s
0~1
1
The output matrix setting of the stage 4
0x00000000 ~
under-frequency protection
0x7FFFFFFF
The
frequency
setting
of
the
stage
1
over-frequency protection The time setting of the stage 1 over-frequency protection The logic setting of the stage 1 over-frequency protection
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
over-frequency protection
0x7FFFFFFF
frequency
setting
of
the
stage
2
over-frequency protection The time setting of the stage 2 over-frequency protection The logic setting of the stage 2 over-frequency protection
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
over-frequency protection
0x7FFFFFFF
frequency
setting
of
the
stage
3
over-frequency protection The time setting of the stage 3 over-frequency protection The logic setting of the stage 3 over-frequency protection
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
over-frequency protection
0x7FFFFFFF
frequency
setting
of
the
stage
4
over-frequency protection The time setting of the stage 4 over-frequency protection The logic setting of the stage 4 over-frequency protection
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
over-frequency protection
0x7FFFFFFF
frequency rate-of-change protection
1
50~65Hz
The output matrix setting of the stage 4 The cycle number for the calculation of the
1
50~65Hz
The output matrix setting of the stage 3 The
1
50~65Hz
The output matrix setting of the stage 2 The
1
50~65Hz
The output matrix setting of the stage 1 The
1
3~8
1 1
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81R1.df/dt_Set
36
81R1.f_Pkp
37
81R1.t_Op
38
81R1.En
39
81R1.OutMap
40
81R2.df/dt_Set
41
81R2.f_Pkp
42
81R2.t_Op
43
81R2.En
44
81R2.OutMap
45
81R3.df/dt_Set
46
81R3.f_Pkp
47
81R3.t_Op
48
81R3.En
49
81R3.OutMap
50
81R4.df/dt_Set
51
81R4.f_Pkp
52
81R4.t_Op
53
81R4.En
54
81R4.OutMap
The
setting
of
the
stage
1
frequency
rate-of-change protection The pickup frequency setting of the stage 1 frequency rate-of-change protection The time setting of the stage 1 frequency rate-of-change protection The logic setting of the stage 1 frequency rate-of-change protection
-10~10Hz/s
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
rate-of-change protection
0x7FFFFFFF
setting
of
the
stage
2
frequency
rate-of-change protection The pickup frequency setting of the stage 2 frequency rate-of-change protection The time setting of the stage 2 frequency rate-of-change protection The logic setting of the stage 2 frequency rate-of-change protection
-10~10Hz/s
0.001s
0~1
1
0x7FFFFFFF
the
stage
3
frequency
rate-of-change protection The pickup frequency setting of the stage 3 frequency rate-of-change protection The time setting of the stage 3 frequency rate-of-change protection The logic setting of the stage 3 frequency rate-of-change protection
-10~10Hz/s
0.001s
0~1
1
0x7FFFFFFF
the
stage
4
frequency
rate-of-change protection The pickup frequency setting of the stage 4 frequency rate-of-change protection The time setting of the stage 4 frequency rate-of-change protection The logic setting of the stage 4 frequency rate-of-change protection
-10~10Hz/s
1 0.001 Hz/s
45~65Hz
0.001Hz
0~100s
0.001s
0~1
1
The output matrix setting of the stage 4 frequency
0x00000000 ~
rate-of-change protection
0x7FFFFFFF
3-50
Hz/s
0~100s
rate-of-change protection of
0.001
0.001Hz
0x00000000 ~
setting
1
45~65Hz
The output matrix setting of the stage 3 frequency The
Hz/s
0~100s
rate-of-change protection of
0.001
0.001Hz
0x00000000 ~
setting
1
45~65Hz
The output matrix setting of the stage 2 frequency The
Hz/s
45~65Hz
The output matrix setting of the stage 1 frequency The
0.001
1
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3.17 Auto-recloser 3.17.1 Auto-recloser Theory This relay can support up to 4-shot auto-recloser. This relay will initiate the auto-recloser for fault clearance by the phase overcurrent protection, the earth fault protection etc. (which can be configured through PCS-PC). An auto-reclosing cycle can be internally initiated by operation of a protection element or externally by a separate protection device, provided the circuit breaker (CB) is closed until the instant of protection operation. At the end of the dead time of each shot, if all the auto-reclosing conditions are satisfied, a circuit breaker close signal is given. The auto-reclosing output time pulse width is configurable through the setting [79.t_DDO_AR]. The system conditions to be met for closing are that the system voltages are in synchronism or dead line/live busbar or live line/dead busbar conditions exist, indicated by the internal check synchronism element and that the circuit breaker closing spring, or other energy source, is fully charged indicated from the binary input [BI_LowPres_Cls]. The CB close signal is cut-off when the circuit breaker is closed. If the CB position check function is enabled (the setting [79.En_FailChk] is set as “1”), the auto-recloser detects the CB position in the period [79.t_Fail] after the auto-reclosing command is issued. If the CB closed position condition is not met in the period [79.t_Fail], the auto-recloser can not operate successfully, and the signal [79.Fail] will be issued. When the auto-reclosing command is issued, the reclaim timer starts. If the circuit breaker does not trip again, the auto-recloser resets at the end of the reclaim time. If the protection operates during the reclaim time delay [79.t_Reclaim], this relay either advances to the next shot in the programmed auto-reclosing cycle, or it goes to lockout if all programmed reclose attempts have been made. The reclaim time should be set long enough to allow this relay to operate when the circuit breaker is automatically closed onto a fault. If any blocking condition is met in the process of the auto-recloser, the auto-recloser will be blocked at once. And if any shot of the auto-recloser can not operate successfully, the signal [79.Fail] will be issued. z
Single-shot Reclosing When a trip signal is programmed to initiate the automatic reclosing system, the appropriate automatic reclosing program will be executed. Once the circuit breaker has opened, a dead time interval in accordance with the type of fault is started. Once the dead time interval has elapsed, a closing signal is issued to reclose the circuit breaker. If the fault is cleared, the reclaim time expires and the automatic reclosing is reset in anticipation of a future fault. The fault is cleared. If the fault is not cleared, then a final tripping signal is initiated by one or more protective elements.
z
Multi-shot Reclosing
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This relay permits up to 4 shots of reclosing. The shot number of reclosing can be set. The first reclose cycle is, in principle, the same as the single-shot auto-reclosing. If the first reclosing attempt is unsuccessful, this does not result in a final trip, but in a reset of the reclaim time interval and start of the next reclose cycle with the next dead time. This can be repeated until the shot number of reclosing has been reached. If one of the reclosing attempts is successful, i.e. the fault disappeared after reclosing, the reclaim time expires and the automatic reclosing system is reset. The fault is terminated. If none of the reclosing attempts is successful, then a final circuit breaker trip will take place after the last allowable reclosing attempt has been performed by the protection function. All reclosing attempts were unsuccessful. After the final circuit breaker trip, the automatic reclosing system is dynamically blocked. An example of a timing diagram for a successful second reclosing is shown as below.
Figure 3.17-1 Timing diagram for a successful second reclosing
An example of a timing diagram for an unsuccessful one-shot reclosing is shown as below.
Figure 3.17-2 Timing diagram for an unsuccessful one-shot reclosing 3-52
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The logic diagram of the auto-recloser is shown in Figure 3.17-3. [79.En] [79.En1] [79.Ready] [79.Blk]
[79.Inprog]
25A.Ok_SynChk
&
[79.En_SynChk] 25A.Ok_DdChk [79.En_DdChk] [79.OnLoad] [79.Init]
[79.N_Rcls] = 1
[79.N_Rcls] = 2
[79.N_Rcls] = 3
[79.N_Rcls] = 4
& &
tAR1
0
[79.Close_3PS1]
&
tAR2
0
[79.Close_3PS2]
&
tAR3
0
[79.Close_3PS3]
&
tAR4
0
[79.Close_3PS4]
Figure 3.17-3 Logic diagram of the auto-recloser
Where: “tARX” (x: 1~4) is the setting [79.t_3PSx] (x: 1~4), the time setting of the auto-recloser; [79.En] is the logic setting of the auto-recloser; [79.N_Rcls] is the shot number of the auto-recloser; [79.Ready] denotes that the auto-recloser is ready for operation; [79.En1] is the binary signal for enabling the auto-recloser; [79.Blk] is the binary signal for blocking the auto-recloser; [79.En_SynChk] is the logic setting of the synchronism check mode of the auto-recloser; [79.En_DdChk] is the logic setting of the dead check mode of the auto-recloser; “25A.Ok_SynChk” is the result of the synchronism check of the auto-recloser; “25A.Ok_DdChk” is the result of the dead check of the auto-recloser; [79.OnLoad] denotes that anyone of the phase currents is greater than 0.04In, which can be gotten the signal “Prot.OnLoad” through the PCS-PC; [79.Init] is the auto-recloser initiation signal which can be configured through the PCS-PC.
3.17.2 Auto-recloser Ready Conditions When the auto-recloser is enabled, and if all the following cases are ready in normal operation situation, the auto-recloser will be in service automatically after the predefined time setting. 3-53
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1.
The CB is closed manually (local or remote) and the CB normal close contact (BI_52b) is “0”.
2.
Any protection element is not in startup status; i.e. the fault detector does not operate: when the CB is closed, if the fault detector is operated, it means that the CB is closed onto an abnormal system or a fault system.
3.
The blocking signal of the auto-recloser “79.Blk” is “0”; that is no blocking auto-recloser condition is met.
4.
The binary input of the operation circuit status of the CB (BI_LowPres_Cls) is “0”; i.e. the CB is ready for reclosing.
If the auto-recloser is ready, there is a full charged battery sign on the right bottom of LCD. The logic diagram of the auto-recloser ready conditions is shown as below. [BI_52b]
tCBCls 100ms
&
[FD.Pkp] [BI_LowPres_Cls] [79.Blk]
tCBRdy 0
0 tPWBlk
&
79.Ready
&
[79.En] [79.En1]
Figure 3.17-4 Logic diagram of the auto-recloser ready conditions
Where: [79.En] is the logic setting of the auto-recloser; [79.En1] is the binary signal for enabling the auto-recloser; [BI_52b] is the binary input for inputting the normal close contact of the circuit breaker; [FD.Pkp] means that the fault detector is operated; [BI_LowPres_Cls] is the binary input for inputting the CB closing low pressure signal; [79.Blk] is the binary signal for blocking the auto-recloser; “tCBCls” is the setting [79.t_CBClsd] of the minimum time delay for ensuring the CB is closed; “tCBRdy” is the setting [79.t_CBReady] of the time delay for ensuring the CB is ready; “tPWBlk” is the setting [79.t_DDO_BlkAR] of the pulse width for ensuring the AR blocking signal.
3.17.3 Auto-recloser Startup Condition The startup condition of the auto-recloser is that anyone of the protective elements (for example, the overcurrent protection, zero sequence overcurrent protection etc.) which are configured for initiating the auto-recloser through the PCS-PC configuration tool auxiliary software has operated successfully. The auto-reclosing startup logic diagram is shown in Figure 3.17-3. To prevent the auto-reclosing 3-54
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startup element from undesired operation, this relay takes the currents into account (the signal [79.OnLoad]). Only when the circuit breaker has tripped completely, the auto-recloser will be put into service.
3.17.4 Auto-recloser Check Mode Three check modes are adopted in this relay: synchronism check mode, dead check mode and non-check mode. Each mode can be selected through a corresponding logic setting. z
Synchronism check mode The following conditions must be satisfied in the synchro check auto-reclosing function. 1.
The protection voltage is greater than the setting [25.U_Lv];
2.
The synchro-check voltage is greater than [25.U_Lv] / [25.U_Comp];
3.
The voltage difference between the protection voltage and the synchro-check voltage (ΔU = |UProt - USyn × [25.U_Comp]|) is less than the setting [25A.U_Diff];
4.
The frequency of protection voltage and the frequency of synchro-check voltage are in the range fn ± 5Hz (fn: the rated system frequency);
5.
The frequency difference between the protection voltage and the synchro-check voltage (Δf = |fProt - fSyn|) is less than the setting [25A.f_Diff];
6.
The phase angle difference between the protection voltage and the synchro-check voltage (Δδ = |ΦProt – (ΦSyn + [25.phi_Comp])|) is less than the setting [25A.phi_Diff].
For the details about the settings [25.U_Comp] and [25.phi_Comp], see Section 7.4.1. If the above conditions are satisfied at the same time for longer than [25A.t_SynChk], the signal of the synchronism check of the auto-recloser “25A.Ok_SynChk” is issued. When the reclosing operation is executed, this relay checks the synchronism check closing conditions in the period of the setting [25A.t_Wait]. If the synchro check closing conditions are satisfied, this relay will issue the reclosing command. The logic diagram of the synchronism check element for the auto-recloser is shown as below.
Figure 3.17-5 Logic diagram of the synchronism check element for AR
Where: “UProt” is the protection voltage value; “USyn” is the synchro-check voltage; “ΔU” is the voltage difference of the protection voltage and the synchro-check voltage; 3-55
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“Δf” is the frequency difference of the protection voltage and the synchro-check voltage; “Δδ” is the angle difference of the protection voltage and the synchro-check voltage; [25.U_Lv] is the voltage setting of the live voltage; [25A.U_Diff] is the voltage difference setting of the synchronism check function for the auto-recloser; [25A.f_Diff] is the frequency difference setting of the synchronism check function for the auto-recloser; [25A.phi_Diff] is the phase angle difference setting of the synchronism check function for the auto-recloser; “tARSynChk” is the setting [25A.t_SynChk], the time setting of the synchronism check function for the auto-recloser. z
Dead check mode In dead check mode case, the relay checks the protection voltage and synchro-check voltage. There are several kinds of dead check modes which are supported in this relay and the dead check mode can be selected according to the demands of a practical engineering by the setting [25A.Opt_DdChk]. The relationship between the setting [25A.Opt_DdChk] and the dead check mode is listed in following table. [25A.Opt_DdChk]
Description of Dead Check Mode
1
The protection voltage is dead, and the synchro-check voltage is dead.
2
The protection voltage is dead, and the synchro-check voltage is live.
3
The protection voltage is live, and the synchro-check voltage is dead.
4
The protection voltage is dead, the synchro-check voltage is live or dead.
5
The synchro-check voltage is dead, the protection voltage is live or dead.
6
One of the two voltages is live, another one is dead.
7
One of the two voltages is dead, another one is live or dead.
The logic diagram of the dead check element for the auto-recloser is shown as below.
Figure 3.17-6 Logic diagram of the dead check element for AR
Where: “UProt” is the protection voltage value; 3-56
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“USyn” is the synchro-check voltage value; [25.U_Dd] the voltage setting for denoting whether the system is dead; [25.U_Lv] the voltage setting for denoting whether the system is live; “tARDdChk” is the setting [25A.t_DdChk], the time setting of the dead check function for the auto-recloser; [25A.Opt_DdChk] is the setting for selecting the dead check mode of the auto-recloser. z
Non-check mode In non-check mode case, the reclosing is permitted without taking the value, phase angle and frequency of the two voltages into account. After the reclosing delay time, this relay will issue a reclosing signal, if all the other reclosing conditions are ready.
If the two settings [79.En_SynChk] and [79.En_DdChk] are set as “0”, the non-check mode will be in service. If one of the two settings [79.En_SynChk] and [79.En_DdChk] is set as “1”, the relevant reclosing check mode will be in service. If the two settings [79.En_SynChk] and [79.En_DdChk] are set as “1” together, the two reclosing check modes will be in service; and if anyone of the reclosing check modes is met, the corresponding check output is for the auto-reclosing.
3.17.5 Auto-recloser Blocking Logic After the auto-recloser is put into service successfully, and if anyone of the following cases occurs at anytime in normal operation situation, the relay will block the auto-recloser automatically at once. 1.
Open the circuit breaker by manual tripping.
2.
Open the circuit breaker by remote tripping.
3.
The VT failure occurs and it is detected by the relay ([VTS.Alm_SynVT] = 1 or [VTS.Alm] = 1), if the reclosing check mode is dead check mode.
4.
The blocking signal of the auto-recloser “79.Blk” is “1”; that is at least one of the blocking auto-recloser conditions is met. The blocking auto-recloser conditions can be configured for blocking the auto-recloser through the PCS-PC configuration tool auxiliary software
5.
The binary input of the closing operation circuit status of the CB (BI_LowPres_Cls) is “1”; i.e. the CB is not ready for reclosing ([BI_LowPres_Cls] = 1).
6.
The last auto-reclosing command has been issued successfully.
If the auto-recloser is blocked, there is an empty battery sign on the right bottom of LCD.
3.17.6 Auto-recloser Settings All the settings of the auto-recloser are listed in the following table. For the information about the common explanation of the settings, see Section 7.3.
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Menu text
1
79.t_CBClsd
2
79.t_DDO_BlkAR
3
79.t_CBReady
4
79.t_Fail
5
79.t_3PS1
6 7
79.t_3PS2 79.t_3PS3
Explanation The time setting of the minimum time delay for ensuring the CB is closed The time pulse width for ensuring the AR blocking signal The time setting of the time delay for ensuring the CB is ready The time setting of the time delay for checking the CB position The time setting of the 1st shot auto-recloser nd
The time setting of the 2
Range
Step
0.01~600s
0.001s
0.01~600s
0.001s
0.01~600s
0.001s
0.01~600s
0.001s
0~600s
0.001s
shot auto-recloser
0~600s
0.001s
rd
The time setting of the 3 shot auto-recloser
0~600s
0.001s
th
8
79.t_3PS4
The time setting of the 4 shot auto-recloser
0~600s
0.001s
9
79.t_Reclaim
The reclaim time setting of the auto-recloser
0~600s
0.001s
10
79.t_DDO_AR
The pulse width of the auto-recloser
0-4.00s
0.001s
11
79.N_Rcls
The shot number setting of the auto-recloser
1~4
1
12
79.En_SynChk
0~1
1
13
79.En_DdChk
0~1
1
14
79.En_FailChk
0~1
1
15
79.En
The logic setting of the auto-recloser
0~1
1
16
79.OutMap
The output matrix setting of the auto-recloser
The logic setting of the synchronism check function of the auto-recloser The logic setting of the dead check function of the auto-recloser The logic setting of the CB position check function of the auto-recloser
0x00000000 ~ 0x7FFFFFFF
1
The settings about the check function of the auto-recloser are listed in the following table. For the information about the common explanation of the settings, see Section 7.4. No.
Menu text
Explanation
Range
Step
1
25.U_Dd
The voltage setting of the system dead check
2~120V
0.001V
2
25.U_Lv
The voltage setting of the system live check
2~120V
0.001V
3
25.U_Comp
0.2~5.0
0.001
4
25.phi_Comp
0~360°
1°
5
25.Opt_Usyn
0~5
1
6
25.t_ClsCB
0.02~1.00s
0.001s
7
25A.U_Diff
2~120V
0.001V
8
25A.f_Diff
0~2Hz
0.001Hz
The compensation coefficient setting of the synchro-check voltage The compensation phase angle setting of the synchro-check voltage The voltage type setting of the synchronism check closing function The circuit breaker closing time setting of the closing synchronism check function The voltage difference setting of the auto-closing synchronism check function The
frequency
difference
setting
auto-closing synchronism check function
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3 Operation Theory 9
25A.phi_Diff
10
25A.t_Wait
11
25A.Opt_DdChk
12
25A.t_DdChk
13
25A.t_SynChk
The phase angle difference setting of the auto-closing synchronism check function The waiting time setting of the auto-closing synchronism check function The setting for selecting the dead check mode of the auto-closing synchronism check function The time setting of the dead check function of the auto-closer The time setting of the synchronism check function of the auto-closer
0~60°
1°
0.01~60s
0.001s
1~7
1
0.01~25s
0.001s
0.01~25s
0.001s
3.18 Manual Closing Function 3.18.1 Manual Closing Theory This relay supports manual closing function (local or remote closing). The manual closing can be initiated a local input signal (through a binary input or the control panel) or remote closing signal from a supervision and control system (SAS, SCADA). Three check modes described below can be selected for the manual closing function. The logic diagram of the manual closing function is shown as below.
Figure 3.18-1 Logic diagram of the manual closing function
Where: “ManCls_Cmd” is the manual closing command; “25M.Ok_SynChk” is the result of the synchronism check of the manual closing function; “25M.Ok_DdChk” is the result of the dead check of the manual closing function; “25M.BI_EnSynChk” is the binary input for enabling the synchronism check mode, and it can be configured through the PCS-PC configuration tool auxiliary software; “25M.BI_EnDdChk” is the binary input for enabling the dead check mode, and it can be configured through the PCS-PC configuration tool auxiliary software; [25M.En_SynChk] is the logic setting of the synchronism check of the manual closing; [25M.En_DdChk] is the logic setting of the dead check of the manual closing.
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3.18.2 Check Mode for Manual Closing Function This relay provides three check modes for the manual closing function (local or remote closing): synchronism check mode, dead check mode and non-check mode. Each mode can be selected through the relevant logic settings. z
Synchronism check mode The following conditions must be satisfied in the synchro check manual closing function. 1.
The protection voltage is greater than the setting [25.U_Lv];
2.
The synchro-check voltage is greater than [25.U_Lv] / [25.U_Comp];
3.
The voltage difference between the protection voltage and the synchro-check voltage (ΔU = |UProt - USyn × [25.U_Comp]|) is less than the setting [25M.U_Diff];
4.
The frequency of protection voltage and the frequency of synchro-check voltage are in the range fn ± 5Hz (fn: the rated system frequency);
5.
The frequency difference between the protection voltage and the synchro-check voltage (Δf = |fProt - fSyn|) is less than the setting [25M.f_Diff];
6.
The rate-of-change of the frequency difference (dΔf/dt) is less than the setting [25M.df/dt] to decrease the disturbance to the power system when the CB is closed;
7.
The phase angle difference between the protection voltage and the synchro-check voltage (Δδ = |ΦProt – (ΦSyn + [25.phi_Comp])|) is less than the setting [25M.phi_Diff].
For the details about the settings [25.U_Comp] and [25.phi_Comp], see Section 7.4.1. If the above conditions are satisfied at the same time, the signal of the synchronism check of the manual closing “25M.Ok_SynChk” is issued. When the manual closing operation is executed, this relay checks synchronism check closing conditions in the period of the setting [25M.t_Wait]. If the synchro check closing conditions are satisfied, this relay will issue the closing command. The logic diagram of the manual closing synchronism check element is shown as below.
Figure 3.18-2 Logic diagram of the synchronism check element for manual closing
Where: “UProt” is the protection voltage value; “USyn” is the synchro-check voltage value; 3-60
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“ΔU” is the voltage difference of the protection voltage and the synchro-check voltage; “Δf” is the frequency difference of the protection voltage and the synchro-check voltage; “dΔf/dt” is the rate-of-change of the frequency difference; “Δδ” is the angle difference of the protection voltage and the synchro-check voltage; [25.U_Lv] is the voltage setting of the live voltage; [25M.U_Diff] is the voltage difference setting of the synchronism check function for the manual closing; [25M.f_Diff] is the frequency difference setting of the synchronism check function for the manual closing; [25M.df/dt] is the frequency rate-of-change setting of the synchro check closing function for the manual closing; [25M.phi_Diff] is the phase angle difference setting of the synchronism check function for the manual closing. z
Dead check mode In dead check mode case, the relay checks the protection voltage and synchro-check voltage. There are several kinds of dead check modes which are supported in this relay and the dead check mode can be selected according to the demands of a practical engineering by the setting [25M.Opt_DdChk]. The relationship between the setting [25M.Opt_DdChk] and the dead check mode is listed in following table. [25M.Opt_DdChk]
Description of Dead Check Mode
1
The protection voltage is dead, and the synchro-check voltage is dead.
2
The protection voltage is dead, and the synchro-check voltage is live.
3
The protection voltage is live, and the synchro-check voltage is dead.
4
The protection voltage is dead, the synchro-check voltage is live or dead.
5
The synchro-check voltage is dead, the protection voltage is live or dead.
6
One of the two voltages is live, another one is dead.
7
One of the two voltages is dead, another one is live or dead.
The logic diagram of the manual closing dead check element is shown as below.
Figure 3.18-3 Logic diagram of the dead check element for manual closing
Where:
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“Ubus” is the protection voltage value; “Uline_comp” is the synchro-check voltage value; [25.U_Dd] the voltage setting for denoting whether the system is dead; [25.U_Lv] the voltage setting for denoting whether the system is live; [25M.Opt_DdChk] is the setting for selecting the dead check mode of the manual closing. z
Non-check mode In non-check mode case, the manual closing is permitted without taking the value, phase angle and frequency of the two voltages into account. If all the other manual closing conditions are ready, this relay will issue a manual closing signal.
If the two settings [25M.En_SynChk] and [25M.En_DdChk] are set as “0”, the non-check mode will be in service. If one of the two settings [25M.En_SynChk] and [25M.En_DdChk] is set as “1”, the relevant manual closing check mode will be in service. If the two settings [25M.En_SynChk] and [25M.En_DdChk] are set as “1” together, the two manual closing check modes will be in service; and if anyone of the manual closing check modes is met, the corresponding check output is for the manual closing.
3.18.3 Manual Closing Function Settings All the settings of the closing synchronism check function are listed in the following table. For the information about the common explanation of the settings, see Section 7.4. No.
Menu text
Explanation
Range
Step
1
25.U_Dd
The voltage setting of the system dead check
2~120V
0.001V
2
25.U_Lv
The voltage setting of the system live check
2~120V
0.001V
3
25.U_Comp
0.2~5.0
0.001
4
25.phi_Comp
0~360°
1°
5
25.Opt_Usyn
0~5
1
6
25.t_ClsCB
0.02~1.00s
0.001s
7
25M.U_Diff
2~120V
0.001V
8
25M.f_Diff
0~2Hz
0.001Hz
9
25M.df/dt
10
25M.phi_Diff
11
25M.t_Wait
The compensation coefficient setting of the synchro-check voltage The compensation phase angle setting of the synchro-check voltage The voltage type setting of the synchronism check closing function The circuit breaker closing time setting of the closing synchronism check function The voltage difference setting of the manual closing synchronism check function The frequency difference setting of the manual closing synchronism check function The frequency rate-of-change setting of the manual closing synchronism check function The phase angle difference setting of the manual closing synchronism check function The waiting time setting of the manual closing synchronism check function
3-62
0~3Hz/s
0.001 Hz/s
0~60°
1°
0.01~60s
0.001s
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3 Operation Theory 12
25M.Opt_DdChk
13
25M.En_SynChk
14
25M.En_DdChk
The setting for selecting the dead check mode of the manual closing function The logic setting of the synchronism check function of the manual closing function The logic setting of the dead check function of the manual closing function
1~7
1
0~1
1
0~1
1
3.19 Mechanical Protection 3.19.1 Mechanical Protection Theory This relay can provide up to 4 programmable binary inputs for mechanical protection. If a binary input which is used as a mechanical protection input is energized, this relay will issue an operation signal after a predefined time delay. The following figure shows the logic diagram of the No.1 mechanical protection. Other mechanical protections have the same functional logic with the No.1 mechanical protection.
Figure 3.19-1 Logic diagram of the No.1 mechanical protection
Where: [MR1.Input] is the mechanical protection input signal which can be from a binary input; “tMR1” is the setting [MR1.t_Op], the time setting of the No.1 mechanical protection; [MR1.En] is the logic setting of the No.1 mechanical protection; [MR1.En1] is the binary signal for enabling the No.1 mechanical protection; [MR1.Blk] is the binary signal for blocking the No.1 mechanical protection.
3.19.2 Mechanical Protection Settings All the settings of the mechanical protection are listed in the following table. For the information about the common explanation of the settings, see Section 7.3. No.
Menu text
1
MR1.t_MR
2
MR1.En
3
MR1.OutMap
Explanation The
time
setting
of
the
Range No.1
mechanical
protection The logic setting of the No.1 mechanical protection
Step
0~4000s
0.001s
0~1
1
The output matrix setting of the No.1 mechanical
0x00000000 ~
protection
0x7FFFFFFF
1
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MR2.t_MR
5
MR2.En
6
MR2.OutMap
7
MR3.t_MR
8
MR3.En
9
MR3.OutMap
10
MR4.t_MR
11
MR4.En
12
MR4.OutMap
The
time
setting
of
the
No.2
mechanical
protection The logic setting of the No.2 mechanical protection
0~4000s
0.001s
0~1
1
The output matrix setting of the No.2 mechanical
0x00000000 ~
protection
0x7FFFFFFF
The
time
setting
of
the
No.3
mechanical
protection The logic setting of the No.3 mechanical protection
0~4000s
0.001s
0~1
1
The output matrix setting of the No.3 mechanical
0x00000000 ~
protection
0x7FFFFFFF
The
time
setting
of
the
No.4
mechanical
protection The logic setting of the No.4 mechanical protection
1
0~4000s
0.001s
0~1
1
The output matrix setting of the No.4 mechanical
0x00000000 ~
protection
0x7FFFFFFF
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1
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4 Supervision
4 Supervision Table of Contents 4.1 Overview ...........................................................................................................4-1 4.2 Supervision Functions.....................................................................................4-1 4.2.1 Device Hardware Supervision............................................................................................ 4-1 4.2.2 Board Configuration Error Supervision .............................................................................. 4-1 4.2.3 Setting Supervision ............................................................................................................ 4-1 4.2.4 Program Version Supervision ............................................................................................ 4-2 4.2.5 Tripped Position Contact Supervision ................................................................................ 4-2 4.2.6 Low Pressure Binary Input Supervision ............................................................................. 4-2 4.2.7 VT Circuit Supervision ....................................................................................................... 4-2 4.2.8 CT Circuit Supervision ....................................................................................................... 4-4 4.2.9 Thermal Overload Supervision .......................................................................................... 4-5 4.2.10 Time Synchronization Supervision................................................................................... 4-5 4.2.11 Auxiliary Communication Testing Supervision .................................................................. 4-5 4.2.12 Device Maintenance Supervision..................................................................................... 4-5 4.2.13 Reserved Programmable Alarm Supervision ................................................................... 4-5 4.2.14 Tripping Circuit Supervision ............................................................................................. 4-5
List of Figures Figure 4.2-1 Logic diagram of the 52b contact supervision element ................................... 4-2 Figure 4.2-2 Logic diagram of the protection VTS element................................................... 4-3 Figure 4.2-3 Logic diagram of the synchro-check VTS element........................................... 4-4 Figure 4.2-4 Logic diagram of the CTS element..................................................................... 4-4 Figure 4.2-5 Principle of the TCS function with two binary inputs ....................................... 4-6
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4 Supervision
4-b
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4 Supervision
4.1 Overview Though the protection system is in non-operating state under normal conditions, it is waiting for a power system fault to occur at any time and must operate for the fault without fail. When the equipment is in energizing process before the LED “HEALTHY” is on, the equipment needs to be checked to ensure there are no errors. Therefore, the automatic supervision function, which checks the health of the protection system during startup and normal operation procedure, plays an important role. The numerical relay based on the microprocessor operations has the capability for implementing this automatic supervision function of the protection system. In case a fatal fault is detected during automatic supervision, the equipment will be blocked out. It means that this relay is out of service. Therefore you must re-energize the relay or even replace a module to make this relay back into service.
4.2 Supervision Functions 4.2.1 Device Hardware Supervision The MCU, RAM, ROM chips in this relay are monitored continuously to ensure whether they are damaged or have some errors. If any one of them is detected damaged or having error, this relay will be blocked, the alarm signal [Fail_Device] will be issued, and the LED indicator “HEALTHY” will be off at the same time.
4.2.2 Board Configuration Error Supervision If the board configuration of this relay does not comply with the program software of this relay, the alarm signals [Fail_Device] and [Fail_BoardConfig] will be issued, and the LED indicator “HEALTHY” will be off at the same time.
4.2.3 Setting Supervision This relay has 10 setting groups, but only one is active at any time. The settings of active setting group are checked continuously. If anyone of the active settings is confirmed to be modified, this relay will be blocked, the alarm signals [Fail_Device] and [Fail_Setting] will be issued; meanwhile, if the modified setting is out of the appointed range, the alarm signal [Fail_Setting_OvRange] will be issued at the same time. The LED indicator “HEALTHY” will be off at the same time. If anyone of the items of the setting file is changed (the program of this relay is updated), the alarm signal [Fail_SettingItem_Chgd] will be issued. The LED indicator “HEALTHY” will be off at the same time. The items of the setting include the setting number, the setting name, the setting range, the setting step etc.
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If the settings which are from the HMI module to the main CPU module are not in accordance with the current settings of the main CPU module, the alarm signal [Alm_Setting_MON] will be issued. The LED indicator “ALARM” will be on at the same time. If the setting group number which is indicated through the dedicated binary inputs is not in accordance with the current setting group number, the alarm signal [Alm_BI_SettingGrp] will be issued. The LED indicator “ALARM” will be on at the same time.
4.2.4 Program Version Supervision If the relay detects that the current program version is not in accordance with the program version which is defined by the manufacturer, the alarm signal [Alm_Version] will be issued. The LED indicator “ALARM” will be on at the same time.
4.2.5 Tripped Position Contact Supervision If the relay detects that the tripped auxiliary contact position is on (i.e., the value of [BI_52b] is “1”.), meanwhile any phase current is greater than 0.04In, and such a condition keeps for longer than 10 seconds, the alarm signals [Alm_Device] and [Alm_52b] will be issued, and the LED indicator “ALARM” will be on at the same time. The logic diagram of the tripped position contact supervision function is shown as below. Ia > 0.04In
Prot.OnLoad
Ib > 0.04In Ic > 0.04In Prot.OnLoad
&
10s
0
[Alm_52b]
[BI_52b]
Figure 4.2-1 Logic diagram of the 52b contact supervision element
4.2.6 Low Pressure Binary Input Supervision This relay has two binary inputs [BI_LowPres_Cls] and [BI_LowPres_Trp] which are used to indicate the state of the circuit breaker mechanism. If the binary input [BI_LowPres_Cls] is energized for longer than 15s, this relay will issue the alarm signals [Alm_Device] and [Alm_LowPres_Cls]; and the LED indicator “ALARM” will be on at the same time. The auto-recloser and the first remote closing output functions are blocked. If the binary input [BI_LowPres_Trp] is energized for longer than 5s, this relay will issue the alarm signals [Alm_Device] and [Alm_LowPres_Trp] 5s later, and the LED indicator “ALARM” will be on at the same time. The first remote tripping output function is blocked.
4.2.7 VT Circuit Supervision The voltage transformer supervision (VTS) feature is used to detect failure of the AC voltage input circuit of this relay. The VTS logic in the relay is designed to detect the voltage failure and automatically adjust the configuration of protective elements whose stability would otherwise be compromised. A time 4-2
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4 Supervision
delay alarm output is also available. z
Protection VT supervision If this relay detects any one of the following two conditions is satisfied, it means that the protection VT is in abnormal status. (1) The negative phase sequence voltage is greater than 8V. (2) The positive phase sequence voltage is less than 30V, and any of the phase currents is greater than 0.04In. Then the alarm signals [Alm_Device] and [VTS.Alm] are issued 10s later, and the LED “ALARM” will be on at the same time. When the protection VT status returns to normal condition, the alarm will restore automatically 1.25s later. In case the protection VT circuit is failed, these protective elements dependent on voltage will be blocked. If the fast VT failure is detected, the internal signal “VTS.InstAlm” will be “1” without any time delay. In the fast VTS element, the phase current or the negative sequence current must be taken into account. The logic diagram of the protection VTS element is shown as below.
Figure 4.2-2 Logic diagram of the protection VTS element
Where: “Prot.OnLoad” is the signal for denoting the system is on load state; [VTS.En] is the logic setting of the protection VTS function; [VTS.I_Set] is the phase current setting of the protection VTS function; [VTS.I2_Set] is the negative sequence current setting of the protection VTS function; [Sig_MCB_VTS] is the VT supervision input from VT’s miniature circuit breaker (MCB) auxiliary contact which shows the MCB whether is opened. z
Synchro-check VT supervision This function is used to supervise the synchro-check voltage transformer circuit. When the setting [VTS.En_SynVT] is set as “1”, if the difference between the measured synchro-check voltage (“Ux”) and the setting [Syn.U2n] is greater than 15V for longer than 10s, the alarm
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4 Supervision
signals [Alm_Device] and [VTS.Alm_SynVT] will be issued, and the LED “ALARM” will be on at the same time. When the status of the synchro-check VT returns to normal condition, the alarm will restore automatically 1.25s later. [79.En_SynChk] [79.En_DdChk] |Ux – [Syn.U2n]| > 15V
&
10s
0
[VTS.Alm_SynVT]
[VTS.En_SynVT]
Figure 4.2-3 Logic diagram of the synchro-check VTS element
Where: [VTS.En_SynVT] is the logic setting of the synchro-check VTS function; [79.En_SynChk] is the logic setting of the synchronism check mode of the auto-recloser; [79.En_DdChk] is the logic setting of the dead check mode of the auto-recloser.
4.2.8 CT Circuit Supervision The main purpose of the current transformer supervision (CTS) function is to detect faults in the secondary circuits of the current transformer and avoid influence on the operation of relevant protection functions. This current transformer supervision (CTS) function will be in operation at any time, whether the general fault detection picks up or not. The criteria of the CTS element are: 1.
The calculated zero sequence current is greater than the setting [CTS.3I0_Set];
2.
The calculated zero sequence voltage is less than the setting [CTS.3U0_Set].
If a CT circuit failure is detected, the alarm signals [Alm_Device] and [CTS.Alm] will be issued, and the LED indicator “ALARM” will be on at the same time. If the fast CT circuit failure is detected, the internal signal [CTS.InstAlm] will be “1” without any time delay. The logic diagram of the CTS element is shown as below.
Figure 4.2-4 Logic diagram of the CTS element
Where: [CTS.3I0_Set] is the threshold current setting of the CTS element; [CTS.3U0_Set] is the threshold voltage setting of the CTS element; [CTS.En] is the logic setting of the CTS element. 4-4
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4 Supervision
If there has no phase current to be led to this relay, the setting [CTS.En] must be set as “0”.
4.2.9 Thermal Overload Supervision See Section 3.4 for the details. When the thermal overload alarm situation is detected, the alarm signals [Alm_Device] and [49.Alm] will be issued, and the LED indicator “ALARM” will be on at the same time.
4.2.10 Time Synchronization Supervision If the time synchronization function is enabled in this relay, but this relay detects the time synchronization is not correct, the alarm signals [Alm_Device] and [Alm_TimeSync] will be issued and the LED indicator “ALARM” will be on at the same time.
4.2.11 Auxiliary Communication Testing Supervision If this relay is in the auxiliary communication testing of binary signal or metering, the alarm signals [Alm_Device] and [Alm_CommTest] will be issued and the LED indicator “ALARM” will be on at the same time.
4.2.12 Device Maintenance Supervision If this relay is in the maintenance situation (the binary input which is used for denoting maintenance situation is energized), the alarm signals [Alm_Device] and [Alm_Maintenance] will be issued and the LED indicator “ALARM” will be on at the same time.
4.2.13 Reserved Programmable Alarm Supervision The relay provides several reserved programmable alarm signals which can be programmed through the PCS-PC configuration tool auxiliary software according to the engineering demands. When the relay detects anyone of the reserved programmable alarms is trigged, the alarm signals [Alm_Device] and [Alm_ResvX] (X: a number; 1, 2 etc.) will be issued and the LED indicator “ALARM” will be on at the same time.
4.2.14 Tripping Circuit Supervision The tripping circuit supervision function can be realized by program the logic function of this device through the PCS-PC configuration tool auxiliary software according to the practical application experience of the user. In this manual, a scheme which uses two independent binary inputs to supervise the tripping circuit is recommended. The following figure show the recommended scheme for tripping circuit supervision and the logic diagram of the TCS function.
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4 Supervision
Figure 4.2-5 Principle of the TCS function with two binary inputs
Where: “BTJ” is the protection tripping output contact; “TC” is the tripping coil of the circuit breaker; [B07.BI_01] is the binary input which is parallel connected with “BTJ”; [B07.BI_02] is the binary input which is serial connected with the “52b” contact.
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5 Management Function
5 Management Function Table of Contents 5.1 Overview ...........................................................................................................5-1 5.2 Measurement ....................................................................................................5-1 5.2.1 Protection Sampling........................................................................................................... 5-1 5.2.2 Metering............................................................................................................................. 5-1
5.3 Circuit Breaker Control ....................................................................................5-1 5.4 Signaling ...........................................................................................................5-2 5.5 Event Recording...............................................................................................5-2 5.6 Fault and Disturbance Recording ...................................................................5-3 5.7 Setting Group Switch Function.......................................................................5-3
List of Figures Figure 5.3-1 Demonstration diagram of the control function................................................ 5-2
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5 Management Function
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5 Management Function
5.1 Overview The relay provides some management functions, such as protection sampling, metering, remote control, signaling, event recording and fault & disturbance recording etc. All these functions can ensure this relay meets the requirements of a modern power grid.
5.2 Measurement This relay produces a variety of both directly and calculated power system quantities. There are two kinds of measurements are supported in this relay: protection sampling and metering. All these measurands also can be transmitted to the SAS or RTU through communication. See Chapter 10 for more information about the communication and protocols.
5.2.1 Protection Sampling This relay samples the protection related values with 24-point sampling rate per cycle. These protection sampled values are being updated per 0.5s and can be viewed in the submenu “Measurement1” of this relay or via relay communication. See Section 8.2.3 for more details about the protection measurands.
5.2.2 Metering This relay samples the metering values with 48-point sampling rate per cycle. These metering values are being undated per 0.5s and can be viewed in the submenu “Measurement2” of this relay or via relay communication. See Section 8.2.3 for more details about the metering values.
5.3 Circuit Breaker Control This relay can receive the control commands to trip or close the circuit breaker. Up to 5 groups of output relays in this relay can be configured as control outputs (closing and tripping). And only the first closing output (local or remote) can be configured with synchronism check or dead check. The control function includes local control and remote control. The local control command can be gotten through the binary inputs or the submenu “Control” (see Section 8.2.8.4). The remote control command can be from the substation automatic system through the communication. Before executing a remote control command, it is necessary to put the control switch at the “Remote” position to make the binary signal [Ctrl.Sig_EnCtrl] be “1”. Each control output can be control with an interlock module (which can be configured through the PCS-PC) if the corresponding interlock logic setting (see Section 7.4.3) is set as “1”. If it makes the control outputs without interlock control in such a situation, the binary signal [Ctrl.Sig_Unblock] should be “1”. The remote control commands include remote tripping command, remote closing command etc. See Chapter 10 for more information about the communication and protocols. 5-1
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5 Management Function
The demonstration diagram of the control function is shown as below.
Figure 5.3-1 Demonstration diagram of the control function
5.4 Signaling This relay has some programmable binary inputs which are used to monitor the contact positions of the corresponding bay, or be used in protection logics or for releasing or blocking the relevant protective element, or be used in supervision logics calculation for supervision alarm elements The binary inputs can be configured according to the engineering demands through the PCS-PC configuration tool auxiliary software. The binary input state change confirmation time of each binary input is configurable according to practical application through the PCS-PC configuration tool auxiliary software, and the default binary input state change confirmation time of the binary inputs is 10ms. See Section 8.2.4 for more details about the binary inputs.
5.5 Event Recording This relay supports the event recording functions which can record all the events happened in this relay. So it is very convenient for the user to view the history records. The following event information can be recorded. z
64 latest protection operation reports
z
1024 latest supervision alarm records
z
1024 latest control operation records
z
1024 latest user operation records
z
1024 latest reports of time tagged sequence of event (SOE)
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5 Management Function
5.6 Fault and Disturbance Recording This relay provides the fault and disturbance recording facility for recording the sampled values of the fault and disturbance wave when a fault is occurred in the power system. The 64 latest fault and disturbance records can be recorded in this relay, and each wave record includes 5 cycles of pre-fault sampled data and most 150 cycles fault sampled data. The current and voltage sampled values, the binary input signals and the protection operation signals are contained in the fault and disturbance wave record, and the analog value sampling rate is 24 points per cycle. The format of the wave complies with the “COMTRADE” standard. There are several conditions which can trigger the fault and disturbance recording of this relay. z
The fault detector picks up.
z
Anyone of the protective elements operates.
z
Any shot of the auto-recloser operates.
z
The binary input [BI_TrigDFR] is energized.
z
The submenu “Trig Oscillograph” is executed.
Each waveform includes the wave recording data both before and after the fault. Each trigger element operation will extend the wave recording time, until the appointed time delay is over after the trigger element restores, or until the maximum number of wave recording points is reached.
5.7 Setting Group Switch Function This relay can switch the setting group number if this relay is in normal operation situation. Two fixed methods for switching the setting group number which are described in Section 8.2.6.4. Another method for changing the setting group number through two binary inputs can be supported by this relay, if this function is enabled. Two general binary inputs can be configured as signal inputs for switching the setting group number through PCS-PC configuration tool auxiliary software. This method only can switch four group of settings (1 ~ 4). Binary Code
00
01
10
11
Setting Group Number
1
2
3
4
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6 Hardware
6 Hardware Table of Contents 6.1 Overview ...........................................................................................................6-1 6.2 Basic Enclosure ...............................................................................................6-3 6.3 Human Machine Interface Module (NR4856) ..................................................6-3 6.4 Power Supply Module (NR4304)......................................................................6-3 6.5 Main CPU Module (NR4106).............................................................................6-5 6.6 Analog Input Module (NR4412)........................................................................6-7 6.6.1 Connection Examples ........................................................................................................ 6-9 6.6.2 Current Transformer Requirements ................................................................................. 6-10
6.7 Binary Output Module (NR4521) ...................................................................6-12 6.8 Binary Input Module (NR4502/NR4503/NR4504) ..........................................6-14 6.9 Network DSP Module (NR4136/NR4126).......................................................6-17 6.10 Optical Interface Extension Module (NR4202) ...........................................6-17
List of Figures Figure 6.1-1 Hardware structure of the this relay .................................................................. 6-1 Figure 6.1-2 Front panel of the this relay................................................................................ 6-2 Figure 6.1-3 Rear panel of the this relay ................................................................................. 6-2 Figure 6.2-1 Rack, back plane and slot allocation of this relay ............................................ 6-3 Figure 6.4-1 View of the power supply module ...................................................................... 6-4 Figure 6.5-1 View of the main CPU module ............................................................................ 6-6 Figure 6.6-1 View of the analog input module........................................................................ 6-7 Figure 6.6-2 Current connection examples ............................................................................ 6-9 Figure 6.6-3 Voltage connection examples........................................................................... 6-10 Figure 6.7-1 View of the binary output module .................................................................... 6-12 Figure 6.8-1 View of the binary input module....................................................................... 6-15 Figure 6.9-1 View of the network DSP module ..................................................................... 6-17 6-a
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Figure 6.10-1 View of the optical interface extension module.............................................6-18
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6 Hardware
6.1 Overview The modular design of this relay allows the relay to be easily upgraded or repaired by a qualified service person. The faceplate is hinged to allow easy access to the configurable modules, and back-plugging structure design makes it easy to repair or replace any modules. There are several types of hardware modules in this relay; each module takes a different part in this relay. The relevant modules can be selected according to the practical engineering demands. These modules which are supported in this relay and their module codes are listed as below. No.
Module Description
Module Code
Configuration
1
Human machine interface module
NR4856
Mandatory
2
Power supply module
NR4304
Mandatory
3
Main CPU module
NR4106
Mandatory
4
Analog input module
NR4412
Optional
5
Binary output module
NR4521
Optional
6
Binary input module
NR4502/NR4503/ NR4504
Optional
7
Network DSP module
NR4136/NR4126
Optional
8
Optical interface extension module
NR4202
Optional
The hardware structure of this relay is shown as below.
Figure 6.1-1 Hardware structure of the this relay
These modules can be freely equipped in the basic enclosure of this relay (see Section 6.2), and the relationship between the module and the slot number is listed as below. Module Description
Slot Number
Power supply module
Must be in the No.9 slot.
Main CPU module
Must be in the No.1 slot.
Analog input module
Must be in the No.4 and No.5 slots, if it is selected.
Binary output module
Any slot if the slot is not occupied, default is the No.6 slot.
Binary input module
Any slot if the slot is not occupied, default is the No.7 slot.
Network DSP module
Must be in the No.2 slot, if it is selected.
Optical interface extension module
Must be in the No.3 slot, if it is selected.
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The following two figures show the front panel and the rear panel of this device.
Figure 6.1-2 Front panel of the this relay
Figure 6.1-3 Rear panel of the this relay
NOTE! The hardware module configuration in above figure is only a demonstration for explaining how the hardware module is configured. The hardware module configuration can be different according to the different engineering demands, and the hardware module configuration of a practical engineering should be taken as final and binding. NOTE! The No.8 slot is reserved for some special demands, if the present hardware configuration can not meet the special demands.
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6.2 Basic Enclosure The basic enclosure of this relay is an electronic equipment rack (see Figure 6.2-1) with an adequate number of slots for all these modules. The basic rack is equipped with a back plane (mother board), and the back plane provides some back plane lines for distributing signals within the enclosure.
5
6
7
8
9
NR4304
NR4202
4
NR4503
3
NR4521
2
NR4412
1
NR4136/NR4126
Slot:
NR4106
The rack, back plane and the slot allocation of this relay is shown as below. The hardware module configuration is in accordance with the Figure 6.1-3.
Figure 6.2-1 Rack, back plane and slot allocation of this relay
6.3 Human Machine Interface Module (NR4856) The human machine interface (HMI) module is installed on the front panel of this device. It is used to observe the running status and event information on the LCD, and configure the protection settings and device operation mode. It can help the user to know the status of this relay and detailed event information easily, and provide convenient and friendly access interface for the user. Please see Chapter 8 for further details about how to access the human machine interface.
6.4 Power Supply Module (NR4304) The power supply module is a power supply converter with electrical insulation between input and output, and a maximum output power of 30W. The power supply module has an input voltage range as described in Section 2.1.1.1. The standardized output DC voltages are +3.3V, +5V, ±12V and +24V. The tolerances of the output voltages are continuously monitored. The +3.3Vdc output provides power supply for the microchip processors, and the +5Vdc output provides power supply for all the electrical elements that need +5Vdc power supply in this relay. The ±12Vdc output provides power supply for A/D conversion circuits in this device, and the +24Vdc output provides power supply for the static relays of this device. The use of an external miniature circuit breaker is recommended. The miniature circuit breaker must be in the on position when the device is in operation and in the off position when the device is in cold reserve.
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6 Hardware
The power supply module also provides binary outputs which are used to send out some necessary binary output signals according to the relevant commands from the CPU module, and these binary outputs only can be used as tripping and closing (protection, auto-recloser or remote control) outputs by setting the relevant settings. The view of the power supply module is shown in Figure 6.4-1.
NR4304 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 PWR+ 21 PWR22 GND
NR4304A
Figure 6.4-1 View of the power supply module
A 22-pin connector is fixed on the front side of this module. The terminal definition of the connector is described as below. Pin connections on the 22-pin connector of the power supply module NR4304A: Pin No.
Sign
Description
01
SIG_COM
Signal common output terminal
02
BO_Fail_Device
Failure signal output
03
BO_Alm_Device
Alarming signal output
04 05 06 07 08 09 10 11 12 13 14 15 16 17
BO_01 BO_02
The No.1 programmable tripping and closing binary output. It is also a self-latched output contact. The No.2 programmable tripping and closing binary output. It is also a self-latched output contact.
BO_03
The No.3 programmable tripping and closing binary output.
BO_04
The No.4 programmable tripping and closing binary output.
BO_05
The No.5 programmable tripping and closing binary output.
BO_06
The No.6 programmable tripping and closing binary output.
BO_07
The No.7 programmable tripping and closing binary output.
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BO_08
The No.8 programmable tripping and closing binary output.
20
PSW+
DC power supply positive input
21
PSW-
DC power supply negative input
22
GND
Grounded terminal
19
6.5 Main CPU Module (NR4106) The main CPU module is the central part of this equipment, and contains a powerful microchip processor and some necessary electronic elements. This powerful processor performs all of the functions for the relay: the protection functions, the communication management functions. There are several A/D conversion circuits on this module, which are used to convert the AC analog signals to corresponding DC signals for fulfilling the demand of the electrical level standard. A high-accuracy clock chip is contained in this module, it provide accurate current time for this relay. The functional details of the main CPU module are listed as below: z
Protection calculations The main CPU module can calculate protective elements (such as overcurrent element, zero sequence overcurrent etc.) on the basis of the analog sampled values (voltages and currents) and binary inputs, and then decides whether the device needs to trip or close.
z
Communication management The main CPU module can effectively manage all communication procedures, and reliably send out some useful information through its various communication interfaces. These interfaces are used to communicate with a SAS or a RTU. It also can communicate with the human machine interface module. If an event is occurred (such as SOE, protective tripping event etc.), this module will send out the relevant event information through these interfaces, and make it be easily observed by the user.
z
Auxiliary calculations Based on the voltage and current inputs, the main CPU module also can calculate out the metering values, such as active power, reactive power and power factor etc. All these values can be sent to a SAS or a RTU through the communication interfaces.
z
Time Synchronization This module has a local clock chip and an interface to receive time synchronized signals from external clock source. These signals include PPS (pulse per second) signal and IRIG-B signal. Basing on the timing message (from SAS or RTU) and the PPS signal, or basing on the IRIG-B signal, this module can synchronize local clock with the standard clock.
There are three types of main CPU modules, and the view of the main CPU module is shown in Figure 6.5-1.
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Figure 6.5-1 View of the main CPU module
A 16-pin or 7-pin connector is fixed on the front side of the module. The terminal definition of the connector is described as below. Pin connections on the connector of the main CPU module NR4106A and NR4106C: Pin No.
Sign
01
Description Not used
02
485-1A
03
485-1B
04
SGND
05
FGND
06
485-2A
07
485-2B
08
SGND
09
FGND
10
SYN+
11
SYN-
12
SGND
13
FGND
14
RTS
15
TXD
16
SGND
The No.1 EIA RS-485 standardized interface for connecting with a SAS or a RTU. The grounded terminal. The No.2 EIA RS-485 standardized interface for connecting with a SAS or a RTU. The grounded terminal. The EIA RS-485 standardized interface for time synchronization, PPS and IRIG-B signals are permitted. The grounded terminal. The interface for connecting with a printer, the EPSON® LQ-300K printer is recommended.
Pin connections on the connector of the main CPU module NR4106B: Pin No.
Sign
01
SYN+
02
SYN-
03
SGND
04
FGND
Description The EIA RS-485 standardized interface for time synchronization, PPS and IRIG-B signals are permitted. The grounded terminal.
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6 Hardware 05
RTS
06
TXD
07
SGND
The interface for connecting with a printer, the EPSON® LQ-300K printer is recommended.
6.6 Analog Input Module (NR4412) The analog input module can transform high AC input values to relevant low AC output value, which are suited to the analog inputs of the main CPU module. The transformers are used both to step-down the currents and voltages to levels appropriate to the relay’s electronic circuitry and to provide effective isolation between the relay and the power system. A low pass filter circuit is connected to each transformer (CT or VT) secondary circuit for reducing the noise of each analog AC input signal. NOTE! The rated value of the current transformer is optional: 1A or 5A. The rated value of the CT must be definitely declared in the technical scheme and the contract. NOTE! Because the rated value of the current transformer is optional, it is necessary to check whether the rated value of the current transformer inputs is according to the demand of the engineering scheme before the device is put into operation. DANGER! Never allow the current transformer (CT) secondary circuit connected to this relay to be opened while the primary system is energized. The opened CT secondary circuit will produce a dangerously high voltage. If this safety precaution is disregarded, personal death, severe personal injury or considerable equipment damage will occur. There are two types of analog input modules: NR4412 with 26 pins and NR4412 with 24 pins. The view of the analog input module is shown in Figure 6.6-1.
NR4412
NR4412
01
02
01
02
03
04
03
04
05
06
05
06
07
08
07
08
09
10
09
10
11
12
11
12
13
14
13
14
15
16
15
16
17
18
17
18
19
20
19
20
21
22
21
22
23
24
23
24
25
26
26-pin
24-pin
Figure 6.6-1 View of the analog input module
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A 26-pin or 24-pin connector is fixed on the front side of this module. The terminal definition of the connector is described as below. Pin connections on the connector of the analog input module NR4412 with 26 pins: Pin No.
Sign
Description
01
Ua
02
Ub
The three voltage inputs with inner star connection (Y) for protection and
03
Uc
metering.
04
Un
05
Ux
06
Uxn
07
U0
08
U0n
09
I02
10
I02n
11
Ia
12
Ian
13
Ib
14
Ibn
15
Ic
16
Icn
17
I01
18
I01n
19
I0s
20
I0sn
21
Iam
22
Iamn
23
Ibm
24
Ibmn
25
Icm
26
Icmn
The synchro-check voltage input. The zero sequence voltage input. The input of the No.2 zero sequence current. The input of the current of the A phase for protection. The input of the current of the B phase for protection. The input of the current of the C phase for protection. The input of the No.1 zero sequence current. The input of the sensitive zero sequence current. The input of the current of the A phase for metering. The input of the current of the B phase for metering. The input of the current of the C phase for metering.
Pin connections on the connector of the analog input module NR4412 with 24 pins: Pin No.
Sign
Description
01
Ua
02
Ub
The three voltage inputs with inner star connection (Y) for protection and
03
Uc
metering.
04
Un
05
Ux
06
Uxn
07
U0
08
U0n
The synchro-check voltage input. The zero sequence voltage input.
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I02
10
I02n
11
Ia
12
Ian
13
Ib
14
Ibn
15
Ic
16
Icn
17
I01
18
I01n
19
I0s
20
I0sn
The input of the No.2 zero sequence current. The input of the current of the A phase for protection. The input of the current of the B phase for protection. The input of the current of the C phase for protection. The input of the No.1 zero sequence current. The input of the sensitive zero sequence current.
21
Not used
22
Not used
23
Not used
24
Not used
6.6.1 Connection Examples Some connection examples of the current transformers and voltage transformers which are supported by this relay are shown in this section. If one of the analog inputs has no input in a practical engineering, the relevant input terminals should be disconnected. 1.
Current connections examples
Figure 6.6-2 Current connection examples
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Where: (1) Current connections to three current transformers with a star-point connection for ground current (zero sequence current or residual current). (2) Current connections to three current transformers with a separate ground current transformer (summation current transformer or core balance current transformer). (3) Current connections to two current transformers with a separate ground current transformer (summation current transformer or core balance current transformer), only for ungrounded or compensated networks. (4) Current connection to a core balance neutral current transformer for sensitive ground fault detection, only for ungrounded or compensated networks. (5) Current connection to a separate ground current transformer (summation current transformer or core balance current transformer) for the No.2 zero sequence current input of this relay. 2.
Voltage connections examples A
B
C
52
52
52
A
B
C
52
52
52
05
Ux
06
Uxn
Ua
01
Ua
Ub
02
Ub
03
Uc
03
Uc
04
Un
04
Un
07
U0
07
U0
08
U0n
08
U0n
05
Ux
06
Uxn
01 02
(1)
(2)
Figure 6.6-3 Voltage connection examples
Where: (1) Voltage connections to three star-connected voltage transformers with open-delta windings and additionally to any phase voltage (for synchronism check). (2) Voltage connections to three star-connected voltage transformers with open-delta windings and additionally to any phase-to-phase voltage (for synchronism check).
6.6.2 Current Transformer Requirements z
CT Requirements
--
Rated primary current “Ipn”:
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According to the rated current or maximum load current of primary apparatus --
Rated continuous thermal current “Icth”: According to the maximum load current
--
Rated short-time thermal current “Ith” and rated dynamic current “Idyn”: According to the maximum fault current
--
Rated secondary current “Isn”
--
Accuracy limit factor “Kalf”:
z
Ipn
Rated primary current (amps)
Icth
Rated continuous thermal current (amps)
Ith
Rated short-time thermal current (amps)
Idyn
Rated dynamic current (amps)
Isn
Rated secondary current (amps)
Kalf
Accuracy limit factor: Kalf = Ipal / Ipn
Ipal
Rated accuracy limit primary current (amps)
Performance Verification Esl > Esl’ Esl Esl’
Esl = kalf × Isn × (Rct + Rbn) Required secondary limiting e.m.f (volts): Esl’ = k × Ipcf × Isn × (Rct + Rb) / Ipn
Kalf
Accuracy limit factor: Kalf = Ipal / Ipn
k
Stability factor: k = 2
Ipal
Rated accuracy limit primary current (amps)
Ipcf
Protective checking factor current (amps): same as the maximum prospective fault current
Ipn
Rated primary current (amps)
Isn
Rated secondary current (amps)
Rct
Current transformer secondary winding resistance (ohms)
Rbn
Rated resistance burden (ohms): Rbn = Sbn / Isn2
Sbn
Rated burden (VAs)
Rb
z
Rated secondary limiting e.m.f (volts):
Real resistance burden (ohms): Rb = Rr + 2RL + Rc
Rc
Contact resistance, 0.05~0.10 (ohms)
RL
Resistance of a single lead from relay to the CT (ohms)
Rr
Impedance of relay phase current input (ohms)
Example Kalf = 30.00,
Isn = 5A,
Rct = 1.00Ω,
Sbn = 60VA
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Esl = kalf × Isn × (Rct + Rbn) = kalf × Isn × (Rct + Sbn / Isn2) So, Esl = 30 × 5 × (1 + 60 / 52) = 510V Ipcf = 40000A,
RL = 0.50Ω,
Rr = 0.10Ω,
Rc = 0.10Ω,
Ipn = 2000A
Esl’ = k × Ipcf × Isn × (Rct + Rb) / Ipn = k × Ipcf × Isn × (Rct + (Rr + 2RL + Rc)) / Ipn So, Esl’ = 2 × 40000 × 5 × (1 + (0.1 + 2 × 0.5 + 0.1)) / 2000 = 440V It can meet the requirement: Esl > Esl’.
6.7 Binary Output Module (NR4521) The binary output module consists of some necessary contact outputs, and the binary outputs are used as tripping and closing (protection, auto-recloser or remote control) outputs or signal outputs. It can receive tripping commands or closing commands from the main CPU module, and then act according to these commands. It also can output some alarm signals from the main CPU module. There are three types of binary output modules: NR4521A, NR4521C and NR4521D. The view of the binary output module is shown in Figure 6.7-1.
Figure 6.7-1 View of the binary output module
A 22-pin connector is fixed on the front side of this module. The terminal definition of the connector is described as below. Pin connections on the 22-pin connector of the binary output module NR4521A: Pin No. 01 02 03 04
Sign
Description
BO_01
The No.1 programmable tripping and closing binary output.
BO_02
The No.2 programmable tripping and closing binary output.
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6 Hardware 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22
BO_03
The No.3 programmable tripping and closing binary output.
BO_04
The No.4 programmable tripping and closing binary output.
BO_05
The No.5 programmable tripping and closing binary output.
BO_06
The No.6 programmable tripping and closing binary output.
BO_07
The No.7 programmable tripping and closing binary output.
BO_08
The No.8 programmable tripping and closing binary output.
BO_09
The No.9 programmable tripping and closing binary output.
BO_10
The No.10 programmable tripping and closing binary output.
BO_11
The No.11 programmable tripping and closing binary output.
Pin connections on the 22-pin connector of the binary output module NR4521C: Pin No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22
Sign
Description
BO_01
The No.1 programmable tripping and closing binary output.
BO_02
The No.2 programmable tripping and closing binary output.
BO_03
The No.3 programmable tripping and closing binary output.
BO_04
The No.4 programmable tripping and closing binary output.
BO_05
The No.5 programmable tripping and closing binary output.
BO_06
The No.6 programmable tripping and closing binary output.
BO_07
The No.1 programmable signal binary output.
BO_08
The No.2 programmable signal binary output.
BO_09
The No.3 programmable signal binary output.
BO_10
The No.4 programmable signal binary output.
BO_11
The No.5 programmable signal binary output.
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6 Hardware
Pin connections on the 22-pin connector of the binary output module NR4521D: Pin No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22
Sign
Description
BO_01
The No.1 programmable tripping and closing binary output.
BO_02
The No.2 programmable tripping and closing binary output.
BO_03
The No.3 programmable tripping and closing binary output.
BO_04
The No.4 programmable tripping and closing binary output.
BO_05
The No.5 programmable tripping and closing binary output.
BO_06
The No.6 programmable tripping and closing binary output.
BO_07
The No.7 programmable tripping and closing binary output.
BO_08
The No.8 programmable tripping and closing binary output.
BO_09
The No.9 programmable tripping and closing binary output.
BO_10
The No.10 programmable tripping and closing binary output.
BO_11
The No.11 programmable tripping and closing binary output.
6.8 Binary Input Module (NR4502/NR4503/NR4504) The binary input module contains some binary inputs which are used to monitor the contact positions of the corresponding bay, and all the binary inputs are configurable through PCS-PC configuration tool. Some of them are used as general purpose binary inputs, and others are used as special purpose binary inputs. These binary inputs are all optical isolated binary inputs. The regular optical isolated binary inputs are used to monitor the position of the regular binary signals; the special optical isolated binary inputs are used to monitor the position of the special binary signals, which must be taken into account in the protection and interlock logic calculations of the main CPU module. There are three types of binary input modules: NR4502, NR4503 and NR4504. The view of the binary input module is shown in Figure 6.8-1.
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6 Hardware
Figure 6.8-1 View of the binary input module
A 22-pin connector is fixed on the front side of this module. The terminal definition of the connector is described as below. Pin connections on the 22-pin connector of the binary input module NR4502: Pin No.
Sign
01
BI_01+
02
BI_01-
03
BI_02+
04
BI_02-
05
BI_03+
06
BI_03-
07
BI_04+
08
BI_04-
09
BI_05+
10
BI_05-
11
BI_06+
12
BI_06-
13
BI_07+
14
BI_07-
15
BI_08+
16
BI_08-
17
BI_09+
18
BI_09-
19
BI_10+
20
BI_10-
21
BI_11+
22
BI_11-
Description The No.1 programmable binary input The No.2 programmable binary input The No.3 programmable binary input The No.4 programmable binary input The No.5 programmable binary input The No.6 programmable binary input The No.7 programmable binary input The No.8 programmable binary input The No.9 programmable binary input The No.10 programmable binary input The No.11 programmable binary input
Pin connections on the 22-pin connector of the binary input module NR4503: 6-15
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6 Hardware Pin No.
Sign
Description
01
BI_01+
02
BI_01-
03
BI_02+
04
BI_02-
05
BI_03
The No.3 programmable binary input.
06
BI_04
The No.4 programmable binary input.
07
BI_05
The No.5 programmable binary input.
08
BI_06
The No.6 programmable binary input.
09
BI_07
The No.7 programmable binary input.
10
BI_08
The No.8 programmable binary input.
11
BI_09
The No.9 programmable binary input.
12
BI_10
The No.10 programmable binary input.
13
BI_11
The No.11 programmable binary input.
14
BI_12
The No.12 programmable binary input.
15
BI_13
The No.13 programmable binary input.
16
BI_14
The No.14 programmable binary input.
17
BI_15
The No.15 programmable binary input.
18
BI_16
The No.16 programmable binary input.
19
BI_17
The No.17 programmable binary input.
20
BI_18
The No.18 programmable binary input.
21
BI_19
The No.19 programmable binary input.
22
BI_Opto-
The common negative connection of the BI_03 to BI_19.
The No.1 programmable binary input. The No.2 programmable binary input.
Pin connections on the 22-pin connector of the binary input module NR4504: Pin No.
Sign
Description
01
BI_01
The No.1 programmable binary input.
02
BI_02
The No.2 programmable binary input.
03
BI_Opto1-
The common negative connection of the BI_01 and BI_02.
04
BI_03
The No.3 programmable binary input.
05
BI_04
The No.4 programmable binary input.
06
BI_Opto2-
The common negative connection of the BI_03 and BI_04.
07
BI_05
The No.5 programmable binary input.
08
BI_06
The No.6 programmable binary input.
09
BI_Opto3-
The common negative connection of the BI_05 and BI_06.
10
BI_07
The No.7 programmable binary input.
11
BI_08
The No.8 programmable binary input.
12
BI_Opto4-
The common negative connection of the BI_07 and BI_08.
13
BI_09
The No.9 programmable binary input.
14
BI_10
The No.10 programmable binary input.
15
BI_Opto5-
The common negative connection of the BI_09 and BI_10.
16
BI_11
The No.11 programmable binary input.
17
BI_12
The No.12 programmable binary input.
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6 Hardware 18
BI_Opto6-
The common negative connection of the BI_11 and BI_12.
19
BI_13
The No.13 programmable binary input.
20
BI_14
The No.14 programmable binary input.
21
BI_Opto7-
The common negative connection of the BI_13 and BI_14.
22
Not used
6.9 Network DSP Module (NR4136/NR4126) The network DSP module is applied in a digitalized substation for leading the current and voltage from the electronic transformer through a merging unit, and it also can receive or transmit the GOOSE information. There are two kinds of network DSP module: NR4126 and NR4136. The network DSP module NR4136 provides up to 6 optical Ethernet ports which can supports the protocol IEC61850-9-2, GOOSE and IEEE1588. It also provides an optical Ethernet port for the IEC60044-8 data reception, and an optical Ethernet port for the time synchronization. The network DSP module NR4126 provides 2 optical Ethernet ports which only can supports the GOOSE protocol. The view of the network DSP module is shown in Figure 6.9-1.
Figure 6.9-1 View of the network DSP module
6.10 Optical Interface Extension Module (NR4202) The optical interface extension module is applied in a digitalized substation to extend the optical interfaces for the module NR4106 and the module NR4136. It is only can support the reception or transmission of the protocol IEC60044-8. The view of the optical interface extension module is shown in Figure 6.10-1.
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Figure 6.10-1 View of the optical interface extension module
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7 Settings
7 Settings Table of Contents 7.1 Overview ...........................................................................................................7-1 7.2 System Settings ...............................................................................................7-1 7.3 Protection Settings ..........................................................................................7-2 7.3.1 Overcurrent Protection Settings......................................................................................... 7-3 7.3.2 Zero Sequence Overcurrent Protection Settings ............................................................... 7-6 7.3.3 Negative Sequence Overcurrent Protection Settings......................................................... 7-9 7.3.4 Sensitive Earth Fault Protection Settings......................................................................... 7-10 7.3.5 Breaker Failure Protection Settings ................................................................................. 7-12 7.3.6 Broken Conductor Protection Settings ............................................................................. 7-13 7.3.7 Cold Load Pickup Settings............................................................................................... 7-13 7.3.8 SOTF Protection Settings ................................................................................................ 7-14 7.3.9 Thermal Overload Protection Settings ............................................................................. 7-15 7.3.10 Overvoltage and Undervoltage Protection Settings ....................................................... 7-16 7.3.11 Negative Sequence Overvoltage Protection Settings..................................................... 7-17 7.3.12 Zero Sequence Overvoltage Protection Settings ........................................................... 7-17 7.3.13 Frequency Protection Settings....................................................................................... 7-18 7.3.14 Auto-recloser Settings.................................................................................................... 7-21 7.3.15 Mechanical Protection Settings...................................................................................... 7-21 7.3.16 Supervision Element Settings ........................................................................................ 7-22 7.3.17 Binary Output Matrix Settings ........................................................................................ 7-23
7.4 Monitor and Control Settings ........................................................................7-23 7.4.1 Closing Synchronism Check Settings .............................................................................. 7-23 7.4.2 Manual Control Settings................................................................................................... 7-25 7.4.3 Interlock Settings ............................................................................................................. 7-26
7.5 Logic Link Settings ........................................................................................7-27 7.5.1 Function Link Settings ..................................................................................................... 7-27 7-a
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7 Settings
7.5.2 GOOSE Link Settings.......................................................................................................7-27 7.5.3 SV Link Settings ...............................................................................................................7-27 7.5.4 Spare Link Settings...........................................................................................................7-27
7.6 Device Related Settings ................................................................................ 7-28 7.6.1 Device Settings ................................................................................................................7-28 7.6.2 Communication Settings...................................................................................................7-28
7.7 Copy Settings................................................................................................. 7-31
7-b
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7 Settings
7.1 Overview The settings are used to determine the characteristic of each protective element and operation mode of the relay. It is necessary to configure the settings of this relay according to engineering demands before putting this relay into service. If the settings are not configured correctly, this relay maybe works abnormally (such as communication interruption, printing out unexpected codes etc.), it also can lead to much more serious accident (such as unwanted operation, missing operation) sometimes. The settings of this relay include system settings, protection settings, communication settings and miscellaneous settings. The user can configure these settings or parameters manually (see Section 8.2.6.2). Remote modification is also supported (IEC61850, IEC60870-5-103 or DNP3.0 interface, see Chapter 10 for the details about these protocols). NOTE! If a CPU module is replaced, it is necessary to configure all the settings again according to the configuration of the CPU module which is replaced.
7.2 System Settings The system settings (in the submenu “System Settings”) are mainly used to set the rated value of VT and CT. The following table lists all the system parameters. No.
Menu text
Explanation
Range
Step
1
Active_Grp
The active setting group number
1 ~ 10
1
2
Opt_SysFreq
Select the rated system frequency: “0”, 50Hz; “1”, 60Hz
0~1
1
3
PrimaryEquip_Name
The name of the protected primary equipment
1~7 characters
4
Prot.I1n
Rated primary value of protection phase CT
0~20000A
1A
5
Prot.I2n
Rated secondary value of protection phase CT
1/5A
4A
6
Measmt.I1n
Rated primary value of metering phase CT
0~20000A
1A
7
Measmt.I2n
Rated secondary value of metering phase CT
1/5A
4A
8
Neu1.I1n
Rated primary value of the No.1 zero sequence CT
0~20000A
1A
9
Neu1.I2n
Rated secondary value of the No.1 zero sequence CT
1/5A
4A
10
Neu2.I1n
Rated primary value of the No.2 zero sequence CT
0~20000A
1A
11
Neu2.I2n
Rated secondary value of the No.2 zero sequence CT
1/5A
4A
12
SEF.I1n
Rated primary value of sensitive zero sequence CT
0~20000A
1A
13
SEF.I2n
Rated secondary value of sensitive zero sequence CT
1/5A
4A
14
Prot.U1n
Rated primary value of protection VT
0.1~500.0kV
0.001kV
15
Prot.U2n
Rated secondary value of protection VT
100~200V
0.001V
16
Syn.U1n
Rated primary value of synchro-check VT
0.1~500.0kV
0.001kV
17
Syn.U2n
Rated secondary value of synchro-check VT
10~200V
0.001V
18
Delt.U1n
Rated primary value of zero sequence VT
0.1~500.0kV
0.001kV
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7 Settings 19
Delt.U2n
20
Opt_3I0
21
Opt_3U0
22
Opt_PwrDir
Rated secondary value of zero sequence VT Zero sequence current is self calculated 0:from neutral CT 1:self calculated Zero sequence voltage is self calculated 0:from neutral VT 1:self calculated Power Measurement Mode
10~200V
0.001V
0~1
1
0~1
1
0~3
1
NOTE! 1.
The system settings is related to the protection activities, thus it is necessary to configure theses settings according to actual conditions.
2.
The setting [Opt_3I0] is used to select the No.1 zero sequence current source. Setting the value of [Opt_3I0] as “1” means that the No.1 zero sequence current is self-calculated, and setting the value as “0” means that the No.1 zero sequence current is derived from specific zero sequence CT. The default value is “0” when the equipment is delivered.
3.
The setting [Opt_3U0] is used to select the zero sequence voltage source. Setting the value of [Opt_3U0] as “1” means that zero sequence voltage is self-calculated, and setting the value as “0” means that zero sequence voltage is derived from specific broken delta VT.
4.
The setting [Opt_PwrDir] is used to select the power measurement mode. [Opt_PwrDir]
Active Power
Lagging reactive power
To line
To busbar
To line
To busbar
0
+W
-W
+Var
-Var
1
-W
+W
+Var
-Var
2
+W
-W
-Var
+Var
3
-W
+W
-Var
+Var
7.3 Protection Settings The protection settings (in the submenu “Prot Settings”) are used to decide the characteristics of the protective elements. There are up to 10 groups of protection settings in this relay. NOTE! Following items should be considered before modifying the protection settings. 1.
Before configuring the settings, the setting group must be configured first.
2.
When a certain setting is of no use, in case of over-elements (such as overcurrent, residual overcurrent), set the value as upper limit; in case of under-elements (such as under frequency, under voltage), set the value as lower limit; set the corresponding time as 100s and disable corresponding protection element and de-energize the corresponding binary input.
3.
In general, for switch onto fault protection and accelerated protection, it is necessary to set a time delay from decades to 100ms. Thanks to there is no 100ms time delay in the numerical
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7 Settings
protection equipment as there in the traditional protection equipment in the past, thus it can not avoid surge current when CB is closing if the time is set as 0.00s. For residual overcurrent when switch onto fault and residual accelerate protection, there is zero sequence surge current when CB is closing. 4.
To a certain protection element, only when the logic setting and the state of enabling input signal are “1”, and the state of the blocking input signal is “0” at the same time, then the corresponding protection element is enabled, otherwise it is disabled.
5.
The setting [XXXX.OutMap] is used to select the binary outputs of the module NR4304 and the module NR4521 to send the related protection tripping or closing signal to the circuit breaker. Each bit can control an output, and if it is set as “1”, the related protection tripping or closing signal can be sent to the circuit breaker through the selected binary output. Bit No.
Corresponding Binary Output
0
The No.1 programmable binary output of the module NR4304 (B09.BO_01)
1
The No.2 programmable binary output of the module NR4304 (B09.BO_02)
2
The No.3 programmable binary output of the module NR4304 (B09.BO_03)
3
The No.4 programmable binary output of the module NR4304 (B09.BO_04)
4
The No.5 programmable binary output of the module NR4304 (B09.BO_05)
5
The No.6 programmable binary output of the module NR4304 (B09.BO_06)
6
The No.7 programmable binary output of the module NR4304 (B09.BO_07)
7
The No.8 programmable binary output of the module NR4304 (B09.BO_08)
8
The No.1 programmable binary output of the module NR4521 (B06.BO_01)
9
The No.2 programmable binary output of the module NR4521 (B06.BO_02)
10
The No.3 programmable binary output of the module NR4521 (B06.BO_03)
11
The No.4 programmable binary output of the module NR4521 (B06.BO_04)
12
The No.5 programmable binary output of the module NR4521 (B06.BO_05)
13
The No.6 programmable binary output of the module NR4521 (B06.BO_06)
14
The No.1 programmable binary output of the module NR4521 (B03.BO_01)
15
The No.2 programmable binary output of the module NR4521 (B03.BO_02)
16
The No.3 programmable binary output of the module NR4521 (B03.BO_03)
17
The No.4 programmable binary output of the module NR4521 (B03.BO_04)
18
The No.5 programmable binary output of the module NR4521 (B03.BO_05)
19
The No.6 programmable binary output of the module NR4521 (B03.BO_06)
Some of the protective elements have a setting (just like [XXXX.OutMap], “XXXX” is the abbreviation of a protective element, such as 50/51P1, 50/51G1, 59P1 etc.) to configure the outputs, and they have the same meanings described here. Please refer the content here for the output matrix setting of each protective element.
7.3.1 Overcurrent Protection Settings The overcurrent protection settings (in the submenu “OC Settings”) are used to determine the characteristic of the overcurrent protection. All the settings of the overcurrent protection are listed in the following table. 7-3
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7 Settings No.
Menu text
1
50/51P.U2_VCE
2
50/51P.Upp_VCE
3
50/51P.RCA
Explanation The voltage setting of the negative sequence voltage blocking element (phase voltage) The voltage setting of the low voltage blocking element (phase-to-phase voltage) The relay characteristic angle for the directional overcurrent protection
Range
Step
2~70V
0.001V
2~120V
0.001V
-180°~179°
1°
0~1
1
0.05~1.00
0.001
0.05In~30In
0.001A
1~3
1
0.05In~30In
0.001A
0~100s
0.001s
0~1
1
0~2
1
0~1
1
0~1
1
The logic setting of the function which can block 4
50/51P.En_VTS_Blk
the OC protection related voltage measurement when the voltage transformer is failed
5
50/51P.K_Hm2
6
50/51P.I_Rls_HmBlk
7
50/51P.Opt_Hm_Blk
8
50/51P1.I_Set
9
50/51P1.t_Op
10
50/51P1.En_VCE
11
50/51P1.Opt_Dir
The percent setting of the harmonic blocking element for OC protection The current setting for releasing the harmonic blocking element of OC protection The setting is used to select the harmonic blocking mode of OC protection The current setting of the stage 1 overcurrent protection The time setting of the stage 1 overcurrent protection The logic setting of the voltage control element for the stage 1 overcurrent protection The setting is used to select the directional mode for the stage 1 overcurrent protection, see Section 3.3.4
12
50/51P1.En_Hm_Blk
13
50/51P1.En
14
50/51P1.OutMap
15
50/51P2.I_Set
16
50/51P2.t_Op
17
50/51P2.En_VCE
The logic setting of the harmonic blocking element for the stage 1 overcurrent protection The logic setting of the stage 2 overcurrent protection The output matrix setting of the stage 1
0x00000000 ~
overcurrent protection
0x7FFFFFFF
The current setting of the stage 2 overcurrent protection The time setting of the stage 2 overcurrent protection The logic setting of the voltage control element for the stage 2 overcurrent protection
1
0.05In~30In
0.001A
0~100s
0.001s
0~1
1
0~2
1
0~1
1
0~1
1
The setting is used to select the directional mode 18
50/51P2.Opt_Dir
for the stage 2 overcurrent protection, see Section 3.3.4
19
50/51P2.En_Hm_Blk
20
50/51P2.En
The logic setting of the harmonic blocking element for the stage 2 overcurrent protection The logic setting of the stage 2 overcurrent protection
7-4
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7 Settings 21
50/51P2.OutMap
22
50/51P3.I_Set
23
50/51P3.t_Op
24
50/51P3.En_VCE
The output matrix setting of the stage 2
0x00000000 ~
overcurrent protection
0x7FFFFFFF
The current setting of the stage 3 overcurrent protection The time setting of the stage 3 overcurrent protection The logic setting of the voltage control element for the stage 3 overcurrent protection
1
0.05In~30In
0.001A
0~100s
0.001s
0~1
1
0~2
1
0~1
1
0~1
1
The setting is used to select the directional mode 25
50/51P3.Opt_Dir
for the stage 3 overcurrent protection, see Section 3.3.4
26
50/51P3.En_Hm_Blk
27
50/51P3.En
28
50/51P3.OutMap
29
50/51P4.I_Set
30
50/51P4.t_Op
31
50/51P4.En_VCE
The logic setting of the harmonic blocking element for the stage 3 overcurrent protection The logic setting of the stage 3 overcurrent protection The output matrix setting of the stage 3
0x00000000 ~
overcurrent protection
0x7FFFFFFF
The current setting of the stage 4 overcurrent protection The time setting of the stage 4 overcurrent protection The logic setting of the voltage control element for the stage 4 overcurrent protection
1
0.05In~30In
0.001A
0~100s
0.001s
0~1
1
0~2
1
0~1
1
0~1
1
The setting is used to select the directional mode 32
50/51P4.Opt_Dir
for the stage 4 overcurrent protection, see Section 3.3.4
33
50/51P4.En_Hm_Blk
34
50/51P4.En
35
50/51P4.OutMap
36
50/51P4.Opt_Curve
37
50/51P4.TMS
38
50/51P4.tmin
39
50/51P4.K
40
50/51P4.C
41
50/51P4.Alpha
The logic setting of the harmonic blocking element for the stage 4 overcurrent protection The logic setting of the stage 4 overcurrent protection The output matrix setting of the stage 4
0x00000000 ~
overcurrent protection
0x7FFFFFFF
The setting is for selecting the inverse time characteristic curve for OC4 protection The time multiplier setting of the IDMT overcurrent protection The minimum operation time setting of the IDMT overcurrent protection Constant “k” for the IDMT overcurrent protection, see Section 3.3.2 Constant “C” for the IDMT overcurrent protection, see Section 3.3.2 Constant “α” for the IDMT overcurrent protection, see Section 3.3.2
1
0~13
1
0.05~100.0
0.001
0~100s
0.001s
0.001~120.0
0.0001
0.00~1.00
0.0001
0.01~3.00
0.0001
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7 Settings
NOTE! 1.
The setting [50/51Px.Opt_Dir] (x: 1~4) is used to select the directional mode for the stage x (x: 1~4) overcurrent protection respectively. “0” is the non-directional mode; “1” is the forward directional mode; and “2” is the reverse directional mode.
7.3.2 Zero Sequence Overcurrent Protection Settings The No.1 zero sequence overcurrent protection settings (in the submenu “EF1 Settings”) are used to determine the characteristic of the No.1 zero sequence overcurrent protection. The No.2 zero sequence overcurrent protection settings (in the submenu “EF2 Settings”) are used to determine the characteristic of the No.2 zero sequence overcurrent protection. All the settings of the No.1 zero sequence overcurrent protection are listed in the following table. No.
Menu text
1
50/51G.RCA
2
50/51G.En_VTS_Blk
Explanation The relay characteristic angle for the No.1 directional zero sequence overcurrent protection
Range
Step
-180°~179°
1°
0~1
1
0.05~1.00
0.001
0.05In~30In
0.001A
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
The logic setting of the function which blocks the 1ROC protection related voltage measurement when the voltage transformer is failed 3
50/51G.K_Hm2
4
50/51G.3I0_Rls_HmBlk
5
50/51G1.3I0_Set
6
50/51G1.t_Op
7
50/51G1.Opt_Dir
8
50/51G1.En_Hm_Blk
9
50/51G1.En
10
50/51G1.OutMap
11
50/51G2.3I0_Set
12
50/51G2.t_Op
13
50/51G2.Opt_Dir
14
50/51G2.En_Hm_Blk
The percent setting of the harmonic blocking element for the No.1 ROC protection The current setting for releasing the harmonic blocking element of the No.1 ROC protection The current setting of the No.1 stage 1 zero sequence overcurrent protection The time setting of the No.1 stage 1 zero sequence overcurrent protection The setting is used to select the directional mode for the No.1 ROC1 protection, see Section 3.5.3 The logic setting of the harmonic blocking element for the No.1 ROC1 protection The logic setting of the No.1 stage 1 zero sequence overcurrent protection The output matrix setting of the No.1 stage 1 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.1 stage 2 zero sequence overcurrent protection The time setting of the No.1 stage 2 zero sequence overcurrent protection The setting is used to select the directional mode for the No.1 ROC2 protection, , see Section 3.5.3 The logic setting of the harmonic blocking element for the No.1 ROC2 protection
7-6
1
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 15
50/51G2.En
16
50/51G2.OutMap
17
50/51G3.3I0_Set
18
50/51G3.t_Op
19
50/51G3.Opt_Dir
20
50/51G3.En_Hm_Blk
21
50/51G3.En
22
50/51G3.OutMap
23
50/51G4.3I0_Set
24
50/51G4.t_Op
25
50/51G4.Opt_Dir
26
50/51G4.En_Hm_Blk
27
50/51G4.En
28
50/51G4.OutMap
29
50/51G4.Opt_Curve
30
50/51G4.TMS
31
50/51G4.tmin
32
50/51G4.K
33
50/51G4.C
34
50/51G4.Alpha
The logic setting of the No.1 stage 2 zero sequence overcurrent protection
0~1
The output matrix setting of the No.1 stage 2 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.1 stage 3 zero sequence overcurrent protection The time setting of the No.1 stage 3 zero sequence overcurrent protection The setting is used to select the directional mode for the No.1 ROC3 protection, see Section 3.5.3 The logic setting of the harmonic blocking element for the No.1 ROC3 protection The logic setting of the No.1 stage 3 zero sequence overcurrent protection
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
sequence overcurrent protection The time setting of the No.1 stage 4 zero sequence overcurrent protection The setting is used to select the directional mode for the No.1 ROC4 protection, see Section 3.5.3 The logic setting of the harmonic blocking element for the No.1 ROC4 protection The logic setting of the No.1 stage 4 zero sequence overcurrent protection
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
characteristic curve for the No.1 ROC4 protection The time multiplier setting of the No.1 zero sequence IDMT overcurrent protection The minimum operation time setting of the No.1 zero sequence IDMT overcurrent protection Constant “k” for the No.1 zero sequence IDMT overcurrent protection, see Section 3.5.2 Constant “C” for the No.1 zero sequence IDMT overcurrent protection, see Section 3.5.2 Constant “α” for the No.1 zero sequence IDMT overcurrent protection, see Section 3.5.2
1
0.05In~30In
The output matrix setting of the No.1 stage 4 zero The setting is for selecting the inverse time
1
0.05In~30In
The output matrix setting of the No.1 stage 3 zero The current setting of the No.1 stage 4 zero
1
1
0~13
1
0.05~100.0
0.001
0~100s
0.001s
0.001~120.0
0.0001
0.00~1.00
0.0001
0.01~3.00
0.0001
NOTE! 1.
The setting [50/51Gx.Opt_Dir] (x: 1~4) is used to select the directional mode for the No.1 7-7
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings
stage x (x: 1~4) zero sequence overcurrent protection respectively. “0” is the non-directional mode; “1” is the forward directional mode; and “2” is the reverse directional mode. All the settings of the No.2 zero sequence overcurrent protection are listed in the following table. No. 1
Menu text A.50/51G.RCA
Explanation The relay characteristic angle for the No.2 directional zero sequence overcurrent protection
Range
Step
-180°~179°
1°
0~1
1
0.05~1.00
0.001
0.05In~30In
0.001A
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
The logic setting of the function which blocks the 2
A.50/51G.En_VTS_Blk
2ROC protection related voltage measurement when the voltage transformer is failed
3
A.50/51G.K_Hm2
4
A.50/51G.3I0_Rls_HmBlk
5
A.50/51G1.3I0_Set
6
A.50/51G1.t_Op
7
A.50/51G1.Opt_Dir
8
A.50/51G1.En_Hm_Blk
9
A.50/51G1.En
10
A.50/51G1.OutMap
11
A.50/51G2.3I0_Set
12
A.50/51G2.t_Op
13
A.50/51G2.Opt_Dir
14
A.50/51G2.En_Hm_Blk
15
A.50/51G2.En
16
A.50/51G2.OutMap
17
A.50/51G3.3I0_Set
18
A.50/51G3.t_Op
19
A.50/51G3.Opt_Dir
The percent setting of the harmonic blocking element for the No.2 ROC protection The current setting for releasing the harmonic blocking element of the No.2 ROC protection The current setting of the No.2 stage 1 zero sequence overcurrent protection The time setting of the No.2 stage 1 zero sequence overcurrent protection The setting is used to select the directional mode for the No.2 ROC1 protection The logic setting of the harmonic blocking element for the No.2 ROC1 protection The logic setting of the No.2 stage 1 zero sequence overcurrent protection The output matrix setting of the No.2 stage 1 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.2 stage 2 zero sequence overcurrent protection The time setting of the No.2 stage 2 zero sequence overcurrent protection The setting is used to select the directional mode for the No.2 ROC2 protection The logic setting of the harmonic blocking element for the No.2 ROC2 protection The logic setting of the No.2 stage 2 zero sequence overcurrent protection
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
The output matrix setting of the No.2 stage 2 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.2 stage 3 zero sequence overcurrent protection The time setting of the No.2 stage 3 zero sequence overcurrent protection The setting is used to select the directional mode for the No.2 ROC3 protection
7-8
1
1
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 20
A.50/51G3.En_Hm_Blk
21
A.50/51G3.En
22
A.50/51G3.OutMap
23
A.50/51G4.3I0_Set
24
A.50/51G4.t_Op
25
A.50/51G4.Opt_Dir
26
A.50/51G4.En_Hm_Blk
27
A.50/51G4.En
28
A.50/51G4.OutMap
29
A.50/51G4.Opt_Curve
30
A.50/51G4.TMS
31
A.50/51G4.tmin
32
A.50/51G4.K
33
A.50/51G4.C
34
A.50/51G4.Alpha
The logic setting of the harmonic blocking element for the No.2 ROC3 protection The logic setting of the No.2 stage 3 zero sequence overcurrent protection
0~1
1
0~1
1
The output matrix setting of the No.2 stage 3 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the No.2 stage 4 zero sequence overcurrent protection The time setting of the No.2 stage 4 zero sequence overcurrent protection The setting is used to select the directional mode for the No.2 ROC4 protection The logic setting of the harmonic blocking element for the No.2 ROC4 protection The logic setting of the No.2 stage 4 zero sequence overcurrent protection
0.05In~30In
0.001A
0~100s
0.001s
0~2
1
0~1
1
0~1
1
The output matrix setting of the No.2 stage 4 zero
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The setting is for selecting the inverse time characteristic curve for the No.2 ROC4 protection The time multiplier setting of the No.2 zero sequence IDMT overcurrent protection The minimum operation time setting of the No.2 zero sequence IDMT overcurrent protection Constant “k” for the No.2 zero sequence IDMT overcurrent protection, see Section 3.5.2 Constant “C” for the No.2 zero sequence IDMT overcurrent protection, see Section 3.5.2 Constant “α” for the No.2 zero sequence IDMT overcurrent protection, see Section 3.5.2
1
1
0~13
1
0.05~100.0
0.001
0~100s
0.001s
0.001~120.0
0.0001
0.00~1.00
0.0001
0.01~3.00
0.0001
NOTE! 1.
The setting [A.50/51Gx.Opt_Dir] (x: 1~4) is used to select the directional mode for the No.2 stage x (x: 1~4) zero sequence overcurrent protection respectively. “0” is the non-directional mode; “1” is the forward directional mode; and “2” is the reverse directional mode.
7.3.3 Negative Sequence Overcurrent Protection Settings The negative sequence overcurrent protection settings (in the submenu “NegOC Settings”) are used to determine the characteristic of the negative sequence overcurrent protection. All the settings of the negative sequence overcurrent protection are listed in the following table.
7-9
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings No.
Menu text
1
50/51Q1.I2_Set
2
50/51Q1.t_Op
3
50/51Q1.En
4
50/51Q1.OutMap
5
50/51Q2.I2_Set
6
50/51Q2.t_Op
7
50/51Q2.En
8
50/51Q2.OutMap
9
50/51Q2.Opt_Curve
10
50/51Q2.TMS
11
50/51Q2.tmin
12
50/51Q2.K
13
50/51Q2.C
14
50/51Q2.Alpha
Explanation The current setting of the stage 1 negative sequence overcurrent protection The time setting of the stage 1 negative sequence overcurrent protection The logic setting of the stage 1 negative sequence overcurrent protection
Range
Step
0.05In~4In
0.001A
0~100s
0.001s
0~1
1
The output matrix setting of the stage 1 negative
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The current setting of the stage 2 negative sequence overcurrent protection The time setting of the stage 2 negative sequence overcurrent protection The logic setting of the stage 2 negative sequence overcurrent protection
0.05In~4In
0.001A
0~100s
0.001s
0~1
1
The output matrix setting of the stage 2 negative
0x00000000 ~
sequence overcurrent protection
0x7FFFFFFF
The setting is for selecting the inverse time characteristic curve for the NOC2 protection The time multiplier setting of the negative sequence IDMT overcurrent protection The minimum operation time setting of the negative sequence IDMT overcurrent protection Constant “k” for the negative sequence IDMT overcurrent protection, see Section 3.7.2 Constant “C” for the negative sequence IDMT overcurrent protection, see Section 3.7.2 Constant “α” for the negative sequence IDMT overcurrent protection, see Section 3.7.2
1
1
0~13
1
0.05~100.0
0.001
0~100s
0.001s
0.001~120.0
0.0001
0.00~1.00
0.0001
0.01~3.00
0.0001
7.3.4 Sensitive Earth Fault Protection Settings The sensitive earth fault protection settings (in the submenu “SEF Settings”) are used to determine the characteristic of the sensitive earth fault protection. All the settings of the sensitive earth fault protection are listed in the following table. No. 1
Menu text 50/51SEF.RCA
Explanation The relay characteristic angle for the directional sensitive earth fault protection
Range
Step
-180°~179°
1°
0~1
1
0.005~0.4A
0.001A
The logic setting of the function which blocks the 2
50/51SEF.En_VTS_Blk
SEF protection related voltage measurement when the voltage transformer is failed
3
50/51SEF1.3I0_Set
The current setting of the stage 1 sensitive earth fault protection
7-10
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 4
50/51SEF1.t_Op
5
50/51SEF1.Opt_Dir
6
50/51SEF1.En
7
50/51SEF1.OutMap
8
50/51SEF2.3I0_Set
9
50/51SEF2.t_Op
10
50/51SEF2.Opt_Dir
11
50/51SEF2.En
12
50/51SEF2.OutMap
13
50/51SEF3.3I0_Set
14
50/51SEF3.t_Op
15
50/51SEF3.Opt_Dir
16
50/51SEF3.En
17
50/51SEF3.OutMap
18
50/51SEF4.3I0_Set
19
50/51SEF4.t_Op
20
50/51SEF4.Opt_Dir
21
50/51SEF4.En
22
50/51SEF4.OutMap
23
50/51SEF4.Opt_Curve
24
50/51SEF4.TMS
25
50/51SEF4.tmin
The time setting of the stage 1 sensitive earth fault protection The setting is used to select the directional mode for the stage 1 SEF protection, see Section 3.6.3 The logic setting of the stage 1 sensitive earth fault protection
0~100s
0.001s
0~2
1
0~1
1
The output matrix setting of the stage 1 sensitive
0x00000000 ~
earth fault protection
0x7FFFFFFF
The current setting of the stage 2 sensitive earth fault protection The time setting of the stage 2 sensitive earth fault protection The setting is used to select the directional mode for the stage 2 SEF protection, see Section 3.6.3 The logic setting of the stage 2 sensitive earth fault protection
0.005~0.4A
0.001A
0~100s
0.001s
0~2
1
0~1
1
The output matrix setting of the stage 2 sensitive
0x00000000 ~
earth fault protection
0x7FFFFFFF
The current setting of the stage 3 sensitive earth fault protection The time setting of the stage 3 sensitive earth fault protection The setting is used to select the directional mode for the stage 3 SEF protection, see Section 3.6.3 The logic setting of the stage 3 sensitive earth fault protection
0.001A
0~100s
0.001s
0~2
1
0~1
1
0x00000000 ~
earth fault protection
0x7FFFFFFF
fault protection The time setting of the stage 4 sensitive earth fault protection The setting is used to select the directional mode for the stage 4 SEF protection, see Section 3.6.3 The logic setting of the stage 4 sensitive earth fault protection
0.001A
0~100s
0.001s
0~2
1
0~1
1
0x00000000 ~
earth fault protection
0x7FFFFFFF
characteristic curve for SEF4 protection The time multiplier setting of the IDMT sensitive earth fault protection The minimum operation time setting of the IDMT sensitive earth fault protection
1
0.005~0.4A
The output matrix setting of the stage 4 sensitive The setting is for selecting the inverse time
1
0.005~0.4A
The output matrix setting of the stage 3 sensitive The current setting of the stage 4 sensitive earth
1
1
0~13
1
0.05~100.0
0.001
0~100s
0.001s
7-11
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 26
50/51SEF4.K
27
50/51SEF4.C
28
50/51SEF4.Alpha
Constant “k” for the IDMT sensitive earth fault protection, see Section 3.6.2 Constant “C” for the IDMT sensitive earth fault protection, see Section 3.6.2 Constant “α” for the IDMT sensitive earth fault protection, see Section 3.6.2
0.001~120.0
0.0001
0.00~1.00
0.0001
0.01~3.00
0.0001
NOTE! 1.
The setting [50/51SEFx.Opt_Dir] (x: 1~4) is used to select the directional mode for the stage x (x: 1~4) sensitive earth fault protection respectively. “0” is the non-directional mode; “1” is the forward directional mode; and “2” is the reverse directional mode.
7.3.5 Breaker Failure Protection Settings The breaker failure protection settings (in the submenu “BFP Settings”) are used to determine the characteristic of the breaker failure protection. All the settings of the breaker failure protection are listed in the following table. No.
Menu text
1
50BF.I_Set
2
50BF.t_Op
3
50BF.t_ReTrp
4
50BF.Opt_LogicMode
5
50BF.En
6
50BF.En_ReTrp
7
50BF.OutMap
8
50BF.OutMap_ReTrp
Explanation The current setting of the breaker failure protection The time setting of the breaker failure protection The re-trip time setting of the breaker failure protection The setting for selecting the criteria logic of the breaker failure protection The logic setting of the breaker failure protection The logic setting of the re-trip function of the breaker failure protection
Range
Step
0.05In~5.0In
0.001A
0~100s
0.001s
0~100s
0.001s
1~4
1
0~1
1
0~1
1
The output matrix setting of the breaker failure
0x00000000 ~
protection
0x7FFFFFFF
The output matrix setting of the re-trip function of
0x00000000 ~
the breaker failure protection
0x7FFFFFFF
1 1
NOTE! 1.
The setting [50BF.Opt_LogicMode] is used to select the criteria logic of the breaker failure protection. Four criteria logics based on the phase currents and the circuit breaker state (based on the binary input [BI_52b]) are supported in this relay. The two criteria conditions are list as below: (A) The maximum phase current is greater than the setting [50BF.I_Set]. (B) The circuit breaker is still closed ([BI_52b] = 0).
7-12
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings Setting Value
Criteria Condition Logic
1
Ipmax > [50BF.I_Set]
Only A
2
NOT([BI_52b])
Only B
3
(Ipmax > [50BF.I_Set]) OR (NOT([BI_52b]))
A OR B
4
(Ipmax > [50BF.I_Set]) AND (NOT([BI_52b]))
A AND B
7.3.6 Broken Conductor Protection Settings The broken conductor protection settings (in the submenu “BrknCond Settings”) are used to determine the characteristic of the broken conductor protection. All the settings of the broken conductor protection are listed in the following table. No.
Menu text
1
50BC.I2/I1_Set
2
50BC.t_Op
3
50BC.En
4
50BC.OutMap
Explanation The ratio setting for the broken conductor protection The time setting for the broken conductor protection The logic setting for the broken conductor protection
Range
Step
0.10~1.00
0.001
0~200s
0.001s
0~1
1
The output matrix setting of the broken conductor
0x00000000 ~
protection
0x7FFFFFFF
1
7.3.7 Cold Load Pickup Settings The cold load pickup logic settings (in the submenu “CLP Settings”) are used to determine the characteristic of the cold load pickup logic. All the settings of the cold load pickup logic are listed in the following table No.
Menu text
1
CLP.Opt_LogicMode
2
CLP.t_Cold
3
CLP.t_Rst
4
CLP.t_ShortRst
5
CLP.En
6
50/51P1.CLP.IMult
7
50/51P1.CLP.t_Op
8
50/51P2.CLP.IMult
Explanation The setting for selecting the cold load condition The time setting for ensuring the cold load condition is met The time setting for resetting the cold load pickup logic The time setting for fast resetting the cold load pickup logic The logic setting of the cold load pickup logic function The multiple setting of the stage 1 overcurrent protection when CLP is active The time setting of the stage 1 overcurrent protection when CLP is active The multiple setting of the stage 2 overcurrent protection when CLP is active
Range
Step
1~2
1
0~4000s
0.001s
0~4000s
0.001s
0~600s
0.001s
0~1
1
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
7-13
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 9
50/51P2.CLP.t_Op
10
50/51P3.CLP.IMult
11
50/51P3.CLP.t_Op
12
50/51P4.CLP.IMult
13
50/51P4.CLP.t_Op
14
50/51P4.CLP.TMS
15
50/51G1.CLP.IMult
16
50/51G1.CLP.t_Op
17
50/51G2.CLP.IMult
18
50/51G2.CLP.t_Op
19
50/51G3.CLP.IMult
20
50/51G3.CLP.t_Op
21
50/51G4.CLP.IMult
22
50/51G4.CLP.t_Op
23
50/51G1.CLP.TMS
The time setting of the stage 2 overcurrent protection when CLP is active The multiple setting of the stage 3 overcurrent protection when CLP is active The time setting of the stage 3 overcurrent protection when CLP is active The multiple setting of the stage 4 overcurrent protection when CLP is active The time setting of the stage 4 overcurrent protection when CLP is active The time multiplier setting of the IDMT overcurrent protection when CLP is active The multiple setting of the stage 1 zero sequence overcurrent protection when CLP is active The time setting of the stage 1 zero sequence overcurrent protection when CLP is active The multiple setting of the stage 2 zero sequence overcurrent protection when CLP is active The time setting of the stage 2 zero sequence overcurrent protection when CLP is active The multiple setting of the stage 3 zero sequence overcurrent protection when CLP is active The time setting of the stage 3 zero sequence overcurrent protection when CLP is active The multiple setting of the stage 4 zero sequence overcurrent protection when CLP is active The time setting of the stage 4 zero sequence overcurrent protection when CLP is active The time multiplier setting of the zero sequence IDMT overcurrent protection when CLP is active
0~100s
0.001s
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
0~100s
0.001s
0.05~100.0
0.001
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
0~100s
0.001s
1.00~10.00
0.001
0~100s
0.001s
0.05~100.0
0.001
7.3.8 SOTF Protection Settings The SOTF protection settings (in the submenu “SOTF Settings”) are used to determine the characteristic of the SOTF protection. All the settings of the SOTF protection are listed in the following table. No.
Menu text
1
SOTF.t_En
2
SOTF.Opt_Mode
3
50PSOTF.I_Set
Explanation The enabling time setting of the SOTF protection The setting for selecting the acceleration tripping mode of the SOTF protection The current setting of the SOTF overcurrent protection
7-14
Range
Step
0~100s
0.001s
0~1
1
0.05In~30In
0.001A
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 4
50PSOTF.t_Op
5
50PSOTF.En
6
50PSOTF.OutMap
7
50GSOTF.3I0_Set
8
50GSOTF.t_Op
9
50GSOTF.En
10
50GSOTF.OutMap
The time setting of the SOTF overcurrent protection The logic setting of the SOTF overcurrent protection
0~100s
0.001s
0~1
1
The output matrix setting of the SOTF overcurrent
0x00000000 ~
protection
0x7FFFFFFF
The current setting of the zero sequence SOTF overcurrent protection The time setting of the zero sequence SOTF overcurrent protection The logic setting of the zero sequence SOTF overcurrent protection
1
0.05In~30In
0.001A
0~100s
0.001s
0~1
1
The output matrix setting of the zero sequence
0x00000000 ~
SOTF overcurrent protection
0x7FFFFFFF
1
NOTE! 1.
The setting [SOTF.t_En] is used to enable the SOTF protection for the appointed time delay, when the enabling conditions are satisfied (See Section 3.10).
2.
The setting [SOTF.Opt_Mode] is used for selecting the acceleration tripping mode of the SOTF protection. Setting as “1” means accelerated tripping before auto-reclosing; and setting as “0” means accelerated tripping after auto-reclosing.
7.3.9 Thermal Overload Protection Settings The thermal overload protection settings (in submenu “ThOvLd Settings”) are used to determine the characteristic of the thermal overload protection. All the settings of the thermal overload protection are listed in the following table. No.
Menu text
1
49.Ib_Set
2
49.Tau
Explanation The reference current setting of the thermal overload protection The time constant setting of the IDMT overload protection
Range
Step
0.05In~3.0In
0.001A
10~6000s
0.001s
1.0~3.0
0.001
1.0~3.0
0.001
0~1
1
0~1
1
The factor setting of the thermal overload 3
49.K_Trp
protection which is associated to the thermal state formula The factor setting of the thermal overload alarm
4
49.K_Alm
element which is associated to the thermal state formula
5
49.En_Trp
6
49.En_Alm
The logic setting of the thermal overload protection for tripping The logic setting of the thermal overload protection for alarming
7-15
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 7
49.OutMap
The output matrix setting of the thermal overload
0x00000000 ~
protection
0x7FFFFFFF
1
7.3.10 Overvoltage and Undervoltage Protection Settings The overvoltage and undervoltage protection settings (in the submenu “Voltage Settings”) are used to determine the characteristic of the overvoltage and undervoltage protections. All the settings of the overvoltage and undervoltage protections are listed in the following table. No.
Menu text
1
27P.Opt_1P/3P
2
27P.Opt_Up/Upp
3
27P1.U_Set
4
27P1.t_Op
5
27P1.K_DropOut
6
27P1.En
7
27P1.OutMap
8
27P2.U_Set
9
27P2.t_Op
10
27P2.K_DropOut
11
27P2.En
12
27P2.OutMap
13
59P.Opt_1P/3P
14
59P.Opt_Up/Upp
15
59P1.U_Set
16
59P1.t_Op
17
59P1.K_DropOut
Explanation The
setting
for
selecting
Range the
undervoltage
protection calculation method The setting for selecting the voltage input mode for the undervoltage protection The voltage setting of the stage 1 undervoltage protection The time setting of the stage 1 undervoltage protection The dropout coefficient setting of the stage 1 undervoltage protection The logic setting of the stage 1 undervoltage protection
0~1
1
0~1
1
2~120V
0.001V
0~100s
0.001s
1.03~3.0
0.001
0~1
1
The output matrix setting of the stage 1
0x00000000 ~
undervoltage protection
0x7FFFFFFF
The voltage setting of the stage 2 undervoltage protection The time setting of the stage 2 undervoltage protection The dropout coefficient setting of the stage 2 undervoltage protection The logic setting of the stage 2 undervoltage protection
0.001V
0~100s
0.001s
1.03~3.0
0.001
0~1
1
0x00000000 ~
undervoltage protection
0x7FFFFFFF
setting
for
selecting
the
overvoltage
protection calculation method The setting for selecting the voltage input mode for the overvoltage protection The voltage setting of the stage 1 overvoltage protection The time setting of the stage 1 overvoltage protection The dropout coefficient setting of the stage 1 overvoltage protection
7-16
1
2~120V
The output matrix setting of the stage 2 The
Step
1
0~1
1
0~1
1
57.7~200V
0.001V
0~100s
0.001s
0.93~0.97
0.001
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 18
59P1.En
19
59P1.OutMap
20
59P2.U_Set
21
59P2.t_Op
22
59P2.K_DropOut
23
59P2.En
24
59P2.OutMap
The logic setting of the stage 1 overvoltage protection
0~1
1
The output matrix setting of the stage 1
0x00000000 ~
overvoltage protection
0x7FFFFFFF
The voltage setting of the stage 2 overvoltage protection The time setting of the stage 2 overvoltage protection The dropout coefficient setting of the stage 2 overvoltage protection The logic setting of the stage 2 overvoltage protection
1
57.7~200V
0.001V
0~100s
0.001s
0.93~0.97
0.001
0~1
1
The output matrix setting of the stage 2
0x00000000 ~
overvoltage protection
0x7FFFFFFF
1
NOTE! 1.
See Section 3.12 and Section 3.13 for more details about the settings [27P.Opt_1P/3P], [27P.Opt_Up/Upp], [59P.Opt_1P/3P] and [59P.Opt_Up/Upp].
7.3.11 Negative Sequence Overvoltage Protection Settings The negative sequence overvoltage protection settings (in the submenu “NegOV Settings”) are used to determine the characteristic of the negative sequence overvoltage protection. All the settings of the negative sequence overvoltage protection are listed in the following table. No.
Menu text
1
59Q.U2_Set
2
59Q.t_Op
3
59Q.En
4
59Q.OutMap
Explanation The voltage setting of the negative sequence overvoltage protection The time setting of the negative sequence overvoltage protection The logic setting of the negative sequence overvoltage protection
Range
Step
2~120V
0.001V
0~100s
0.001s
0~1
1
The output matrix setting of the negative
0x00000000 ~
sequence overvoltage protection
0x7FFFFFFF
1
7.3.12 Zero Sequence Overvoltage Protection Settings The zero sequence overvoltage protection settings (in the submenu “ROV Settings”) are used to determine the characteristic of the zero sequence overvoltage protection. All the settings of the zero sequence overvoltage protection are listed in the following table. No. 1
Menu text 59G1.3U0_Set
Explanation The voltage setting of the stage 1 zero sequence overvoltage protection
Range 2~160V
Step 0.001V
7-17
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 2
59G1.t_Op
3
59G1.En
4
59G1.OutMap
5
59G2.3U0_Set
6
59G2.t_Op
7
59G2.En
8
59G2.OutMap
The time setting of the stage 1 zero sequence overvoltage protection The logic setting of the stage 1 zero sequence overvoltage protection
0~100s
0.001s
0~1
1
The output matrix setting of the stage 1 zero
0x00000000 ~
sequence overvoltage protection
0x7FFFFFFF
The voltage setting of the stage 2 zero sequence overvoltage protection The time setting of the stage 2 zero sequence overvoltage protection The logic setting of the stage 2 zero sequence overvoltage protection
1
2~160V
0.001V
0~100s
0.001s
0~1
1
The output matrix setting of the stage 2 zero
0x00000000 ~
sequence overvoltage protection
0x7FFFFFFF
1
7.3.13 Frequency Protection Settings The frequency protection settings (in the submenu “FreqProt Settings”) are used to determine the characteristic of the frequency protection. All the settings of the frequency protection are listed in the following table. No.
Menu text
1
81.Upp_VCE
2
81U1.f_Set
3
81U1.t_Op
4
81U1.En
5
81U1.OutMap
6
81U2.f_Set
7
81U2.t_Op
8
81U2.En
9
81U2.OutMap
10
81U3.f_Set
11
81U3.t_Op
Explanation
Range
The setting of the low voltage blocking element of the frequency protection (phase-to-phase voltage) The
frequency
setting
of
the
stage
1
under-frequency protection The time setting of the stage 1 under-frequency protection The logic setting of the stage 1 under-frequency protection
10~120V
0.001V
45~60Hz
0.001Hz
0~100s
0.001s
0~1
1
The output matrix setting of the stage 1
0x00000000 ~
under-frequency protection
0x7FFFFFFF
The
frequency
setting
of
the
stage
2
under-frequency protection The time setting of the stage 2 under-frequency protection The logic setting of the stage 2 under-frequency protection
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
under-frequency protection
0x7FFFFFFF
frequency
setting
of
the
stage
3
under-frequency protection The time setting of the stage 3 under-frequency protection
7-18
1
45~60Hz
The output matrix setting of the stage 2 The
Step
1
45~60Hz
0.001Hz
0~100s
0.001s
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 12
81U3.En
13
81U3.OutMap
14
81U4.f_Set
15
81U4.t_Op
16
81U4.En
17
81U4.OutMap
18
81O1.f_Set
19
81O1.t_Op
20
81O1.En
21
81O1.OutMap
22
81O2.f_Set
23
81O2.t_Op
24
81O2.En
25
81O2.OutMap
26
81O3.f_Set
27
81O3.t_Op
28
81O3.En
29
81O3.OutMap
30
81O4.f_Set
31
81O4.t_Op
32
81O4.En
33
81O4.OutMap
The logic setting of the stage 3 under-frequency protection
0~1
The output matrix setting of the stage 3
0x00000000 ~
under-frequency protection
0x7FFFFFFF
The
frequency
setting
of
the
stage
4
under-frequency protection The time setting of the stage 4 under-frequency protection The logic setting of the stage 4 under-frequency protection
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
under-frequency protection
0x7FFFFFFF
frequency
setting
of
the
stage
1
over-frequency protection The time setting of the stage 1 over-frequency protection The logic setting of the stage 1 over-frequency protection
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
over-frequency protection
0x7FFFFFFF
frequency
setting
of
the
stage
2
over-frequency protection The time setting of the stage 2 over-frequency protection The logic setting of the stage 2 over-frequency protection
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
over-frequency protection
0x7FFFFFFF
frequency
setting
of
the
stage
3
over-frequency protection The time setting of the stage 3 over-frequency protection The logic setting of the stage 3 over-frequency protection
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
over-frequency protection
0x7FFFFFFF
frequency
setting
of
the
stage
4
over-frequency protection The time setting of the stage 4 over-frequency protection The logic setting of the stage 4 over-frequency protection
1
50~65Hz
The output matrix setting of the stage 3 The
1
50~65Hz
The output matrix setting of the stage 2 The
1
50~65Hz
The output matrix setting of the stage 1 The
1
45~60Hz
The output matrix setting of the stage 4 The
1
1
50~65Hz
0.001Hz
0~100s
0.001s
0~1
1
The output matrix setting of the stage 4
0x00000000 ~
over-frequency protection
0x7FFFFFFF
1
7-19
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 34
81R.dt_Set
35
81R1.df/dt_Set
36
81R1.f_Pkp
37
81R1.t_Op
38
81R1.En
39
81R1.OutMap
40
81R2.df/dt_Set
41
81R2.f_Pkp
42
81R2.t_Op
43
81R2.En
44
81R2.OutMap
45
81R3.df/dt_Set
46
81R3.f_Pkp
47
81R3.t_Op
48
81R3.En
49
81R3.OutMap
50
81R4.df/dt_Set
51
81R4.f_Pkp
52
81R4.t_Op
53
81R4.En
54
81R4.OutMap
The cycle number for the calculation of the frequency rate-of-change protection The
setting
of
the
stage
1
frequency
rate-of-change protection The pickup frequency setting of the stage 1 frequency rate-of-change protection The time setting of the stage 1 frequency rate-of-change protection The logic setting of the stage 1 frequency rate-of-change protection
3~8
1
-10~10Hz/s
0.001Hz
0~100s
0.001s
0~1
1
0x00000000 ~
rate-of-change protection
0x7FFFFFFF
setting
of
the
stage
2
frequency
rate-of-change protection The pickup frequency setting of the stage 2 frequency rate-of-change protection The time setting of the stage 2 frequency rate-of-change protection The logic setting of the stage 2 frequency rate-of-change protection
-10~10Hz/s
0.001s
0~1
1
0x7FFFFFFF
of
the
stage
3
frequency
The pickup frequency setting of the stage 3 frequency rate-of-change protection The time setting of the stage 3 frequency rate-of-change protection The logic setting of the stage 3 frequency rate-of-change protection
-10~10Hz/s
0.001s
0~1
1
0x7FFFFFFF
the
stage
4
frequency
rate-of-change protection The pickup frequency setting of the stage 4 frequency rate-of-change protection The time setting of the stage 4 frequency rate-of-change protection The logic setting of the stage 4 frequency rate-of-change protection
-10~10Hz/s
1 0.001 Hz/s
45~65Hz
0.001Hz
0~100s
0.001s
0~1
1
The output matrix setting of the stage 4 frequency
0x00000000 ~
rate-of-change protection
0x7FFFFFFF
7-20
Hz/s
0~100s
rate-of-change protection of
0.001
0.001Hz
0x00000000 ~
setting
1
45~65Hz
The output matrix setting of the stage 3 frequency The
Hz/s
0~100s
rate-of-change protection setting
0.001
0.001Hz
0x00000000 ~
rate-of-change protection
1
45~65Hz
The output matrix setting of the stage 2 frequency The
Hz/s
45~65Hz
The output matrix setting of the stage 1 frequency The
0.001
1
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings
7.3.14 Auto-recloser Settings The auto-recloser settings (in submenu “AR Settings”) are used to determine the characteristic of the auto-recloser. All the settings of the auto-recloser are listed in the following table. No.
Menu text
1
79.t_CBClsd
2
79.t_DDO_BlkAR
3
79.t_CBReady
4
79.t_Fail
5
79.t_3PS1
6 7
79.t_3PS2 79.t_3PS3
Explanation The time setting of the minimum time delay for ensuring the CB is closed The time pulse width for ensuring the AR blocking signal The time setting of the time delay for ensuring the CB is ready The time setting of the time delay for checking the CB position The time setting of the 1st shot auto-recloser nd
The time setting of the 2
Range
Step
0.01~600s
0.001s
0.01~600s
0.001s
0.01~600s
0.001s
0.01~600s
0.001s
0~600s
0.001s
shot auto-recloser
0~600s
0.001s
rd
The time setting of the 3 shot auto-recloser
0~600s
0.001s
th
8
79.t_3PS4
The time setting of the 4 shot auto-recloser
0~600s
0.001s
9
79.t_Reclaim
The reclaim time setting of the auto-recloser
0~600s
0.001s
10
79.t_DDO_AR
The pulse width of the auto-recloser
0-4.00s
0.001s
11
79.N_Rcls
The shot number setting of the auto-recloser
1~4
1
12
79.En_SynChk
0~1
1
13
79.En_DdChk
0~1
1
14
79.En_FailChk
0~1
1
15
79.En
The logic setting of the auto-recloser
0~1
1
16
79.OutMap
The output matrix setting of the auto-recloser
The logic setting of the synchronism check function of the auto-recloser The logic setting of the dead check function of the auto-recloser The logic setting of the CB position check function of the auto-recloser
0x00000000 ~ 0x7FFFFFFF
1
NOTE! 1.
If the settings [79.En_SynChk] and [79.En_DdChk] are both set as “0”, it means that the non-check mode is applied in the auto-reclosing logic.
7.3.15 Mechanical Protection Settings The auto-recloser settings (in submenu “MR Prot Settings”) are used to determine the characteristic of the mechanical protection. All the settings of the mechanical protection are listed in the following table.
7-21
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings No.
Menu text
1
MR1.t_MR
2
MR1.En
3
MR1.OutMap
4
MR2.t_MR
5
MR2.En
6
MR2.OutMap
7
MR3.t_MR
8
MR3.En
9
MR3.OutMap
10
MR4.t_MR
11
MR4.En
12
MR4.OutMap
Explanation The
time
setting
of
the
Range No.1
mechanical
protection The logic setting of the No.1 mechanical protection
0~4000s
0.001s
0~1
1
The output matrix setting of the No.1 mechanical
0x00000000 ~
protection
0x7FFFFFFF
The
time
setting
of
the
No.2
mechanical
protection The logic setting of the No.2 mechanical protection
0.001s
0~1
1
0x00000000 ~
protection
0x7FFFFFFF
time
setting
of
the
No.3
mechanical
protection The logic setting of the No.3 mechanical protection
0.001s
0~1
1
0x00000000 ~
protection
0x7FFFFFFF
time
setting
of
the
No.4
mechanical
protection The logic setting of the No.4 mechanical protection
1
0~4000s
The output matrix setting of the No.3 mechanical The
1
0~4000s
The output matrix setting of the No.2 mechanical The
Step
1
0~4000s
0.001s
0~1
1
The output matrix setting of the No.4 mechanical
0x00000000 ~
protection
0x7FFFFFFF
1
7.3.16 Supervision Element Settings The supervision element settings (in the submenu “Superv Settings”) are used to determine the parameters of the supervision element. All the settings of the supervision element are listed in the following table. No.
Menu text
Explanation
Range
Step
1
CTS.3I0_Set
The threshold current setting of the CTS element
0.05In~30In
0.001A
2
CTS.3U0_Set
The threshold voltage setting of the CTS element
0.01~120V
0.001V
3
CTS.En
The logic setting of the CTS element
0~1
1
4
VTS.I_Set
0.05In~30In
0.001A
5
VTS.I2_Set
0.05In~30In
0.001A
6
VTS.En
0~1
1
7
VTS.En_SynVT
0~1
1
The phase current setting of the protection VTS element The negative sequence current setting of the protection VTS element The logic setting of the protection VTS element The logic setting of the synchro-check VTS element
7-22
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings
7.3.17 Binary Output Matrix Settings The binary output matrix settings (in the submenu “CfgBO Settings”) are used to determine the parameters of the last eight binary outputs in module NR4304 and NR4521. All the settings of the binary outputs are listed in the following table. No.
Menu text
Explanation
Range
Step
1
B09.BO_03.t_Dwell
The dwell time of the output “B09.BO_03”
0~100s
0.001s
2
B09.BO_04.t_Dwell
The dwell time of the output “B09.BO_04"
0~100s
0.001s
3
B09.BO_05.t_Dwell
The dwell time of the output “B09.BO_05”
0~100s
0.001s
4
B09.BO_06.t_Dwell
The dwell time of the output “B09.BO_06”
0~100s
0.001s
5
B09.BO_07.t_Dwell
The dwell time of the output “B09.BO_07”
0~100s
0.001s
6
B09.BO_08.t_Dwell
The dwell time of the output “B09.BO_08”
0~100s
0.001s
7
B06.BO_01.t_Dwell
The dwell time of the output “B06.BO_01”
0~100s
0.001s
8
B06.BO_02.t_Dwell
The dwell time of the output “B06.BO_02”
0~100s
0.001s
9
B06.BO_03.t_Dwell
The dwell time of the output “B06.BO_03”
0~100s
0.001s
10
B06.BO_04.t_Dwell
The dwell time of the output “B06.BO_04”
0~100s
0.001s
11
B06.BO_05.t_Dwell
The dwell time of the output “B06.BO_05”
0~100s
0.001s
12
B06.BO_06.t_Dwell
The dwell time of the output “B06.BO_06”
0~100s
0.001s
NOTE! 1.
The setting [Bxx.BO_xx.t_Dwell] (x: a number; 1, 2 etc.) is used to set the dwell time of the relevant binary output in module NR4304 and NR4521.
7.4 Monitor and Control Settings The monitor and control settings (in the submenu “Mon\Ctrl Settings”) are used to determine the parameters of the monitor and control function of this relay.
7.4.1 Closing Synchronism Check Settings The closing synchronism check settings (in the submenu “Syn Settings”) are used to determine the settings of the closing synchronism check function. All the settings of the closing synchronism check function are listed in the following table. No.
Menu text
Explanation
Range
Step
1
25.U_Dd
The voltage setting of the system dead check
2~120V
0.001V
2
25.U_Lv
The voltage setting of the system live check
2~120V
0.001V
3
25.U_Comp
0.2~5.0
0.001
4
25.phi_Comp
0~360°
1°
The compensation coefficient setting of the synchro-check voltage The compensation phase angle setting of the synchro-check voltage
7-23
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 5
25.Opt_Usyn
6
25.t_ClsCB
7
25M.U_Diff
8
25M.f_Diff
9
25M.df/dt
10
25M.phi_Diff
11
25M.t_Wait
12
25M.Opt_DdChk
13
25M.En_SynChk
14
25M.En_DdChk
15
25A.U_Diff
16
25A.f_Diff
17
25A.phi_Diff
18
25A.t_Wait
19
25A.Opt_DdChk
20
25A.t_DdChk
21
25A.t_SynChk
The voltage type setting of the synchronism check closing function The circuit breaker closing time setting of the closing synchronism check function The voltage difference setting of the manual closing synchronism check function The frequency difference setting of the manual closing synchronism check function The frequency rate-of-change setting of the manual closing synchronism check function The phase angle difference setting of the manual closing synchronism check function The waiting time setting of the manual closing synchronism check function The setting for selecting the dead check mode of the manual closing function The logic setting of the synchronism check function of the manual closing function The logic setting of the dead check function of the manual closing function The voltage difference setting of the auto-closing synchronism check function The
frequency
difference
setting
of
the
auto-closing synchronism check function The phase angle difference setting of the auto-closing synchronism check function The waiting time setting of the auto-closing synchronism check function The setting for selecting the dead check mode of the auto-closing synchronism check function The time setting of the dead check function of the auto-closer The time setting of the synchronism check function of the auto-closer
0~5
1
0.02~1.00s
0.001s
2~120V
0.001V
0~2Hz
0.001Hz
0~3Hz/s
0.001 Hz/s
0~60°
1°
0.01~60s
0.001s
1~7
1
0~1
1
0~1
1
2~120V
0.001V
0~2Hz
0.001Hz
0~60°
1°
0.01~60s
0.001s
1~7
1
0.01~25s
0.001s
0.01~25s
0.001s
NOTE! 1.
The settings [25.U_Comp] and [25.phi_Comp] are used to compensate the synchro-check voltage, and make the compensated synchro-check voltage is equal to the corresponding protection voltage in normal operation situation. The settings [25.U_Comp] and [25.phi_Comp] can be set according to following formula.
7-24
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings
⎧[25.U _ Comp] = U Pr ot _ Normal ÷ U Syn _ Normal ⎨ ⎩[25. phi _ Comp ] = Φ Pr ot _ Normal − Φ Syn _ Normal In general application, the setting [25.U_Comp] is set as “1.000”, and the setting [25.phi_Comp] is set as “0°”. For example, the synchro-check voltage and the protection are gotten from different sides of a power transformer respectively. z
Synchro-check VT: 400kV Primary, 110V Secondary
z
Protection VT: 200kV Primary, 100V Secondary
z
Power transformer: 400kV / 200kV, vector group Yd11
The synchro-check VT supplies 110V secondary rated voltage while the protection VT supplies 100V secondary rated voltage. Therefore, this difference must be balanced: [25.U_Comp] = 100V / 110V = 0.91 The transformer vector group is defined from the high voltage side to the low voltage side. In this example, the synchro-check voltage is one of the voltages of the high voltage side, i.e. the compensation angle setting is 30° (according to the vector group): [25.phi_Comp] = 30° 2.
The setting [25.Opt_Usyn] is used to select the synchro-check voltage source of the synchronism check element, and this relay can use the corresponding protection voltage for the synchronism check element. Setting Value
0
1
2
3
4
5
Voltage Type
Ua
Ub
Uc
Uab
Ubc
Uca
7.4.2 Manual Control Settings The manual control settings (in the submenu “Control Settings”) are used to determine the parameters of the manual control function (local or remote closing and tripping). All the settings of the manual control are listed in the following table. No.
Menu text
1
Ctrl1.t_PW_Opn
2
Ctrl1.t_PW_Cls
3
Ctrl1.OutMap_Opn
4
Ctrl1.OutMap_Cls
Explanation The output pulse width of the No.1 manual tripping element The output pulse width of the No.1 manual closing element
Range
Step
0.1~99.0s
0.001s
0.1~99.0s
0.001s
The output matrix setting of the No.1 manual
0x00000000 ~
tripping element
0x7FFFFFFF
The output matrix setting of the No.1 manual
0x00000000 ~
closing element
0x7FFFFFFF
1 1
7-25
PCS-9611 Feeder Relay Date: 2011-08-29
7 Settings 5
Ctrl2.t_PW_Opn
6
Ctrl2.t_PW_Cls
7
Ctrl2.OutMap_Opn
8
Ctrl2.OutMap_Cls
9
Ctrl3.t_PW_Opn
10
Ctrl3.t_PW_Cls
11
Ctrl3.OutMap_Opn
12
Ctrl3.OutMap_Cls
13
Ctrl4.t_PW_Opn
14
Ctrl4.t_PW_Cls
15
Ctrl4.OutMap_Opn
16
Ctrl4.OutMap_Cls
17
Ctrl5.t_PW_Opn
18
Ctrl5.t_PW_Cls
19
Ctrl5.OutMap_Opn
20
Ctrl5.OutMap_Cls
The output pulse width of the No.2 manual tripping element The output pulse width of the No.2 manual closing element
0.1~99.0s
0.001s
0.1~99.0s
0.001s
The output matrix setting of the No.2 manual
0x00000000 ~
tripping element
0x7FFFFFFF
The output matrix setting of the No.2 manual
0x00000000 ~
closing element
0x7FFFFFFF
The output pulse width of the No.3 manual tripping element The output pulse width of the No.3 manual closing element
0.001s
0.1~99.0s
0.001s
0x00000000 ~
tripping element
0x7FFFFFFF
The output matrix setting of the No.3 manual
0x00000000 ~
closing element
0x7FFFFFFF
tripping element The output pulse width of the No.4 manual closing element
0.1~99.0s
0.001s
tripping element
0x7FFFFFFF
The output matrix setting of the No.4 manual
0x00000000 ~
closing element
0x7FFFFFFF
The output pulse width of the No.5 manual closing element
1 0.001s
0x00000000 ~
tripping element
1
0.1~99.0s
The output matrix setting of the No.4 manual
The output pulse width of the No.5 manual
1
0.1~99.0s
The output matrix setting of the No.3 manual
The output pulse width of the No.4 manual
1
1 1
0.1~99.0s
0.001s
0.1~99.0s
0.001s
The output matrix setting of the No.5 manual
0x00000000 ~
tripping element
0x7FFFFFFF
The output matrix setting of the No.5 manual
0x00000000 ~
closing element
0x7FFFFFFF
1 1
7.4.3 Interlock Settings The interlock settings (in the submenu “Interlock Settings”) are used to determine whether the interlock check of the manual control function (local or remote closing and tripping) is enabled. All the settings of the interlock check function are listed in the following table. No.
Menu text
1
Interlock1.En_BlkOpn
2
Interlock1.En_BlkCls
Explanation The logic setting of the interlock check of the No.1 manual tripping element The logic setting of the interlock check of the No.1 manual closing element
7-26
Range
Step
0~1
1
0~1
1
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7 Settings 3
Interlock2.En_BlkOpn
4
Interlock2.En_BlkCls
5
Interlock3.En_BlkOpn
6
Interlock3.En_BlkCls
7
Interlock4.En_BlkOpn
8
Interlock4.En_BlkCls
9
Interlock5.En_BlkOpn
10
Interlock5.En_BlkCls
The logic setting of the interlock check of the No.2 manual tripping element The logic setting of the interlock check of the No.2 manual closing element The logic setting of the interlock check of the No.3 manual tripping element The logic setting of the interlock check of the No.3 manual closing element The logic setting of the interlock check of the No.4 manual tripping element The logic setting of the interlock check of the No.4 manual closing element The logic setting of the interlock check of the No.5 manual tripping element The logic setting of the interlock check of the No.5 manual closing element
0~1
1
0~1
1
0~1
1
0~1
1
0~1
1
0~1
1
0~1
1
0~1
1
NOTE! 1.
The interlock check function can be programmed through the PCS-PC configuration tool auxiliary software.
7.5 Logic Link Settings The logic link settings (in the submenu “Logic Links”) are used to determine whether the relevant function of this relay is enabled or disabled. If this relay supports the logic link function, it will have a corresponding submenu in the submenu “Logic Links” for the logic link settings.
7.5.1 Function Link Settings The function link settings (in the submenu “Function Links”) are used to determine whether the relevant functional elements are enabled or disabled.
7.5.2 GOOSE Link Settings The GOOSE link settings (in the submenu “GOOSE Links”) are used to determine whether the relevant GOOSE elements are enabled or disabled. See the GOOSE related instruction manual for the more information and details.
7.5.3 SV Link Settings The SV (sampled value) link settings (in the submenu “SV Links”) are used to determine whether the SV elements are enabled or disabled.
7.5.4 Spare Link Settings The spare link settings (in the submenu “Spare Links”) are used for future application. It can be 7-27
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7 Settings
defined as one of above three link settings through the PCS-PC configuration tool.
7.6 Device Related Settings The device related settings (in the submenu “Device Setup”) are used for setting the operation parameters and communication parameters of this device.
7.6.1 Device Settings The device settings (in the submenu “Device Settings”) are used for setting the operation parameters of this device. The following table lists all the communication parameters. No.
Menu text
1
HDR_EncodeMode
2
Opt_Caption_103
3
B07.Un_BinaryInput
Explanation
Range
The encoding type of the HDR waveform file, it is only reserved for the manufacturer The language of the group caption when the IEC60870-5-103 is adopted The rated voltage value of the binary input
Step
0~1
1
0~1
1
0~3
1
NOTE! 1.
The setting [Opt_Caption_103] is used for selecting the language of the group caption when the IEC60870-5-103 protocol is adopted. If it is set as “0”, the group caption language is English; and if it is set as “1”, the group caption language is Chinese.
2.
The setting [B07.Un_BinaryInput] is used for selecting the rated voltage of the binary input. Setting Value
0
1
2
3
Rated Voltage
24V
48V
110V
220V
7.6.2 Communication Settings The communication settings (in the submenu “Comm Settings”) are used for communication with substation monitoring system, substation controlling system or remote SCADA. The following table lists all the communication parameters. No.
Menu text
Explanation
Range
1
IP_LAN1
The IP address of the No.1 Ethernet port
000.000.000.000
2
Mask_LAN1
The mask code of the No.1 Ethernet port
~255.255.255.255
3
IP_LAN2
The IP address of the No.2 Ethernet port
000.000.000.000
4
Mask_LAN2
The mask code of the No.2 Ethernet port
~255.255.255.255
5
En_LAN2
The logic setting of the No.2 Ethernet network
0~1
6
IP_LAN3
The IP address of the No.3 Ethernet port
000.000.000.000
7
Mask_LAN3
The mask code of the No.3 Ethernet port
~255.255.255.255
8
En_LAN3
The logic setting of the No.3 Ethernet network
0~1
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7 Settings 9
IP_LAN4
The IP address of the No.4 Ethernet port
000.000.000.000
10
Mask_LAN4
The mask code of the No.4 Ethernet port
~255.255.255.255
11
En_LAN4
The logic setting of the No.4 Ethernet network
0~1
12
Gateway
The IP address of the network gateway of this
000.000.000.000
device
~255.255.255.255
13
En_Broadcast
14
Addr_RS485A
The communication address of the serial port A
0 ~ 255
15
Baud_RS485A
The communication baud rate of the serial port A
0~5
16
Protocol_RS485A
The communication protocol of the serial port A
0~2
17
Addr_RS485B
The communication address of the serial port B
0 ~ 255
18
Baud_RS485B
The communication baud rate of the serial port B
0~5
19
Protocol_RS485B
The communication protocol of the serial port B
0~2
20
Threshold_Measmt
21
Period_Measmt
22
Format_Measmt
23
Baud_Printer
The baud rate of the print port
0~5
24
En_AutoPrint
The logic setting of the auto-printing function
0~1
25
Opt_TimeSyn
The time synchronization mode
0~3
26
IP_Server_SNTP
The IP address of the SNTP server
27
OffsetHour_UTC
The hour code of the time zone
-12 ~ 12
28
OffsetMinute_UTC
The minute code of the time zone
0 ~ 60
29
En_DaulNet_GOOSE
The logic setting of the UDP broadcast function when the IEC60870-5-103 protocol is adopted
The metering value change differentiate percent for uplink communication The time setting of circularly sending metering for the IEC60870-5-103 protocol The metering data format for the IEC60870-5-103 protocol
The logic setting of the dual-network GOOSE function
0~1
0 ~ 100 (%) 0 ~ 65535s 0~1
000.000.000.000 ~255.255.255.255
0~1
NOTE! 1.
Above table listed all the communication settings, the device delivered to the user maybe only show some settings of them according to the communication interface configuration. If only the Ethernet ports are applied, the settings about the serial ports (port A and port B) are not listed in this submenu. And the settings about the Ethernet ports only listed in this submenu according to the actual number of Ethernet ports.
2.
The standard arrangement of the Ethernet port is two, at most four (predetermined when ordering). Set the IP address according to actual arrangement of Ethernet numbers and the un-useful port/ports need not be configured. If the PCS-PC configuration tool auxiliary software is connected with this device through the Ethernet, the IP address of the PCS-PC must be set as one of the available IP address of this device.
3.
The setting [En_Broadcast] is used to enable or disable this relay to transmit the UDP broadcast messages when the IEC60870-5-103 protocol is adopted. If it is set as “0”, this 7-29
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7 Settings
relay does not transmit any UDP broadcast message; and if it is set as “1”, this relay can transmit UDP broadcast messages. 4.
The setting [Addr_RS485A] and [Addr_RS485B] are used to set the communication address of the serial ports (port A and port B); if a protocol over serial communication is adopted.
5.
The settings [Baud_RS485A], [Baud_RS485B] and [Baud_Printer] are respectively used to set the communication baudrate of each serial port (port A, port B and print port).
6.
Setting Value
0
1
2
3
4
5
Baudrate (bsp)
4800
9600
19200
38400
57600
115200
The settings [Protocol_RS485A] and [Protocol_RS485B] are respectively used to set the communication protocol of each serial port (port A and port B). Setting Value
Protocol
Setting Value
0
IEC60870-5-103
2
Modbus
1 Other
Protocol Reserved Not available
7.
The setting [Threshold_Measmt] is used to decide whether the present metering value is sends forward. Only the change percent of a metering value is greater than this setting, the relevant metering value can be sent forward.
8.
The circle time for sending telemetering [Period_Measmt]: It represents the time period when this device sends metering data forward. When this setting is set as “0”, it means that the equipment will not send metering data forward at a fixed time (the inquiry issued by SCADA still can be responded during this period). This setting may be set according to actual field condition and can be set as “0” when the communication function is not used. The default value is “0” when the equipment is delivered.
9.
The setting [Format_Measmt] is used to select the metering data format in the GDD (Generic Data Description) message when the IEC60870-5-103 protocol is adopted. If it is set as “0”, the metering data format type is “12” (Measurand with Quality Descriptor); and if it is set as “1”, the metering data format type is “7” (R32.23, IEEE 754).
10. The setting [Opt_TimeSyn] is used to select the external time synchronization source. Setting Value 0 1 2 3
External Time Synchronization Mode Electrical signal time synchronization mode: PPS signal (RS-485), IRIG-B signal (RS-485), PPM signal (Binary input), PPS signal (Binary input) Message time synchronization mode: SNTP protocol (unicast or broadcast), other SAS time synchronization message (such as IEC60870-5-103) etc. Extension module time synchronization mode: IEEE1588 protocol, PPS signal (Optical interface), IRIG-B signal (Optical interface) No external time synchronization source
If this setting is set as “1”, if this device does not receive time synchronization message or receives error time synchronization message, it will alarm; and if this setting is set as “0” or “2”, if this device does not receive the time synchronization signal, it will alarm and switch to
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7 Settings
message time synchronization mode automatically. 11. The setting [IP_Server_SNTP] is used to set the IP address of the SNTP server, if this relay adopts the SNTP time synchronization. If the SNTP time synchronization is not adopted, it is recommended to set as “000.000.000.000”. 12. If the IEC61850 protocol is adopted in substations, the time tags of communication messages are required according to UTC (Universal Time Coordinated) time. The setting [OffsetHour_UTC] is used to set the hour offset of the current time zone to the GMT (Greenwich Mean Time) zone; for example, if a relay is applied in China, the time zone of China is east 8th time zone, so this setting is set as “8”. The setting [OffsetMinute_UTC] is used to set the minute offset of the current time zone to the GMT zone. Time zone
GMT zone
East 1st
East 2nd
East 3rd
East 4th
East 5th
0
1
2
3
4
5
Setting Time zone
th
East 6
Setting Time zone
East 7
6
Setting Time zone
th
7 th
East 8 8
st
East/West 12
West 1
-12/12
-1
East 9 9
nd
West 2 -2
th
th
rd
West 3 -3
th
th
East 11
10
11 th
West 4 -4
th
th
East 10
West 5th -5
West 6
West 7
West 8
West 9
West 10
West 11th
-6
-7
-8
-9
-10
-11
Setting
th
th
th
13. The setting [En_DualNet_GOOSE] is used to enable or disable the dual-network GOOSE function if the GOOSE function is supported in this relay. If it is set as “1”, the dual-network GOOSE function is adopted; otherwise, the single-network GOOSE function is adopted.
7.7 Copy Settings It (the submenu “Copy Settings”) is used to copy the active settings to another group, see Section 8.2.6.3 for more details.
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7-32
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8 Human Machine Interface
8 Human Machine Interface Table of Contents 8.1 Overview ...........................................................................................................8-1 8.1.1 Design................................................................................................................................ 8-1 8.1.2 Functionality....................................................................................................................... 8-1 8.1.3 Keypad and Keys............................................................................................................... 8-1 8.1.4 LED indications.................................................................................................................. 8-2
8.2 Understand the HMI Menu Tree .......................................................................8-3 8.2.1 Overview............................................................................................................................ 8-3 8.2.2 Default Display under Normal Operation Condition ........................................................... 8-3 8.2.3 Submenu of “Measurements” ............................................................................................ 8-5 8.2.4 Submenu of “Status” .......................................................................................................... 8-8 8.2.5 Submenu of “Records”..................................................................................................... 8-12 8.2.6 Submenu of “Settings” ..................................................................................................... 8-15 8.2.7 Submenu of “Print”........................................................................................................... 8-19 8.2.8 Submenu of “Local Cmd” ................................................................................................. 8-21 8.2.9 Submenu of “Information” ................................................................................................ 8-24 8.2.10 Submenu of “Test” ......................................................................................................... 8-25 8.2.11 Submenu of “Clock” ....................................................................................................... 8-27 8.2.12 Submenu of “Language” ................................................................................................ 8-28
8.3 Understand the LCD Display .........................................................................8-29 8.3.1 Display When Tripping ..................................................................................................... 8-29 8.3.2 Display under Abnormal Condition................................................................................... 8-32
8.4 Password Protection......................................................................................8-34
List of Figures Figure 8.1-1 Keypad on the front panel................................................................................... 8-2 Figure 8.1-2 LED indicators ..................................................................................................... 8-2 8-a
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8 Human Machine Interface
Figure 8.2-1 Default display in normal situation.....................................................................8-3 Figure 8.2-2 Main menu display of this relay ..........................................................................8-4 Figure 8.2-3 Tree diagram of total command menu................................................................8-4 Figure 8.2-4 LCD display of the protection secondary measurement values ......................8-6 Figure 8.2-5 LCD display of the status of the general binary inputs.....................................8-9 Figure 8.2-6 History fault report on LCD ...............................................................................8-13 Figure 8.2-7 History alarm report on LCD .............................................................................8-13 Figure 8.2-8 History binary state change report on LCD .....................................................8-14 Figure 8.2-9 History user operation report on LCD ..............................................................8-15 Figure 8.2-10 History control report on LCD.........................................................................8-15 Figure 8.2-11 LCD display of the selection of setting group number .................................8-17 Figure 8.2-12 LCD display of the selected protection settings ...........................................8-18 Figure 8.2-13 LCD display of the change of active group....................................................8-19 Figure 8.2-14 Control object and command selection interfaces .......................................8-23 Figure 8.2-15 Control execution check and interlock selection interfaces ........................8-23 Figure 8.2-16 Control type selection interface and execution result interface ..................8-23 Figure 8.2-17 LCD display of the software version...............................................................8-25 Figure 8.2-18 LCD display of the board information ............................................................8-25 Figure 8.2-19 Clock modification interface ...........................................................................8-28 Figure 8.2-20 Language modification interface ....................................................................8-28 Figure 8.3-1 LCD display of trip report ..................................................................................8-29 Figure 8.3-2 Information of alarm report on the LCD ...........................................................8-32 Figure 8.4-1 Password input interface for control operation...............................................8-35 Figure 8.4-2 Password input interface for modifying settings ............................................8-35
8-b
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8 Human Machine Interface
8.1 Overview Human machine interface (HMI) is an important component of the equipment. It is a convenient facility to access the relay from the front local control panel of this relay to view desired information, such as measurement quantity or binary inputs’ state or program version etc. or modify some system settings or protection settings. This function is very helpful during commissioning before putting the equipment into service. Furthermore, all above functions can be realized in a remote terminal with special software through a communication bus via a RS-485 port or an Ethernet port. This chapter will describe human machine interface (HMI), menu tree and LCD display of the equipment. In addition, how to input settings using keypad is described in detail.
8.1.1 Design The human machine interface consists of a human machine interface (HMI) module which allows the communication as simple as possible for the user. The HMI module includes: z
A 240×128-dot matrix backlight LCD visible in dim lighting conditions for monitoring status, fault diagnostics and setting etc.
z
Twenty LED indicators on the front panel of this relay for denoting the status of this protection operation, the color and trigger condition of each LED can be configured through PCS-PC.
z
A 9-key keypad on the front panel of the device for full access to the device.
z
An Ethernet interface special for the PCS-PC configuration tool; for more details, see the PCS-PC online help brochure or the PCS-PC configuration tool instruction manual.
The front panel of the device is shown in Figure 6.1-2.
8.1.2 Functionality z
The HMI module helps to draw your attention to something that has occurred which may activate a LED or a report display on the LCD.
z
You as the operator may have own interest to view a certain data.
z
Use menus navigate through menu commands and to locate the data of interest.
8.1.3 Keypad and Keys The keypad and keys on the front panel of the equipment provide convenience to the operator to view a certain data or change the device’s setting. The keypad contains nine keys, and each key has different function to the other one. Key Sign
Description
“▲”, “▼”, “◄”, “►”
Move between selectable branches of the menu tree.
“+”, “–”
Change parameters or settings.
ENT
Confirm/Execute present operation. 8-1
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8 Human Machine Interface GRP
Fast change the setting group number.
ESC
Exit the present level menu to main menu, or cancel present operation.
ESC
GR P
The following figure shows the keypad and keys.
Figure 8.1-1 Keypad on the front panel
8.1.4 LED indications There are twenty LED indicators, which can indicate the operation state of the device. The LED_03 to LED_20 is configurable through the PCS-PC configuration tool auxiliary software, and the following figure shows the default LED configuration on the front panel of the device.
Figure 8.1-2 LED indicators Label HEALTHY
ALARM TRIP RECLOSE CB OPEN CB CLOSE
Display Off
Remarks When this relay is not energized or any hardware defect is detected during self-supervision.
Steady Green
When this relay is in service and ready for operation.
Off
When this relay is in normal operating situation.
Steady Yellow
When any abnormality alarm is issued.
Off
When this relay is in normal operating situation.
Steady Red
When any protection element is operated.
Off
When this relay is in normal operating situation.
Steady Red
When the auto-recloser operates.
Off
When the circuit breaker is closed state.
Steady Red
When the circuit breaker is opened state.
Off
When the circuit breaker is opened state.
Steady Green
When the circuit breaker is closed state.
NOTE!
8-2
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8 Human Machine Interface
z
The “HEALTHY” LED can only be turned on by supplying power to this device again or rebooting this device.
z
The “ALARM” LED is turned on as long as alarm exists. When alarm signals disappear, it will be turned off.
z
The “TRIP” LED is turned on once any protection element operates and keeps being on even after the trip command goes off.
z
The “RECLOSE” LED is turned on once auto-recloser operates and remains keeps being on even after the auto-reclosing command goes off.
z
The “CB OPEN” LED is turned on once when the circuit breaker is in open position.
z
The “CB CLOSE” LED is turned on once when the circuit breaker is in closing position.
z
The “TRIP” and “RECLOSE” LEDs and relevant latched binary outputs can be reset by pressing the key “ENT”+“ESC”, by energizing the binary input [BI_RstTarg] or by executing the submenu “Reset Target”.
8.2 Understand the HMI Menu Tree 8.2.1 Overview In this section, the main layout of the menu which is shown on the LCD of the local human machine interface (HMI) will be described in detail.
8.2.2 Default Display under Normal Operation Condition The default display on the LCD is shown as below when the device is in normal situation.
Figure 8.2-1 Default display in normal situation
The first line shows the time synchronization state and the current time of this relay. The sign “S” on left-top side means this relay receive the clock synchronization signal correctly; if there has nothing on left-top side, it means the time synchronization is not correct. The current time format of this relay is “yyyy-mm-dd hh:mm:ss”. The middle part of the LCD shows the measurement for the protection. The last line shows the last section of the IP address and the setting group number. The battery sign on the left-bottom is used to indicate the ready state of the auto-recloser. When the battery 8-3
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8 Human Machine Interface
sign is solid ( ), it means that the auto-recloser is ready; when the battery sign is empty ( ), it means that the auto-recloser is blocked; and when the battery sign is half solid ( ), it means that the auto-recloser is in reclaiming procedure. When the default screen is being shown, press key “▲” to enter the main menu of this relay.
Figure 8.2-2 Main menu display of this relay
The following figure shows the menu tree structure of this device.
Figure 8.2-3 Tree diagram of total command menu
Press key “▲”, “▼”, “◄” or “►” to select a submenu and the press key “ENT” to show the details. NOTE! This manual introduces all the submenus and their functions which maybe can be supplied by this relay. Some submenus are not configured if the relevant functions are not supported in this relay. So the practical submenus of this relay should be taken as final and binding.
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8 Human Machine Interface
8.2.3 Submenu of “Measurements” Purpose: This menu is used to view the measured values including current, voltage, phase angle and other calculated quantities. Access approach: Move cursor to the item “Measurements” and press key “ENT” to enter its submenu after entering the main menu of this device. Submenu structure tree: The submenu “Measurements” has following submenus. No.
Item
Description
1
Measurements1
To display the measurement values for protection
2
Measurements2
To display the measurement values for metering
The submenu “Measurements1” has following submenus. No.
Item
Description
1
Primary Values
To display the primary measurement values for protection
2
Secondary Values
To display the secondary measurement values for protection
The submenu “Measurements2” has following submenus. No.
Item
Description
1
Primary Values
To display the primary measurement values for metering
2
Secondary Values
To display the secondary measurement values for metering
3
Primary Power
To display the primary power values for metering
4
Secondary Power
To display the secondary power values for metering
5
Synchrocheck
To display the closing synchronism check state
8.2.3.1 View Measurements Here take viewing the secondary protection measurement values as an example to introduce the operating steps of viewing the measurements. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Measurements” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Measurements1” and press key “ENT” to enter this submenu.
4.
Press key “▲” or “▼” to locate the cursor on the submenu “Secondary Values” and press key “ENT” to enter this submenu.
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8 Human Machine Interface
5.
Press key “▲” or “▼” to view the expected measured values.
Figure 8.2-4 LCD display of the protection secondary measurement values
The following tables show all the measurement values of this relay. z
Protection measurement values No.
Symbol
Description
1
Ia
Current value of the phase A
2
Ib
Current value of the phase B
3
Ic
Current value of the phase C
4
I1
Positive sequence current value
5
I2
Negative sequence current value
6
3I0_Cal
Self-calculated zero sequence current value
7
3I0_Ext1
The No.1 external zero sequence current value
8
3I0_Ext2
The No.2 external zero sequence current value
9
3I0_SEF
Sensitive zero sequence current value
10
Ua
Voltage value of phase A
11
Ub
Voltage value of phase B
12
Uc
Voltage value of phase C
13
Uab
Voltage value of phase A to phase B
14
Ubc
Voltage value of phase B to phase C
15
Uca
Voltage value of phase C to phase A
16
U1
Positive sequence voltage value
17
U2
Negative sequence voltage value
18
3U0_Cal
Self-calculated zero sequence voltage value
19
3U0_Ext
External zero sequence voltage value
20
Ux
Synchro-check voltage value
21
f
System frequency value
22
Ang(Ia-Ib)
Angle of phase A current and phase B current
23
Ang(Ib-Ic)
Angle of phase B current and phase C current
24
Ang(Ic-Ia)
Angle of phase C current and phase A current
25
Ang(Ua-Ia)
Angle of phase A voltage and phase A current
26
Ang(Ub-Ib)
Angle of phase B voltage and phase B current
27
Ang(Uc-Ic)
Angle of phase C voltage and phase C current
28
Ang(Ua-Ub)
Angle of phase A voltage and phase B voltage
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8 Human Machine Interface
z
29
Ang(Ub-Uc)
Angle of phase B voltage and phase C voltage
30
Ang(Uc-Ua)
Angle of phase C voltage and phase A voltage
31
Ang(Uab-Ux)
Angle of phase-to-phase voltage “Uab” and synchro-check voltage
32
Ang(3U0-3I0_Cal)
Angle of the self-calculated zero sequence voltage and current
Metering measurement values No.
z
Symbol
1
Ia
Current value of the phase A
2
Ib
Current value of the phase B
3
Ic
Current value of the phase C
4
3I0_Ext1
The No.1 external zero sequence current value
5
Ua
Voltage value of phase A
6
Ub
Voltage value of phase B
7
Uc
Voltage value of phase C
8
Uab
Voltage value of phase A to phase B
9
Ubc
Voltage value of phase B to phase C
10
Uca
Voltage value of phase C to phase A
11
f
System frequency value
12
Ang(Ia-Ib)
Angle of phase A current and phase B current
13
Ang(Ib-Ic)
Angle of phase B current and phase C current
14
Ang(Ic-Ia)
Angle of phase C current and phase A current
15
Ang(Ua-Ia)
Angle of phase A voltage and phase A current
16
Ang(Ub-Ib)
Angle of phase B voltage and phase B current
17
Ang(Uc-Ic)
Angle of phase C voltage and phase C current
18
Ang(Ua-Ub)
Angle of phase A voltage and phase B voltage
19
Ang(Ub-Uc)
Angle of phase B voltage and phase C voltage
20
Ang(Uc-Ua)
Angle of phase C voltage and phase A voltage
Power measurement values No.
z
Description
Symbol
Description
1
P
Active power
2
Q
Reactive power
3
COS
Power factor
4
KWH_Out
Outgoing active energy
5
KVAH_Out
Outgoing reactive energy
6
KWH_In
Incoming active energy
7
KVAH_In
Incoming reactive energy
Closing synchronism check data No.
Symbol
Description
1
25M.U_Diff
The voltage difference of the manual closing function
2
25M.f_Diff
The frequency difference of the manual closing function
3
25M.phi_Diff
The angle difference of the manual closing function
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25A.U_Diff
The voltage difference of the auto-closing function
5
25A.f_Diff
The frequency difference of the auto-closing function
6
25A.phi_Diff
The angle difference of the auto-closing function
8.2.4 Submenu of “Status” Purpose: This menu is used to view the state of the binary inputs, binary outputs and supervision alarm elements of this relay. Access approach: Move cursor to the item “Status” and press key “ENT” to enter its submenu after entering the main menu of this device. Submenu structure tree: The submenu “Status” has following submenus. No.
Item
Description
1
Inputs
To display the state of the binary inputs
2
Outputs
To display the state of the binary outputs
3
Superv State
To display the state of supervision alarm signals
The submenu “Inputs” has following submenus. No.
Item
Description
1
Contact Inputs
To display the state of the general binary inputs
2
GOOSE Inputs
To display the state of the GOOSE binary inputs
3
Prot Inputs
To display the state of the protection binary inputs
4
Interlock Status
To display the state of the interlocking signals for remote control
The submenu “Outputs” has following submenus. No.
Item
Description
1
Contact Outputs
To display the state of the general binary outputs
2
GOOSE Outputs
To display the state of the GOOSE binary outputs
The submenu “Superv State” has following submenus. No.
Item
Description
1
Prot Superv
To display the state of the protection supervision alarm elements
2
GOOSE Superv
To display the state of the GOOSE supervision alarm elements
8.2.4.1 View Status Here take viewing the status of the general binary inputs as an example to introduce the operating steps of viewing the status. Operating steps:
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1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Status” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Inputs” and press key “ENT” to enter this submenu.
4.
Press key “▲” or “▼” to locate the cursor on the submenu “Contact Inputs” and press key “ENT” to enter this submenu.
5.
Press key “▲” or “▼” to view the expected binary inputs.
Figure 8.2-5 LCD display of the status of the general binary inputs
The following tables show all the binary signal status of this relay. z
General binary input status No.
Symbol
Description
1
B07.BI_01
The status of the No.1 general binary input
2
B07.BI_02
The status of the No.2 general binary input
3
B07.BI_03
The status of the No.3 general binary input
4
B07.BI_04
The status of the No.4 general binary input
5
B07.BI_05
The status of the No.5 general binary input
6
B07.BI_06
The status of the No.6 general binary input
7
B07.BI_07
The status of the No.7 general binary input
8
B07.BI_08
The status of the No.8 general binary input
9
B07.BI_09
The status of the No.9 general binary input
10
B07.BI_10
The status of the No.10 general binary input
11
B07.BI_11
The status of the No.11 general binary input
12
B07.BI_12
The status of the No.12 general binary input
13
B07.BI_13
The status of the No.13 general binary input
14
B07.BI_14
The status of the No.14 general binary input
15
B07.BI_15
The status of the No.15 general binary input
16
B07.BI_16
The status of the No.16 general binary input
17
B07.BI_17
The status of the No.17 general binary input
18
B07.BI_18
The status of the No.18 general binary input
19
B07.BI_19
The status of the No.19 general binary input
20
…
…… 8-9
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The signal symbol of a binary input is “B0x.BI_yy”; “x” is the sequence number of the binary input module location in the rack of this relay, and “yy” is the sequence number of the binary input at the binary input module. For the details about the binary inputs, see Section 6.8. GOOSE binary input status
z
No.
Symbol
Description
1
GBI_001
The status of the No.1 GOOSE binary input
2
GBI_002
The status of the No.2 GOOSE binary input
3
…
……
See the GOOSE related instruction manual for the more information and details. Protection binary input status
z
No.
Symbol
Description
1
BI_52b
The binary input of the state of the CB normal close contact signal
2
BI_52a
The binary input of the state of the CB normal open contact signal
3
Ctrl.Sig_EnCtrl
The binary input of the enabling remote control function signal
4
Ctrl.Sig_Unblock
The binary input of the interlock unlocking function signal
5
Ctrl1. Sig_ManSynChk
The binary input of the enabling synchronism check for manual closing
6
Ctrl1. Sig_ManDdChk
The binary input of the enabling dead check for manual closing
7
79.Blk
The binary input of the blocking auto-recloser signal
8
79.Ready
A virtual binary input of indicating the auto-recloser is ready
9
BI_LowPres_Trp
The binary input of the tripping low pressure signal
10
BI_LowPres_Cls
The binary input of the closing low pressure signal
11
BI_TrigDFR
The binary input of the triggering oscillography signal
12
BI_RstTarg
The binary input of the signal resetting signal
Interlock input status
z
No.
Symbol
Description
1
Interlock1.Sig_Opn
The interlock check status of the No.1 manual tripping element
2
Interlock1.Sig_Cls
The interlock check status of the No.1 manual closing element
3
Interlock2.Sig_Opn
The interlock check status of the No.2 manual tripping element
4
Interlock2.Sig_Cls
The interlock check status of the No.2 manual closing element
5
Interlock3.Sig_Opn
The interlock check status of the No.3 manual tripping element
6
Interlock3.Sig_Cls
The interlock check status of the No.3 manual closing element
7
Interlock4.Sig_Opn
The interlock check status of the No.4 manual tripping element
8
Interlock4.Sig_Cls
The interlock check status of the No.4 manual closing element
9
Interlock5.Sig_Opn
The interlock check status of the No.5 manual tripping element
10
Interlock5.Sig_Cls
The interlock check status of the No.5 manual closing element
General binary output status
z
No.
Symbol
Description
1
B09.BO_01
The status of the binary output “B09.BO_01”
2
B09.BO_02
The status of the binary output “B09.BO_02”
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B09.BO_03
The status of the binary output “B09.BO_03”
4
B09.BO_04
The status of the binary output “B09.BO_04”
5
B09.BO_05
The status of the binary output “B09.BO_05”
6
B09.BO_06
The status of the binary output “B09.BO_06”
7
B09.BO_07
The status of the binary output “B09.BO_07”
8
B09.BO_08
The status of the binary output “B09.BO_08”
9
…
……
The signal symbol of a binary output is “B0x.BO_yy”; “x” is the sequence number of the binary output module location in the rack of this relay, and “yy” is the sequence number of the binary output at the binary output module. For the details about the binary outputs, see Section 6.4 and Section 6.7. z
GOOSE binary output status No.
Symbol
Description
1
GBO_Act01
The status of the No.1 GOOSE operation output
2
GBO_Act02
The status of the No.2 GOOSE operation output
3
…
……
4
GBO_01
The status of the No.1 GOOSE general output
5
GBO_02
The status of the No.2 GOOSE general output
6
…
……
See the GOOSE related instruction manual for the more information and details. z
Supervision alarm element status No.
Symbol
Description
1
Fail_Device
The status of the alarm signal “Fail_Device”
2
Fail_BoardConfig
The status of the alarm signal “Fail_BoardConfig”
3
Fail_Setting
The status of the alarm signal “Fail_Setting”
4
Fail_Setting_OvRange
The status of the alarm signal “Fail_Setting_OvRange”
5
Fail_SettingItem_Chgd
The status of the alarm signal “Fail_SettingItem_Chgd”
6
Alm_Device
The status of the alarm signal “Alm_Device”
7
Alm_Setting_MON
The status of the alarm signal “Alm_Setting_MON”
8
Alm_Version
The status of the alarm signal “Alm_Version”
9
Alm_BI_SettingGrp
The status of the alarm signal “Alm_BI_SettingGrp”
10
Alm_52b
The status of the alarm signal “Alm_52b”
11
VTS.Alm_SynVT
The status of the alarm signal “VTS.Alm_SynVT”
12
VTS.Alm
The status of the alarm signal “VTS.Alm”
13
CTS.Alm
The status of the alarm signal “CTS.Alm”
14
49.Alm
The status of the alarm signal “49.Alm”
15
Alm_CommTest
The status of the alarm signal “Alm_CommTest”
16
Alm_TimeSync
The status of the alarm signal “Alm_TimeSync”
17
Alm_Maintenance
The status of the alarm signal “Alm_Maintenance”
18
Alm_LowPres_Trp
The status of the alarm signal “Alm_LowPres_Trp”
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Alm_LowPres_Cls
The status of the alarm signal “Alm_LowPres_Cls”
20
Alm_ResvX
The status of the alarm signal “Alm_ResvX” (X: a number; 1, 2 etc.)
For the details about the supervision alarm element, see Section 4.2. GOOSE alarm element status
z
No.
Symbol
Description
1
goose_netstorm_warning_1
The status of the alarm signal “goose_netstorm_warning_1”
2
goose_netstorm_warning_2
The status of the alarm signal “goose_netstorm_warning_2”
3
Link0goose_link_down_a
The status of the alarm signal “Link0goose_link_down_a”
4
Link0goose_link_down_b
The status of the alarm signal “Link0goose_link_down_b”
5
Link0goose_cfg_err
The status of the alarm signal “Link0goose_cfg_err”
See the GOOSE related instruction manual for the more information and details.
8.2.5 Submenu of “Records” Purpose: This menu is used to view all kinds of history records, such as the protection tripping reports, the supervision alarm records and the binary state change records etc. Access approach: Move cursor to the item “Records” and press key “ENT” to enter its submenu after entering the main menu of this device. Submenu structure tree: The submenu “Records” has following submenus. No.
Item
Description
1
Disturb Records
To display the fault reports
2
Superv Events
To display the supervision alarm records
3
IO Events
To display the records of binary state change records
4
Device Logs
To display the device operation reports
5
Control Logs
To display the local/remote control records
NOTE! Press the key “+”, “-”, “+”, “-” and “ENT” in sequence to enter the submenu for clearing the history reports. 8.2.5.1 View History Fault Report The history fault report stores the trip elements, trip time and waveform of a selected trip report. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Records” and press key “ENT” to enter this submenu.
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3.
Press key “▲” or “▼” to locate the cursor on the submenu “Disturb Records” and press key “ENT” to enter this submenu. If there is no report in the selected submenu, it will show “No Report!” on the LCD.
4.
Press key “+” or “-” to view the expected history fault report.
Figure 8.2-6 History fault report on LCD
The first line shows the report title and the sequence number of the history trip report, and the second line shows the operation time of the history trip report. Other lines show the protection elements and fault information one by one according to the relative time sequence. The fault information includes fault phase, maximum fault value and minimum fault value. For more information about the protection elements and fault information, see Section 8.3.1. 8.2.5.2 View History Alarm Report The history alarm report stores the alarm elements and alarm time. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Records” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Superv Events” and press key “ENT” to enter this submenu. If there is no report in the selected submenu, it will show “No Report!” on the LCD.
4.
Press key “+” or “-” to view the expected history alarm report.
Figure 8.2-7 History alarm report on LCD
The first line shows the report title and the sequence number of the history alarm report, and the
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second line shows the alarm time of the history alarm report. Other lines show the alarm elements and state change information one by one. For more information about the alarm elements, see Section 8.3.2. 8.2.5.3 View History Binary State Change Report The history binary state change report stores the binary signal name and state change time. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Records” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “IO Events” and press key “ENT” to enter this submenu. If there is no report in the selected submenu, it will show “No Report!” on the LCD.
4.
Press key “+” or “-” to view the expected history binary state change report.
Figure 8.2-8 History binary state change report on LCD
The first line shows the report title and the sequence number of the history binary input state change report, and the second line shows the binary state change time of the history binary state change report. Other lines show the binary state change information one by one. For more information about the binary signals, see Section 8.2.4. 8.2.5.4 View History User Operation Report The history user operation report stores the user operation information and user operation time. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Records” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Device Logs” and press key “ENT” to enter this submenu.
4.
Press key “+” or “-” to view the expected history user operation report.
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Figure 8.2-9 History user operation report on LCD
The first line shows the report title and the sequence number of the history user operation report, and the second line shows the user operation time of the history user operation report. Other lines show the user operation information. 8.2.5.5 View History Control Report The history control report stores the control information and control time. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Records” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Control Logs” and press key “ENT” to enter this submenu.
4.
Press key “+” or “-” to view the expected history control report.
Figure 8.2-10 History control report on LCD
The first line shows the report title and the sequence number of the history control report, and the second line shows the control time of the history control report. Other lines show the control information.
8.2.6 Submenu of “Settings” Purpose: The menu is used to view and modify the settings and parameters of this device. Please read Chapter 7 for the details about the all the settings.
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Access approach: Move cursor to the item “Settings” and press key “ENT” to enter its submenu after entering the main menu of this device. The submenu “Settings” has following submenus. No.
Item
Description
1
System Settings
To view and modify the system settings
2
Prot Settings
To view and modify the protection settings
3
Mon/Ctrl Settings
To view and modify the monitor and control settings
4
Logic Links
To view and modify the virtual enabling binary input settings
5
Device Setup
To view and modify the device and communication settings
6
Copy Settings
To copy a group of setting to other group
The submenu “Prot Settings” has following submenus. No.
Item
Description
1
OC Settings
To view and modify the settings of the OC protection
2
NegOC Settings
To view and modify the settings of the NOC protection
3
EF1 Settings
To view and modify the settings of the No.1 ROC protection
4
EF2 Settings
To view and modify the settings of the No.2 ROC protection
5
SEF Settings
To view and modify the settings of the SEF protection
6
BFP Settings
To view and modify the settings of the BFP protection
7
BrknCond Settings
To view and modify the settings of the BCP protection
8
SOTF Settings
To view and modify the settings of the SOTF protection
9
ThOvLd Settings
To view and modify the settings of the thermal overload protection
10
Voltage Settings
To view and modify the settings of the voltage protection
11
NegOV Settings
To view and modify the settings of the NOV protection
12
ROV Settings
To view and modify the settings of the ROV protection
13
FreqProt Settings
To view and modify the settings of the frequency protection
14
AR Settings
To view and modify the settings of the auto-recloser
15
CLP Settings
To view and modify the settings of the cold load pickup logic
16
MR Prot Settings
To view and modify the settings of the mechanical protection
17
Superv Settings
To view and modify the settings of the supervision function
18
CfgBO Settings
To view and modify the settings of the binary outputs
The submenu “Mon/Ctrl Settings” has following submenus. No.
Item
Description
1
Syn Settings
To view and modify the settings of the closing synchronism function
2
Control Settings
To view and modify the settings of the CB control function
3
Interlock Settings
To view and modify the settings of the interlock function
4
AC Calbr Settings
This submenu is only reserved for the manufacturer
The submenu “Logic Links” has following submenus.
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Item
Description
1
Function Links
To view and modify the function link settings
2
GOOSE Links
To view and modify the GOOSE link settings
3
SV Links
To view and modify the SV link settings
4
Spare Links
To view and modify the spare link settings
The submenu “Device Setup” has following submenus. No.
Item
Description
1
Device Settings
To view and modify the device related settings
2
Comm Settings
To view and modify the communication settings
8.2.6.1 View Settings Here take viewing the overcurrent protection settings as an example to introduce the operating steps of viewing the setting. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Settings” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Prot Settings” and press key “ENT” to enter this submenu.
4.
Press key “▲” or “▼” to locate the cursor on the submenu “OC Settings” and press key “ENT” to enter the selecting interface of the setting group number.
5.
Press key “+” or “-” to select the expected setting group number and then press key “ENT” to show the settings of the selected group.
6.
Press key “▲” or “▼” to view the expected protection settings.
The selecting interface of the setting group number is shown as below.
Figure 8.2-11 LCD display of the selection of setting group number
The setting interface of the selected setting group is shown as below.
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Figure 8.2-12 LCD display of the selected protection settings
8.2.6.2 Modify the Settings The settings can be modified through the local HMI to meet the demand of practical engineering. Operating steps: 1.
Refer the Section 8.2.6.1 to locate the cursor on the expected setting, and then press key “ENT” to enter the setting modification state.
2.
Press key “+” or “-” to modify a selected setting, and press key “ESC” to return to the setting interface (see Figure 8.2-12) after the selected setting modification is finished.
3.
Repeat Step “1” and “2” to modify other settings which need to be modified.
4.
After finishing the setting modification, press key “ESC” to prompt the user whether to save the settings. Select “Yes” to confirm to save the modified settings. Then the password input interface is shown on the LCD. Input the correct password and press key “ENT” to confirm the modification. If the modification is given up, press key “ESC” to exit the modification operation.
5.
After confirming the setting modification, it will show “Saving Settings…” on the LCD. Then the device will restart, and the new settings will be in service. NOTE! It is necessary to certify whether the modified settings are correct absolutely before confirming the setting modification.
8.2.6.3 Copy the Settings The last submenu “Copy Settings” is used to copy the active settings to another group. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Settings” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Copy Settings” and press key “ENT” to enter the interface for copying settings.
4.
Press key “+” or “-” to select the expected setting group number and then press key “ENT” to show the password input interface.
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5.
Input the correct password and then press key “ENT” to copy the settings of the active group to the selected group.
8.2.6.4 Switch the Active Setting Group There are two methods which are used to switch one setting group to another group. One method is to modify the setting [Active_Grp] in submenu “System Settings”. Another method is detailed as following operating steps. Operating steps: 1.
Press key “GRP” to enter the setting group switch interface in the default displaying situation.
2.
Press key “+” or “-” to select the expected setting group number and then press key “ENT” to show the password input interface.
3.
Input the correct password and then press key “ENT” to copy the settings of the active group to the selected group.
Figure 8.2-13 LCD display of the change of active group
8.2.7 Submenu of “Print” Purpose: The menu is used to print the relevant information of this device. A printer is needed, and the EPSON® LQ-300K is recommended. Access approach: Move cursor to the item “Print” and press key “ENT” to enter its submenu after entering the main menu of this device. The submenu “Print” has following submenus. No.
Item
Description
1
Device Info
To print the device description information
2
Settings
To print the settings of this device
3
Disturb Records
To print the fault reports
4
Superv Events
To print the supervision alarm records
5
IO Events
To print the records of binary state change records
6
Device Status
To print the status of this device
7
Waveforms
To print the fault and disturbance records 8-19
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IEC103 Info
To print the IEC60870-5-103 information of this device
9
Cancel Print
To cancel the printing operation
The submenu “Settings” maybe has following submenus. No.
Item
Description
1
System Settings
To print the system settings
2
Prot Settings
To print the protection settings
3
Mon/Ctrl Settings
To print the monitor and control settings
4
Logic Links
To print the virtual enabling binary input settings
5
Device Setup
To print the device and communication settings
6
All Settings
To print all the settings of this device
7
Latest Modified
To print the latest modified settings
8.2.7.1 Print a Selected Item Here take printing the overcurrent protection settings as an example to introduce the operating steps of print a selected item. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Print” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Settings” and press key “ENT” to enter this submenu.
4.
Press key “▲” or “▼” to locate the cursor on the submenu “Prot Settings” and press key “ENT” to enter this submenu.
5.
Press key “▲” or “▼” to locate the cursor on the submenu “OC Settings” and press key “ENT” to enter the selecting interface of the setting group number.
6.
Press key “+” or “-” to select the expected setting group number and then press key “ENT” to print the settings of the selected group.
8.2.7.2 Cancel Printing Operation The submenu “Cancel Print” is used to cancel the present printing content. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Print” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Cancel Print” and press key “ENT” to cancel the present printing content. The information “Canceling Print…” is shown on the LCD.
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8.2.8 Submenu of “Local Cmd” Purpose: This menu is used to operate this device locally, such as signal resetting, triggering an oscillograph, controlling circuit breaker, clearing history statistic counter etc. Access approach: Move cursor to the item “Local Cmd” and press key “ENT” to enter its submenu after entering the main menu of this device. Submenu structure tree: The submenu “Local Cmd” maybe has following submenus. No.
Item
Description
1
Reset Target
To restore all the signals on the LCD and binary outputs
2
Trig Oscillograph
To record present measurements as oscillogram
3
Download
To enable the download function of this relay
4
Clear Counter
To clear the statistic information of the optical channel
5
Clear Interlock File
To delete the interlock configuration file of this relay
6
Clear Energy Counter
To clear the energy accumulation counter of this relay
7
Control
To control the circuit breaker
8.2.8.1 Reset Signals and Outputs The submenu “Reset Target” is used to reset the signals and outputs. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Local Cmd” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Reset Target” and press key “ENT” to restore all the signals and relevant outputs of this relay.
8.2.8.2 Trigger an Oscillogram The submenu “Trig Oscillogram” is used to trigger this relay to store a waveform. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Local Cmd” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Trig Oscillogram” and press key “ENT” to trigger an oscillogram.
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8.2.8.3 Clear Statistic Counter The submenu “Clear Counter” is used to the statistic information (auto-recloser operation number, communication statistic information etc.). Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Local Cmd” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Clear Counter” and press key “ENT” to clear the statistic information. The information “Clear Statistic Data…” is shown on the LCD.
The operation steps of the submenu “Clear Interlock File” and “Clear Energy Counter” is similar with the operation steps of the submenu “Clear Counter”. 8.2.8.4 Control CB through Local HMI The submenu “Control” is used to control the circuit breaker through the local HMI of this relay. There are 5 groups of control elements in this relay. Anyone of them can be used to control (tripping or closing) a circuit breaker or a disconnector. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Local Cmd” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Control” and press key “ENT” to show the password input interface.
4.
Input correct password and then press key “ENT” to show the control item selection interface.
5.
Press key “▲” or “▼” to select an expected control element and then press key “ENT” to show the password input interface.
6.
Press key “+”, “-”, “◄” and “►” to enter the correct password and then enter the control object selection interface, and then press key “▲” or “▼” to select a control object.
7.
Press key “ENT” to enter control command selection interface, and then press key “▲” or “▼” to select a control command.
8.
Press key “ENT” to enter control check condition selection interface, and then press key “▲” or “▼” to select a control check condition.
9.
Press key “ENT” to enter control interlock selection interface, and then press key “▲” or “▼” to select a control interlock condition.
10. Press key “ENT” to enter control type selection interface, and then press key “▲” or “▼” to
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select a control type. 11. Press key “ENT” to confirm the current control operation. The information about the result of the current control operation will be shown on the LCD. The interfaces related to the control are shown as below.
Figure 8.2-14 Control object and command selection interfaces
Figure 8.2-15 Control execution check and interlock selection interfaces
Figure 8.2-16 Control type selection interface and execution result interface
All the items about the control function are listed as below. Select the control group number Ctrl1
The No.1 remote control output
Ctrl2
The No.2 remote control output
Ctrl3
The No.3 remote control output
Ctrl4
The No.4 remote control output
Ctrl5
The No.5 remote control output
Select the control operation open(Lower)
Open a circuit breaker or disconnector
close(Raise)
Close a circuit breaker or disconnector
(stop)
Stop current operation, not supported in this relay.
Select the control check mode
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Select the non-check mode
SynchroCheck
Select the synchronism check mode
DeadCheck
Select the dead check mode
LoopCheck
Select the loop check mode, not supported in this relay.
EF Line Selection
Select the grounding trip check mode, not supported in this relay.
Select the control interlock mode InterlockChk
Select the interlock check mode
InterlockNotChk
Select the non-interlock check mode
Select the control type Select
control selection
Execute
control execution
Cancel
control cancellation
8.2.9 Submenu of “Information” Purpose: This menu is used to view program version information and module information of this relay. Access approach: Move cursor to the item “Information” and press key “ENT” to enter its submenu after entering the main menu of this device. Submenu structure tree: The submenu “Local Cmd” maybe has following submenus. No.
Item
Description
1
Version Info
To view the program version information of this relay
2
Board Info
To view the module information of this relay
8.2.9.1 View Software Version The program version information of this relay can be known through this menu. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Information” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Version Info” and press key “ENT” to show the program version information.
4.
Press key “▲” or “▼” to show all the version information of the main program and the HMI program.
The software version information interface is shown as below.
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Figure 8.2-17 LCD display of the software version
The first line shows the title of this interface, other lines show the information of the board information, including the manufacturer abbreviation name, the device name, the device code, the program version, the program CRC code and the program creation time. NOTE! It is only an example for explaining the software version menu. The practical software version of this relay should be taken as final and binding. 8.2.9.2 View Board Information All the module information can be known through this menu. 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Information” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Board Info” and press key “ENT” to show the board information.
The board information interface is shown as below.
Figure 8.2-18 LCD display of the board information
The first line shows the title of this interface, other lines show the information of the board information, including the slot sequence number, the module type, the module operation state and the module configuration state. In normal operation situation, the module configuration state should be same with the module operation state.
8.2.10 Submenu of “Test” Purpose: 8-25
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This menu is used to test particular functions of the device, such as testing binary signals, testing binary outputs and testing telemetering etc. It can provide convenience for the communication test and the operation electrical circuit. Access approach: Move cursor to the item “Test” and press key “ENT” to enter its submenu after entering the main menu of this device. Submenu structure tree: The submenu “Test” maybe has following submenus. No.
Item
Description
1
AR Counter
To counter and show the auto-recloser operation situation
2
Device Test
To test the binary signals, binary outputs and telemetering etc.
3
Internal Signal
This submenu is only reserved for the manufacturer
4
AC Auto Calbr
This submenu is only reserved for the manufacturer
5
Disturb Record Items
This submenu is only reserved for the manufacturer
6
CptRuntime
This submenu is only reserved for the manufacturer
The submenu “Device Test” has following submenus. No.
Item
Description
1
Prot Elements
To test the protective element operation signals
2
Superv Events
To test the supervision alarm signals
3
IO Events
To test the binary state change signals
4
Measurements
To test the metering measurements
5
Contact Outputs
To test the binary outputs, please disconnect the external circuit
The submenu “Prot Elements”, “Superv Events” and “IO Events” have following submenus. No.
Item
Description
1
All Test
To test all the binary signals
2
Select Test
To test the selected binary signal
8.2.10.1 Communication Test of the Binary Signal The binary signals include the protective element operation signals, supervision alarm signals and binary state change signals. Here take test the protective element operation signal as an example to introduce the operating steps of communication test of the binary signals. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Test” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Device Test” and press key “ENT”
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to enter this submenu. 4.
Press key “▲” or “▼” to locate the cursor on the submenu “Prot Elements” and press key “ENT” to enter this submenu.
5.
Press key “▲” or “▼” to locate the cursor on the submenu “Select Test” and press key “ENT” to show all the protective elements.
6.
Press key “▲” or “▼” to locate the cursor on a selected protective element and then press key “ENT” to create a binary signal. NOTE! The submenu “All Test” is used to test all the binary signals automatically.
8.2.10.2 Communication Test of the Telemetering Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Test” and press key “ENT” to enter this submenu.
3.
Press key “▲” or “▼” to locate the cursor on the submenu “Device Test” and press key “ENT” to enter this submenu.
4.
Press key “▲” or “▼” to locate the cursor on the submenu “Measurements” and press key “ENT” to all the metering measurements.
5.
Press key “▲” or “▼” to locate the cursor on a selected metering measurements and press key “+” or “-” to modify the selected metering value.
6.
After finishing the modification, press key “ENT” to transmit the metering values.
8.2.11 Submenu of “Clock” Purpose: This menu is used to modify the current time of this relay. Access approach: Move cursor to the item “Clock” and press key “ENT” to enter the clock modification interface after entering the main menu of this device. 8.2.11.1 Clock Modification Set the current time of this relay as following steps. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Clock” and press key “ENT” to enter the clock modification interface. 8-27
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3.
Press key “▲” or “▼” to locate the cursor on a selected item and press key “+” or “-” to modify the selected item.
4.
After finishing the clock modification, press key “ENT” to confirm the modification.
The clock modification interface is shown as below.
Figure 8.2-19 Clock modification interface
8.2.12 Submenu of “Language” Purpose: This menu is used to modify the display language of this relay. 8.2.12.1 Language Modification Modify the display language as following steps. Operating steps: 1.
Press key “▲” to enter the main menu in the default displaying situation.
2.
Press key “▲” or “▼” to locate the cursor on the submenu “Language” and press key “ENT” to enter the language modification interface.
3.
Press key “▲” or “▼” to select the expected display language.
4.
After finishing the language modification, press key “ENT” to confirm the modification.
The language modification interface is shown as below.
Figure 8.2-20 Language modification interface
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8.3 Understand the LCD Display 8.3.1 Display When Tripping If there is any protection element operating, a brief tripping report will appear on the LCD, and the backlight of the LCD and the LED “TRIP” will be on simultaneously. The format of the fault report is shown as below.
Figure 8.3-1 LCD display of trip report
The first line shows the report title and the sequence number of the history trip report, and the second line shows the operation time of the history trip report. Other lines show the protection elements and fault information one by one according to the relative time sequence. The fault information includes fault phase, maximum fault value and minimum fault value. NOTE! In case more than one protection element has operated, the relevant report will be displayed alternatively one by one according to time sequence on the LCD. And the fault information is listed after all the protection elements. The trip report will keep being displayed on LCD until an acknowledgement is received by pressing the key “ENT”+“ESC”, by energizing the binary input [BI_RstTarg] or by executing the submenu “Reset Target”. The default display then appears on LCD and LED “TRIP” is turned off. Protection elements listed below may be displayed. No.
Protection Element
Description
1
FD.Pkp
The fault detector operates.
2
Op_Prot
Anyone of the protective elements in this relay operates.
3
50/51P1.Op
The stage 1 overcurrent protection operates.
4
50/51P2.Op
The stage 2 overcurrent protection operates.
5
50/51P3.Op
The stage 3 overcurrent protection operates.
6
50/51P4.Op
The stage 4 overcurrent protection operates.
7
50/51G1.Op
The No.1 stage 1 zero sequence overcurrent protection operates.
8
50/51G2.Op
The No.1 stage 2 zero sequence overcurrent protection operates.
9
50/51G3.Op
The No.1 stage 3 zero sequence overcurrent protection operates.
10
50/51G4.Op
The No.1 stage 4 zero sequence overcurrent protection operates.
11
A.50/51G1.Op
The No.2 stage 1 zero sequence overcurrent protection operates.
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A.50/51G2.Op
The No.2 stage 2 zero sequence overcurrent protection operates.
13
A.50/51G3.Op
The No.2 stage 3 zero sequence overcurrent protection operates.
14
A.50/51G4.Op
The No.2 stage 4 zero sequence overcurrent protection operates.
15
50/51Q1.Op
The stage 1 negative sequence overcurrent protection operates.
16
50/51Q2.Op
The stage 2 negative sequence overcurrent protection operates.
17
50/51SEF1.Op
The stage 1 sensitive earth fault protection operates.
18
50/51SEF2.Op
The stage 2 sensitive earth fault protection operates.
19
50/51SEF3.Op
The stage 3 sensitive earth fault protection operates.
20
50/51SEF4.Op
The stage 4 sensitive earth fault protection operates.
21
50PSOTF.Op
The SOTF overcurrent protection operates.
22
50GSOTF.Op
The zero sequence SOTF overcurrent protection operates.
23
50BC.Op
The broken conductor protection operates.
24
49.Op
The thermal overload protection operates.
25
50BF.Op
The breaker failure protection operates.
26
50BF.ReTrp
The breaker failure protection re-trip operates.
27
27P1.Op
The stage 1 undervoltage protection operates.
28
27P2.Op
The stage 2 undervoltage protection operates.
29
59P1.Op
The stage 1 overvoltage protection operates.
30
59P2.Op
The stage 2 overvoltage protection operates.
31
59Q.Op
The negative sequence overvoltage protection operates.
32
59G1.Op
The stage 1 zero sequence overvoltage protection operates.
33
59G2.Op
The stage 2 zero sequence overvoltage protection operates.
34
81U1.Op
The stage 1 under-frequency protection operates.
35
81U2.Op
The stage 2 under-frequency protection operates.
36
81U3.Op
The stage 3 under-frequency protection operates.
37
81U4.Op
The stage 4 under-frequency protection operates.
38
81O1.Op
The stage 1 over-frequency protection operates.
39
81O2.Op
The stage 2 over-frequency protection operates.
40
81O3.Op
The stage 3 over-frequency protection operates.
41
81O4.Op
The stage 4 over-frequency protection operates.
42
81R1.Op
The stage 1 frequency rate-of-change protection operates.
43
81R2.Op
The stage 2 frequency rate-of-change protection operates.
44
81R3.Op
The stage 3 frequency rate-of-change protection operates.
45
81R4.Op
The stage 4 frequency rate-of-change protection operates.
46
79.Close_3PS1
The 1st shot auto-recloser operates.
47
79.Close_3PS2
The 2nd shot auto-recloser operates.
48
79.Close_3PS3
The 3rd shot auto-recloser operates.
49
79.Close_3PS4
The 4th shot auto-recloser operates.
50
MR1.Op
The No.1 mechanical protection operates.
51
MR2.Op
The No.2 mechanical protection operates.
52
MR3.Op
The No.3 mechanical protection operates.
53
MR4.Op
The No.4 mechanical protection operates.
54
50/51P1.St
The stage 1 overcurrent protection picks up.
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50/51P2.St
The stage 2 overcurrent protection picks up.
56
50/51P3.St
The stage 3 overcurrent protection picks up.
57
50/51P4.St
The stage 4 overcurrent protection picks up.
58
50/51G1.St
The No.1 stage 1 zero sequence overcurrent protection picks up.
59
50/51G2.St
The No.1 stage 2 zero sequence overcurrent protection picks up.
60
50/51G3.St
The No.1 stage 3 zero sequence overcurrent protection picks up.
61
50/51G4.St
The No.1 stage 4 zero sequence overcurrent protection picks up.
62
A.50/51G1.St
The No.2 stage 1 zero sequence overcurrent protection picks up.
63
A.50/51G2.St
The No.2 stage 2 zero sequence overcurrent protection picks up.
64
A.50/51G3.St
The No.2 stage 3 zero sequence overcurrent protection picks up.
65
A.50/51G4.St
The No.2 stage 4 zero sequence overcurrent protection picks up.
66
50/51Q1.St
The stage 1 negative sequence overcurrent protection picks up.
67
50/51Q2.St
The stage 2 negative sequence overcurrent protection picks up.
68
50/51SEF1.St
The stage 1 sensitive earth fault protection picks up.
69
50/51SEF2.St
The stage 2 sensitive earth fault protection picks up.
70
50/51SEF3.St
The stage 3 sensitive earth fault protection picks up.
71
50/51SEF4.St
The stage 4 sensitive earth fault protection picks up.
72
50PSOTF.St
The SOTF overcurrent protection picks up.
73
50GSOTF.St
The zero sequence SOTF overcurrent protection picks up.
74
50BC.St
The broken conductor protection picks up.
75
49.St
The thermal overload protection picks up.
76
50BF.St
The breaker failure protection picks up.
77
27P1.St
The stage 1 undervoltage protection picks up.
78
27P2.St
The stage 2 undervoltage protection picks up.
79
59P1.St
The stage 1 overvoltage protection picks up.
80
59P2.St
The stage 2 overvoltage protection picks up.
81
59Q.St
The negative sequence overvoltage protection picks up.
82
59G1.St
The stage 1 zero sequence overvoltage protection picks up.
83
59G2.St
The stage 2 zero sequence overvoltage protection picks up.
84
81U1.St
The stage 1 under-frequency protection picks up.
85
81U2.St
The stage 2 under-frequency protection picks up.
86
81U3.St
The stage 3 under-frequency protection picks up.
87
81U4.St
The stage 4 under-frequency protection picks up.
88
81O1.St
The stage 1 over-frequency protection picks up.
89
81O2.St
The stage 2 over-frequency protection picks up.
90
81O3.St
The stage 3 over-frequency protection picks up.
91
81O4.St
The stage 4 over-frequency protection picks up.
92
81R1.St
The stage 1 frequency rate-of-change protection picks up.
93
81R2.St
The stage 2 frequency rate-of-change protection picks up.
94
81R3.St
The stage 3 frequency rate-of-change protection picks up.
95
81R4.St
The stage 4 frequency rate-of-change protection picks up.
96
79.InProg
The auto-recloser picks up.
97
MR1.St
The No.1 mechanical protection picks up. 8-31
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MR2.St
The No.2 mechanical protection picks up.
99
MR3.St
The No.3 mechanical protection picks up.
100
MR4.St
The No.4 mechanical protection picks up.
Fault information listed below may be displayed. No.
Fault Information
Description
1
Ip_Max
The maximum phase current
2
3I0Cal_Max
The maximum self-calculated zero sequence current
3
3I0Ext1_Max
The No.1 maximum external zero sequence current
4
3I0Ext2_Max
The No.2 maximum external zero sequence current
5
3I0SEF_Max
The maximum sensitive earth fault current
6
I2/I1_Max
The maximum ratio of I2/I1
7
Upp_Min
The minimum phase-to-phase voltage
8
Upp_Max
The maximum phase-to-phase voltage
9
Up_Min
The minimum phase voltage
10
Up_Max
The maximum phase voltage
11
U2_Max
The maximum negative sequence voltage
12
Ux_Max
The maximum synchro-check voltage
13
Ux_Min
The minimum synchro-check voltage
14
f_Max
The maximum system frequency
15
f_Min
The minimum system frequency
See Chapter 3 for more details about the protection operation theory.
8.3.2 Display under Abnormal Condition 8.3.2.1 Alarm Information on LCD If there is any abnormality in the operation or any firmware error is detected by the self-diagnostics of this relay, an alarm report will be displayed instantaneously on the LCD. Therefore, the default display will be replaced by the alarm report. The format of the alarm report is shown as below.
Figure 8.3-2 Information of alarm report on the LCD
The first line shows the alarm report title, and then shows the alarm elements one by one according to the time sequence. The alarm report will keep being displayed on LCD until the relevant alarm situation is restored to normal state. It means that this relay does not detect any alarm situation. The default display then 8-32
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appears on LCD and LED “ALARM” is off. The LED “ALARM” will not be on if either of the alarm signals [Fail_Device] and [Fail_Setting] is issued. Alarm elements listed below may be displayed. See Section 4.2 for more details about the alarm element operation theory. No.
Alarm Element
Description
HEALTHY
ALARM
1
Fail_Device
A serious fault is detected to block this device.
Off
×
2
Fail_BoardConfig
The module configuration of this device is wrong.
Off
×
3
Fail_Setting
Anyone of the settings is modified.
Off
×
4
Fail_Setting_OvRange
Anyone of the settings is out of range.
Off
×
5
Fail_SettingItem_Chgd
Anyone of the setting items is changed.
Off
×
6
Alm_Device
Anyone of the software supervision alarm occurs.
×
On
7
Alm_Setting_MON
The settings from the HMI module are not correct.
×
On
8
Alm_Version
The current program version is not correct.
×
On
9
Alm_BI_SettingGrp
The group number is changed by the binary inputs
×
On
10
Alm_52b
The normal close contact of the CB is abnormal.
×
On
11
VTS.Alm_SynVT
The synchro-check VT circuit is failed.
×
On
12
VTS.Alm
The protection voltage transformer circuit is failed.
×
On
13
CTS.Alm
The current transformer is failed.
×
On
14
49.Alm
The thermal overload situation is occurred.
×
On
15
Alm_CommTest
The communication test operation is executed.
×
On
16
Alm_TimeSync
The time synchronization is not correct.
×
On
17
Alm_Maintenance
The device is in maintenance situation.
×
On
18
Alm_LowPres_Trp
The pressure of the tripping circuit is low.
×
On
19
Alm_LowPres_Cls
The pressure of the closing circuit is low.
×
On
20
Alm_ResvX
The No.X reserved alarm signal is issued.
×
On
Here, “On” means the LED is on, “Off” means the LED is off, and “×” means having no influence. NOTE! When this relay is energized, in the startup process, the LED “HEALTHY” is off and the LED “ALARM” is on. The handling suggestions of the alarm events are listed as below. No.
Alarm Element
Handing Suggestion
1
Fail_Device
Please check whether there has a serious error in this relay.
2
Fail_BoardConfig
Please check whether the board configuration complies with the software.
3
Fail_Setting
Please ensure whether anyone of the settings is modified.
4
Fail_Setting_OvRange
Please ensure whether anyone of the settings is out of range.
5
Fail_SettingItem_Chgd
Please enter the relevant setting menu of this relay to confirm it.
6
Alm_Device
Please ensure whether anyone of the software supervision alarm occurs.
7
Alm_Setting_MON
Please inform the manufacturer to deal with it.
8
Alm_Version
Please inform the manufacturer to deal with it.
9
Alm_BI_SettingGrp
Please ensure whether the group number is changed by the binary inputs.
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Alm_52b
Please check the auxiliary open position contact of the circuit breaker.
11
VTS.Alm_SynVT
Please check the secondary circuit of the synchro-check voltage transformer.
12
VTS.Alm
Please check the secondary circuit of the protection voltage transformer.
13
CTS.Alm
Please check the secondary circuit of the current transformer.
14
49.Alm
Please check whether the thermal overload condition is satisfied.
15
Alm_CommTest
Please check whether this device is in communication test situation.
16
Alm_TimeSync
Please check whether the time synchronization signal is correct.
17
Alm_Maintenance
Please check whether the binary input for denoting maintenance is energized.
18
Alm_LowPres_Trp
Please check the mechanism of the circuit breaker.
19
Alm_LowPres_Cls
Please check the mechanism of the circuit breaker.
20
Alm_ResvX
Please check whether the relevant alarm issuing conditions are satisfied.
8.3.2.2 Understand the Alarms Hardware circuit and operation condition of this device are self-supervised continuously. If any abnormal condition is detected, information or report will be displayed and a corresponding alarm will be issued. A common abnormality may block a certain number of protection functions while other functions can still work. However, if a serious hardware failure or abnormality is detected, all protection functions will be blocked and the LED “HEALTHY” will be off. When hardware failure is detected, all protection functions will be blocked and the corresponding alarm signal will be issued. This relay can not work normally in such a situation and a manual maintenance is required to fix the failure. NOTE! If this device is blocked or alarm signal is issued during operation, do please find out its reason by help of the history reports. If the reason can not be found on site, please inform the manufacturer NR Electric Co., Ltd.
8.4 Password Protection For the safety purpose, this device provides password security function for modifying the settings and doing a control operation. Only the input password is correct, the relevant operation can be done. If the input password is correct, the relevant operation can be done; otherwise, it will show the input interface on the LCD to prompt the user to input the password again. The password for control operation is fixed, and it is “111”. The following figure shows the password input interface for control operation.
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8 Human Machine Interface
Figure 8.4-1 Password input interface for control operation
The password for modifying settings is fixed, and it is press key “+”, “◄”, “▲” and “-” in sequence. The following figure shows the password input interface for modifying settings.
Figure 8.4-2 Password input interface for modifying settings
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8 Human Machine Interface
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9 Configurable Function
9 Configurable Function Table of Contents 9.1 General Description .........................................................................................9-1 9.2 Introduction of PCS-PC Software....................................................................9-1 9.3 Protection Device Configuration.....................................................................9-2 9.3.1 System Configuration......................................................................................................... 9-2 9.3.2 Function Configuration....................................................................................................... 9-2 9.3.3 LED Configuration ............................................................................................................. 9-3 9.3.4 Binary Input Configuration ................................................................................................. 9-3 9.3.5 Binary Output Configuration............................................................................................... 9-4 9.3.6 Setting Configuration ......................................................................................................... 9-5 9.3.7 Logic Graph Configuration ................................................................................................. 9-5
9.4 Configurable Information.................................................................................9-6 9.4.1 Configurable Input Signals................................................................................................. 9-6 9.4.2 Configurable Output Signals ............................................................................................ 9-10 9.4.3 Configurable LED Indicators ............................................................................................ 9-15 9.4.4 Configurable Binary Inputs............................................................................................... 9-15 9.4.5 Configurable Binary Outputs............................................................................................ 9-16
List of Figures Figure 9.3-1 Interface of system configuration ...................................................................... 9-2 Figure 9.3-2 Interface of function configuration .................................................................... 9-2 Figure 9.3-3 Interface of LED configuration ........................................................................... 9-3 Figure 9.3-4 Interface of binary input configuration .............................................................. 9-4 Figure 9.3-5 Interface of binary output configuration............................................................ 9-4 Figure 9.3-6 Interface of setting configuration....................................................................... 9-5 Figure 9.3-7 Interface of logic graph configuration ............................................................... 9-5
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9 Configurable Function
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9 Configurable Function
9.1 General Description The configurable function of this relay can be easy to realize the system configuration, the protection function configuration, the binary input configuration, the binary output configuration, the LED indicator configuration and the logic programming function in this relay through the PCS-PC configuration tool auxiliary software, which makes this relay can meet different practical requirements.
9.2 Introduction of PCS-PC Software The PCS-PC software is developed in order to meet customer’s demand on functions of the UAPC platform device, such as device configuration and programmable design. It selects substation as the core of data management and the device as fundamental unit, supporting one substation to govern many devices. The software provides two kinds of operation modes: on-line mode and off-line mode. The on-line mode supports the Ethernet connection with the device through the standard IEC60870-5-103 and can be capable of uploading and downloading the configuration files through Ethernet net; the off-line mode supports the off-line setting configuration. In addition, it also supports programmable logic to meet the demands of a practical engineering. Please see the PCS-PC online help brochure or the instruction manual of PCS-PC configuration tool auxiliary software for more details about the PCS-PC software. The functions of the PCS-PC software: z
Programmable logic (off-line function)
z
System configuration (off-line function)
z
Function configuration (off-line function)
z
LED indicators configuration (off-line function)
z
Binary signals configuration (off-line function)
z
Setting configuration (off-line & on-line function)
z
Real-time display of analogue and digital quantity of device (on-line function)
z
Display of sequence of report (SOE) (on-line function)
z
Analysis of waveform (off-line & on-line function)
z
File downloading/uploading (on-line function)
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9 Configurable Function
9.3 Protection Device Configuration 9.3.1 System Configuration The system configuration is for configuring the hardware and default language etc. of this relay. WARNING! The system configuration shall only be operated by professionals who are familiar with protection object and protection device. Or else, any incorrect configuration may cause relay mal-operation or fail to operate. In general, these configuration works have been completed before equipment leaving factory. If the system configuration is really needed, user must select “Execute whole script” item in the right-click menu before other configuration operations. The interface of the system configuration is shown in Figure 9.3-1.
Figure 9.3-1 Interface of system configuration
9.3.2 Function Configuration The system configuration is for configuring the protection function and supervision function of this relay. It can enable or disable a selected function. The interface of the system configuration is shown in Figure 9.3-2.
Figure 9.3-2 Interface of function configuration
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9 Configurable Function
It can enable or disable a protective element or a supervision element by selecting “Enable” or “Disable” in the column “Attribute”.
9.3.3 LED Configuration The LED configuration is for configuring the LED indicator of this relay. It can define a selected LED to indicate the appointed signal. This relay provides 20 LED indicators, and the first two LED indicators are defined as “HEALTHY” LED and “ALARM”, the other 18 LED indicators can be configured by users as required. The interface of the LED configuration is shown in Figure 9.3-3.
Figure 9.3-3 Interface of LED configuration
The column “Variable List” at the right side provides the elements including protective elements, alarm elements and binary input elements which can output signal through a LED. Drag an expected signal to the menu “Signal” of a selected LED to make the selected LED indicate the corresponding signal. When the “Latched” check box is selected, the selected LED could only be reset by a resetting signal. If the “Latched” check box is not selected, the signals will reset automatically once the trigger signal resets. The column “Color” is used to choose color for each LED: “yellow”, “green” or “red” are provided to choose from. The label of each LED can be edited by double-click on the item “Led label” of a selected LED, and then input the expected label.
9.3.4 Binary Input Configuration The binary input configuration is for configuring the binary inputs of this relay. It can define a selected binary input for inputting a special purpose binary signal. The interface of the binary input configuration is shown in Figure 9.3-4.
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9 Configurable Function
Figure 9.3-4 Interface of binary input configuration
The column “BI Terminal” in “Binary Input Config” lists all the configurable binary inputs of this relay, and the column “Variables” at the right side lists all the special purpose binary input signals. Drag an expected special purpose binary input to the menu “Int. Signal” of a selected binary input to make the selected binary input for inputting the corresponding binary input signal. The menu “rising edge delay time” and “falling edge delay time” are used to set the pickup time and dropout time of each binary input respectively. The name of each binary input can be edited by double-click on the item “BI Name” of a selected binary input, and then input the expected name.
9.3.5 Binary Output Configuration The binary output configuration is for configuring the binary outputs of this relay. It can define a selected binary output for outputting an appointed signal. The interface of the binary output configuration is shown in Figure 9.3-5.
Figure 9.3-5 Interface of binary output configuration
The column “BO Terminal” in “Binary Output Config” lists all the configurable binary outputs of this relay, and the column “Variables” at the right side lists all the binary output signals, such as trip signals, alarm signals etc. Drag an expected binary output signal to the menu “Int. Signal” of a selected binary output to make the selected binary output for output the corresponding binary 9-4
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9 Configurable Function
output signal. The name of each binary output can be edited by double-click on the item “BO Name” of a selected binary output, and then input the expected name.
9.3.6 Setting Configuration The setting configuration is for configuring the settings of this relay, including system settings, protective settings and so on. It can configure the default setting value in each setting group of a selected setting. It also can set a setting to be visible or hidden in this relay through the menu “Visible”. After function configuration is finished, the disabled protective function is hidden in this relay and in the setting configuration list of PCS-PC software. The interface of the setting configuration is shown in Figure 9.3-6.
Figure 9.3-6 Interface of setting configuration
9.3.7 Logic Graph Configuration The logic graph configuration is for configuring some simple logic element to meet the demands of a practical engineering. The interface of the logic graph configuration is shown in Figure 9.3-7.
Figure 9.3-7 Interface of logic graph configuration
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9 Configurable Function
For more details about how to do a logic graph configuration, see the PCS-PC online help brochure or the instruction manual of PCS-PC configuration tool auxiliary software.
9.4 Configurable Information 9.4.1 Configurable Input Signals All the configurable input signals of this relay are listed in following table. No.
Input Signal
Description
Default
The binary input of the auxiliary normal close contact of the circuit
B07.BI_04
1
BI_52b
2
BI_52a
3
Sig_MCB_VTS
4
Ctrl.In_EnCtrl
The binary signal for enabling the remote control function
5
Ctrl.In_Unblock
The binary signal for unlocking the interlock control function
6
Ctrl1.In_ManOpn
The binary input for inputting the manual tripping signal
7
Ctrl1.In_ManCls
The binary input for inputting the manual closing signal
8
Ctrl1.In_ManSynChk
The binary signal for enabling synchronism check of manual closing
9
Ctrl1.In_ManDdChk
The binary signal for enabling dead check of manual closing
10
BI_LowPres_Trp
The binary input of the tripping low pressure signal
11
BI_LowPres_Cls
The binary input of the closing low pressure signal
B07.BI_07
12
50BF.In_BFP1
The external initiation signal of the breaker failure protection
B07.BI_09
13
50BF.In_BFP2
The inner initiation signal of the breaker failure protection
14
BI_RstTarg
The binary input of the signal resetting signal
B07.BI_06
15
Alm_Maintenance
The device maintenance supervision signal
B07.BI_12
16
BI_TrigDFR
The binary input of the triggering oscillography signal
17
27P1.OnLoad
18
27P2.OnLoad
19
50/51P1.En1
The binary signal for enabling the stage 1 overcurrent protection
20
50/51P1.Blk
The binary signal for blocking the stage 1 overcurrent protection
21
50/51P2.En1
The binary signal for enabling the stage 2 overcurrent protection
22
50/51P2.Blk
The binary signal for blocking the stage 2 overcurrent protection
23
50/51P3.En1
The binary signal for enabling the stage 3 overcurrent protection
24
50/51P3.Blk
The binary signal for blocking the stage 3 overcurrent protection
25
50/51P4.En1
The binary signal for enabling the stage 4 overcurrent protection
26
50/51P4.Blk
The binary signal for blocking the stage 4 overcurrent protection
27
50/51Q1.En1
breaker The binary input of the auxiliary normal open contact of the circuit breaker The binary signal for inputting the state of the VT’s miniature circuit breaker
B07.BI_05 B07.BI_08 B07.BI_03
B07.BI_13
The binary signal for inputting the system on load state of the stage 1 undervoltage protection The binary signal for inputting the system on load state of the stage 2 undervoltage protection
The binary signal for enabling the stage 1 negative sequence overcurrent protection
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9 Configurable Function 28
50/51Q1.Blk
29
50/51Q2.En1
30
50/51Q2.Blk
31
50/51G1.En1
32
50/51G1.Blk
33
50/51G2.En1
34
50/51G2.Blk
35
50/51G3.En1
36
50/51G3.Blk
37
50/51G4.En1
38
50/51G4.Blk
39
A.50/51G1.En1
40
A.50/51G1.Blk
41
A.50/51G2.En1
42
A.50/51G2.Blk
43
A.50/51G3.En1
44
A.50/51G3.Blk
45
A.50/51G4.En1
46
A.50/51G4.Blk
47
50/51SEF1.En1
48
50/51SEF1.Blk
49
50/51SEF2.En1
The binary signal for blocking the stage 1 negative sequence overcurrent protection The binary signal for enabling the stage 2 negative sequence overcurrent protection The binary signal for blocking the stage 2 negative sequence overcurrent protection The binary signal for enabling the No.1 group of stage 1 zero sequence overcurrent protection The binary signal for blocking the No.1 group of stage 1 zero sequence overcurrent protection The binary signal for enabling the No.1 group of stage 2 zero sequence overcurrent protection The binary signal for blocking the No.1 group of stage 2 zero sequence overcurrent protection The binary signal for enabling the No.1 group of stage 3 zero sequence overcurrent protection The binary signal for blocking the No.1 group of stage 3 zero sequence overcurrent protection The binary signal for enabling the No.1 group of stage 4 zero sequence overcurrent protection The binary signal for blocking the No.1 group of stage 4 zero sequence overcurrent protection The binary signal for enabling the No.2 group of stage 1 zero sequence overcurrent protection The binary signal for blocking the No.2 group of stage 1 zero sequence overcurrent protection The binary signal for enabling the No.2 group of stage 2 zero sequence overcurrent protection The binary signal for blocking the No.2 group of stage 2 zero sequence overcurrent protection The binary signal for enabling the No.2 group of stage 3 zero sequence overcurrent protection The binary signal for blocking the No.2 group of stage 3 zero sequence overcurrent protection The binary signal for enabling the No.2 group of stage 4 zero sequence overcurrent protection The binary signal for blocking the No.2 group of stage 4 zero sequence overcurrent protection The binary signal for enabling the stage 1 sensitive earth fault protection The binary signal for blocking the stage 1 sensitive earth fault protection The binary signal for enabling the stage 2 sensitive earth fault protection 9-7
PCS-9611 Feeder Relay Date: 2011-08-29
9 Configurable Function The binary signal for blocking the stage 2 sensitive earth fault
50
50/51SEF2.Blk
51
50/51SEF3.En1
52
50/51SEF3.Blk
53
50/51SEF4.En1
54
50/51SEF4.Blk
55
50BC.En1
The binary signal for enabling the broken conductor protection
56
50BC.Blk
The binary signal for blocking the broken conductor protection
57
50PSOTF.En1
The binary signal for enabling the SOTF overcurrent protection
58
50PSOTF.Blk
The binary signal for blocking the SOTF overcurrent protection
59
50GSOTF.En1
60
50GSOTF.Blk
61
49.En1
The binary signal for enabling the thermal overload protection
62
49.Blk
The binary signal for blocking the thermal overload protection
63
49.Clr
The binary signal for clearing the heat of thermal overload protection
64
59P1.En1
The binary signal for enabling the stage 1 overvoltage protection
65
59P1.Blk
The binary signal for blocking the stage 1 overvoltage protection
66
59P2.En1
The binary signal for enabling the stage 2 overvoltage protection
67
59P2.Blk
The binary signal for blocking the stage 2 overvoltage protection
68
27P1.En1
The binary signal for enabling the stage 1 undervoltage protection
69
27P1.Blk
The binary signal for blocking the stage 1 undervoltage protection
70
27P2.En1
The binary signal for enabling the stage 2 undervoltage protection
71
27P2.Blk
The binary signal for blocking the stage 2 undervoltage protection
72
59Q.En1
73
59Q.Blk
74
59G1.En1
75
59G1.Blk
76
59G2.En1
77
59G2.Blk
78
81U1.En1
The binary signal for enabling the stage 1 under-frequency protection
79
81U1.Blk
The binary signal for blocking the stage 1 under-frequency protection
protection The binary signal for enabling the stage 3 sensitive earth fault protection The binary signal for blocking the stage 3 sensitive earth fault protection The binary signal for enabling the stage 4 sensitive earth fault protection The binary signal for blocking the stage 4 sensitive earth fault protection
The binary signal for enabling the zero sequence SOTF overcurrent protection The binary signal for blocking the zero sequence SOTF overcurrent protection
B07.BI_10
The binary signal for enabling the negative sequence undervoltage protection The binary signal for blocking the negative sequence undervoltage protection The binary signal for enabling the stage 1 zero sequence undervoltage protection The binary signal for blocking the stage 1 zero sequence undervoltage protection The binary signal for enabling the stage 2 zero sequence undervoltage protection The binary signal for blocking the stage 2 zero sequence undervoltage protection
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9 Configurable Function 80
81U2.En1
The binary signal for enabling the stage 2 under-frequency protection
81
81U2.Blk
The binary signal for blocking the stage 2 under-frequency protection
82
81U3.En1
The binary signal for enabling the stage 3 under-frequency protection
83
81U3.Blk
The binary signal for blocking the stage 3 under-frequency protection
84
81U4.En1
The binary signal for enabling the stage 4 under-frequency protection
85
81U4.Blk
The binary signal for blocking the stage 4 under-frequency protection
86
81O1.En1
The binary signal for enabling the stage 1 over-frequency protection
87
81O1.Blk
The binary signal for blocking the stage 1 over-frequency protection
88
81O2.En1
The binary signal for enabling the stage 2 over-frequency protection
89
81O2.Blk
The binary signal for blocking the stage 2 over-frequency protection
90
81O3.En1
The binary signal for enabling the stage 3 over-frequency protection
91
81O3.Blk
The binary signal for blocking the stage 3 over-frequency protection
92
81O4.En1
The binary signal for enabling the stage 4 over-frequency protection
93
81O4.Blk
The binary signal for blocking the stage 4 over-frequency protection
94
81R1.En1
95
81R1.Blk
96
81R2.En1
97
81R2.Blk
98
81R3.En1
99
81R3.Blk
100
81R4.En1
101
81R4.Blk
102
79.En1
The binary signal for enabling the auto-recloser
103
79.Blk
The binary signal for blocking the auto-recloser
104
CLP.En1
The binary signal for enabling the cold load pickup function
105
CLP.Blk
The binary signal for blocking the cold load pickup function
106
CLP.ShortRst
The binary signal for fast resetting the CLP
107
CLP.Init
The binary signal for initiating the CLP
108
MR1.En1
The binary signal for enabling the No.1 mechanical protection
109
MR1.Blk
The binary signal for blocking the No.1 mechanical protection
110
MR2.En1
The binary signal for enabling the No.2 mechanical protection
111
MR2.Blk
The binary signal for blocking the No.2 mechanical protection
112
MR3.En1
The binary signal for enabling the No.3 mechanical protection
113
MR3.Blk
The binary signal for blocking the No.3 mechanical protection
114
MR4.En1
The binary signal for enabling the No.4 mechanical protection
The binary signal for enabling the stage 1 frequency rate-of-change protection The binary signal for blocking the stage 1 frequency rate-of-change protection The binary signal for enabling the stage 2 frequency rate-of-change protection The binary signal for blocking the stage 2 frequency rate-of-change protection The binary signal for enabling the stage 3 frequency rate-of-change protection The binary signal for blocking the stage 3 frequency rate-of-change protection The binary signal for enabling the stage 4 frequency rate-of-change protection The binary signal for blocking the stage 4 frequency rate-of-change protection B07.BI_11
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9 Configurable Function 115
MR4.Blk
The binary signal for blocking the No.4 mechanical protection
116
Sig_Spare01
The No.1 programmable spare signal
117
Sig_Spare02
The No.2 programmable spare signal
118
Sig_Spare03
The No.3 programmable spare signal
119
Sig_Spare04
The No.4 programmable spare signal
120
Sig_Spare05
The No.5 programmable spare signal
121
Sig_Spare06
The No.6 programmable spare signal
122
Sig_Spare07
The No.7 programmable spare signal
123
Sig_Spare08
The No.8 programmable spare signal
124
Alm_Resv01
The No.1 reserved alarm signal
125
Alm_Resv02
The No.2 reserved alarm signal
126
Alm_Resv03
The No.3 reserved alarm signal
127
Alm_Resv04
The No.4 reserved alarm signal
128
Alm_Resv05
The No.5 reserved alarm signal
129
Alm_Resv06
The No.6 reserved alarm signal
130
Alm_Resv07
The No.7 reserved alarm signal
131
Alm_Resv08
The No.8 reserved alarm signal
132
Switch1.Dpos
The No.1 dual-position switch
133
Switch2.Dpos
The No.2 dual-position switch
134
Switch3.Dpos
The No.3 dual-position switch
135
Switch4.Dpos
The No.4 dual-position switch
136
Interlock1.In_Opn
The interlock check signal of the No.1 manual tripping element
137
Interlock1.In_Cls
The interlock check signal of the No.1 manual closing element
138
Interlock2.In_Opn
The interlock check signal of the No.2 manual tripping element
139
Interlock2.In_Cls
The interlock check signal of the No.2 manual closing element
140
Interlock3.In_Opn
The interlock check signal of the No.3 manual tripping element
141
Interlock3.In_Cls
The interlock check signal of the No.3 manual closing element
142
Interlock4.In_Opn
The interlock check signal of the No.4 manual tripping element
143
Interlock4.In_Cls
The interlock check signal of the No.4 manual closing element
144
Interlock5.In_Opn
The interlock check signal of the No.5 manual tripping element
145
Interlock5.In_Cls
The interlock check signal of the No.5 manual closing element
9.4.2 Configurable Output Signals All the configurable output signals of this relay are listed in following table. No.
Output Signal
Description
1
FD.Pkp
The fault detector operates.
2
50/51P1.St
The stage 1 overcurrent protection picks up.
3
50/51P1.Op
The stage 1 overcurrent protection operates.
4
50/51P2.St
The stage 2 overcurrent protection picks up.
5
50/51P2.Op
The stage 2 overcurrent protection operates.
6
50/51P3.St
The stage 3 overcurrent protection picks up.
7
50/51P3.Op
The stage 3 overcurrent protection operates.
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9 Configurable Function 8
50/51P4.St
The stage 4 overcurrent protection picks up.
9
50/51P4.Op
The stage 4 overcurrent protection operates.
10
50/51Q1.St
The stage 1 negative sequence overcurrent protection picks up.
11
50/51Q1.Op
The stage 1 negative sequence overcurrent protection operates.
12
50/51Q2.St
The stage 2 negative sequence overcurrent protection picks up.
13
50/51Q2.Op
The stage 2 negative sequence overcurrent protection operates.
14
50/51G1.St
The No.1 stage 1 zero sequence overcurrent protection picks up.
15
50/51G1.Op
The No.1 stage 1 zero sequence overcurrent protection operates.
16
50/51G2.St
The No.1 stage 2 zero sequence overcurrent protection picks up.
17
50/51G2.Op
The No.1 stage 2 zero sequence overcurrent protection operates.
18
50/51G3.St
The No.1 stage 3 zero sequence overcurrent protection picks up.
19
50/51G3.Op
The No.1 stage 3 zero sequence overcurrent protection operates.
20
50/51G4.St
The No.1 stage 4 zero sequence overcurrent protection picks up.
21
50/51G4.Op
The No.1 stage 4 zero sequence overcurrent protection operates.
22
A.50/51G1.St
The No.2 stage 1 zero sequence overcurrent protection picks up.
23
A.50/51G1.Op
The No.2 stage 1 zero sequence overcurrent protection operates.
24
A.50/51G2.St
The No.2 stage 2 zero sequence overcurrent protection picks up.
25
A.50/51G2.Op
The No.2 stage 2 zero sequence overcurrent protection operates.
26
A.50/51G3.St
The No.2 stage 3 zero sequence overcurrent protection picks up.
27
A.50/51G3.Op
The No.2 stage 3 zero sequence overcurrent protection operates.
28
A.50/51G4.St
The No.2 stage 4 zero sequence overcurrent protection picks up.
29
A.50/51G4.Op
The No.2 stage 4 zero sequence overcurrent protection operates.
30
50/51SEF1.St
The stage 1 sensitive earth fault protection picks up.
31
50/51SEF1.Op
The stage 1 sensitive earth fault protection operates.
32
50/51SEF2.St
The stage 2 sensitive earth fault protection picks up.
33
50/51SEF2.Op
The stage 2 sensitive earth fault protection operates.
34
50/51SEF3.St
The stage 3 sensitive earth fault protection picks up.
35
50/51SEF3.Op
The stage 3 sensitive earth fault protection operates.
36
50/51SEF4.St
The stage 4 sensitive earth fault protection picks up.
37
50/51SEF4.Op
The stage 4 sensitive earth fault protection operates.
38
50BF.St
The breaker failure protection picks up.
39
50BF.ReTrp
The breaker failure protection re-trip operates.
40
50BF.Op
The breaker failure protection operates.
41
50BC.St
The broken conductor protection picks up.
42
50BC.Op
The broken conductor protection operates.
43
50PSOTF.St
The SOTF overcurrent protection picks up.
44
50PSOTF.Op
The SOTF overcurrent protection operates.
45
50GSOTF.St
The zero sequence SOTF overcurrent protection picks up.
46
50GSOTF.Op
The zero sequence SOTF overcurrent protection operates.
47
49.St
The thermal overload protection picks up.
48
49.Op
The thermal overload protection operates.
49
27P1.St
The stage 1 undervoltage protection picks up.
50
27P1.Op
The stage 1 undervoltage protection operates. 9-11
PCS-9611 Feeder Relay Date: 2011-08-29
9 Configurable Function 51
27P2.St
The stage 2 undervoltage protection picks up.
52
27P2.Op
The stage 2 undervoltage protection operates.
53
59P1.St
The stage 1 overvoltage protection picks up.
54
59P1.Op
The stage 1 overvoltage protection operates.
55
59P2.St
The stage 2 overvoltage protection picks up.
56
59P2.Op
The stage 2 overvoltage protection operates.
57
59Q.St
The negative sequence overvoltage protection picks up.
58
59Q.Op
The negative sequence overvoltage protection operates.
59
59G1.St
The stage 1 zero sequence overvoltage protection picks up.
60
59G1.Op
The stage 1 zero sequence overvoltage protection operates.
61
59G2.St
The stage 2 zero sequence overvoltage protection picks up.
62
59G2.Op
The stage 2 zero sequence overvoltage protection operates.
63
81U1.St
The stage 1 under-frequency protection picks up.
64
81U1.Op
The stage 1 under-frequency protection operates.
65
81U2.St
The stage 2 under-frequency protection picks up.
66
81U2.Op
The stage 2 under-frequency protection operates.
67
81U3.St
The stage 3 under-frequency protection picks up.
68
81U3.Op
The stage 3 under-frequency protection operates.
69
81U4.St
The stage 4 under-frequency protection picks up.
70
81U4.Op
The stage 4 under-frequency protection operates.
71
81O1.St
The stage 1 over-frequency protection picks up.
72
81O1.Op
The stage 1 over-frequency protection operates.
73
81O2.St
The stage 2 over-frequency protection picks up.
74
81O2.Op
The stage 2 over-frequency protection operates.
75
81O3.St
The stage 3 over-frequency protection picks up.
76
81O3.Op
The stage 3 over-frequency protection operates.
77
81O4.St
The stage 4 over-frequency protection picks up.
78
81O4.Op
The stage 4 over-frequency protection operates.
79
81R1.St
The stage 1 frequency rate-of-change protection picks up.
80
81R1.Op
The stage 1 frequency rate-of-change protection operates.
81
81R2.St
The stage 2 frequency rate-of-change protection picks up.
82
81R2.Op
The stage 2 frequency rate-of-change protection operates.
83
81R3.St
The stage 3 frequency rate-of-change protection picks up.
84
81R3.Op
The stage 3 frequency rate-of-change protection operates.
85
81R4.St
The stage 4 frequency rate-of-change protection picks up.
86
81R4.Op
The stage 4 frequency rate-of-change protection operates.
87
79.InProg
The auto-recloser picks up.
88
79.Close
The auto-recloser operates.
89
79.Close_3PS1
The 1st shot auto-recloser operates.
90
79.Close_3PS2
The 2nd shot auto-recloser operates.
91
79.Close_3PS3
The 3rd shot auto-recloser operates.
92
79.Close_3PS4
The 4th shot auto-recloser operates.
93
79.Ready
The auto-recloser is ready for operation.
9-12
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9 Configurable Function 94
79.Fail
The operation of auto-recloser is failed.
95
79.Reset
The auto-recloser is restored.
96
MR1.St
The No.1 mechanical protection picks up.
97
MR1.Op
The No.1 mechanical protection operates.
98
MR2.St
The No.2 mechanical protection picks up.
99
MR2.Op
The No.2 mechanical protection operates.
100
MR3.St
The No.3 mechanical protection picks up.
101
MR3.Op
The No.3 mechanical protection operates.
102
MR4.St
The No.4 mechanical protection picks up.
103
MR4.Op
The No.4 mechanical protection operates.
104
Ctrl1.Opn
The No.1 group of remote tripping output operates.
105
Ctrl1.Cls
The No.1 group of remote closing output operates.
106
Ctrl2.Opn
The No.2 group of remote tripping output operates.
107
Ctrl2.Cls
The No.2 group of remote closing output operates.
108
Ctrl3.Opn
The No.3 group of remote tripping output operates.
109
Ctrl3.Cls
The No.3 group of remote closing output operates.
110
Ctrl4.Opn
The No.4 group of remote tripping output operates.
111
Ctrl4.Cls
The No.4 group of remote closing output operates.
112
Ctrl5.Opn
The No.5 group of remote tripping output operates.
113
Ctrl5.Cls
The No.5 group of remote closing output operates.
114
Alm_Device
Anyone of the software supervision alarm occurs.
115
Alm_52b
The normal close contact of the CB is abnormal.
116
VTS.Alm_SynVT
The synchro-check voltage transformer circuit is failed.
117
VTS.Alm
The protection voltage transformer circuit is failed.
118
CTS.Alm
The current transformer is failed.
119
49.Alm
The thermal overload situation is occurred.
120
Alm_CommTest
The communication test operation is executed.
121
Alm_TimeSync
The time synchronization is not correct.
122
Alm_Maintenance
The binary input for denoting maintenance situation is energized.
123
Alm_LowPres_Trp
The pressure of the tripping circuit is low.
124
Alm_LowPres_Cls
The pressure of the closing circuit is low.
125
Alm_Resv1
The No.1 reserved alarm signal is issued.
126
Alm_Resv2
The No.2 reserved alarm signal is issued.
127
Alm_Resv3
The No.3 reserved alarm signal is issued.
128
Alm_Resv4
The No.4 reserved alarm signal is issued.
129
Alm_Resv5
The No.5 reserved alarm signal is issued.
130
Alm_Resv6
The No.6 reserved alarm signal is issued.
131
Alm_Resv7
The No.7 reserved alarm signal is issued.
132
Alm_Resv8
The No.8 reserved alarm signal is issued.
133
B07.BI_01
The No.1 binary input is energized.
134
B07.BI_02
The No.2 binary input is energized.
135
B07.BI_03
The No.3 binary input is energized.
136
B07.BI_04
The No.4 binary input is energized. 9-13
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9 Configurable Function 137
B07.BI_05
The No.5 binary input is energized.
138
B07.BI_06
The No.6 binary input is energized.
139
B07.BI_07
The No.7 binary input is energized.
140
B07.BI_08
The No.8 binary input is energized.
141
B07.BI_09
The No.9 binary input is energized.
142
B07.BI_10
The No.10 binary input is energized.
143
B07.BI_11
The No.11 binary input is energized.
144
B07.BI_12
The No.12 binary input is energized.
145
B07.BI_13
The No.13 binary input is energized.
146
B07.BI_14
The No.14 binary input is energized.
147
B07.BI_15
The No.15 binary input is energized.
148
B07.BI_16
The No.16 binary input is energized.
149
B07.BI_17
The No.17 binary input is energized.
150
B07.BI_18
The No.18 binary input is energized.
151
B07.BI_19
The No.19 binary input is energized.
152
CLP.St
The cold load pickup element picks up.
153
25M.Ok_SynChk
The synchronism check of the manual closing function is satisfied.
154
25M.Ok_DdChk
The dead check of the manual closing function is satisfied.
155
25A.Ok_SynChk
The synchronism check of the auto-recloser is satisfied.
156
25A.Ok_DdChk
The dead check of the auto-recloser is satisfied.
157
VTS.InstAlm
The fast voltage transformer supervision is issued.
158
CTS.InstAlm
The fast current transformer supervision is issued.
159
Prot.OnLoad
The system on load condition is satisfied.
160
Breaker.Dpos_HMI
The state of the circuit breaker for displaying on the local HMI.
161
Breaker.Dpos_RMT
The state of the circuit breaker for sending to the remote HMI.
162
Switch1.Dpos_HMI
The state of the No.1 switch for displaying on the local HMI.
163
Switch1.Dpos_RMT
The state of the No.1 switch for sending to the remote HMI.
164
Switch2.Dpos_HMI
The state of the No.2 switch for displaying on the local HMI.
165
Switch2.Dpos_RMT
The state of the No.2 switch for sending to the remote HMI.
166
Switch3.Dpos_HMI
The state of the No.2 switch for displaying on the local HMI.
167
Switch3.Dpos_RMT
The state of the No.2 switch for sending to the remote HMI.
168
Switch4.Dpos_HMI
The state of the No.2 switch for displaying on the local HMI.
169
Switch4.Dpos_RMT
The state of the No.2 switch for sending to the remote HMI.
NOTE! The configurable output signals “xxxxx.Dpos_HMI” and “xxxxx.Dpos_RMT” are used to indicate the state of the corresponding circuit breaker or switch. Each signal is a four-state output state, and the state codes are listed as below. Target
Local HMI
State Code
Description
0x00
Open state: “0”
Close state: “0”
0x01
Open state: “1”
Close state: “0”
0x02
Open state: “0”
Close state: “1”
0x03
Open state: “1”
Close state: “1”
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PCS-9611 Feeder Relay Date: 2011-08-29
9 Configurable Function
Remote HMI
0x80
Open state: “0”
Close state: “0”
0x81
Open state: “1”
Close state: “0”
0x82
Open state: “0”
Close state: “1”
0x83
Open state: “1”
Close state: “1”
9.4.3 Configurable LED Indicators All the configurable LED indicators of this relay are listed in following table. No.
LED
Description
Default
1
LED_01
The No.1 LED, it is not configurable.
HEALTHY
2
LED_02
The No.2 LED, it is not configurable.
ALARM
3
LED_03
The No.3 LED, it is configurable.
TRIP
4
LED_04
The No.4 LED, it is configurable.
RECLOSE
5
LED_05
The No.5 LED, it is configurable.
CB OPEN
6
LED_06
The No.6 LED, it is configurable.
CB CLOSE
7
LED_07
The No.7 LED, it is configurable.
Alm_Maintenance
8
LED_08
The No.8 LED, it is configurable.
Alm_Maintenance
9
LED_09
The No.9 LED, it is configurable.
Alm_Maintenance
10
LED_10
The No.10 LED, it is configurable.
Alm_Maintenance
11
LED_11
The No.11 LED, it is configurable.
Alm_Maintenance
12
LED_12
The No.12 LED, it is configurable.
Alm_Maintenance
13
LED_13
The No.13 LED, it is configurable.
Alm_Maintenance
14
LED_14
The No.14 LED, it is configurable.
Alm_Maintenance
15
LED_15
The No.15 LED, it is configurable.
Alm_Maintenance
16
LED_16
The No.16 LED, it is configurable.
Alm_Maintenance
17
LED_17
The No.17 LED, it is configurable.
Alm_Maintenance
18
LED_18
The No.18 LED, it is configurable.
Alm_Maintenance
19
LED_19
The No.19 LED, it is configurable.
Alm_Maintenance
20
LED_20
The No.20 LED, it is configurable.
Alm_Maintenance
9.4.4 Configurable Binary Inputs All the configurable binary inputs of this relay are listed in following table. No.
Binary Input
Description
Default
1
B07.BI_01
The No.1 binary input, it is configurable.
2
B07.BI_02
The No.2 binary input, it is configurable.
3
B07.BI_03
The No.3 binary input, it is configurable.
Ctrl.In_EnCtrl
4
B07.BI_04
The No.4 binary input, it is configurable.
BI_52b
5
B07.BI_05
The No.5 binary input, it is configurable.
BI_52a
6
B07.BI_06
The No.6 binary input, it is configurable.
BI_RstTarg
7
B07.BI_07
The No.7 binary input, it is configurable.
BI_LowPres_Cls
8
B07.BI_08
The No.8 binary input, it is configurable.
Sig_MCB_VTS
9
B07.BI_09
The No.9 binary input, it is configurable.
50BF.In_BFP1
10
B07.BI_10
The No.10 binary input, it is configurable.
49.Clr 9-15
PCS-9611 Feeder Relay Date: 2011-08-29
9 Configurable Function 11
B07.BI_11
The No.11 binary input, it is configurable.
79.Blk
12
B07.BI_12
The No.12 binary input, it is configurable.
Alm_Maintenance
13
B07.BI_13
The No.13 binary input, it is configurable.
Ctrl1.ManCls
14
B07.BI_14
The No.14 binary input, it is configurable.
15
B07.BI_15
The No.15 binary input, it is configurable.
16
B07.BI_16
The No.16 binary input, it is configurable.
17
B07.BI_17
The No.17 binary input, it is configurable.
18
B07.BI_18
The No.18 binary input, it is configurable.
19
B07.BI_19
The No.19 binary input, it is configurable.
9.4.5 Configurable Binary Outputs All the configurable binary outputs of this relay are listed in following table. No.
Binary Output
Description
Default
1
B06.BO_07
The No.7 programmable binary output of the module NR4521
Alm_Maintenance
2
B06.BO_08
The No.8 programmable binary output of the module NR4521
Alm_Maintenance
3
B06.BO_09
The No.9 programmable binary output of the module NR4521
Alm_Maintenance
4
B06.BO_10
The No.10 programmable binary output of the module NR4521
Alm_Maintenance
5
B06.BO_11
The No.11 programmable binary output of the module NR4521
Alm_Maintenance
NOTE! Other configurable binary outputs which are not listed in above table only can be configured through the setting [XXXX.OutMap] (“XXXX” is the abbreviation of a protective element, such as 50/51P1, 50/51G1, 59P1 etc.) of each function element. For more details about these settings, please see Chapter 7.
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10 Communication
10 Communication Table of Contents 10.1 General ..........................................................................................................10-1 10.2 Rear Communication Port Information.......................................................10-1 10.2.1 RS-485 Interface............................................................................................................ 10-1 10.2.2 Ethernet Interface .......................................................................................................... 10-3 10.2.3 IEC60870-5-103 Communication................................................................................... 10-4 10.2.4 IEC61850 Communication ............................................................................................. 10-4 10.2.5 DNP3.0 Communication ................................................................................................ 10-4
10.3 IEC60870-5-103 Interface .............................................................................10-4 10.3.1 Physical Connection and Link Layer .............................................................................. 10-5 10.3.2 Initialization .................................................................................................................... 10-5 10.3.3 Time Synchronization .................................................................................................... 10-5 10.3.4 Spontaneous Events ...................................................................................................... 10-5 10.3.5 General Interrogation ..................................................................................................... 10-6 10.3.6 Cyclic Measurements..................................................................................................... 10-6 10.3.7 General Commands....................................................................................................... 10-6 10.3.8 Generic Functions.......................................................................................................... 10-6 10.3.9 Disturbance Records ..................................................................................................... 10-7
10.4 IEC61850 Interface .......................................................................................10-7 10.4.1 Overview........................................................................................................................ 10-7 10.4.2 Communication Profiles ................................................................................................. 10-8 10.4.3 Server Data Organization .............................................................................................. 10-9 10.4.4 Server Features and Configuration .............................................................................. 10-12 10.4.5 ACSI Conformance ...................................................................................................... 10-13 10.4.6 Logical Nodes .............................................................................................................. 10-18
10.5 DNP3.0 Interface.........................................................................................10-20 10.5.1 Overview...................................................................................................................... 10-20 10-a
PCS-9611 Feeder Relay Date: 2011-08-29
10 Communication
10.5.2 Link Layer Functions ....................................................................................................10-20 10.5.3 Transport Functions......................................................................................................10-20 10.5.4 Application Layer Functions..........................................................................................10-21
List of Figures Figure 10.2-1 EIA RS-485 bus connection arrangements ....................................................10-2 Figure 10.2-2 Format of IP and submask address ................................................................10-3 Figure 10.2-3 Ethernet communication cable .......................................................................10-3 Figure 10.2-4 Ethernet communication structure .................................................................10-4
10-b
PCS-9611 Feeder Relay Date: 2011-08-29
10 Communication
10.1 General This section outlines the remote data communication interfaces of this relay. The relay can support several protocols: IEC60870-5-103, IEC61850 and DNP3.0. Setting the relevant communication parameter can select the expected protocol (see Section 7.6). The EIA RS-485 standardized interfaces are isolated, as well as the Ethernet interfaces, and are suitable for permanent connection whichever protocol is selected. The advantage of this type of connection is that up to 32 relays can be “daisy chained” together using a simple twisted pair electrical connection. It should be noted that the descriptions contained within this section do not aim to fully detail the protocol itself. The relevant documentation for the protocol should be referred to for this information. This section serves to describe the specific implementation of the protocol in the relay.
10.2 Rear Communication Port Information 10.2.1 RS-485 Interface This relay provides some rear RS-485 communication ports, and each port has two terminals in the screw connector located on the back of the relay. This port has a common ground terminal for the earth shield of the communication cable. See Section 6.5 for details of the connection terminals. The rear ports provide RS-485 serial data communication and they are intended for use with a permanently wired connection to a remote control center. The protocol provided by the relay is indicated in the relay’s “Comm Settings” submenu (see Section 7.6). By using the keypad and LCD, configure the relevant communication protocol parameters, the corresponding protocol and will be selected. 10.2.1.1 EIA RS-485 Standardized Bus The EIA RS-485 two-wire connection provides a half-duplex fully isolated serial connection to the product. The connection is polarized and whilst the product’s connection diagrams indicate the polarization of the connection terminals it should be noted that there is no agreed definition of which terminal is which. If the master is unable to communicate with the product, and the communication parameters match, then it is possible that the two-wire connection is reversed. 10.2.1.2 Bus Termination The EIA RS-485 bus must have 120Ω (Ohm) ½ Watt terminating resistors fitted at either end across the signal wires (see Figure 10.2-1). Some devices may be able to provide the bus terminating resistors by different connection or configuration arrangements, in which case separate external components will not be required. However, this product does not provide such a facility, so if it is located at the bus terminus then an external termination resistor will be required.
10-1
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EIA RS-485
10 Communication
Figure 10.2-1 EIA RS-485 bus connection arrangements
10.2.1.3 Bus Connections & Topologies The EIA RS-485 standard requires that each device is directly connected to the physical cable that is the communications bus. Stubs and tees are expressly forbidden, such as star topologies. Loop bus topologies are not part of the EIA RS-485 standard and are forbidden by it also. Two-core screened cable is recommended. The specification of the cable will be dependent on the application, although a multi-strand 0.5mm2 per core is normally adequate. Total cable length must not exceed 500m. The screen must be continuous and connected to ground at one end, normally at the master connection point; it is important to avoid circulating currents, especially when the cable runs between buildings, for both safety and noise reasons. This product does not provide a signal ground connection. If a signal ground connection is present in the bus cable then it must be ignored, although it must have continuity for the benefit of other devices connected to the bus. At no stage must the signal ground be connected to the cables screen or to the product’s chassis. This is for both safety and noise reasons. 10.2.1.4 Biasing It may also be necessary to bias the signal wires to prevent jabber. Jabber occurs when the signal level has an indeterminate state because the bus is not being actively driven. This can occur when all the slaves are in receive mode and the master is slow to turn from receive mode to transmit mode. This may be because the master purposefully waits in receive mode, or even in a high impedance state, until it has something to transmit. Jabber causes the receiving device(s) to miss the first bits of the first character in the packet, which results in the slave rejecting the message and consequentially not responding. Symptoms of these are poor response times (due to retries), increasing message error counters, erratic communications, and even a complete failure to communicate. Biasing requires that the signal lines be weakly pulled to a defined voltage level of about 1V. There should only be one bias point on the bus, which is best situated at the master connection point. The DC source used for the bias must be clean; otherwise noise will be injected. Note that some devices may (optionally) be able to provide the bus bias, in which case external components will not be required. NOTE!
10-2
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10 Communication
z
It is extremely important that the 120Ω termination resistors are fitted. Failure to do so will result in an excessive bias voltage that may damage the devices connected to the bus.
z
As the field voltage is much higher than that required, NR can not assume responsibility for any damage that may occur to a device connected to the network as a result of incorrect application of this voltage.
z
Ensure that the field voltage is not being used for other purposes (i.e. powering logic inputs) as this may cause noise to be passed to the communication network.
10.2.2 Ethernet Interface This relay provides some rear Ethernet interfaces and they are unattached to each other. The parameters of each Ethernet port can be configured in the submenu “Comm Settings” (see Section 7.6) except for the protocol which is a uniform parameter for these Ethernet ports. 10.2.2.1 IP Address and Network Communication Address A brief explanation of IP and network submask is made as below. There are four sections for an IP address.
Figure 10.2-2 Format of IP and submask address
Where: z
Section 1 and Section 2 can be set separately
z
Section 3 × 256 + Section 4 = network communication address for IEC60087-5-103
The network communication address for IEC60087-5-103 has above relationship described as an equation with section 3 and section 4 of the IP address. 10.2.2.2 Ethernet Standardized Communication Cable It is recommended to use 4-pair screened twisted category 5E cable as the communication cable. A picture is shown below.
Figure 10.2-3 Ethernet communication cable 10-3
PCS-9611 Feeder Relay Date: 2011-08-29
10 Communication
10.2.2.3 Connections and Topologies Each device is connected to an exchanger via communication cable and thereby to form a star structure network. Dual-network is recommended in order to increase reliability. The SCADA is also connected to the exchanger and will play a role of master station, so the every equipment which has been connected to the exchanger will play a role of slave unit.
Figure 10.2-4 Ethernet communication structure
10.2.3 IEC60870-5-103 Communication The IEC specification IEC60870-5-103: Telecontrol Equipment and Systems, Part 5: Transmission Protocols Section 103 defines the use of standards IEC60870-5-1 to IEC60870-5-5 to perform communication with protection equipment. The IEC60870-5-103 protocol is to use a twisted pair EIA RS-485 connection over distances up to 500m. This relay operates as a slave in the system, responding to commands from a master station.
10.2.4 IEC61850 Communication The IEC specification IEC61850: Communication Networks and Systems in Substations, a new protocol defines the communication standards in substations. The standard configuration for the IEC61850 protocol is based on the Ethernet.
10.2.5 DNP3.0 Communication The DNP3.0 (Distributed Network Protocol) protocol can support the OSI/EPA model of the ISO (International Organization for Standards), and it includes four parts: application layer protocol, transport functions, data link layer protocol and data object library. The DNP3.0 protocol is to use a twisted pair EIA RS-485 connection over distances up to 500m. This relay operates as a slave in the system, responding to commands from a master station.
10.3 IEC60870-5-103 Interface The IEC60870-5-103 interface is a master/slave interface with this relay as the slave device.
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10 Communication
The relay conforms to compatibility level 2; compatibility level 3 is not supported. The following IEC60870-5-103 facilities are supported by this interface: initialization (reset), time synchronization, event record extraction, general interrogation, cyclic measurements, general commands and disturbance records.
10.3.1 Physical Connection and Link Layer The EIA RS-485 standardized ports are available for IEC60870-5-103 in this relay. The baudrate is optional: 4800bps, 9600bps, 19200bps, 38400bps, 57600bps or 115200bps. The unattached Ethernet ports are available for IEC60870-5-103 in this relay. The transmission speed is 100Mbit/s. The link layer strictly abides by the rules defined in the IEC60870-5-103.
10.3.2 Initialization Whenever the relay has been powered up, or if the communication parameters have been changed, a reset command is required to initialize the communications. The relay will respond to either of the two reset commands (Reset CU or Reset FCB), the difference is that the Reset CU will clear any unsent messages in the relay’s transmit buffer. The relay will respond to the reset command with an identification message ASDU 5, the COT (Cause Of Transmission) of this response will be either Reset CU or Reset FCB depending on the nature of the reset command. In addition to the above identification message, if the relay has been powered up it will also produce a power up event.
10.3.3 Time Synchronization The time and date of this relay can be set by using the time synchronization feature of the IEC60870-5-103 protocol. The relay will correct for the transmission delay as specified in IEC60870-5-103. If the time synchronization message is sent as a send/confirm message, then the relay will respond with a confirmation. Whether the time synchronization message is sent as a send confirmation or a broadcast (send without any reply) message, a time synchronization Class 1 event will be generated. If the clock is synchronized using the IRIG-B input then it will not be possible to set clock by using the IEC60870-5-103 interface. An attempt to set the time via the interface will cause this relay to create an event with the current date and time taken from the IRIG-B synchronized internal clock.
10.3.4 Spontaneous Events The spontaneous events are categorized using the following information: type identification (TYP), function type (FUN) and information number (INF). This relay can support ASDU 1, ASDU 2, ASDU 40 and ASDU 41, the cause of transmission (COT) is “1”. z
ASDU 1, time-tagged message: alarm messages, special purpose binary input state change messages. 10-5
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10 Communication
z
ASDU 2, time-tagged message with relative time: tripping messages and fault detector pickup messages.
z
ASDU 40, single point information: general binary input state change messages.
z
ASDU 41, single point information with time-tagged: sequence of event (SOE) messages.
10.3.5 General Interrogation The GI can be used to read the status of the relay, the function numbers, and information numbers that will be returned during the GI cycle. The GI cycle strictly abides by the rules defined in the IEC60870-5-103. The relay will respond to this GI command with an ASDU 44 message, the cause of transmission (COT) of this response is 9. Referring the IEC60870-5-103 standard can get the enough details about general interrogation.
10.3.6 Cyclic Measurements The relay will produce measured values using ASDU 50 on a cyclical basis, this can be read from the relay using a Class 2 poll (note ADSU 3 and ASDU 9 are not used). The cause of transmission is 2. The rate at which the relay produces new measured values is fixed (about one second). It should be noted that the measurands transmitted by the relay are sent as a proportion of corresponding times the rated value of the analog value.
10.3.7 General Commands A list of the supported commands (in control direction) is contained in the following table. The relay will not respond to other commands, and short-term communication interruption will occur. TYP
FUN
INF
DCC
Function
ASDU 64
1
48
0x81
Remote trip with selection
ASDU 64
1
48
0x82
Remote close with selection
ASDU 64
1
48
0x01
Remote trip with execution
ASDU 64
1
48
0x02
Remote close with execution
ASDU 64
1
48
0xC1
Remote trip with abortion
ASDU 64
1
48
0xC2
Remote close with abortion
If the relay receives one of the command messages correctly, it will respond with an ACK message, and then send a message which has the same ASDU data with the control direction message in the next communication turn.
10.3.8 Generic Functions The generic functions can be used to read the setting and protection measurement of this relay, and modify the setting. Two supported type identifications are ASDU 21 and ASDU 10. For more details about generic functions, see the IEC60870-5-103 standard.
10-6
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10 Communication
z
Generic functions in control direction INF
z
Semantics
240
Read headings of all defined groups
241
Read values or attributes of all entries in one group
243
Read directory of a single entry
244
Read value or attribute of a single entry
245
General interrogation of generic data
248
Write entry
249
Write entry with confirmation
250
Write entry with execution
251
Write entry abort
Generic functions in monitor direction INF
Semantics
240
Read headings of all defined groups
241
Read values or attributes of all entries of one group
243
Read directory of a single entry
244
Read value or attribute of a single entry
245
End of general interrogation of generic data
249
Write entry with confirmation
250
Write entry with execution
251
Write entry aborted
10.3.9 Disturbance Records This relay can store up to eight disturbance records in its memory. A pickup of the fault detector or an operation of the relay can make the relay store the disturbance records. The disturbance records are stored in uncompressed format and can be extracted using the standard mechanisms described in the standard of IEC60870-5-103.
10.4 IEC61850 Interface 10.4.1 Overview The IEC61850 software module of PCS-9000 series is adopted in the device. The IEC61850 standard is the result of years of work by electric utilities and vendors of electronic equipment to produce standardized communication systems. The IEC61850 is a series of standards describing client/server and peer-to-peer communications, substation design and configuration, testing, environmental and project standards. The complete set includes: IEC61850-1:
Introduction and overview
IEC61850-2:
Glossary
IEC61850-3:
General requirements
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10 Communication
IEC61850-4:
System and project management
IEC61850-5:
Communications and requirements for functions and device models
IEC61850-6:
Configuration description language for communication in electrical substations related to IEDs
IEC61850-7-1:
Basic communication structure for substation and feeder equipment Principles and models
IEC61850-7-2:
Basic communication structure for substation and feeder equipment - Abstract communication service interface (ACSI)
IEC61850-7-3:
Basic communication structure for substation and feeder equipment – Common data classes
IEC61850-7-4:
Basic communication structure for substation and feeder equipment – Compatible logical node classes and data classes
IEC61850-8-1:
Specific Communication Service Mapping (SCSM) – Mappings to MMS (ISO 9506-1 and ISO 9506-2) and to ISO/IEC8802-3
IEC61850-9-1:
Specific Communication Service Mapping (SCSM) – Sampled values over serial unidirectional multi-drop point to point link
IEC61850-9-2:
Specific Communication Service Mapping (SCSM) – Sampled values over ISO/IEC8802-3
IEC61850-10:
Conformance testing
These documents can be obtained from the IEC (http://www.iec.ch). It is strongly recommended that all those involved with any IEC61850 implementation obtain this document set.
10.4.2 Communication Profiles The PCS-9600 series relay supports IEC61850 server services over TCP/IP communication protocol stacks. The TCP/IP profile requires the PCS-9600 series relay to have an IP address to establish communications. These addresses are located in the submenu “Comm Settings”, see Section 7.6 for further details. MMS Protocol IEC61850 specifies the use of the Manufacturing Message Specification (MMS) at the upper (application) layer for transfer of real-time data. This protocol has been in existence for a number of years and provides a set of services suitable for the transfer of data within a substation LAN environment. Actual MMS protocol services are mapped to IEC61850 abstract services in IEC61850-8-1. Client/server This is a connection-oriented type of communication. The connection is initiated by the client, and communication activity is controlled by the client. IEC61850 clients are often substation computers running HMI programs or SOE logging software. Servers are usually substation equipment such as protection relays, meters, RTUs, transformer, tap changers, or bay controllers. Peer-to-peer 10-8
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10 Communication
This is a non-connection-oriented, high speed type of communication usually between substation equipment, such as protection relays. GOOSE is the method of peer-to-peer communication. Substation configuration language (SCL) A substation configuration language is the number of files used to describe the configuration of substation equipment. Each configured device has an IED Capability Description (ICD) file and a Configured IED Description (CID) file. The substation single line information is stored in a System Specification Description (SSD) file. The entire substation configuration is stored in a Substation Configuration Description (SCD) file. The SCD file is the combination of the individual ICD files and the SSD file.
10.4.3 Server Data Organization IEC61850 defines an object-oriented approach to data and services. An IEC61850 physical device can contain one or more logical device(s) (for proxy). Each logical device can contain many logical nodes. Each logical node can contain many data objects. Each data object is composed of data attributes and data attribute components. Services are available at each level for performing various functions, such as reading, writing, control commands, and reporting. Each IED represents one IEC61850 physical device. The physical device contains one logical device, and the logical device contains many logical nodes. The logical node LPHD contains information about the IED physical device. The logical node LLN0 contains information about the IED logical device. 10.4.3.1 Digital Status Values The GGIO logical node is available in the PCS-9600 series relays to provide access to digital status points (including general I/O inputs and warnings) and associated timestamps and quality flags. The data content must be configured before the data can be used. GGIO provides digital status points for access by clients. It is intended that clients use GGIO in order to access digital status values from the PCS-9600 series relays. Clients can utilize the IEC61850 buffered reporting features available from GGIO in order to build sequence of events (SOE) logs and HMI display screens. Buffered reporting should generally be used for SOE logs since the buffering capability reduces the chances of missing data state changes. All needed status data objects are transmitted to HMI clients via buffered reporting, and the corresponding buffered reporting control block (BRCB) is defined in LLN0. 10.4.3.2 Analog Values Most of the analog measured values are available through the MMXU logical nodes, and metering values in MMTR, the others in MMXN, MSQI and so on. Each MMXU logical node provides data from an IED current/voltage “source”. There is one MMXU available for each configurable source. MMXU1 provides data from CT/VT source 1 (usually for protection purpose), and MMXU2 provides data from CT/VT source 2 (usually for monitor and display purpose). All these analog data objects are transmitted to HMI clients via unbuffered reporting periodically, and the corresponding unbuffered reporting control block (URCB) is defined in LLN0. MMXUx logical nodes provide the following data for each source:
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10 Communication
MMXU.MX.TotW:
three-phase active power
MMXU.MX.TotVAr:
three-phase reactive power
MMXU.MX.TotPF:
three-phase power factor
MMXU.MX.Hz:
frequency
MMXU.MX.PPV.phsAB:
phase AB voltage magnitude and angle
MMXU.MX.PPV.phsBC:
phase BC voltage magnitude and angle
MMXU.MX.PPV.phsCA:
Phase CA voltage magnitude and angle
MMXU.MX.PhV.phsA:
phase AG voltage magnitude and angle
MMXU.MX.PhV.phsB:
phase BG voltage magnitude and angle
MMXU.MX.PhV.phsC:
phase CG voltage magnitude and angle
MMXU.MX.A.phsA:
phase A current magnitude and angle
MMXU.MX.A.phsB:
phase B current magnitude and angle
MMXU.MX.A.phsC:
phase C current magnitude and angle
MMXU.MX.A.neut:
ground current magnitude and angle
10.4.3.3 Protection Logical Nodes The following list describes the protection elements for all PCS-9600 series relays. The specified relay will contain a subset of protection elements from this list. PDIF: PDIS: PIOC: PTOC:
PTUV: PTUF: PTOV: RBRF: RREC:
transformer instantaneous differential, transformer percent differential phase distance, ground distance phase instantaneous overcurrent, neutral instantaneous overcurrent, ground instantaneous overcurrent, negative-sequence instantaneous overcurrent. phase time overcurrent, neutral time overcurrent, ground time overcurrent, negative-sequence time overcurrent, neutral directional overcurrent, negative-sequence directional overcurrent phase undervoltage, auxiliary undervoltage, third harmonic neutral undervoltage underfrequency phase overvoltage, neutral overvoltage, auxiliary overvoltage, negative sequence overvoltage breaker failure autoreclosure
The protection elements listed above contain start (pickup) and operate flags, instead of any element has its own start (pickup) flag separately, all the elements share a common start (pickup) flags “PTRC.ST.Str.general” in a PCS-9600 series relay. The operate flag for PTOC1 is “PTOC1.ST.Op.general”. For the PCS-9600 series relay protection elements, these flags take their values from related module for the corresponding element. Similar to digital status values, the protection trip information is reported via BRCB, and it also locates in LLN0. 10.4.3.4 LLN0 and Other Logical Nodes Logical node LLN0 is essential for an IEC61850 based IED. This LN shall be used to address common issues for Logical Devices. In PCS-9600 series relays, most of the public services, the 10-10
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10 Communication
common settings, control values and some device oriented data objects are available here. The public services may be BRCB, URCB and GSE control blocks and similar global defines for the whole device; the common settings (the logic nodes LPHD、PTRC also contain some related common settings) include all the setting items of communication settings. System settings and some of the protection setting items, which can be configured to two or more protection elements (logical nodes). In LLN0, the item Loc is a device control object, this Do item indicates the local operation for complete logical device, when it is true, all the remote control commands to the IED will be blocked and those commands make effective until the item Loc is changed to false. Besides the logical nodes we describe above, there are some other logical nodes below in the IEDs: MMUX:
LPHD: PTRC:
RDRE:
GAPC:
CSWI:
XCBR:
This LN shall be used to acquire values from CTs and VTs and calculate measurands such as RMS values for current and voltage or power flows out of the acquired voltage and current samples. These values are normally used for operational purposes such as power flow supervision and management, screen displays, state estimation, etc. The requested accuracy for these functions has to be provided. Physical device information, the logical node to model common issues for physical device. Protection trip conditioning, it shall be used to connect the “operate” outputs of one or more protection functions to a common “trip” to be transmitted to XCBR. In addition or alternatively, any combination of “operate” outputs of protection functions may be combined to a new “operate” of PTRC. Disturbance recorder function. It triggers the fault wave recorder and its output refers to the “IEEE Standard Format for Transient Data Exchange (COMTRADE) for Power System” (IEC60255-24). All enabled channels are included in the recording, independently of the trigger mode. Generic automatic process control, it is used to model in a generic way the processing/automation of functions, for example the sequence control functions for PCS-9600 series relays. Switch controller. This class is used to control all switching conditions of XCBR and XSWI. A remote switching command (for example select-before-operate) arrives here firstly. Breaker control. The XCBR logical node is directly associated with the breaker control feature. XCBR1.ST.Pos: This is the position of the breaker. If the breaker control logic indicates that the breaker, or any single pole of the breaker, is closed, then the breaker position state is “on”. If the breaker control logic indicates that the breaker is open, then the breaker position state is “off”. XCBR1.ST.BlkOpn: This is the state of the block open command logic. When true, breaker open commands from IEC61850 clients will be rejected. XCBR1.ST.BlkCls: This is the state of the block close command logic. When true, breaker close commands from IEC61850 clients will be rejected. XCBR1.CO.Pos: This is where IEC61850 clients can issue open or close commands to the breaker. SBO control with normal enhanced security is the only supported IEC61850 control model. 10-11
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10.4.4 Server Features and Configuration 10.4.4.1 Buffered/Unbuffered Reporting IEC61850 buffered and unbuffered reporting control blocks locate in LLN0, they can be configured to transmit information of protection trip information (in the Protection logical nodes), binary status values (in GGIO) and analog measured/calculated values (in MMXU, MMTR and MSQI). The reporting control blocks can be configured in CID files, and then be sent to the IED via an IEC61850 client. The following items can be configured. TrgOps: Trigger options. The following bits are supported by the PCS-9600 series relays: - Bit 1: Data-change - Bit 4: Integrity - Bit 5: General interrogation OptFlds: Option Fields. The following bits are supported by the PCS-9600 series relays: - Bit 1: Sequence-number - Bit 2: Report-time-stamp - Bit 3: Reason-for-inclusion - Bit 4: Data-set-name - Bit 5: Data-reference - Bit 6: Buffer-overflow (for buffered reports only) - Bit 7: EntryID (for buffered reports only) - Bit 8: Conf-revision - Bit 9: Segmentation IntgPd: Integrity period. BufTm: Buffer time. 10.4.4.2 File Transfer MMS file services are supported to allow transfer of oscillography, event record or other files from a PCS-9600 series relay. 10.4.4.3 Timestamps The universal time coordinated (UTC) timestamp values associated with all IEC61850 data items represent the time of the last change of either the value or quality flags of the data item. 10.4.4.4 Logical Node Name Prefixes IEC61850 specifies that each logical node can have a name with a total length of 11 characters. The name is composed of: a five or six-character name prefix; a four-character standard name (for 10-12
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10 Communication
example, MMXU, GGIO, PIOC, etc.); a one or two-character instantiation index. Complete names are of the form xxxxxxPTOC1, where the xxxxxx character string is configurable. Details regarding the logical node naming rules are given in IEC61850 parts 6 and 7-2. It is recommended that a consistent naming convention be used for an entire substation project. 10.4.4.5 GOOSE Services IEC61850 specifies the type of broadcast data transfer services: Generic Object Oriented Substation Events (GOOSE). IEC61850 GOOSE services provide virtual LAN (VLAN) support, Ethernet priority tagging, and Ether-type Application ID configuration. The support for VLANs and priority tagging allows for the optimization of Ethernet network traffic. GOOSE messages can be given a higher priority than standard Ethernet traffic, and they can be separated onto specific VLANs. Devices that transmit GOOSE messages also function as servers. Each GOOSE publisher contains a “GOOSE control block” to configure and control the transmission. The GOOSE transmission (including subscribing and publishing) is controlled by GOOSE function link settings in device. The PCS-9600 series relays support IEC61850 Generic Object Oriented Substation Event (GOOSE) communication. All GOOSE messages contain IEC61850 data collected into a dataset. It is this dataset that is transferred using GOOSE message services. The GOOSE related dataset is configured in the CID file and it is recommended that the fixed GOOSE be used for implementations that require GOOSE data transfer between the PCS-9600 series relays. IEC61850 GOOSE messaging contains a number of configurable parameters, all of which must be correct to achieve the successful transfer of data. It is critical that the configured datasets at the transmission and reception devices are an exact match in terms of data structure, and that the GOOSE addresses and name strings match exactly. The general steps required for transmission configuration are: 1.
Configure the data.
2.
Configure the transmission dataset.
3.
Configure the GOOSE service settings.
The general steps required for reception configuration are: 1.
Configure the data.
2.
Configure the reception dataset.
3.
Configure the GOOSE service settings.
10.4.5 ACSI Conformance 10.4.5.1 ACSI Basic Conformance Statement
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10 Communication Services
Client
Server
PCS-9600 Series
-
C1
Y
C1
-
N
Client-Server Roles B11 B12
Server
side
(of
Two-party
Application-Association) Client
side
(of
Two-party
Application-Association)
SCSMS Supported B21
SCSM: IEC61850-8-1 used
N
N
Y
B22
SCSM: IEC61850-9-1 used
N
N
N
B23
SCSM: IEC61850-9-2 used
N
N
N
B24
SCSM: other
N
N
N
Generic Substation Event Model (GSE) B31
Publisher side
-
O
Y
B32
Subscriber side
O
-
Y
Transmission Of Sampled Value Model (SVC) B41
Publisher side
-
O
N
B42
Subscriber side
O
-
N
NOTE! C1: Shall be “M” if support for LOGICAL-DEVICE model has been declared O: Optional M: Mandatory Y: Supported by PCS-9600 series relays N: Currently not supported by PCS-9600 series relays 10.4.5.2 ACSI Models Conformance Statement Services
Client
Server
PCS-9600 Series
M1
Logical device
C2
C2
Y
M2
Logical node
C3
C3
Y
M3
Data
C4
C4
Y
M4
Data set
C5
C5
Y
M5
Substitution
O
O
Y
M6
Setting group control
O
O
Y
Buffered report control
O
O
Y
Reporting M7 M7-1
sequence-number
Y
Y
Y
M7-2
report-time-stamp
Y
Y
Y
M7-3
reason-for-inclusion
Y
Y
Y
M7-4
data-set-name
Y
Y
Y
M7-5
data-reference
Y
Y
Y
M7-6
buffer-overflow
Y
Y
Y
M7-7
entryID
Y
Y
Y
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10 Communication M7-8
BufTm
N
N
N
M7-9
IntgPd
Y
Y
Y
M7-10
GI
Y
Y
Y
M
M
Y
M8
Unbuffered report control
M8-1
sequence-number
Y
Y
Y
M8-2
report-time-stamp
Y
Y
Y
M8-3
reason-for-inclusion
Y
Y
Y
M8-4
data-set-name
Y
Y
Y
M8-5
data-reference
Y
Y
Y
M8-6
BufTm
N
N
N
M8-7
IntgPd
N
Y
Y
Log control
O
O
N
IntgPd
N
N
N
Log
O
O
N
M12
GOOSE
O
O
Y
M13
GSSE
O
O
N
M14
Multicast SVC
O
O
N
M15
Unicast SVC
O
O
N
M16
Time
M
M
Y
M17
File transfer
O
O
Y
Logging M9 M9-1 M10 GSE
NOTE! C2: Shall be “M” if support for LOGICAL-NODE model has been declared C3: Shall be “M” if support for DATA model has been declared C4: Shall be “M” if support for DATA-SET, Substitution, Report, Log Control, or Time models has been declared C5: Shall be “M” if support for Report, GSE, or SMV models has been declared M: Mandatory Y: Supported by PCS-9600 series relays N: Currently not supported by PCS-9600 series relays 10.4.5.3 ACSI Services Conformance Statement Services
Server/Publisher
PCS-9600 Series
M
Y
Server S1
ServerDirectory
Application association S2
Associate
M
Y
S3
Abort
M
Y
S4
Release
M
Y
Logical device
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10 Communication S5
LogicalDeviceDirectory
M
Y
Logical node S6
LogicalNodeDirectory
M
Y
S7
GetAllDataValues
M
Y
S8
GetDataValues
M
Y
S9
SetDataValues
M
Y
S10
GetDataDirectory
M
Y
S11
GetDataDefinition
M
Y
S12
GetDataSetValues
M
Y
S13
SetDataSetValues
O
S14
CreateDataSet
O
S15
DeleteDataSet
O
S16
GetDataSetDirectory
M
Y
M
Y
Data
Data set
Substitution S17
SetDataValues
Setting group control S18
SelectActiveSG
M/O
Y
S19
SelectEditSG
M/O
Y
S20
SetSGValuess
M/O
Y
S21
ConfirmEditSGValues
M/O
Y
S22
GetSGValues
M/O
Y
S23
GetSGCBValues
M/O
Y
C6
Y
Reporting Buffered report control block S24
Report
S24-1
data-change
Y
S24-2
qchg-change
Y
S24-3
data-update
Y
S25
GetBRCBValues
C6
Y
S26
SetBRCBValues
C6
Y
C6
Y
Unbuffered report control block S27
Report
S27-1
data-change
Y
S27-2
qchg-change
Y
S27-3
data-update
Y
S28
GetURCBValues
C6
Y
S29
SetURCBValues
C6
Y
Logging Log control block S30
GetLCBValues
O
S31
SetLCBValues
O
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10 Communication Log S32
QueryLogByTime
O
S33
QueryLogAfter
O
S34
GetLogStatusValues
O
Generic substation event model (GSE) GOOSE control block S35
SendGOOSEMessage
C8
Y
S36
GetGoReference
C9
S37
GetGOOSEElementNumber
C9
Y
S38
GetGoCBValues
O
Y
S39
SetGoCBValuess
O
Transmission Of Sample Value Model (SVC) Multicast SVC S45
SendMSVMessage
C10
S46
GetMSVCBValues
O
S47
SetMSVCBValues
O
Unicast SVC S48
SendUSVMessage
C10
S49
GetUSVCBValues
O
S50
SetUSVCBValues
O
S51
Select
O
Y
S52
SelectWithValue
M
Y
S53
Cancel
M
Y
S54
Operate
M
Y
S55
Command-Termination
O
S56
TimeActivated-Operate
O
Control
File transfer S57
GetFile
M/O
Y
S58
SetFile
O
Y
S59
DeleteFile
O
S60
GetFileAttributeValues
M/O
Y
M
Y
Time SNTP
NOTE! C6: Shall declare support for at least one (BRCB or URCB) C7: Shall declare support for at least one (QueryLogByTime or QueryLogAfter) C8: Shall declare support for at least one (SendGOOSEMessage or SendGSSEMessage) C9: Shall declare support if TP association is available C10: Shall declare support for at least one (SendMSVMessage or SendUSVMessage)
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10.4.6 Logical Nodes 10.4.6.1 Logical Nodes Table The PCS-9600 series relays support IEC61850 logical nodes as indicated in the following table. NOTE! The actual instantiation of each logical node is respectively determined by an actual product of the PCS-9600 series relays. Nodes
PCS-9600 Series
L: System Logical Nodes LPHD: Physical device information
YES
LLN0: Logical node zero
YES
P: Logical Nodes For Protection Functions YES
PDIF: Differential PDIR: Direction comparison
- YES
PDIS: Distance PDOP: Directional overpower
-
PDUP: Directional underpower
-
PFRC: Rate of change of frequency
YES
PHAR: Harmonic restraint
YES
PHIZ: Ground detector
- YES
PIOC: Instantaneous overcurrent PMRI: Motor restart inhibition
-
PMSS: Motor starting time supervision
-
POPF: Over power factor
-
PPAM: Phase angle measuring
-
PSCH: Protection scheme
-
PSDE: Sensitive directional earth fault
-
PTEF: Transient earth fault
-
PTOC: Time overcurrent
YES
PTOF: Overfrequency
YES
PTOV: Overvoltage
YES
PTRC: Protection trip conditioning
YES
PTTR: Thermal overload
YES
PTUC: Undercurrent
-
PTUV: Undervoltage
YES
PUPF: Underpower factor
- YES
PTUF: Underfrequency PVOC: Voltage controlled time overcurrent
-
PVPH: Volts per Hz
-
PZSU: Zero speed or underspeed
-
R: Logical Nodes For Protection Related Functions YES
RDRE: Disturbance recorder function
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10 Communication RADR: Disturbance recorder channel analogue
-
RBDR: Disturbance recorder channel binary
-
RDRS: Disturbance record handling
-
RBRF: Breaker failure
YES
RDIR: Directional element
YES
RFLO: Fault locator
YES
RPSB: Power swing detection/blocking
-
RREC: Autoreclosing
YES
RSYN: Synchronism-check or synchronizing
YES
C: Logical Nodes For Control CALH: Alarm handling
-
CCGR: Cooling group control
- YES
CILO: Interlocking CPOW: Point-on-wave switching
- YES
CSWI: Switch controller G: Logical Nodes For Generic References GAPC: Generic automatic process control
YES
GGIO: Generic process I/O
YES
GSAL: Generic security application
-
I: Logical Nodes For Interfacing And Archiving IARC: Archiving
-
IHMI: Human machine interface
-
ITCI: Telecontrol interface
-
ITMI: Telemonitoring interface
-
A: Logical Nodes For Automatic Control ANCR: Neutral current regulator
-
ARCO: Reactive power control
-
ATCC: Automatic tap changer controller
-
AVCO: Voltage control
-
M: Logical Nodes For Metering And Measurement MDIF: Differential measurements
YES
MHAI: Harmonics or interharmonics
YES
MHAN: Non phase related harmonics or interharmonic
YES
MMTR: Metering
YES
MMXN: Non phase related measurement
YES
MMXU: Measurement
YES
MSQI: Sequence and imbalance
YES
MSTA: Metering statistics
-
S: Logical Nodes For Sensors And Monitoring SARC: Monitoring and diagnostics for arcs
-
SIMG: Insulation medium supervision (gas)
-
SIML: Insulation medium supervision (liquid)
-
SPDC: Monitoring and diagnostics for partial discharges
-
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PCS-9611 Feeder Relay Date: 2011-08-29
10 Communication T: Logical Nodes For Switchgear TCTR: Current transformer
YES
TVTR: Voltage transformer
YES
Y: Logical Nodes For Power Transformers YEFN: Earth fault neutralizer (Peterson coil)
-
YLTC: Tap changer
-
YPSH: Power shunt
- YES
YPTR: Power transformer Z: Logical Nodes For Further Power System Equipment ZAXN: Auxiliary network
-
ZBAT: Battery
-
ZBSH: Bushing
-
ZCAB: Power cable
-
ZCAP: Capacitor bank
-
ZCON: Converter
-
ZGEN: Generator
-
ZGIL: Gas insulated line
-
ZLIN: Power overhead line
-
ZMOT: Motor
-
ZREA: Reactor
-
ZRRC: Rotating reactive component
-
ZSAR: Surge arrestor
-
ZTCF: Thyristor controlled frequency converter
-
ZTRC: Thyristor controlled reactive component
-
10.5 DNP3.0 Interface 10.5.1 Overview The descriptions given here are intended to accompany this relay. The DNP3.0 protocol is not described here; please refer to the DNP3.0 protocol standard for the details about the DNP3.0 implementation. This manual only specifies which objects, variations and qualifiers are supported in this relay, and also specifies what data is available from this relay via DNP3.0. The relay operates as a DNP3.0 slave and supports subset level 2 of the protocol, plus some of the features from level 3. The DNP3.0 communication uses the Ethernet ports at the rear side of this relay. The Ethernet ports are optional: electrical or optical.
10.5.2 Link Layer Functions Please see the DNP3.0 protocol standard for the details about the linker layer functions.
10.5.3 Transport Functions Please see the DNP3.0 protocol standard for the details about the transport functions.
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10.5.4 Application Layer Functions 10.5.4.1 Time Synchronization 1.
2.
3.
Time delay measurement Master/Slave
Function Code
Object
Variation
Qualifier
Master
0x17
-
-
-
Slave
0x81
0x34
0x02
0x07
Master/Slave
Function Code
Object
Variation
Qualifier
Master
0x01
0x34
0x00, 0x01
0x07
Slave
0x81
0x32
0x01
0x07
Master/Slave
Function Code
Object
Variation
Qualifier
Master
0x02
0x32
0x01
0x00,0x01,0x07,0x08
Slave
0x81
-
-
-
Read time of device
Write time of device
10.5.4.2 Supported Writing Functions 1.
Write time of device See Section 10.5.4.1 for the details.
2.
Reset the CU (Reset IIN bit7) Master/Slave
Function Code
Object
Variation
Qualifier
Master
0x02
0x50
0x01
0x00, 0x01
Slave
0x81
-
-
-
10.5.4.3 Supported Reading Functions 1.
2.
Supported qualifiers Master Qualifier
0x00
0x01
0x06
0x07
0x08
Slave Qualifier
0x00
0x01
0x01
0x07
0x08
Supported objects and variations z
Object 1, Binary inputs
Master Variation
0x00
0x01
0x02
Slave Variation
0x02
0x01
0x02
The protection operation signals, alarm signals and binary input state change signals are transported respectively according to the variation sequence in above table. z
Object 2, SOE
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10 Communication Master Variation
0x00
0x01
0x02
0x03
Slave Variation
0x02
0x01
0x02
0x03
If the master qualifier is “0x07”, the slave responsive qualifier is “0x27”; and if the master qualifier is “0x01”, “0x06” or “0x08”, the slave responsive qualifier is “0x28”. z
Object 30, Analog inputs
Master Variation
0x00
0x01
0x02
0x03
0x04
Slave Variation
0x01
0x01
0x02
0x03
0x04
The measurement values are transported firstly, and then the protection measurement values are transported. z
Object 40, Analog outputs
Master Variation
0x00
0x01
0x02
Slave Variation
0x01
0x01
0x02
The protection settings are transported in this object. z
Object 50, Time Synchronization See Section 10.5.4.1 for the details.
3.
Class 0 data request The master adopts the “Object 60” for the Class 0 data request and the variation is “0x01”. The slave responds with the above mentioned “Object 1”, “Object 30” and “Object 40” (see “Supported objects and variations” in Section 10.5.4.3).
4.
Class 1 data request The master adopts the “Object 60” for the Class 1 data request and the variation is “0x02”. The slave responds with the above mentioned “Object 2” (see “Supported objects and variations” in Section 10.5.4.3).
5.
Multiple object request The master adopts the “Object 60” for the multiple object request and the variation is “0x01”, “0x02”, “0x03” and “0x04”. The slave responds with the above mentioned “Object 1”, “Object 2”, “Object 30” and “Object 40” (see “Supported objects and variations” in Section 10.5.4.3).
10.5.4.4 Remote Control Functions The function code 0x03 and 0x04 are supported in this relay. The function code 0x03 is for the remote control with selection; and the function code 0x04 is for the remote control with execution. The selection operation must be executed before the execution operation, and the single point control object can be supported to this relay.
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10 Communication Master Qualifier
0x17
0x27
0x18
0x28
Slave Qualifier
0x17
0x27
0x18
0x28
The “Object 12” is for the remote control functions. Master Variation
0x01
Slave Variation
0x01
Control Code
0x01: closing 0x10: tripping
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11 Installation Table of Contents 11.1 General ..........................................................................................................11-1 11.2 Safety Instructions .......................................................................................11-1 11.3 Checking the Shipment................................................................................11-2 11.4 Material and Tools Required ........................................................................11-2 11.5 Device Location and Ambient Conditions ..................................................11-2 11.6 Mechanical Installation ................................................................................11-3 11.7 Electrical Installation and Wiring ................................................................11-4 11.7.1 Grounding Guidelines .....................................................................................................11-4 11.7.2 Cubicle Grounding ..........................................................................................................11-4 11.7.3 Ground Connection on the Device ..................................................................................11-5 11.7.4 Grounding Strips and their Installation ............................................................................11-6 11.7.5 Guidelines for Wiring.......................................................................................................11-6 11.7.6 Wiring for Electrical Cables .............................................................................................11-7
11.8 Typical Wiring of the Relay ..........................................................................11-7
List of Figures Figure 11.6-1 Dimensions of this relay and the cut-out in the cubicle (unit: mm) .............11-3 Figure 11.6-2 Demonstration of plugging a board into its corresponding slot ..................11-4 Figure 11.7-1 Cubicle grounding system ...............................................................................11-5 Figure 11.7-2 Ground terminal of this relay ...........................................................................11-6 Figure 11.7-3 Ground strip and termination ..........................................................................11-6 Figure 11.7-4 Glancing demo about the wiring for electrical cables ...................................11-7 Figure 11.8-1 Control panel (button, switch and link) of the cubicle...................................11-7 Figure 11.8-2 Typical wiring diagram of this relay ................................................................11-8
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11.1 General The equipment must be shipped, stored and installed with the greatest care. Choose the place of installation such that the communication interface and the controls on the front of the device are easily accessible. Air must circulate freely around the equipment. Observe all the requirements regarding place of installation and ambient conditions given in this instruction manual. Take care that the external wiring is properly brought into the equipment and terminated correctly and pay special attention to grounding. Strictly observe the corresponding guidelines contained in this section.
11.2 Safety Instructions Modules and units may only be replaced by correspondingly trained personnel. Always observe the basic precautions to avoid damage due to electrostatic discharge when handling the equipment. In certain cases, the settings have to be configured according to the demands of the engineering configuration after replacement. It is therefore assumed that the personnel who replace modules and units are familiar with the use of the operator program on the service PC. DANGER! Only insert or withdraw the power supply module while the power supply is switched off. To this end, disconnect the power supply cable that connects with the power supply module. WARNING! Only insert or withdraw other modules while the power supply is switched off.
WARNING! The modules may only be inserted in the slots designated in Section 6.2. Components can be damaged or destroyed by inserting boards in the wrong slots. DANGER! Improper handling of the equipment can cause damage or an incorrect response of the equipment itself or the primary plant. WARNING! Industry packs and ribbon cables may only be replaced or the positions of jumpers be changed on a workbench appropriately designed for working on electronic equipment. The modules, bus backplanes are sensitive to electrostatic discharge when not in the unit's housing. The basic precautions to guard against electrostatic discharge are as follows:
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z
Should boards have to be removed from this relay installed in a grounded cubicle in an HV switchgear installation, please discharge yourself by touching station ground (the cubicle) beforehand.
z
Only hold electronic boards at the edges, taking care not to touch the components.
z
Only works on boards that have been removed from the cubicle on a workbench designed for electronic equipment and wear a grounded wristband. Do not wear a grounded wristband, however, while inserting or withdrawing units.
z
Always store and ship the electronic boards in their original packing. Place electronic parts in electrostatic screened packing materials.
11.3 Checking the Shipment Check that the consignment is complete immediately upon receipt. Notify the nearest NR Company or agent, should departures from the delivery note, the shipping papers or the order be found. Visually inspect all the material when unpacking it. When there is evidence of transport damage, lodge a claim immediately in writing with the last carrier and notify the nearest NR Company or agent. If the equipment is not going to be installed immediately, store all the parts in their original packing in a clean dry place at a moderate temperature. The humidity at a maximum temperature and the permissible storage temperature range in dry air are listed in Section 2.1.3.
11.4 Material and Tools Required The necessary mounting kits will be provided, including screws, pincers and assembly instructions. A suitable drill and spanners are required to secure the cubicles to the floor using the plugs provided (if this relay is mounted in cubicles).
11.5 Device Location and Ambient Conditions The place of installation should permit easy access especially to front of the device, i.e. to the human machine interface of the equipment. There should also be free access at the rear of the equipment for additions and replacement of electronic boards. Since every piece of technical equipment can be damaged or destroyed by inadmissible ambient conditions, such as: 1.
The location should not be exposed to excessive air pollution (dust, aggressive substances).
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2.
Severe vibration, extreme changes of temperature, high levels of humidity, surge voltages of high amplitude and short rise time and strong induced magnetic fields should be avoided as far as possible.
3.
Air must not be allowed to circulate freely around the equipment.
The equipment can in principle be mounted in any attitude, but it is normally mounted vertically (visibility of markings). WARNING! Excessively high temperature can appreciably reduce the operating life of this relay.
11.6 Mechanical Installation This relay is made of a single layer 4U height 9.5" chassis with 8 connectors on its rear panel (See Figure 6.1-3). The following figure shows the dimensions of this relay for reference in mounting. 264.24 246.74
11
1 HEALTHY 2
224.80 197.50
FEEDER RELAY
12 ALARM
3
13
4
14
5
15
6
16
7
17
8
18
9
19
10
20
ENT
246.74±0.10 226.00 4-Φ7.5
Cut-out in the cubicle
Figure 11.6-1 Dimensions of this relay and the cut-out in the cubicle (unit: mm)
NOTE! It is necessary to leave enough space top and bottom of the cut-out in the cubicle for heat emission of this relay. As mentioned in Chapter 6, up to eight modules are installed in the enclosure of this relay, and 11-3
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these modules must be plugged into the proper slots of this relay respectively. The safety instructions must be abided by when installing the boards, please see Section 11.2 for the details. Figure 11.6-2 shows the installation way of a module being plugged into a corresponding slot.
Figure 11.6-2 Demonstration of plugging a board into its corresponding slot
In the case of equipment supplied in cubicles, place the cubicles on the foundations that have been prepared. Take care while doing so not to jam or otherwise damage any of the cables that have already been installed. Secure the cubicles to the foundations.
11.7 Electrical Installation and Wiring 11.7.1 Grounding Guidelines Switching operations in HV installations generate transient over voltages on control signal cables. There is also a background of electromagnetic RF fields in electrical installations that can induce spurious currents in the devices themselves or the leads connected to them. All these influences can influence the operation of electronic apparatus. On the other hand, electronic apparatus can transmit interference that can disrupt the operation of other apparatus. In order to minimize these influences as far as possible, certain standards have to be observed with respect to grounding, wiring and screening. NOTE! All these precautions can only be effective if the station ground is of good quality.
11.7.2 Cubicle Grounding The cubicle must be designed and fitted out such that the impedance for RF interference of the ground path from the electronic device to the cubicle ground terminal is as low as possible. Metal accessories such as side plates, blanking plates etc., must be effectively connected 11-4
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11 Installation
surface-to-surface to the grounded frame to ensure a low-impedance path to ground for RF interference. The contact surfaces must not only conduct well, they must also be non-corroding. NOTE! If the above conditions are not fulfilled, there is a possibility of the cubicle or parts of it forming a resonant circuit at certain frequencies that would amplify the transmission of interference by the devices installed and also reduce their immunity to induced interference. Movable parts of the cubicle such as doors (front and back) or hinged equipment frames must be effectively grounded to the frame by three braided copper strips (see Figure 11.7-1). The metal parts of the cubicle housing and the ground rail are interconnected electrically conducting and corrosion proof. The contact surfaces shall be as large as possible. NOTE! For metallic connections please observe the voltage difference of both materials according to the electrochemical code. The cubicle ground rail must be effectively connected to the station ground rail by a grounding strip (braided copper).
Figure 11.7-1 Cubicle grounding system
11.7.3 Ground Connection on the Device There is a ground terminal on the rear panel (see Figure 11.7-2), and the ground braided copper strip can be connected with it. Take care that the grounding strip is always as short as possible. The main thing is that the device is only grounded at one point. Grounding loops from unit to unit are not allowed. There are some ground terminals on some connectors of this relay, and the sign is “GND”. All the ground terminals are connected in the cabinet of this relay. So, the ground terminal on the rear panel (see Figure 11.7-2) is the only ground terminal of this device. 11-5
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Figure 11.7-2 Ground terminal of this relay
11.7.4 Grounding Strips and their Installation High frequency currents are produced by interference in the ground connections and because of skin effect at these frequencies, only the surface region of the grounding strips is of consequence. The grounding strips must therefore be of (preferably tinned) braided copper and not round copper conductors, as the cross-section of round copper would have to be too large. Proper terminations must be fitted to both ends (press/pinch fit and tinned) with a hole for bolting them firmly to the items to be connected. The surfaces to which the grounding strips are bolted must be electrically conducting and non-corroding. The following figure shows the ground strip and termination.
Figure 11.7-3 Ground strip and termination
11.7.5 Guidelines for Wiring There are several types of cables that are used in the connection of this relay: braided copper cable, serial communication cable etc. Recommendation of each cable: z
Grounding: braided copper cable, 2.5mm2 ~ 6.0mm2
z
Power supply, binary inputs & outputs: brained copper cable, 1.5mm2 ~ 2.5mm2
z
AC voltage inputs: brained copper cable, 1.5mm2 ~ 2.5mm2
z
AC current inputs: brained copper cable, 2.5mm2 ~ 6.0mm2
z
Serial communication: 4-core shielded braided cable
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z
Ethernet communication: 4-pair screened twisted category 5E cable
11.7.6 Wiring for Electrical Cables A female connector is used for connecting the wires with it, and then a female connector plugs into a corresponding male connector that is in the front of one board. See Chapter 6 for further details about the pin defines of these connectors. The following figure shows the glancing demo about the wiring for the electrical cables.
01
02
03
04
05
06
07
08
Tighten
01
Figure 11.7-4 Glancing demo about the wiring for electrical cables
DANGER! Never allow the current transformer (CT) secondary circuit connected to this equipment to be opened while the primary system is live. Opening the CT circuit will produce a dangerously high voltage.
11.8 Typical Wiring of the Relay Relevant information and sections about the modules and the connectors of the relay are described in Chapter 6. Referring the relevant sections can help to wire correctly and effectively. The following figure shows the metallic links, control switch and local operation buttons (manual closing button and manual tripping button) on the control panel.
Figure 11.8-1 Control panel (button, switch and link) of the cubicle
The typical wiring of this relay is shown as below, all the configurable binary inputs and binary 11-7
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11 Installation
output adopt the default definition in the factory. A B C
05 Ux
06 Uxn
01 Ua
02 Ub
03 Uc
04 Un
Voltage Inputs
07 U0
08 U0n
09 10 11 I02 I02n Ia
12 Ian
13 Ib
14 Ibn
15 Ic
16 Icn
17 18 19 20 21 22 23 24 25 26 I01 I01n I0s I0sn Iam Iamn Ibm Ibmn Icm Icmn
For Protection
For Metering Current Inputs
NR4412 Ethernet 1 Ground at Remote device
Ethernet 2 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16
Power Supply
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22
485-1A 485-1B SGND FGND 485-2A 485-2B SGND FGND SYN+ SYNSGND FGND RTS TXD SGND
NET1
NET2
NET3
NET4
NET5
NET6
RX
GPS
SIG_COM BO_Alm_Fail BO_Alm_Abnor
TX1
BO_01
RX1
BI_01+ BI_01BI_02+ BI_02BI_03 BI_04 BI_05 BI_06 BI_07 BI_08 BI_09 BI_10 BI_11 BI_12 BI_13 BI_14 BI_15 BI_16 BI_17 BI_18 BI_19 BI_Opto-
BO_01 BO_02 BO_03
BO_02 TX2
BO_04
BO_03 BO_04
RX2
BO_05 BO_06
BO_05
TX3
BO_07
BO_06 RX3
BO_08
BO_07 BO_09 BO_08
TX4
PSW+ PSWGND
RX4
BO_10 BO_11
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22
Figure 11.8-2 Typical wiring diagram of this relay
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12 Commissioning
12 Commissioning Table of Contents 12.1 General ..........................................................................................................12-1 12.2 Safety Instructions .......................................................................................12-1 12.3 Commission Tools........................................................................................12-2 12.4 Setting Familiarization .................................................................................12-2 12.5 Product Checks ............................................................................................12-3 12.5.1 With the Relay De-energized ......................................................................................... 12-4 12.5.2 With the Relay Energized .............................................................................................. 12-5 12.5.3 Protective Function Test................................................................................................. 12-8 12.5.4 On-load Checks ........................................................................................................... 12-17
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12.1 General This relay is fully numerical in their design, implementing all protection and non-protection functions in software. The relay employs a high degree of self-checking and in the unlikely event of a failure, will give an alarm. As a result of this, the commissioning test does not need to be as extensive as with non-numeric electronic or electro-mechanical relays. To commission numerical relays, it is only necessary to verify that the hardware is functioning correctly and the application-specific software settings have been applied to the relay. Blank commissioning test and setting records are provided at the end of this manual for completion as required. Before carrying out any work on the equipment, the user should be familiar with the contents of the safety and technical data sections and the ratings on the equipment’s rating label.
12.2 Safety Instructions WARNING! Hazardous voltages are present in this electrical equipment during operation. Non-observance of the safety rules can result in severe personal injury or property damage. WARNING! Only the qualified personnel shall work on and around this equipment after becoming thoroughly familiar with all warnings and safety notices of this manual as well as with the applicable safety regulations. Particular attention must be drawn to the following: z
The earthing screw of the device must be connected solidly to the protective earth conductor before any other electrical connection is made.
z
Hazardous voltages can be present on all circuits and components connected to the supply voltage or to the measuring and test quantities.
z
Hazardous voltages can be present in the device even after disconnection of the supply voltage (storage capacitors!)
z
The limit values stated in the technical data (Chapter 2) must not be exceeded at all, not even during testing and commissioning.
z
When testing the device with secondary test equipment, make sure that no other measurement quantities are connected. Take also into consideration that the trip circuits and maybe also close commands to the circuit breakers and other primary switches are disconnected from the device unless expressly stated.
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DANGER! Current transformer secondary circuits must have been short-circuited before the current leads to the device are disconnected. WARNING! Primary test may only be carried out by qualified personnel, who are familiar with the commissioning of protection system, the operation of the plant and safety rules and regulations (switching, earthing, etc.).
12.3 Commission Tools Minimum equipment required: z
Multifunctional dynamic current and voltage injection test set with interval timer.
z
Multimeter with suitable AC current range and AC/DC voltage ranges of 0~440V and 0~250V respectively.
z
Continuity tester (if not included in the multimeter).
z
Phase angle meter.
z
Phase rotation meter. NOTE! Modern test set may contain many of the above features in one unit.
Optional equipment: z
An electronic or brushless insulation tester with a DC output not exceeding 500V (for insulation resistance test when required).
z
A portable PC, with appropriate software (this enables the rear communications port to be tested, if this is to be used, and will also save considerable time during commissioning).
z
EIA RS-485 to EIA RS-232 converter (if EIA RS-485 IEC60870-5-103 port is being tested).
z
PCS-9600 serials relay dedicated protection tester HELP-2000A.
12.4 Setting Familiarization When commissioning this device for the first time, sufficient time should be allowed to become familiar with the method by which the settings are applied. A detailed description of the menu structure of this relay is contained in Chapter 8. With the front cover in place all keys are accessible. All menu cells can be read. The LED indicators and alarms can be reset. Protection or configuration settings can be changed, or fault and event records cleared. However, menu cells will require the appropriate password to be entered before changes can be made.
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Alternatively, if a portable PC is available together with suitable setting software (such as PCS-PC or PCS-9700 SAS software), the menu can be viewed one page at a time to display a full column of data and text. This PC software also allows settings to be entered more easily, saved to a file on disk for future reference or printed to produce a setting record. Refer to the PC software user manual for details. If the software is being used for the first time, allow sufficient time to become familiar with its operation.
12.5 Product Checks These product checks cover all aspects of the relay which should be checked to ensure that it has not been physically damaged prior to commissioning, is functioning correctly and all input quantity measurements are within the stated tolerances. If the application-specific settings have been applied to the relay prior to commissioning, it is advisable to make a copy of the settings so as to allow them restoration later. This could be done by extracting the settings from the relay itself via printer or manually creating a setting record. This relay is fully numerical and the hardware is continuously monitored. Commissioning tests can be kept to a minimum and need only include hardware tests and conjunctive tests. The function tests are carried out according to user’s correlative regulations. The following tests are necessary to ensure the normal operation of the equipment before it is first put into service. Hardware tests These tests are performed for the following hardware to ensure that there is no hardware defect. Defects of hardware circuits other than the following can be detected by self-monitoring when the power supply is energized. z
User interfaces test
z
Binary input circuits and output circuits test
z
AC input circuits test
Function tests These tests are performed for the following functions that are fully software-based. Tests of the protection schemes and fault locator require a dynamic test set. z
Measuring elements test
z
Timers test
z
Metering and recording test
z
Conjunctive tests The tests are performed after the relay is connected with the primary equipment and other external equipment.
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z
On load test.
z
Phase sequence check and polarity check.
12.5.1 With the Relay De-energized 12.5.1.1 Visual Inspection After unpacking the product, check for any damage to the relay case. If there is any damage, the internal module might also have been affected, contact the vendor. The following listed items are necessary. z
Protection panel Carefully examine the protection panel, protection equipment inside and other parts inside to see that no physical damage has occurred since installation. The rated information of other auxiliary protections should be checked to ensure it is correct for the particular installation.
z
Panel wiring Check the conducting wire which is used in the panel to assure that their cross section meeting the requirement. Carefully examine the wiring to see that they are no connection failure exists.
z
Label Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to make sure that their labels meet the requirements of this project.
z
Equipment plug-in modules Check each plug-in module of the equipment on the panel to make sure that they are well installed into the equipment without any screw loosened.
z
Earthing cable Check whether the earthing cable from the panel terminal block is safely screwed to the panel steel sheet.
z
Switch, keypad, isolator binary inputs and push button Check whether all the switches, equipment keypad, isolator binary inputs and push buttons work normally and smoothly.
12.5.1.2 Insulation Test (if required) Insulation resistance tests are only necessary during commissioning if it is required for them to be done and they have not been performed during installation. Isolate all wiring from the earth and test the isolation with an electronic or brushless insulation tester at a DC voltage not exceeding 500V, The circuits need to be tested should include:
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z
Voltage transformer circuits
z
Current transformer circuits
z
DC power supply
z
Optic-isolated binary inputs
z
Binary output contacts
z
Electrical communication ports
The insulation resistance should be greater than 100MΩ at 500V. Test method: To unplug all the terminals sockets of this relay, and do the Insulation resistance test for each circuit above with an electronic or brushless insulation tester. On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected to the protection. 12.5.1.3 External Wiring Check that the external wiring is correct to the relevant relay diagram and scheme diagram. Ensure as far as practical that phasing/phase rotation appears to be as expected. Check the wiring against the schematic diagram for the installation to ensure compliance with the customer’s normal practice. 12.5.1.4 Auxiliary Power Supply The relay only can be operated under the auxiliary power supply depending on the relay’s nominal power supply rating. The incoming voltage must be within the operating range specified in Section 2.1.1.1, before energizing the relay, measure the auxiliary supply to ensure it within the operating range. Other requirements to the auxiliary power supply are specified in Section 2.1.1.1. See this section for further details about the parameters of the power supply. WARNING! Energize this relay only when the power supply is within the specified operating ranges in Section 2.1.1.1.
12.5.2 With the Relay Energized The following groups of checks verify that the relay hardware and software is functioning correctly and should be carried out with the auxiliary supply applied to the relay. The current and voltage transformer connections must remain isolated from the relay for these checks. The trip circuit should also remain isolated to prevent accidental operation of the associated circuit breaker.
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12.5.2.1 Front Panel LCD Display The liquid crystal display (LCD) is designed to operate in a wide range of substation ambient temperatures. For this purpose, this relay has an automatic “LCD contrast” adjusting feature, which is capable to adjust LCD contrast automatically according to the ambient temperature. Connect the relay to DC power supply correctly and turn the relay on. Check program version and forming time displayed in command menu to ensure that are corresponding to what ordered. 12.5.2.2 Date and Time If the time and date is not being maintained by substation automation system, the date and time should be set manually. Set the date and time to the correct local time and date using menu item “Clock”. In the event of the auxiliary supply failing, with a battery fitted on CPU board, the time and date will be maintained. Therefore when the auxiliary supply is restored the time and date will be correct and not need to set again. To test this, remove the auxiliary supply from the relay for approximately 30s. After being re-energized, the time and date should be correct. 12.5.2.3 Light Emitting Diodes (LEDs) On power up, the green LED “HEALTHY” should have illuminated and stayed on indicating that the relay is healthy. The relay has latched signal relays which remember the state of the trip, auto-reclose when the relay was last energized from an auxiliary supply. Therefore these indicators may also illuminate when the auxiliary supply is applied. If any of these LEDs are on then they should be reset before proceeding with further testing. If the LED successfully reset, the LED goes out. There is no testing required for that that LED because it is known to be operational. It is likely that alarms related to voltage transformer supervision will not reset at this stage. 12.5.2.4 Test the HEALTHY and ALARM LEDs Apply the rated power supply and check that the “HEALTHY” LED is lighting in green. We need to emphasize that the “HEALTHY” LED is always lighting in operation course except that this device finds serious errors in it. Produce one of the abnormal conditions listed in Chapter 4, the “ALARM” LED will light in yellow. When abnormal condition reset, the “ALARM” LED extinguishes. 12.5.2.5 Test the Other LEDs Test the other LEDs according to the configuration of the LEDs (through the PCS-PC configuration tool auxiliary software). If the conditions which can turn on the selected LED are satisfied, the selected LED will be on.
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12.5.2.6 Test the AC Current Inputs This test verifies that the accuracy of current measurement is within the acceptable tolerances. Apply current equal to the current transformer secondary winding rating to each current transformer input of the corresponding rating in turn, see the following table or external connection diagram for appropriate terminal numbers, checking its magnitude using a multimeter/test set readout. The corresponding reading can then be checked in the relays menu. The current measurement accuracy of the relay is ±2.5%. However an additional allowance must be made for the accuracy of the test equipment being used. Current channel linearity and precision checkout Item
Practical Input
Measurement (on LCD)
Error
Ia Ib Ic I01 I02 I0s
12.5.2.7 Test the AC Voltage Inputs This test verifies that the accuracy of voltage measurement is within the acceptable tolerances. Apply rated voltage to each voltage transformer input in turn; checking its magnitude using a multimeter/test set readout. The corresponding reading can then be checked in the relays menu. The voltage measurement accuracy of the relay is ±0.5%. However an additional allowance must be made for the accuracy of the test equipment being used. Voltage channel linearity and precision checkout Item
Practical Input
Measurement (on LCD)
Error
Ua Ub Uc U0 Ux
12.5.2.8 Test the Binary Inputs This test checks that all the binary inputs on the relay are functioning correctly. The binary inputs should be energized one at a time, see external connection diagrams for terminal numbers. Ensure that the voltage applied on the binary input must be within the operating range. The status of each binary input can be viewed using the submenu “Contact Inputs” and “Prot Inputs”. 12-7
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Binary inputs testing checkout BI Name
State without energized
State with energized
Correct?
12.5.3 Protective Function Test The setting checks ensure that the entire application-specific relay, for the particular installation, has been correctly applied to the relay. NOTE! The trip circuit should remain isolated during these checks to prevent accidental operation of the associated circuit breaker. 12.5.3.1 Demonstrate correct protection operation The above tests have already demonstrated that the protection is within calibration, thus the purpose of these tests is as follows: z
To conclude that the primary function of the protection can trip according to the correct application settings.
z
To verify correct setting of all related protective elements.
12.5.3.2 Overcurrent Protection Check This check, performed the stage 1 overcurrent protection function in the No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings.
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1.
Enable the stage 1 overcurrent protection with VCE and directional element control. z
Set the logic setting [50/51P1.En] as “1” in the submenu “OC Settings”.
z
Set the logic setting [50/51P1.En_VCE] as “1” in the submenu “OC Settings”.
z
Set the setting [50/51P1.Opt_Dir] as “1” in the submenu “OC Settings”.
z
Set the setting [50/51P1.OutMap] as “0x0001” in the submenu “OC Settings”.
z
Set other logic settings as “0” in the submenu “OC Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition with normal protection voltages and currents.
4.
Simulate a single-phase fault or multi-phase fault, the current of the fault phase is 1.05 × [50/51P1.I_Set], and the protection voltages satisfy the VCE condition (see Section 3.3.3) and forward directional control condition (see Section 3.3.4).
5.
After the period of [50/51P1.t_Op], the stage 1 overcurrent protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the stage 1 overcurrent protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.3.3 IDMT Overcurrent Protection Check This check, performed the IDMT overcurrent protection function with very inverse curve in No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the IDMT overcurrent protection. z
Set the logic setting [50/51P4.En] as “1” in the submenu “OC Settings”.
z
Set the setting [50/51P4.Opt_Curve] as “2” in the submenu “OC Settings”.
z
Set the setting [50/51P4.OutMap] as “0x0001” in the submenu “OC Settings”.
z
Set other logic settings as “0” in the submenu “OC Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition with normal protection voltages and currents.
4.
Simulate a single-phase fault or multi-phase fault, and the current of the fault phase is 2 × [50/51P4.I_Set].
5.
After the period of 13.5 × [50/51P4.TMS] × [50/51P4.t_Op], the IDMT overcurrent protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the IDMT protection automatically. Restore the “TRIP” indicator and the LCD manually.
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NOTE! The IDMT overcurrent protection with other characteristic inverse curves can be checked through the same method. Note to set the relevant characteristic and logic settings correctly. 12.5.3.4 Zero Sequence Overcurrent Protection Check This check, performed the No.1 stage 1 zero sequence overcurrent protection function in the No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the No.1 stage 1 zero sequence overcurrent protection. z
Set the logic setting [50/51G1.En] as “1” in the submenu “EF1 Settings”.
z
Set the setting [50/51G1.En.OutMap] as “0x0001” in the submenu “EF1 Settings”.
z
Set other logic settings as “0” in the submenu “EF1 Settings”.
z
Set the setting [Opt_3I0] as “0” in the submenu “System Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition, the external input current of the zero sequence CT is less than 0.95 × [50/51G1.3I0_Set].
4.
Simulate a single-phase earth fault, the external input current of the zero sequence CT is greater than 1.05 × [50/51G1.3I0_Set].
5.
After the period of [50/51G1.t_Op], the No.1 stage 1 zero sequence overcurrent protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the No.1 stage 1 zero sequence overcurrent protection automatically. Restore the “TRIP” indicator and the LCD manually. NOTE! Another way for testing the zero sequence overcurrent protection is using the self-calculated zero sequence current.
12.5.3.5 Sensitive Earth Fault Protection Check This check, performed the stage 1 sensitive earth fault protection function in the No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the stage 1 sensitive earth fault protection. z
Set the logic setting [50/51SEF1.En] as “1” in the submenu “SEF Settings”.
z
Set the setting [50/51SEF1.En.OutMap] as “0x0001” in the submenu “SEF Settings”.
z
Set other logic settings as “0” in the submenu “SEF Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition, the external input current of the sensitive zero sequence CT is
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less than 0.95 × [50/51SEF1.3I0_Set]. 4.
Simulate a single-phase earth fault, the external input current of the zero sequence CT is greater than 1.05 × [50/51SEF1.3I0_Set].
5.
After the period of [50/51SEF1.t_Op], the stage 1 sensitive earth fault protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the stage 1 sensitive earth fault protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.3.6 Negative Sequence Overcurrent Protection Check This check, performed the stage 1 negative sequence overcurrent protection function in the No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the stage 1 negative sequence overcurrent protection. z
Set the logic setting [50/51Q1.En] as “1” in the submenu “NegOC Settings”.
z
Set the setting [50/51Q1.OutMap] as “0x0001” in the submenu “NegOC Settings”.
z
Set other logic settings as “0” in the submenu “NegOC Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition; the negative sequence current is less than 0.95 × [50/51Q1.I2_Set].
4.
Simulate an unbalance fault; the negative sequence current is greater than 1.05 × [50/51Q1.I2_Set].
5.
After the period of [50/51Q1.t_Op], the stage 1 negative sequence overcurrent protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the stage 1 negative sequence overcurrent protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.3.7 Thermal Overload Protection Check This check, performed the thermal overload protection function in No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
2.
Enable the definite time overload protection. z
Set the logic setting [49.En_Trp] as “1” in the submenu “ThOvLd settings”.
z
Set the setting [49.OutMap] as “0x0001” in the submenu “ThOvLd settings”.
z
Set other logic settings as “0” in the submenu “ThOvLd settings”.
De-energize all the binary inputs of this relay.
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3.
Simulate a normal condition with normal protection voltages and currents, and the load current is 0.5 × [49.K_Trp] × [49.Ib_Set].
4.
Simulate a thermal overload condition; the load current is 2 × [49.K_Trp] × [49.Ib_Set].
5.
After the period of about 0.223 × [49.Tau], the definite time overload protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the thermal overload protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.3.8 Under-frequency Protection Check This check, performed the stage 1 under-frequency protection function in No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the stage 1 under-frequency protection. z
Set the logic setting [81U1.En] as “1” in the submenu “FreqProt Settings”.
z
Set the setting [81U1.OutMap] as “0x0001” in the submenu “FreqProt Settings”.
z
Set other logic settings as “0” in the submenu “FreqProt Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition with normal protection voltages.
4.
Simulate a system frequency decline condition. The input protection voltage is greater than the setting [81.Upp_VCE].
5.
After the period of [81U1.t_Op], the stage 1 under-frequency protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the stage 1 under-frequency protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.3.9 Undervoltage Protection Check This check, performed the stage 1 undervoltage protection function in the No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the stage 1 undervoltage protection. z
Set the logic setting [27P1.En] as “1” in the submenu “Voltage Settings”.
z
Set the setting [27P.Opt_1P/3P] as “1” in the submenu “Voltage Settings”.
z
Set the setting [27P.Opt_Up/Upp] as “1” in the submenu “Voltage Settings”.
z
Set the setting [27P.OutMap] as “0x0001” in the submenu “Voltage Settings”.
z
Set other logic settings as “0” in the submenu “Voltage Settings”.
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2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition with normal protection voltages and the circuit breaker is closed.
4.
Simulate an undervoltage condition; anyone of the three phase-to-phase voltages is less than 0.95 × [27P1.U_Set].
5.
After the period of [27P1.t_Op], the stage 1 undervoltage protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the stage 1 undervoltage protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.3.10 Overvoltage Protection Check This check, performed the stage 1 overvoltage protection function in the No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the stage 1 overvoltage protection. z
Set the logic setting [59P1.En] as “1” in the submenu “Voltage Settings”.
z
Set the setting [59P.Opt_1P/3P] as “1” in the submenu “Voltage Settings”.
z
Set the setting [59P.Opt_Up/Upp] as “1” in the submenu “Voltage Settings”.
z
Set the setting [59P.OutMap] as “0x0001” in the submenu “Voltage Settings”.
z
Set other logic settings as “0” in the submenu “Voltage Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition with normal protection voltages.
4.
Simulate an overvoltage condition; anyone of the three phase-to-phase voltages is greater than 1.05 × [59P1.U_Set].
5.
After the period of [59P1.t_Op], the stage 1 overvoltage protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the stage 1 overvoltage protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.3.11 Negative Sequence Overvoltage Protection Check This check, performed the negative sequence overvoltage protection function in the No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the negative sequence overvoltage protection. z
Set the logic setting [59Q.En] as “1” in the submenu “NegOV Settings”.
z
Set the setting [59Q.OutMap] as “0x0001” in the submenu “NegOV Settings”.
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z
Set other logic settings as “0” in the submenu “NegOV Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition; the negative sequence voltage is less than 0.95 × [59Q.U2_Set].
4.
Simulate an unbalance fault; the negative sequence voltage is greater than 1.05 × [59Q.U2_Set].
5.
After the period of [59Q.t_Op], the negative sequence overvoltage protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the negative sequence overvoltage protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.3.12 Broken Conductor Protection Check This check, performed the broken conductor protection function in the No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the broken conductor protection. z
Set the logic setting [50BC.En] as “1” in the submenu “BrknCond Settings”.
z
Set the setting [50BC.OutMap] as “0x0001” in the submenu “BrknCond Settings”.
z
Set other logic settings as “0” in the submenu “BrknCond Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition with normal currents.
4.
Simulate a broken conductor condition; the ratio I2/I1 is greater than 1.05 × [50BC.I2/I1_Set].
5.
After the period of [50BC.t_Op], the broken conductor protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the fault is disappeared, this relay will restore the broken conductor protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.3.13 Auto-recloser Check This check, performed the auto-reclosing with synchronism check function in No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. There are many protective elements can make the auto-recloser operate. Here, all the check is based on the assumption that the stage 1 overcurrent protection is operated. 1.
Enable the stage 1 overcurrent protection and auto-recloser of this relay. z
Set the logic setting [50/51P1.En] as “1” in the submenu “OC Settings”.
z
Set the logic setting [50/51P1.En_VCE] as “1” in the submenu “OC Settings”.
z
Set the setting [50/51P1.Opt_Dir] as “1” in the submenu “OC Settings”.
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z
Set the setting [50/51P1.OutMap] as “0x0001” in the submenu “OC Settings”.
z
Set other logic settings as “0” in the submenu “OC Settings”.
z
Set the logic setting [79.En] as “1” in the submenu “AR Settings”.
z
Set the logic setting [79.En_SynChk] as “1” in the submenu “AR Settings”.
z
Set the setting [79.N_Rcls] as “1” in the submenu “AR Settings”.
z
Set other logic settings as “0” in the submenu “AR Settings”.
z
Set the setting [79.OutMap] as “0x0002” in the submenu “AR Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition with normal protection voltages, currents and synchro-check voltage, and the circuit breaker is closed. After a period of time delay, the auto-recloser is ready and in service. A full charged battery sign is shown on the right bottom of the LCD.
4.
Make the stage 1 overcurrent protection operate according the method which is described in Section 12.5.3.2.
5.
Just at the same time when the stage 1 overcurrent protection is operated, simulate a normal condition with normal voltage inputs (protection and synchro-check) and without current inputs, and the circuit breaker is opened. After the period of [79.t_3PS1], the auto-recloser will operate, the “RECLOSE” LED indicator will be on; a relevant report will be shown on the LCD.
The auto-recloser with other check modes can be checked through the same method. Note to set the relevant logic settings as “1”. For the details about the auto-recloser theory, see Section 3.17. 12.5.3.14 SOTF Overcurrent Protection Check This check, performed the SOTF overcurrent protection in No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the SOTF overcurrent protection. Do the following configuration on the base of the setting configuration as described in Section 12.5.3.13. z
Set the logic setting [50PSOTF.En] as “1” in the submenu “SOTF Settings”.
z
Set the setting [SOTF.Opt_Mode] as “0” in the submenu “SOTF Settings”.
z
Set the setting [50PSOTF.OutMap] as “0x0001” in the submenu “SOTF Settings”.
z
Set other logic settings as “0” in the submenu “SOTF Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Repeat the step 3 to step 5 as described in Section 12.5.3.13, and make the stage 1 overcurrent protection and the auto-recloser operate successfully.
4.
Simulate a single-phase fault or multi-phase fault, and the current of the fault phase is greater than 1.05 × [50PSOTF.I_Set], and the circuit breaker is closed at the same time.
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5.
After the period of [50PSOTF.t_Op], the SOTF overcurrent protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
12.5.3.15 Breaker Failure Protection Check This check, performed the breaker failure protection function in the No.1 setting group, demonstrates that the relay is operating correctly at the application-specific settings. There are many protective elements can initiate the breaker failure protection. Here, all the check is based on the assumption that the stage 1 overcurrent protection is operated. 1.
Enable the stage 1 breaker failure protection and the stage 1 overcurrent protection. z
Set the logic setting [50/51P1.En] as “1” in the submenu “OC Settings”.
z
Set the logic setting [50/51P1.En_VCE] as “1” in the submenu “OC Settings”.
z
Set the setting [50/51P1.Opt_Dir] as “1” in the submenu “OC Settings”.
z
Set the setting [50/51P1.OutMap] as “0x0001” in the submenu “OC Settings”.
z
Set other logic settings as “0” in the submenu “OC Settings”.
z
Set the logic setting [50BF.En] as “1” in the submenu “BFP Settings”.
z
Set the logic setting [50BF.En_ReTrp] as “1” in the submenu “BFP Settings”.
z
Set the setting [50BF.Opt_LogicMode] as “0” in the submenu “BFP Settings”.
z
Set the setting [50BF.OutMap] as “0x0004” in the submenu “BFP Settings”.
z
Set other logic settings as “0” in the submenu “BFP Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition with normal currents and the circuit breaker is closed.
4.
Make the stage 1 overcurrent protection operate according the method which is described in Section 12.5.3.2.
5.
Make the fault phase current is greater than 1.05 × [50BF.I_Set] and the circuit breaker is closed.
6.
After the period of [50BF.t_ReTrp], the breaker failure protection will operate and issue the re-trip command; and after the period of [50BF.t_Op], the breaker failure protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
7.
After the fault is disappeared, this relay will restore the breaker failure protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.3.16 Mechanical Protection Check This check, performed the No.1 mechanical protection function in the No.1 setting group,
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demonstrates that the relay is operating correctly at the application-specific settings. 1.
Enable the No.1 mechanical protection. z
Set the logic setting [MR1.En] as “1” in the submenu “MR Prot Settings”.
z
Set the setting [MR1.OutMap] as “0x0001” in the submenu “MR Prot Settings”.
z
Set other logic settings as “0” in the submenu “MR Prot Settings”.
2.
De-energize all the binary inputs of this relay.
3.
Simulate a normal condition without any signal of mechanical protection.
4.
Energized the binary input which is defined as the input of the No.1 mechanical protection.
5.
After the period of [MR1.t_Op], the No.1 mechanical protection will operate and issue the trip command. The “TRIP” LED indicator will be on; a relevant report will be shown on the LCD.
6.
After the signal of the No.1 mechanical protection is disappeared, this relay will restore the No.1 mechanical protection automatically. Restore the “TRIP” indicator and the LCD manually.
12.5.4 On-load Checks The objectives of the on-load checks are: z
Confirm the external wiring to the current and voltage inputs is correct.
z
Measure the magnitude of on-load current and voltage (if applicable).
z
Check the polarity of each current transformer.
However, these checks can only be carried out if there are no restrictions preventing the tenderization of the plant being protected. Remove all test leads, temporary shorting leads, etc. and replace any external wiring that has been removed to allow testing. If it has been necessary to disconnect any of the external wiring from the protection in order to perform any of the foregoing tests, it should be ensured that all connections are replaced in accordance with the relevant external connection or scheme diagram. Confirm current and voltage transformer wiring. 12.5.4.1 Final Checks After the above tests are completed, remove all test or temporary shorting leads, etc. If it has been necessary to disconnect any of the external wiring from the protection in order to perform the wiring verification tests, it should be ensured that all connections are replaced in accordance with the relevant external connection or scheme diagram. Ensure that the protection has been restored to service. If the protection is in a new installation or the circuit breaker has just been maintained, the circuit breaker maintenance and current counters should be zero. If a test block is installed, remove the 12-17
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test plug and replace the cover so that the protection is put into service. Ensure that all event records, fault records, disturbance records and alarms have been cleared and LED’s has been reset before leaving the protection.
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13 Maintenance
13 Maintenance Table of Contents 13.1 Maintenance Schedule.................................................................................13-1 13.2 Regular Testing.............................................................................................13-1 13.3 Failure Tracing and Repair ..........................................................................13-1 13.4 Replace Failed Modules...............................................................................13-1
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13 Maintenance
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13 Maintenance
13.1 Maintenance Schedule It is recommended that products supplied by NR receive periodic monitoring after installation. In view of the critical nature of protective relays and their infrequent operation, it is desirable to confirm that they are operating correctly at regular intervals. This relay is self-supervised and so requires less maintenance than earlier designs of relay. Most problems will result in an alarm so that remedial action can be taken. However, some periodic tests should be done to ensure that the relay is functioning correctly and the external wiring is intact.
13.2 Regular Testing The relay is almost completely self-supervised. The circuits which can not be supervised are binary input, output circuits and human machine interfaces. Therefore regular testing can be minimized to checking the unsupervised circuits.
13.3 Failure Tracing and Repair Failures will be detected by automatic supervision or regular testing. When a failure is detected by supervision, a remote alarm is issued and the failure is indicated on the front panel with LED indicators and LCD display. It is also recorded in the alarm record. Failures detected by supervision are traced by checking the “ALM REPORT” screen on the LCD. See Section 8.3.2 for the details of the alarm events. When a failure is detected during regular testing, confirm the following: z
Test circuit connections are correct
z
Modules are securely inserted in position
z
Correct DC power voltage is applied
z
Correct AC inputs are applied
z
Test procedures comply with those stated in the manual
13.4 Replace Failed Modules If the failure is identified to be in the relay module and the user has spare modules, the user can recover the protection by replacing the failed modules. Repair at the site should be limited to module replacement. Maintenance at the component level is not recommended. Check that the replacement module has an identical module name and hardware type-form as the 13-1
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13 Maintenance
removed module. Furthermore, the replaced module should have the same software version. And the replaced analog input module and power supply module should have the same ratings. WARNING! Units and modules may only be replaced while the supply is switched off and only by appropriately trained and qualified personnel. Strictly observe the basic precautions to guard against electrostatic discharge. WARNING! When handling a module, take anti-static measures such as wearing an earthed wrist band and placing modules on an earthed conductive mat. Otherwise, many of the electronic components could suffer damage. After replacing the CPU module, check the settings. DANGER! After replacing modules, be sure to check that the same configuration is set as before the replacement. If this is not the case, there is a danger of the unintended operation of switchgear taking place or of protections not functioning correctly. Persons may also be put in danger.
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14 Decommissioning and Disposal
14 Decommissioning and Disposal Table of Contents 14.1 Decommissioning ........................................................................................14-1 14.1.1 Switching off .................................................................................................................. 14-1 14.1.2 Disconnecting cables ..................................................................................................... 14-1 14.1.3 Dismantling .................................................................................................................... 14-1
14.2 Disposal ........................................................................................................14-1
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14 Decommissioning and Disposal
14.1 Decommissioning 14.1.1 Switching off To switch off this relay, switch off the external miniature circuit breaker of the power supply.
14.1.2 Disconnecting cables Disconnect the cables in accordance with the rules and recommendations made by relational department. DANGER! Before disconnecting the power supply cables that connected with the power supply module of this relay, make sure that the external miniature circuit breaker of the power supply is switched off. DANGER! Before disconnecting the cables that are used to connect analog input module with the primary CT and VT, make sure that the circuit breaker for the primary CT and VT is switched off.
14.1.3 Dismantling The rack of this relay may now be removed from the system cubicle, after which the cubicles may also be removed. DANGER! When the station is in operation, make sure that there is an adequate safety distance to live parts, especially as dismantling is often performed by unskilled personnel.
14.2 Disposal In every country there are companies specialized in the proper disposal of electronic waste. NOTE! Strictly observe all local and national regulations when disposing of the device.
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15 Manual Version History
15 Manual Version History In the current version of the instruction manual, several descriptions on existing features have been modified. Manual version and modification history records Manual Version
Software
Source
New
Version
Beta
1.00
2.00
Date 2011-06-24
Description of change Form the original manual. 1.
Update the technical data of the fault and disturbance recording function in Section 2.3.4;
2.
Update the description of the auto-recloser and the check modes in Section 3.17;
3.
Update the description of the manual closing function and the check modes in Section 3.18;
1.00
1.01
2.01
2011-08-29
4.
Update the range and explain of the setting [Opt_PwrDir] in Section 7.2;
5.
Update the explain of the setting [Protocol_RS485A] and [Protocol_RS485B] in Section 7.6.2;
6.
Update the HMI operation and relevant information in Chapter 8;
7.
Update the programmable input signal and output signal tables in Section 9.4.
15-1
PCS-9611 Feeder Relay Date: 2011-08-29
15 Manual Version History
15-2
PCS-9611 Feeder Relay Date: 2011-08-29