Original Paper by Farrow

A Continuously Variable Digital Delay Element. C. IC. F a r r o w ATkT Lliddletown, New Jersey 07748

.4 BSTRA CT

T o transfer digital samples of analog d a t a from a system running under one clock t o a system running under another clock requires an interpolator t o compensate for delay between clocks.

This paper describes a Finite Impulse Response (FIR) Filter which synthesizes a controllable delay. By changing the delay the filter has the ability to interpolate between samples in the d a t a stream of a band-limited signal. The original motivation for this work was t o provide a digital interpolator capable of compensating for the delay between echo canceller output and the receiver input for echo cancellation based modems, for example CCITT's V.32 modem. Another possible application is the transfer of d a t a between quasi-synchronous T-carrier systems. T h e variable delay filter can also be used a s a more general computational element. Because high sampling rates are not required, this filter is especially suited for implementation on a DSP (Digital Signal Processor). The interpolator has been implemented, in real time, on a WE@DSPBO. This interpolator can also be used as a practical way t o reconstruct an original band-limited signal from samples taken at the Nyquist rate.

One way t o do this is t o generate an analog signal by outputting the digital samples through a Digital-te Analog Converter (DAC): pass the DAC o u t p u t through a Low-Pass Filter and then re-sample the LPF o u t p u t using an Analog-teDigital Converter (ADC) (Figure 2). F i y r a 2.

Fx I t e r C o n v e r t er

C o n v e r te r

Input

Output

Sanip l e Clock

Samp I e CI ock

R N R C O G

I N T E R P O L R T O R

1. INTRODUCTION.

A Continuously Variable Digital Delay (CCDD) Element has been built using a n FLR filter whose tap coefficients are a function of the desired delay. This is represented in Figure 1. where T = t a p spacing, aT = Delay.

Fiqure

1

-4 new approach, presented here. uses a DSP as a Continuously Variable Digital Delay ( C l D D ) (Figure 3). The "input" samples are sampled into the "input'* buffer by the "input" clock. The DSP is synchronous with the "output" clock, which also measures the delay between the output and input clocks t o give Q = D / T . The DSP has a delay line into which d a t a samples are shifted. Normally just one new sample is shifted into the delay line from the input buffer.

T

Figure 3 .

Input Samples

4A

P

[ f

Digital \ iprocessori p f

Input Samp I e Clock

V e c t o r F o r m of C o n t i n u o u s l y V a r i a b l e D i g i t a l Delay.

ISCAS'88

D I G T R L

I

gutpyt amp e s

~

output Sample

Clock I N T E R P O L R T O R .

2641 CH2458-818810000-2641$1 .OO (C 1988 IEEE

If t h e delay parameter a overflows two n e u * samples are shifted i n t o t h e delay line; if a underflows t h e n no new samples are shifted in. T h e interpolated samples generated by the D S P are t h e n transferred t o t h e "out p ut " b u ffe r.

-64

Fiqure 5 .

Serl al - t o

Para1 lel-

Paralell Converter

to-Ser I a1 Converter

2. APPLICATIONS.

and

Following are some interpolation applications of t h e CVDD:

De-Coder

Echo Canceller.

L

INTERPOLRTOR

and

YLaw Coder

YLaw

h

-64

The application t h a t stimulated this work was t h e Echo Canceller (EC). used t o cancel echoes of t h e local transmit signal in modems where t h e transmit and receive signals occupy t h e same spectrum [ l ] . .4 highlevel architecture of t h e modem is shown in Figure 1. Without a n EC, t h e receiver has no way t o distinguish between the far-end signal and t h e echoes of t h e nearend signal.

Kb/s Ser7al B > t Stream I n

-

Figure 4.

I

Kb/s

Serral B l t Stream Out

1

I

Ser i a I-toParalell Convcrte r and

+ INTERPOLRTOR

_j

Data Modem

?-Law

-

De-Coder

64

9600 Hz C l o c k

Kb/s

Serial Bit Stream I n

Hybr i d

. l ,

INTERPOLATOR

....... ....

...... .

flrchltecture

Recerver

Clock

of

V o i c e - B a n d Modem,

The E C operates under the transmit clock, because the signals from the transmitter are used as a n "Ideal Reference" t o generate a signal t o cancel echo signals generated synchronously from the transmitted signal. The signals from the E C now have t o be re-sampled a t t h e Receive Clock rate, for processing in t h e receiver. Although t h e far transmitter operates a t nominally t h e same rate as the near transmitter. their two signals are generated using separate crystal oscillators so t h a t their phase difference may be constantly changing i.e. there is a slight frequency offset. PCM-PCM Interface.

Figure 5 shows a method of converting P C M (Pulse Code hiodulation) d a t a samples from one T1 carrier system t o d a t a samples for another T1 carrier system, each operating under independent "8OOO Hz" clocks (see 12)). PCM-"Analog" Modem Interface.

3. IMPLEMENTATION.

If we make each of t h e t a p coefficients of t h e system of Figure 1 an n t h order polynomial in a , then we can rearrange the structure t o have n + l FIRS with fixed coefficients, and t h e delayed o u t p u t is a polynomial in delay whose coefficients are t h e o u t p u t s of each FIR. This structure is represented in Figure 7. 4. COEFFICIENT COMPUTATION.

T h e transfer function of a filter with a flat delay r is given by:

G(&t,r)= e l d T

(1)

and the transfer function of a n FIR with coefficients * * * Ck . . . and sampling interval T is:

using a delay parameter (I such t h a t r=aT and t a p coefficients which are a polynomials in a then:

Figure 6 show a way of converting T 1 carrier PCXi samples a t 8000 Hz directly to samples a t 9600 Hz into t h e front end of an "analog" modem, thus obviating t h e need for a n ADC or a D-IC.

2642

If we t o want t o determine the coefficients for a CLDD, we minimize:

from (6) we see that

Having optimized [ C ] over one sample interval, we can find the derivative of t h e interpolated function of s at any point in the range - % 5 a 5 %. Indeed we can make a good polynomial approximation of the interpolated function of x over the above range.

with respect t o [ C ] .

For a filter of length N t h e filter coefficients are numbered from C o ( a ) t o C V - I ( N ) . Using a C \ D D of length N, where S is even, we subject (4) to the constraints:

n # (-V-1)/2 12 = (-V-1)/2

Cn(Y2)= 0; = 1; C,(

- %) = 0:

(5)

# .\/2 n = -lj/2 12

= 1:

6. PERFORMANCE.

With the above constraints a n d a delay of + % - t a p about the center of the filter the sample just before or just after the center is transmitted exactly (with a n even length filter. there is no center tap). This Delay element is not intended t o serve any smoothing (or band limiting) function and no a t t e m p t is made t o control its out-of-hand response, as will be seen later.

A laboratory model of the CI'DD used as a n interpolator DSP2O. In this set-up. has been implemented o n a \.\EmB the line signal was sampled into an ADC at a constant clock rate, asynchronously with t h e transmitter clock. These samples were then fed into a n interpolator using the C \ D D a n d interpolated by the receiver clock, into a \.*.32 receiver. The receiver clock was derived by the receiver "timing recovery" from the interpolated samples. Tests run over this system using a V.32 signal showed no significant degradation in performance. LVhat w a s used was a n 8-Tap, 3rd-Order CVDD; the tap coefficients are given in Table I.

0

1

-.013824

5. COMPUTATIONAL APPLICATIONS.

Referring t

-. 157959

. I008

.6 16394

- I ,226364

- 616394 -. 157359 .054062

I .226364

- ,1008

-.013824

-. 003 I 4 3

.01s287

.63 I836 -.465576 -. 465576 .631836 -.21624a .055298

1

3 -.012573 .077148

- ,483198 ,905457 -.905457 ,403198

-.E77148 .012573

C o e f f i c i e n t s , C(N(MI, f a r % T a p , 3 r d O r d e r , D i t i a l V a r i a b l e D e l a y w i t h Tap S p a c i n g 1/9600 s e c s . and U p p e r U s e f u l F r e q u e n c y o f 3150 Hz.

E I

2 .mm -. 2 1 6 2 4 8

-. 0 19287

.054062

Figure '7.

1 .003 143

This CVDD was designed t o operate over a frequency band from 0 t o 3150 Hz. Figures 8 and 9 are plots of Delay a n d Amplitude error over this frequency range for -% a 5 VZ. These figures show relatively level plateaus for the range of interest. As was stated in section 5 . no attempt has been made to constrain the out-of-band response. The CVDD is a linear FIR, for any given setting of a , and if the timing drift between transmitter and receiver is very small. i.e d a / d t is very small, then a receiver using an adaptive equalizer will have no trouble tracking any slight variations of delay or amplitude introduced by the Ck'DD.

<

I

1

I

K(Delay Parameter)

n m S t r u c t u r e o f , 3 r d Order, Figure 7 . Continuously V a r i a b l e D i g i t a l D e l a y .

Figure 10. shows the behavior of Cn(a)as a function of a. It can he seen that, as a consequence of the constraints (5) t h a t C,(-%) = 1 and and C3(%) = 1. A further consequence of ( 5 ) is that: Cn o

+

(V,).Cn,

1

+

(%)'.Cn, 2

4- (%)3'Cn, 3 .= O

c, 0 + (-%).C, 1 + (-%)?.Cn,2+ (-%)3.Cn,3

.

=0

this agrees with the fact t h a t the numbers in column 2

2643

of Table I are -4 times t h e numbers in column 0. a n d t h e numbers in column 3 are -4 times t h e numbers in column 1: except for rous 3 a n d 1. This suggests t h a t this CLDD can be implemented n i t h only 2 instead of 4 FIRs, thus reducing t h e a m o u n t of computation. In fact for any polynomial of degree "N" t h e CCDD can be implemented with N-1 FIRs. This type of CCDD has three parameters: 1. Upper Useful Frequency. 2. Number of T a p s (Nt). a n d 3. Degree of Polynomial (Dp).

Dc =

L

-0.5

r i l , =

Figures 11. and 12. are plots of t h e upper useful frequency for -40 d B and -60 d B rms error for CVDDs of various numbers of taps a n d degrees of polynomial. T h u s it is possible t o select Dp a n d N t t o meet t h e requirements for any particular CCQD.

I II

0.25

ac= 0.5

I

Plot of Tap Coefficients (C(Alpha,N)) for various values of Alpha for the Digital Variable Delay with the Coefficients given in table I. 32

Fiqure N

28

11.

Po I y n o m i a l I n t e r p o 1 a t o r , Upper U s e f u l Frequency v s . Number o f T a p s f o r RMS E r r o r = - 4 0 d B .

U

m

24 r 20 0

16

P Do eg l yr n ee o moi fa l

T 12 a

Plot of Normalized Delay Error vs. Delay (Alpha) and Frequency for the Digital Variable Delay with coefficients given in table I. U a, a,

.%

N 7 J .

L a O S Z E

w

26

. .-*

(,

m

Q

0 2400

Fiqure

N

.2

E-L

Dp ) =3,'

Frequency,

€00 6

.

- @ U I d - L

Dp>3

.,..

Dp=l

32

A

.-,L

(

/,

3000

3600

Hz

4200

12.

Polynomial Interpolator, Upper U s e f u l Frequency v s . Number o f T a p s f o r RMS E r r o r = -60 dB.

24

2

Degree o f Po 1 y n o m i a

e

r 30

(Dp)= o

16

/p4

Dp,=2

T

12 a

Upper Usefu1 Frequency, Hr

!/

Plot of Normalized Amplitude Error vs. Delay Setting (Alpha) and Frequency for the Digital Variable Delay with coefficients given in table I.

2644

€00

1200

1800 2 4 0 0

3000

3600

4200

T h e plots of Figures 8,9,11 a n d 12 were all made for a sampling rate of 9600 samples/second.

7 . FEATURES.

REFERENCES

\\-hat has been described is a Continuously \-ariable Digital Delay Element which can be used to generate a delayed version of a sampled signal from the samples.

Jean-Jacques LC'erner. "An Echo-CancellationBased 4800 Bit/s Full-Dupleu DDD hIodem'*. in IEEE Journal on Selected Areas Communication. i - 0 1 SAC-2. S o 3 . September 1984.

The CLDD can be incorporated in Digital Signal Processing applications as interpolator for applications such as modems with Echo Cancellers. transfer of PChI d a t a from one clocked system t o another, or a more general computational element for generating functions, i.e. the derivative, of the sampled signal.

J. C. Candy and 0 . J. Benjamin. "A Circuit T h a t Changes the \Vord Rate of Pulse Code h[odulated Signals", The Bell System Technical Journal, I7oI. 62, No. 4. April 1983, pp 1181-1188.

When a band-limited signal is sampled at the Nyquist rate it is theoretically possible t o reconstruct the original signal from the samples. One might ask the question "how?". The Continuously Variable Digital Delay described here gives an answer: at least for a limited length CLDD. we can come up with a very good ap p rosimation. 8. COMPARISON.

In this approach t o interpolation. an interpolated sample is generated only as needed. Other approaches [2] generate a continuum of closely spaced samples and select the desired outputs from them. Thus, the amount of computation required here is much less than other approaches. .%lso. because "Delay" is a parameter in the computation, the resolution of the delay is limited only by the precision of the arithmetic. not by the computation rate.

APPENDIX Figure A1 shows two different representations of the same FIR (Finite Impulse Response Filter). Figure A1 is included here t o explation the symbology used in the rest of the paper. M-Stage

Delay L l n e .

9. EXTENSIONS.

It should be apparent t h a t , within reason, we can generate filters with arbitrary transfer functions of the form C(w,z). One such application might be t o control the formant in music applications. Extending the same concept t o more dimensions we could simultaneously control the delay and amplitude distortions in a transmission line simulator.

Outut ( 2 )

- . L

.

4

i'l-Stage

F i n i t e

Impulse

Response

9

Coefficient Vector.

S a m ro l s Vcct o r .

o u t ut ( 2 )

V e c t o r Form o f

F i g u r e R1.

2645

'

FIR Filter.

F i l t e r .

'