use it. more knowledgeable book....
Notebook Power System Introduction & Troubleshooting
PE Mike Lee 03/29/2004
Who should attend this e-Learning Target audience • All electrical engineers such as: • PE, TE, FAE, FAE, CSD Pre-requisite • Electronic circuits • Digital logic circuits • Multi-meter used Course content • Power system & Sequence • Troubleshooting( 疑難排解) • Would not introduce • Power transfer principle
( PWM-Plus
width Modulation & LDO – LDO –Low Low Drop-Out regulator )
• Charger
After this course, you will • Know how to debug no power problems
Outline Outline(
) :
1. Power system architecture : 1.1 NB power system introduction 1.2 Power sequence and control 2. Power plan introduction : 2.1 Power budget(預算) block diagram 2.2 NB power applicatio application n 2.3 Multi –power –power device 3. No power debug : 3.1 No power power debug debug notice notice & sequence 3.2 DCBA DCBATOUT TOUT shor short( t(短路) to GND 3.2 S5 Power No Good 3.3 Power on logic No Good
Foreword • Foreword : As we know, know, notebook power is provided provided by adaptors adaptors (19V) or batteries batterie s (14.8V ). However, the various( 不同的) power voltages do not fit( 適合) all devices in a notebook unit. So a series of voltage transfer actions are needed to provide power to all devices. (Problems may arise(發生) during the voltage transfer.) As notebook is a portable computer computer,, saving power power is also very important when the system is in battery mode. In this lesson, we will use the Yuhina power circuit to introduce the notebook power system.
1.Power system architecture
1 of 4
1.1 NB (Yuhina) (Yuhina) power system : AUX Power 5V_S3 DCBATOUT
AD+
1
MAX1999
P-MOS SI4425
4 Charger
PWM
2
PWM
6
N-MOS FD9412
3
5V_S5 Max1999_LDO5 5V_AUX_S5 +5V_UP_S5
3D3V_S5
5
5V_S0
7 N-MOS FD9412
N-MOS FD9412
3D3V_LAN_S5
LDO G913C
1D5V_S5
3D3V_S3
6
5
N-MOS FD9412
3D3V_S0
7 VCC_CORE_S0 PWM MAX1546
4 P-MOS SI4425
BT+
PWM MAX1715
2D5V_S3
6
N-MOS FD9412 LDO G913C
1
7
S5 Power
S3 Power
2D5V_S0 1D25V_S0 1D5V_S0
S0 Power
1.Power system architecture
2 of 4
1.1 NB (Yuhina) (Yuhina) power system : S5 Power 5V_S3 DCBATOUT
AD+
1
MAX1999
P-MOS SI4425
4 Charger
PWM
2
PWM MAX1645
6
N-MOS FD9412
3
5V_S5 Max1999_LDO5 5V_AUX_S5 +5V_UP_S5
3D3V_S5
5
5V_S0
7 N-MOS FD9412
N-MOS FD9412
3D3V_LAN_S5
LDO G913C
1D5V_S5
3D3V_S3
6
5
N-MOS FD9412
3D3V_S0
7 VCC_CORE_S0 PWM MAX1546
4 P-MOS SI4425
BT+
PWM MAX1715
2D5V_S3
6
N-MOS FD9412 LDO G913C
1
7
S5 Power
S3 Power
2D5V_S0 1D25V_S0 1D5V_S0
S0 Power
1.Power system architecture
3 of 4
1.1 NB (Yuhina) (Yuhina) power system : S3 Power 5V_S3 DCBATOUT
AD+
1
4 Charger
2
PWM MAX1645
N-MOS FD9412
3
PWM MAX1999
P-MOS SI4425
6
7
5V_S5 Max1999_LDO5 5V_AUX_S5 +5V_UP_S5
3D3V_S5
5
5V_S0
N-MOS FD9412
N-MOS FD9412
3D3V_LAN_S5
LDO G913C
1D5V_S5
3D3V_S3
6
5
N-MOS FD9412
3D3V_S0
7 PWM MAX1546
4 P-MOS SI4425
BT+
PWM MAX1715
2D5V_S3
6
N-MOS FD9412 LDO G913C
1
7
S5 Power
S3 Power
2D5V_S0 1D25V_S0 1D5V_S0
S0 Power
1.Power system architecture
4 of 4
1.1 NB (Yuhina) (Yuhina) power system : S0 Power 5V_S3 DCBATOUT
AD+
1
4 Charger
2
PWM MAX1645
N-MOS FD9412
3
PWM MAX1999
P-MOS SI4425
6
5V_S5 Max1999_LDO5 5V_AUX_S5 +5V_UP_S5
3D3V_S5
5
5V_S0
7 N-MOS FD9412
N-MOS FD9412
3D3V_LAN_S5
LDO G913C
1D5V_S5
3D3V_S3
6
5
N-MOS FD9412
3D3V_S0
7 PWM MAX1546
4 P-MOS SI4425
BT+
PWM MAX1715
2D5V_S3
6
N-MOS FD9412 LDO G913C
1
7
S5 Power
S3 Power
2D5V_S0 1D25V_S0 1D5V_S0
S0 Power
1.2 Power sequence and and control ： Why do we need to differentiate power type among( 在...之中) AUX,S5, S3,S0 ?How do we control them ? Here is the answer: • AUX Power : For power power button use , it is turned on with battery only before you press the power button . • S5 Power :
For power button & wake on LAN use , it is turned on with adapter before you press the power button .
• S3 Power :
For stand_by mode use , it is turned on with South bridge PM_SLP_S3# after you press the power button .
• S0 Power :
For normal mode use , it is turned on with South bridge PM_SLP_S4# after you press the power button .
Block Diagram :
AD+
BAT only
DCBATOUT
or
AUX Power
AUX_S5
S5 Power
3D3V_S5 1D5V_S5
AC_IN For power button use
For power button & wake on LAN use
S3 Power
5V_S3 3D3V_S3 2D5V_S3
PM_SLP_S4#
For stand_by mode use
S0 Power
5V_S0 3D3V_S0 2D5V_S0 1D25V_S0 Vco_S0
PM_SLP_S3#
For normal mode use
1.2.1 AUX_Power DCBATOUT U31 0 2
a. When the battery battery or adaptor is plugged-in(插入), DCBATOUT will input the power into MAX1999 pin 20_V+ , and pin 18 – 18 – LDO5 LDO5 will provide the 5V_AUX_S5 power .
+ V
28
26 27 24 22 7
c. The 5V_AUX_S5 5V_AUX_S5 is never off when MAX1999 is working, unless something goes wrong with MAX1999 .
3 4 6
C C V
BST3
BST5
DH3
DH5
LX3 LX 3
LX5 LX 5
DL3
DL5
OUT3
OUT5
FB3
FB5
ON3 ON5
PRO# NC
TON ILIM3
8
12
14
16 15 19 21 9
10 1
SHDN#
ILIM5 13
b. The AUX power is used on power on logic & South Bridge. As it is battery only, only, the leakage current must be as little as possible. In general, it is about 5~6 mA.
7 1
REF
PGOOD
SKIP#
3 O D L 5 2
MAX1999_LDO3
5 O D L 8 1
GND
11
5
2
23
MAX1999EEI MAX1999_LDO5 = 5V_S5
1.2.2 S5_Power a. Circuit operation – operation – Power Power on logic : 1 The AC_IN signal was pulled hi when Adaptor Adaptor was inserted . 2 Power on logic will output MAX1999_SD hi to trigger 3D3V_S5.
As a result, when when Adaptor is inserted but power button has yet been pressed,the S5_power will be turned on first .
5V_AUX_S5
5V_S5 1
1
5V_AUX_S5
R267
5V_AUX_S5
2
10KR3
R471 100KR3
5V_AUX_S5 2
MAX1999_SD_3
Hi
U51
Q51 D
4 1
3
2N7002 1 G
S
4 1
2
5
1
2
100KR3
Low
VCC
B
R481 6
5
U50C TSAHCT14
1
2 10KR3
A
Hi
4
Y
GND
1
BL3#
PWRBTN_74
9 2 3
M1631_EN
8 10
Hi U36C TSAHCT32
1
Hi
AC_IN R314 100KR3
7
NC7SZ08-U 7 2
2
1
b. Circuit operation – operation – 3D3V_S5 3D3V_S5 : When MAX1999 – MAX1999 – Pin Pin 3(ON3) pull hi, the 3D3V_S5 will be turn on. DCBATOUT
1
2
X K 1 6 C194 V 5 8 2 9 U SCD1U25V3KX 1 7 C D 2 4 C S
8
7
6
5
1
Q22 SI4834DY
R608
U31 0 2
220KR3 2
3D3V 3.8A/6.9A 3D3V_DC_S5
2
1
4
3
L21 IND-4D7UH-16 68.4R71B.101 1 2 1
S S C T 1 D 1 1 C T 0 1 C 0 3 U 6 U 0 2 2 4 5 2 V V B 3 2 M 2 K X
1 6 3 6 C 2
N J 2 V 0 5 P 0 0 1 C S
2
MAX1999_DH3
26
MAX1999_LX3
27
MAX1999_DL3
24
C627 SC47P50V2JN MAX1999_LX3_1 2
1 F 8 3 9 R 5 5 R 6 K 6
MAX1999_BST3_1 28 BST3
22
1
7
R590 2MR3
2
MAX1999_SD_3 MAX1999_ON5
3 4
MAX1999_SHDN#
6
7 1
+ V
C C V
BST5
DH3
DH5
LX3 LX 3
LX5 LX 5
DL3
DL5
OUT3
OUT5
FB3
FB5
ON3 ON5
PRO# NC
14
16 15 19 21 9
10 1
SHDN#
MAX1999_FB3 1 F 3 4 R 0 6 K R 0 1
MAX1999_VCC 1
1 R 30 30 4
R575 1KR3
2
R300 DUMMY-10KR3 1 2 MAX1999_TON 13
ILIM5 TON ILIM3
2 0R 33- U 8
MAX1999_REF
REF
PGOOD
11
5
2
C236 12
2
14,15,36,37 PM_SLP_S4#
SCD22U10V3KX
SKIP#
3 O D L 5 2
MAX1999_LDO3
5 O D L 8 1
GND
23
MAX1999EEI
c. Circuit operation – operation – LAN LAN & 1D5V_S5 power : 1 When AC_IN AC_IN is HI, 2 The MOS-U13 will be turned on, and 3D3V_LAN_S5 will be generated. This power is for wake on LAN function. 3 The 1D5V_S5 LDO power will be turned on by 3D3V_S5 . This power is for south bridge for wake on LAN usage . Because adaptor power was inserted already, already, the Battery leakage current is not a concern now。 3D3V_S5
1D5V_S5 LDO 5 6 7 8
L AN Powe Power r
D
D
D
D
U13
1D5V_S5
FDS9412
3 DCBATOUT
G S S
Q11 TP0610T
1
2
2
Low
R107 2 1
1
D3 3
2
BC27
1 2 3
2
R95 330KR3 1
R101 R10 1 1K 1KR3 R3
R540 12K4R3D
U24
3D3V_LAN_S5
RLZ12B 330KR3
C172 SC20P
2
10KR3 1
1
3D3V_S5
4 3 2 1
Hi
R105
1
S
SHDN# GND IN
SET OU T
5
2 1
4
R546 60K4R3F
2
G913C-U D S
3
C176
Q10 1
Hi
G 2N7002
4 5
2
3D3V_S5
C593 2
U14 Y VCC
GND B A
NC7SZ32-U
3 2 PM_SLP_S3# 1
AC_IN
Hi
I max = 120 mA
1.2.3 S3_Power 1.2.3 S3_Power a. Circuit operation – operation – 5V_S3 5V_S3 : When the power button was pressed, south bridge will pull hi the PM_SLP_S4#, and 5V_S3 power will be generated . 2
2
R263
U31 0 2
0R3-U
+ V
MAX1999_BST3_1 1 28
7 1 C C V
BST3
BST5
R581 0R3-U
1
14
S C D 1 C 6 1 2 U 6 1 6 V 3 2 K X
BC46
1
5 6 7 8 D D
D D
U29
27 24 22 7
PM_SLP_S4#
MAX1999_SD_3 3 MAX1999_ON5 4 6
DH3
DH5
LX3 LX 3
LX5 LX 5
DL3
DL5
OUT3
OUT5
FB3
FB5
MAX1999_DH5
PRO# NC
15
MAX1999_LX5
19
MAX1999_DL5
1
U33 5 6 7 8
MAX1999_FB5
D D D D
2
1
2
ILIM5
MAX1999_LX5_1 2 1
SI4892DY 4 3 2 1
13
TON TO N ILIM3
8
12
REF
SKIP#
PGOOD
3 O D L 5 2
5 O D L 8 1
GND
11
MAX1999_ILIM5
5
MAX1999_ILIM3
2
MAX1999 _PGD
23
MAX1999EEI
3 0 1 6 R K 2 4 R 2
2
1
2
F 3 7 R 7 2 K 8 R 1
1
2
1
R286 2MR3
7 0 6 R
2
SB
5V_S3
C251 SC47P50V2JN
R266 100KR3
SHDN#
C240
1
21
10 1
DCBATOUT
L24 IND-5D6UH-6-U
4 3 2 1
G S S S
ON3 ON5
2
X K 6 1 1 V 1 5 2 2 U C 7 D 4 2 C S
MAX1999_BST5_1
16
9
2
SI4800
G S S S
26
1
F 1 3 1 R 4 K 6 5 C 1 2
2
MAX1999_FB5
2
R580
1
1
MAX1999_LDO5
10KR3
MAX1999_ILIM5_3
2
1
R280
2 MAX1999_VCC
0R3-U
F 0 3 1 R 6 6 7 R K 9
3 3 C T
b. Circuit operation – operation – 3D3V_S3 3D3V_S3 : 3D3V_S3 power is generated by U25 N-MOS from 3D3V_S5 3D3V_S5 when PM_SLP_S4# is hi .
DCBATOUT
Q32 TP0610T R305
1
2
2
1 1
10KR3 C281 SCD1U50V5KX
3
R311 1
R302 330KR3
D19 RLZ12B
Low
2
2
330KR3
2
3D3V_S3
3D3V_S5 U25
1
1 2 3 4
1
R315 1KR3
S S S G
Hi 2 3
Hi PM_SLP_S4#
1 G 2
D
S
Q53 2N7002
FDS9412
8 7 D 6 D 5 D D
c. Circuit operation – operation – 2D5V_S3 2D5V_S3 : When 5V_S3 power was building, MAX1715 pin – 11 – 11 is pulled hi, and 2D5V_S3 will be turned on . PM_SLP_S3# R 24 249 1
DCBATOUT
10R 3 2
5V_S3 3
R577 0R3-0 R577 0R3-0-U -U 1 2 R582 R58 2 0R3 0R3-0 -0-U -U 1 2
2D5D_S3_ON
C213
1 0 1 1
1 0 4 2 2
26 27 24 1 2 3 8 22 7
BST1
M1715BST2 1
1
DH 1 DH 2 LX1 LX 1 LX2 LX 2 DL1 DL2 OUT1 OUT2
6 18 17 16 19
D
D
U65
D
2
1
4 3 2 1
C207
SCD1U25V3KX 2
1
M1715DH2
FB2 ILIM2
AGND PGND PGOOD
U61
MAX1715EEI-U2
. . . C . C . C . N N N 8 5 3 2 1 2
TON REF
12 5 9
1
M1715DL2
0R 33-0-U 2 2 1
M1715FB2 M1715ILIM2
C208 1
5 6 7 8 D D D D
2
4 3 2 1
6 M D V 2 4 3 U 1 C 0 T 2 2 T S
R592 0R3-0-U
U69 SI4892DY
G S S S
2
R593
M1715LX2
14 13
2D5V_S3
2
L25 IND-5D6UH-6-U R 55 555 1
C191
G S S S
FB1 ILIM1
1
SI4800
2
2
R591 R59 1 0R3 0R3-0 -0-U -U
SKIP# BST2
D
BAW56-1
2 1 + C D N N V C D O O V V
25
5 6 7 8
D10
2
2
D45 SSM24L 1
d. S3 power Purpose : Why Notebook needs S3 power – power – Stand-by Stand-by mode function ? The stand-by mode function is for power saving when the system is not operated just as the below setting. So, the S3 power is for this usage. • The system will enter the stand-by stand -by mode if NB remains not operated during 30 mins. • During stand-by mode if power button is pushed, the system will return to previous state in 5 sec .
• Because the state is resumed from memory, memory, we need S3 power to keep North Bridge & DDR working while standing by. At this state, the battery leakage leakage current is is under 30 mA.
1.2.3 S0_Power a. Circuit operation – operation – 1D5V_S0 1D5V_S0 : After PM_SLP_S4# PM_SLP_S4# signal was generated for a few sec , the South Bridge will output PM_SLP_S3# on hi level, and 1D5V_S0 will be turned on . DCBATOUT 1
R 24 249 1
C210
1 0R 3 2
PM_SLP_S3#
2
SC1U10V3ZY C610 8
7
6
5
R577 0R30R3-0-U 0-U 1 2 R582 0R30R3-0-U 0-U 1 2 1 0 1 1
U62 SI4834DY
L23
1D5V_S0
1 1
2
2
IND-4D7UH-16
1
4
C188 SCD1U25V3KX25 R553 20R30R3-0-U 0-U M1715DH1_1 1 2 M1715DH1 26
R556 5K1R3F
M1715LX1
2
D11
M1715DL1_1
1
R554 0R30R3-0-U 0-U 1 2 M1715DL1
27 24
2
TC31 SSM24L
ST100U4VBM 2
1 1
1
M1715FB1 C189
1
R549 10KR3F
2 2 2
2 1 + C D N N V C D O O V V
1
3
R558
2 1
M1715ILIM1
3
300KR3 8 22 7
1 0 4 2 2
BST1
SKIP# BST2
DH 1 DH 2 LX1 LX2 DL1 DL2 OUT1 OUT2
6 18 17 16 19 14
FB1 ILIM1
FB2 ILIM2
AGND PGND PGOOD
U61
MAX1715EEI-U2
. . . C . C . C . N N N 8 5 3 2 1 2
TON REF
13 12 5 9
b. Circuit operation – operation – 5V,3D3V,&2D5V_S0 5V,3D3V,&2D5V_S0 : PM_SLP_S3# signal is also used to turn on 5V 、3D3V、2D5V_S0.
Run Ru n Powe P ower r
5V_S0
5V_S3 U35
DCBATOUT
Q28 Q2 8
TP0 P061 610T 0T
1 2 3 4
R308 1
2
2
1
D
S
D
S G
1
10KR3
C645 SCD1U50V5KX
3
2
R609 330KR3
1
FDS9412 D16
3D3V_S0 U26
2 2
330KR3
3D3V_S5
RLZ12B
R307
8 7 6 D 5 D
S
1 2 3 4
1
1
R306 1KR3
8 7 6 D 5 D
S
D
S
D
S G
FDS9412
2D5V_S0 2 3
PM_SLP_S3#
2D5V_S3
D
1
Q33 2N7002
G
U32 1 2 3 4
S 2
D
S
D
S G
1
8 7 6 D 5 D
S
1
C283 2
C235 2
c. Circuit operation – operation – P4 P4 CPU VCC_CORE_S0 :
1 of 4
-- P4 CPU_ VCO power – power – architecture architecture :
DCBATOUT
1546 DHM & DLM
1
3D3V_S0
DCBATOUT
4
LDO CM2843
Phase 1 Power module
PWRGD_VID
PWM MAX1546
5
6 VCC_CORE_S0
Phase 2 Power module DCBATOUT
2
1D2V_VID
3
CPU
H_VID0~5
Phase 3 Power module p.s. As one phase of power module can only supply 25A, and Yuhina CPU needs 66A, therefore 3 phrases are required.
c. Circuit operation – operation – P4 P4 CPU VCC_CORE_S0 : 1 2 3 4
2 of 4
3D3V_S0 power on . CM2843 provides 1D2V_VID to CPU. CPU provides VID code PWRGD_VID, which is provided by CM2843, will delay 1ms while 1D2V_VID is on. So it will be turned on after the CPU VID code.
3D3V_S0
FOR NORTHWOOD ONLY
1
1 R334 1
2
FS_X
2
100KR3 RB2 47KR3
BC16 SC1U10V3ZY
2
MIC5258_EN
1D2V_VID
1 2 3
VIN GND EN
OUT PG
CPU
5 4
1 1
1
H_VID0~6
U1
R19 0R3-0-U
CM2843ACIM25
2
PWRGD_VID
4
BC9 RB1 330KR3
BCB1 SCD1U
2
1
C21 SCD015U25V3KX
300mA SUPPORT 2 2
1mS Minimum Request (1D2V_VID TO PWRGD_VID)
3
c. Circuit operation – operation – P4 P4 CPU VCC_CORE_S0 : 1 2
3 4 5
MAX1546 Power is ready . CM1843 generates 1D2V_VID to CPU. CPU provides the VID0~5 to the MAX1546 .. CM1843 will send PWRGD_VID as Hi after 1ms that 1D2V_VID was generated. MAX1546 will output the switching signal .
3D3V_S0
8 7 6 5
CM1843 2
3 of 4
R147 10KR2
4
2 1
2
3
1
5V_S0 1
DCBATOUT_VCPU
R187 10R3
1
PWRGD_VID
RN 9 SRN10K-2
1
4 1
X K 1 3 4 V 8 0 1 C U B 1 2 C S
R148 Dummy -10 -10KR2 KR2
1D2V_VID
Y Z 3 V 1 7 0 3 1 1 2 U C 1 7 U 2 C S 1 2 V C 5 2 U 1 C S 0 0 6 8 1 3 3 1 6 C D C D V V
+ V
2
1 2 3 7 8 14
CPU 3 5 5 5 5 5
H_VID0 H_VID1 H_VID2 H_VID3 H_VID4
4 H_VID5
24 23 22 21 20 19 1
3 3 S H D
4
PWRGD_VID 1546DHS 1546DHS 32 1546CM 1546CM-- 32 1546CM+ 1546CM+ 32 1546CS+ 1546CS+ 32 1546CS1546CS- 32
8 7 3 3 P N M M C C
0 9 4 3 P N S S C C
TIME TON MUXSEL OFS REF CC I
DLM DH M LXM LXM BSTM VROK
D0 D1 D2 D3 D4 D5
CC V DLS LXS LX S ILIM - + N I N I A A O O
R631 0R3-U 2
# # P I N K D S H S
N J 3 V 0 5 P 0 9 7 1 4 5 C C S
PM_DPRSLPVR#
U21 MAX1546ETL
6 7 1 1
0 1 S S 4
5
B F 5 1
S T S B 5 3
S D D N N G G P 3 1 1 3
D D N N G G 1 1 4 1
29 28 27 26 25
12 32 34 9
5
5
c. Circuit operation – operation – P4 P4 CPU VCC_CORE_S0 : 5 6
4 of 4
The step-down circuit starts working as soon as the switch signal begins. The VCC_CORE is produced and will provide the CPU’s working power . PS. This is one of the three phases in VCC_CORE. DCBATOUT_VCPU C511 2 SC10U35V0ZY-U C490 1 2 DUMMY-SC10U35V0ZY-U
DCBATOUT_VCPU
1546BSTM
1 5 4 6 B S T M 1
5
2
X K 3 V 0 5 U 8 1 1 D 1 C C S
1 1 3 0 N 0 5 5 D 4 U Q S
1 1 3 0 N 4 0 4 5 D Q U S
D
2
1
1
D
2
1
G
C485 2 SC10U35V0ZY-U C480 1 2 DUMMY-C3
1546CM+ 1546CM-
1
6
GAP-CLOSE-PWR 1
G
3
VCC_CORE
3
S
1546DHM 1546LXM
2
G4
S
1546DHM
1546LXM
1
1546DLM
1546DLM
D
1
2
X K 2 V 0 4 5 2 P 1 0 0 C 7 4 C S
2
1 G
3 S
P 6 2 0 1 3 Q 0 N 0 5 D U S
D
2
1 G
3 S
P 6 3 0 1 3 Q 0 N 0 5 D U S
1
2
U 4 5 8 M 2 C D S Y M M U D
2 L13 L-D5UH
1
2
R117 D001R7520F 5 9 C
X K 3 V 0 5 U 1 0 D C S
d. P4 & Banias CPU VCC_CORE_S0 difference : The power system can separate two kinds of architecture for CPU. But the only difference between P4 and P4 and Banias CPU Banias CPU power architecture is VCC_COER_S0. Such as below : DCBATOUT
1546 DHM & DLM
3D3V_S0
1
1D2V_S0
DCBATOUT
4
LDO CM2843
Phase 1 Power module
PWRGD_VID CPUCORE_ON
PWM 5 MAX1546 ISL6218
6 VCC_CORE_S0
Phase 2 Power module DCBATOUT
2
1D2V_VID VCC_IO_S0(1.05V)
3
CPU
H_VID0~5
Phase 3 Power module Banias CPU needs 21A, so only one phase is needed.
2. Power plan introduction : By now we have learned how NB power is generated and why it must be done in a specific sequence. You might start to wonder, “What is other Power application?” In the following section, I will show you the power consumption of all devices in a NB. You will learn: 2.1 Power budget block diagram 2.2 NB power application 2.3 Multi –power –power device
2. Power plan introduction :(cont’d) Create a NB power system with fixed procedure, so we can know the power budget of all devices from the power plan procedure . Design procedure : a. Power budget : We must first know the power category and consumption of all devices, and then we can start to define the SPEC of power. b. Power application : After power SPEC SPEC was defined, defined, we need to confirm confirm the timing & sequence when power is turned on. And separate them with S5,S3,S0, etc. for the purpose of power saving.
2.1 NB (Yuhina) Power Budget Block Diagram DDR 2D5V_S3 (2150mA) 1D25V_S0 (2150mA)
KBC 3D3V_S3(150mA)
LAN 3D3V_LAN_S5(150mA)
~50mA
2D5V_S0 1D25V_S0
2D5V_S0 1D25V_S0
~2150mA ~65400mA
VCC_CORE 3D3V_LAN_S5
VCC_CORE
~190mA
1D2V_VID
1D2V_VID
~3739mA
1D5V_S0
1D5V_S0
~4150mA ~90mA ~150mA ~166mA
2D5V _S3 1D5V_S5 3D3V_S3 3D3V_S5
2D5V_S3 1D5V_S5 3D3V_S3 3D3V_S5
1D5V_S0(3140mA ) 3D3V_S0(20mA ) 2D5V_S3(2000mA ) 2D5V_S0(50mA) VCC_CORE(940mA )
VCC_CORE_S0(2.5mA ) 1D5V_S0(599mA) 3D3V_S0(480mA ) 1D5V_S5(90mA ) 3D3V_S5( 166mA)
ICH4M
VCC_CORE (67.4A)-3.2G Hz 1D2V_VID(190mA)
CARDBUS& 1394 3D3V_S0(60mA)
Montara-GT
Mobile P4 CPU
3D3V_S0
~2984mA
CLK GEN ICS950813 360mA
LCD 200mA
MS Card 200 mA SD Card 200 mA
Mini PCI 802.11/BT 660mA
KBC 7mA
LPC SIO 50mA
LPCROM 6mA
CODEC 40mA
PCMCIA CARD 1000mA
FIR 600mA
5V_S0
~7650mA FDD 0.8A
1394-PHY 71mA
FAN 0.5A
CRT 0.5A
HDD 900mA
USB*4 2000mA
CD ROM 700mA
OP AMP 1A
TOUCHPAD 25mA
PCMCIA CARD 1A
2.2 NB power application : 2.2.1 3D3V Device :
S5 ICH4M S3
S0
LAN LAN KBC
Montara-GT
ICH4M
LPC SIO
Mini PCI 1394-PHY
CODEC K BC
LPC ROM CLK GEN
PCMCIA card LCD MS/SD card
FIR
CARBUS
2.2.2 5V Device : S5 S3
S0
Mini PCI
FDD
CD ROM
CODEC
HD D
USB*4
Touch PAD
CRT
OP AMP
PCM PCMCI CIA A car card
FAN FA N
2.2.3 2D5V Device : S5 S3 S0
DDR
Montara - GT
Montara - GT
2.2.4 1D5V Device : S5
ICH4M
S3 S0
ICH4M
Montara_GT
2.2.5 1D25V Device : S0
DDR
2.2.6 1D2V_VID Device : S0
CPU
2.2.7 VCC_CORE Device : S0
CPU
ICH4M
Montara-GT
2.3 Multi-power device : Device
Power source
ICH4M 3D3V 3D3V_S _S5 5 (South Bridge)
3D3 3D3V_S0 V_S0
1D5V 1D5V_S _S5 5 1D5V 1D5V_S _S0 0 VCC_ VCC_CO CORE RE
Montara _ GT 3D3V 3D3V_S _S0 0 (North Bridge)
2D5 2D5V_S3 V_S3
2D5V 2D5V_S _S0 0 1D5V 1D5V_S _S0 0 VCC_ VCC_CO CORE RE
Mobile Mobil e P4 CPU 1D2V_VID 1D2V_VID VCC_CORE VCC_CORE DDR
2D5V 2D5V_S _S3 3
1D25 1D25V_ V_S0 S0
3. No power troubleshooting No power define : No power means when the power button is pressed, the power LED is not turned on, and the system system is not booted. booted. We can separate no power in four kinds of states :
3.1 No power power debug debug notice notice & sequence 3.2 No DCBATOUT DCBATOUT or short to GND 3.3 S5 Power No Good 3.4 Power on logic No Good If power system is good & power LED turned on, but the system still N.G., it means the system is “No work”. You must follow the “No work debugging” process to troubleshoot the problems.
3.1 No power debug notice & sequence : 3.1.1 debug Notice : For safety’s sake, please use adapter to supply the Notebook power when you execute the debug process . • This debug procedure can only cover about 90% no power Problems.
•
3.1.2 debug Sequence : Check Dcbatout short to GND Symptom? Ref : 3.2.1
Yes Execute DCbatout short to GND Debugging Ref : 3.2.2
No
Check S5 power N.G Symptom?
No
Check Power logic N.G Symptom?
Ref : 3.3.1
Ref.:3.4.1
Yes
Yes
Execute S5 power N.G Debugging Ref : 3.3.2
Execute Power logic N.G Debugging Ref : 3.4.2
No
Other condition
3.2 DCBATOUT short to GND GND : 3.2.1 Symptoms: • There is no any response when the power button was pressed and adaptor was already inserted . • Adaptor Adaptor power LED flashes or shuts down . Solution: Open Solution: Open the system case and use the t he multi-meter 200V scale to check AD+ or DCBATOUT DCBATOUT between between GND as below . If the voltage is less than 5V,we can make sure it is short to GND . Adaptor in to gene rate DCBATOUT D 23 23
H ZM ZM 24 24N BZ BZ
D36 3
2
2
1 DCBATOUT
DCIN1
DUMM Y-SS Y-SSM34 M34 L2 1 AD_JK
1
2
1 2 3 4
C335 C334
U3 S S S G
D D D D
8 7 6 5
U57 SI4425DY
2 1
2
AD+ _2 SI4425DY
3
1
L3 4
R25 2 100KR3 E
1 3
1
25 AD_OFF
G 1
R344 100KR3 2
2
Q37 2N7002 S
D D D D
G S S S
4 3 2 1
R259 D02R7520F 1 2
Rating 1645_PDS
2
B
Q3 D
C28
AD +
5 6 7 8
1
C
R30 56KR3
3
2
19V 5.5
3.2.2 Debugging :
1 of 2
• There are 6 kinds of power sources in the Yuhina system, so we must check all of the power output to see if there is any short to GND. Solution: Check Solution: Check the 5V_S3,3D3V_S5,2D5V_S3,1D5V_S0,VCC_CORE and charger power one by one . 5V_S3 DCBATOUT
N-MOS FD9412
5V_S0
PWM MAX1999
P-MOS SI4425
Charger
PWM MAX1645
3D3V_S5
N-MOS FD9412
N-MOS FD9412
3D3V_LAN_S5
LDO G913C
1D5V_S5
3D3V_S3
3D3V_S0
N-MOS FD9412
VCC_CORE_S0 PWM MAX1546
2D5V_S3 PWM
BT+
P-MOS SI4425
MAX1715
N-MOS FD9412
2D5V_S0
LDO G913C
1D25V_S0 1D5V_S0
3.2.2 Debugging : (cont’d)
2 of 2
Following is an example of the 2D5V power source. 1 Use multi-meter 200 scale to check TC32. The impedance must bigger than 200 . If not, it means something short to GND, and we need to find out why. why. si de MOS (U65 & U69) and MAX1715. If it’s still 2 Usually we would remove hi & low side short to GND, it means some output devices are damaged, and we must try to
remove them one by one . PM_SLP_S3# R 24 249 1
DCBATOUT
1 0R 3 2 3
R577 0R3-0 0R3-0-U -U 1 2 R582 0R3-0 0R3-0-U -U 1 2
D10 C213
1 0 1 1 2 1 N N O O
25 26 27 24 1 2 3 8 22 7
5V_S3
1 0 4 2 2
1
M1715BST2 1
DH 1 DH 2 LX1 LX2 DL1 DL2 OUT1 OUT2
D
D
U65
D
6 18
2
1
4 3 2 1
C207
SCD1U25V3KX 2
17
M1715DH2
16
M1715LX2
19
M1715DL2
1
FB2 ILIM2
AGND PGND PGOOD
U61
MAX1715EEI-U2
. . . C . C . C . N N N 8 5 3 2 1 2
TON REF
1
2
13
M1715FB2
12
M1715ILIM2
1
C208
1
5 6 7 8 D D D D G S S S 4 3 2 1
6 M D V 2 4 3 U 1 0 C 2 T 2 T S
R592 0R3-0-U
U69 SI4892DY
2
2
R593
0 R3 R3 -0 -0 -U -U 2
14
5 9
2D5V_S3
2
L25 IND-5D6UH-6-U
2 R 55 55 5 1
C191
G S S S
FB1 ILIM1
1
SI4800
2
2
R591 0R3-0 0R3-0-U -U
SKIP# BST2
D
BAW56-1
+ C D V C D V V
BST1
5 6 7 8
2
2
D45
1
SSM24L 1
DVM
3.3 S5 Power No Good : 3.3.1 Symptoms: U31
• There is no any response when the power button was pressed and adaptor has already plugged-in. • Adaptor Adaptor power LED LED is normal .
0 2 + V
28 26 27
3.3.2 Debugging : • Open the case, use multi-meter to check if MAX1999 pin18 5V_S5 power is good. • If not, it means MAX1999 or some 5V_S5 devices are damaged. Remove all powers, use multi-meter to check MAX1999 pin18 Impedance . • If the impedance is smaller s maller than 200, it means some 5V_S5 devices are damaged, and we must try to to remove the component one by one. • If the impedance is more than 200 , it means the MAX1999 have some problem, and it must be changed.
7 1
24 22 7
3 4 6
C C V
BST3
BST5
DH3
DH5
LX3
LX5
DL3
DL5
OUT3
OUT5
FB3
FB5
ON3 ON5
PRO# NC
TON ILIM3
8 12
16 15 19 21 9
10 1
SHDN#
ILIM5 13
14
REF SKIP#
PGOOD
3 O D L 5 2
MAX1999_LDO3
5 O D L 8 1
GND
11 5 2 23
MAX1999EEI MAX1999_LDO5 = 5V_S5
30mA MAX.
3.3.2 Debugging : (cont’d) • Next we must check 3D3V_S5. If 3D3V_DC_S5 is N.G, we could use multimeter to check MAX1999 pin20 (19V), pin17, 28, 3 (5V) if powers are all good. If N.G, please check the source component. DCBATOUT
MAX1999_LD O5
MAX1999_VCC
R294 1
1 2
X K 1 6 C194 V 5 8 2 2 9 U SCD1U25V3KX 1 7 C D 4 C S
2 4D7R5
C647
8
7
6
2 1
R608
1
4
S T 1 T 1 0 C 0 3 U 0 4 2 V B M
1
N J 2 V 0 5 P 0 0 1 C S
2
R263 1
24 C627 SC47P50V2JN
22
1
R602
2
10R 10 R3
2
D41 7 1
U31
+ V
0R3-U 28
27
1 F 8 3 9 R 5 5 6 R K 6
2
C 2 0 9
0 2
26
2 6 3 2 6 C
1
1
MAX1999_BST3
3
1
S C D 1 1 C U 6 2 2 2 5 2 V 3 K X
3
5
Q22 SI4834DY
2
L21 IND-4D7UH-16 68.4R71B.101 1 2
C642
2
220KR3 2 3D3V_DC_S5
1
1
7
R590 2MR3
C C V
BST3
BST5
DH3
DH5
LX3
LX5
DL3
DL5
OUT3
OUT5
FB3
FB5
16 15 19 21 9
3D3V_S5_ON
2
3 4
MAX1999_SHDN# 6
ON3 ON5
PRO# NC
ILIM ILI M5 F 4 3 0 R 6 K 0 R 1
13
TON ILIM ILI M3
8 MAX1999_REF
10 1
SHDN#
1
2
14
REF
PGOOD
11 5 2
C236 12 SCD22U10V3KX
SKIP#
3 O D L 5 2
5 O D L 8 1
GND
23
MAX1999EEI MAX1999_LDO5 MAX1999_LDO5
3.4 Power on logic N.G :
1 of 2
3.4.1 Symptom : • If the previous two symptoms are checked ok, but the system still has no power on, then we should check the power on logic circuit as below . low. 1 When power button was pressed, PWRBTN# will be pulled low. SHUTDOWN_S5 will also be 2 After a series of logic actions, the SHUTDOWN_S5 pulled low. 5V_AUX_S5
2
R310 1
2
To MAX1999 ON3 3D3V
5V_AUX_S5
DCBATOUT
1
R471 100KR3
BL3# trigger point 11.5V R469 33KR3F 1 2 3
VCC
SHUTDOWN SHUTDOWN_S5 _S5 33
B
5V_AUX_S5
Lo
4 1
4 1
6 U50C TSAHCT14
A
5
2
7
Y
GND
NC7SZ08-U R481 10KR3
1
1
BL3# BC83 SCD1U
2
2
3
OUT VDD VSS
NC
5
2 1 7
3
CLK Q
L C GND
Hi
7
TSAHCT74 1
7
1
5 TSAHCT32
10
S1N4148-U
14 2
VCC D
5V_AUX_S5
5V_AUX_S5
8 16 PURE_HW_SHUTDOWN#
6
Hi
7
5V_AUX_S5
1
U36B
R314 AC_IN 100KR3
9 2
R P
Q
4
4 1
Hi
14,15,33,36
2
5V_AUX_S5
4
PM_SLP_S4# R313 100KR3
S-80840CNMC R468 17K4R3F
U34A 5
3
4
2 10KR3
Hi
6
D29 1
NC
4 1
Hi
U36A TSAHCT32 1
U52
U51 5
4 1
2
5V_AUX_S5
1 5V_AUX_S5
4 1
2
TSAHCT32
U50B
Power Button
R480 47KR3
TSAHCT14 2 4
U36C
1
3
R473 2
PWRBTN# PWRBTN# 25 1
11,25,35,36 7
1KR3 C521 SCD1U16V
Lo
3.4.1 Symptom :
2 of 2
• If the power on logic circuit is correct, we can track the south bridge trigger logic . 1 When the power button is pressed, PWRBTN# will be pulled low , action, the PWRBTN#_ICH PWRBTN#_ICH will will also be pulled low. 2 After the logic action, It will trigger south bridge to send PM_SLP_S4 & S3 signal S3 signal to turn 3 on S3 & S0 power . 5V_AUX_S5 1
3D3V_S5 5V_AUX_S5 1
5V_AUX_S5
R479 10KR3
ICH4M
2
Lo 2
(South bridge )
3 PM_SLP_S4 & S3
Lo
2
2
S1N4148-U
7
C512 SCD1U16V
1
2
Hi
U50A
TSAHCT14 R467 47 47KR3 KR3 1 1 2
D30 1
PWRBTN#_ICH 14
4 1
R480 47KR3
4 1
U50B TSAHCT14
PWRBTN# 25 R473
4
3 7
PWRBTN#_1
2
1
1KR3 C521 SCD1U16V
Lo
3. No Power Debug 3.4.2 Debugging : • If SHUTDOWN_S5 SHUTDOWN_S5 is is not pulled low, low, it means some logic ICs or components during this path are N.G.. If it is the case, then just follow the circuit to find out the problems, and replace them. • If the PWRBTN#_ICH PWRBTN#_ICH is is not pulled low, low, it means some logic ICs or components during this path are are N.G. If it is the case, then just follow the circuit to find out the problems, and replace them. • If the PM_SLP_S4 & S3 is S3 is not pulled hi, maybe the south bridge is damaged .
To Sum up : Above-mentioned Above-mentioned are power system system & no power power debug . All of the circuit circuit diagram diagram are references from Yuhina .
----------------
END
-------------------
Thank You ! E-mail address:
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