Motor Control for Industrial Applications Altera

Motor Control for Industrial Applications

© 2012 Altera Corporation

Introduction  Matt

Engeriser – Arrow FAE

 (763) 370-9327  [email protected]

 Michael

Parker – Altera DSP Product Planning

 (408) 544-8691  [email protected]

 Eric

Cigan – MathWorks Product Marketing

 (508) 647-7015  [email protected]

ATAC

DSP Resource

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 2

Agenda  Motor

and Controller Basics

[45 minutes]

 Motor types and operation  PID controllers

 Park, Clark transforms and FOC

 Motor

Control using FPGAs [15 minutes]  Introduction to Mathworks HDL Coder [30 minutes]  Break [15 minutes]  Motor Control using HDL Coder [30 minutes]  Introduction to DSP Builder Advanced Blockset [15minutes]  DSPBuilder Motor Control Demo [30 minutes]  Park-Clarke and PI control  Implemented in both fixed point and floating point

 Cyclone

V DSP Architecture

[15 minutes]

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 3

Motor and Controller Basics

© 2012 Altera Corporation

Magnetic Flux

N

Φ is flux, in Webers A is area in meters 2 Φ A = B is flux density in Teslas

S

Magnetic Fields exist as Lines of Force

1M 1M

Discovered in mid-1800s (Michael Farady) Nikola Tesla described Flux Density (inventor of the ACIM) © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

current

Right-hand Rule

•Current running through a wire creates a magnetic field •Interacts with other magnetic fields •Force is proportional to current flowing through wire •More Current = More Force •Reverse Current = Reverse Force © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Back-EMF Uniform Magnetic Field bo

Back EMF Voltage

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Torque Components N

Torque (Nm)

Torque Curves for Induction Motor

N

S

300 Composite Torque

Reaction Torque 150

N

S

Reluctance Torque

N

0

S

S

Fig. A 0 degree alignment

Fig. B 90 degree alignment

-150 0º

90º Rotor/Stator Magnetic Field Alignment (degrees)

•Reaction Torque created by reaction between magnets on the rotor and stator •Reluctance Torque created by magnetic field reducing it‟s reluctance (or resistance), “Switched Reluctance Motor” •Both are a function of the alignment between stator and rotor •Minimum Torque (0) at 180 degrees (see figure above) •Maximum reaction Torque at 90 degrees © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

180º

H-Bridge

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Pulse Width Modulation (PWM)

Blue Waveform – Motor Voltage Red Waveform – Filtered motor voltage

Controlling Voltage to the Motor is also known as Commutation PWM allows sine wave current profiles © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Types of Motor Feedback •Control Loops Require Feedback Information for the Motor •Can Also Detect Fault Conditions

•Current Sensors •Shunt Resistor •Current-sensing Transformer •Hall Effect Current Sensor •Speed/Position Sensors •Quadrature Encoder •Hall Effect Tachometer •Back EMF/Sensorless

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Basic Control Loop

For motors, will be typically Speed and Position Control

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

PID Control Loop

Adjustment of gain on each of the 3 legs is critical for stable performance © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

PID Controller “underdamped” P Error signal



Output

I

Σ

“just right” d dt

D

“overdamped” Proportional – Correction based on the amount of error (primary feedback) Integral – Correction based on accumulation of error (eliminate persistent error) Derivative – Correction based on rate of change of error (faster transient response) © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Legacy DC Brush Motors Stator Rotor

Mechanical Commutation (no electronic switching)

•Stator is a permanent magnet •Rotor is an electromagnet; alternating direction of current causes rotation of motor •Disadvantages •Brushes Cause Sparking (noise) •Brushes Wear Out •Torque Ripple (reduces efficiency)

•Advantages •Cheap and simple! •Very Easy to Control

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

DC Brush Motors (mechanical switching or commutating)

Torque Ripple

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Brushless DC Motors A

S

B

C

A

Current

N

B C

N C S

B Commutate Motor by switching on one set of coils at a time (not efficient)

A © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. continue and Altera marks in and outside the U.S.

Commutating a BLDC Motor A

A C

B

N

B A

A

Torque

B

B

C

S C

C

B C

A

•Trapezoidal Commutation •Need to know anglular position of rotor •90 degrees offset for max torque •Need Feedback

Current

A

B C 0°

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Brushless Permanent Magnet Motors •Variation of a BLDC •Rather than “on-off” current switching, use PWM to create sinusoidal current waveforms PMSM or PMAC Motor

•Becomes an AC Motors (driven by AC waveform, sinusoidal commutation) •Permanent Magnet Synchronous Motor (PMSM) •Also called PMAC Trapezoidal Waveforms © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

IPM Motor

Interior Permanent Magnet Motors

•Rare-Earth materiels used for rotor magnets •Generates both Reactance and Reluctance Torque •Larger Torque-per-Amp in a Smaller Package •More Torque Ripple at Low Speeds

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

AC Induction Motors (slip → torque)

• Very Common for Industrial Applications • No Permanent Magnets • Very Efficient for High Power Applications (>500HP) • Stator Magnetic Field Rotates Faster than Rotor Magnetic Field •Asynchronous Motor •Difference in Speed is called Slip • More load = more slip. Slip factor affects • Torque • Efficiency on heavy loads • Power Factor © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Field Oriented Control •Speed and Position Controlled by PI (or PID) •Torque Controlled by FOC •Under Load, Rotor Angle Lags Flux Angle •90 Degree Lag = Maximum Torque @ Current •More Current = More Torque

V (t r e a c t i o n )

Torque

2 00 V

1 50 V

1 00 V

5 0V

0 V

-5 0 V

-1 0 0 V

-1 5 0 V

-2 0 0 V 0 .0 s

-180º

0 .3 s

0 .6 s

0 .9 s

-90º

1 .2 s

1 .5 s

1 .8 s

2 .1 s

2 .4 s

2 .7 s

3 .0 s

0º 90º Rotor flux angle – stator flux angle

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3 .3 s

3 .6 s

180º

Clark Transform i t   32 ia t 

ic(t) C

ia(t) A

ib(t) B

ib t  

i t  

3 2 b

i t 

3 2 c

iβ(t)

iα(t)

forward reverse

ia t   23 i t 

ibt    13 i t   ict    13 i t  

i t 

1 b 3

i t 

1 b 3

b B

ic (implied)

ib

 ia C

© 2012 Altera Corporation

•Converts a three-phase system to a two-phase system •Results in a vector with orthogonal α and β values •Consists of 3 multiplies and one add

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A

Park Transform id  i cos d  i b sin  d i

ib

iq  i  sin  d  i b cos d

iq id

forward reverse

Converts sine waves to DC waveforms

i  id cos  d  iq sin  d ib  id sin  d  iq cos  d

Process for 3 phase motor •Sample three motor currents •Perform Forward Clark to get a and b values •Perform Forward Park to reflect them on d and q axis •Current regulation of id and iq yields two correction voltages •Perform Reverse Park and Clark to get three voltages which are applied to motor windings

B

iq

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

i b ref

is

id i ref

d

A

Park Transform Animation Notice that the X and Xb values change sinusoidally over time. However, the Xd and Xq values are DC!

Forward Park Transformation © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

ACIM FOC Control Note: Set id = 0 for PMSM

Commanded

(flux)

P +

+

id

(torque)

iq

Reverse Clark-Park Transform

P +

+

+

∫

∫

I id

Vq

+

-

+

-

I

∫

I

P

Commanded Rotor Speed +

ACIM

+

-

Commanded

Vd

iq

ia ib ic

Forward Clark-Park Transform

Phase C Current Calculation

θd id Commanded iq

Commanded

Slip

Slip Frequency + Calculator -

∫

θd Actual Rotor Speed

Control Diagram of a Variable Speed Control System Utilizing Field Oriented Control. © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

θd

Va Vb Vc

TI Dave’s Control Center

Benefits of FPGAs in Motor Control applications

© 2012 Altera Corporation

What Drives The Drives Market? 

WW Electricity consumption will rise by 76% from 2007-2030  Increased need for automation equipment



64% of electricity consumed in industry  Motors



90% of the Motor lifetime cost is in energy bills



A Drive can save up to 40% in energy consumption of a Motor

Energy Savings = Factory Profits Source: Sustainability Guide, ABB, 2009 © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 28

Fast Control Loops Improves Motor Efficiency Drive Operation: Read → Calculate → Send

t

Apply „new power value“

Implementation µC or DSP

Algorithm Control Loop

FPGA

t

Motor energy consumption

~65 µs

Medium

5 µs

Very low

Read „energy needed“ from motor

Fast Control Loop = Lower Motor Energy Consumption © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 29

Challenges for Drive Manufacturers

Performance Improvements

Differentiation While Lowering Costs



Tighter control loops





Support for Industrial Ethernet protocols

Integrate functions with less components



Leverage model-based design flow



HW/SW acceleration 

Multiple motor types; multi-axes control

Challenge Across All Types of Drives © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 30

Implementing Functional Safety 

Understanding & simplifying Functional Safety qualification



Cost overhead and time to market impact

Integrated Drive Control With The Drive-On-A-Chip Framework NIOS-II or ARM

Drive On A Chip Features

Function

FPGA Differentiator

Embedded high performance processor

Task oriented & Real-time operation asynchronously

Performance beyond MCU/DSP

Motor Control Algorithm

118 LUT4s, 121 MHz  1 stage pipeline => 175 LUT4s, 286MHz

 5 stage pipeline => 350 LUT4s, 581 MHz

Simply enter desired System Clock Frequency, No need to change model

 

+

=

50-bit adds

Timing driven synthesis produces small or fast RTL from same model © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 40

Automatically Creates HDL to Meet Fmax

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Design Behaviorally  

No need for knowledge of silicon features Multi-channel by parameterization

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Zero Latency Blocks 

Blocks are behavioural in nature  What to do, not When to do it  Focus on signal flow representation



Much easier debug and modify without pipeline

Behavioural input enables Optimizations © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 43



Math.h - SIN - COS - TAN - ASIN - ACOS - ATAN - EXP - LOG - LOG10

- LDEXP - FLOOR - CEIL - SQRT - 1/SQRT - DIVIDE

Implemented in Floating-Point © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 44

Simplifies Realization of Complex Equations 

Complicated equation example:

d = (ln(S/L) + v*v*t/2 + rt)/sqrt(v*v*t) © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 45

Simplifies Realization of Complex Equations 

Drop down blocks for operators… Floating Point !

d = (ln(S/L) + v*v*t/2 + rt)/sqrt(v*v*t) © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S. 46

Fixed and Floating Point in Same Model (single reduced precision coming in 12.1)  Complex (c) = complex data path

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DSP Builder Primitive Folding 

Folding

“Unfolded Hardware”

 Function Units are underutilized

when the sample rate is less than the clock rate  Time-division multiplexing technique 

Automatic time-sharing of hardware  Allows the user to create

simple, parameterizable primitive designs without wasting resources  DSP Builder allows for multiple channels being processed per clock cycle

A B C D

+ × Additional registers

Additional muxes A C

z-1

z-1

×

B D

z-1 “Folded Hardware”

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×

+

Obtain Accurate Device Resources 

No need for Quartus Compile to see FPGA resources

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Usability

Progress Bar

Design Checker Verification Model Wizard

Debug 

Pause

Resource Usage Memory Map

Useful for single-stepping through Simulink simulations  VCD sink © 2012 Altera Corporation  Capture data to play through ModelSim 

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Motor Control Reference Design Demo

© 2012 Altera Corporation

Design Flow  

Model based design Toolflow  MATLAB and Simulink  Simulate/Model, Add Processor/Avalon Interface, Generate VHDL  Qsys  Integrate (DSP Builder, Processor, Interfaces, Networking)  Quartus II  Compile FPGA  Software Integration  Nios II Software Build Tools (Eclipse)  Example „C‟ code  Can switch implementation between hardware/software

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DSP Builder – Model motor control loop 

Picture of FOC top level

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Looking into control algorithm - H/W & S/W partitioning

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DSP Builder – Add processor interface

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Folding Factor Advantage (Floating Point) Specification

No Folding

Folding Factor 50x

Addsub Blocks

18

1

Multiplier Blocks

13

1

Maximum Throughput

100 Msps

2 Msps

LE Usage

Multiplier Usage

Latency

2.0us 25

60

21kLE

56

50

20

40 15 10kLE

30

10 20 5

10

0

5

0 No Folding 50x Folding

2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0

No Folding 50x Folding

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1.0us

No Folding 50x Folding

Floating & Fixed Point Comparison Specification

Fixed 16-Bit

Fixed 32-Bit

Floating Point

LE Usage

2.4K

4.9K

9.7K

18-bit Multiplier Usage

1

6

5

Latency

0.92 us

0.97 us

2.03us

LE Usage 10 9 8 7 6 5 4 3 2 1 0

Multiplier Usage 10k

Latency

6

6 5

2.5 2.0us

5 2 4 5k

1.5 3 1

2

2.5k

1.0us

1

0.5

1 0 Fixed 16-Bit

Fixed 32-Bit

Floating Point

Fixed 16-Bit

Fixed 32-Bit

Floating Point

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0.9us

0 Fixed 16-Bit

Fixed Floating 32-Bit Point

Qsys Integration

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Quartus II Compile

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Software Integration Example „C‟ wrapper

Call to „C‟ wrapper or software implementation

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Drive On A Chip Framework Availability Stage1: Internal Validation

Stage2: CIV Dev System

Stage 3: CV Drive on chip

Stage 4: CV SOC Drive on Chip

Q4 2011

Q2 2012

Q4 2012

Q2 2013

Base Platform

EBV Mercury Code CIV

Terasic DE2-115

Altera CV Development Kit Board

Altera CV SOC Development Kit Board

Motor Control Daughter Card

EBV Falconeye System

Altera Motor Power Board

Altera Motor Power Board

Altera Motor Power Board

Motor Support

PMSM

PMSM

PMSM + BLDC

PMSM, BLDC, ACIM

EtherCAT Absolute Encoder

Eth/IP, EtherCAT

Eth IP, EtherCAT, Profinet

Eth IP, EtherCAT, Profinet, EPL, SERCOSIII

Completed Schedule

Connectivity © 2012 Altera Corporation

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Cyclone V DSP Variable Precision DSP Architecture

© 2012 Altera Corporation

Cyclone V Improvements 

Now includes MLAB  Small memory storage no longer requires block

memory  640 bit MLAB (10 bits by 64 deep, or 20 bits by 32 deep)



M10K DSP Block



Variable Precision DSP  Low cost FPGAs now incorporate full featured DSP

architecture © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

18x19 bit Mode +/-

18x19

X

18 bits

18 bits

Input Register

18 bits

+ _

Feedback Register

18 bits 18 - bit

+/18 bits

+ 

Output Register

18 - bit

Bias Register

18 bits

X 18x19

Second accumulator feedback register for complex filters © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

64 bits

High Precision/Floating Point Mode

27x27

Output Register

Bias Register

X

+  Feedback Register

25 bits

Input Register

27 bits

25 - bit

+/25 bits

Second accumulator feedback register for complex filters © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

64 bits

Simple Multiply Modes 108

Cyclone V Variable Precision DSP Block

9

X 18

9

9

X 37

19

X

27

18

9

9

18

9

27 18

X 18

19

74

X 37

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

X 54

Pre-Adder and Internal Coefficient Banks 108

25

18

+/-

X

18

19

18

74

Cyclone V Variable Precision DSP Block

+/-

26x22

48

25

19

18

18

X

X

+/-

18 22

C0

+ _

C1

38

X 18

+/-

X

18

19

X

+ _

18

+/-

X

+/-

26x27

38 18

19

53 25

25

27

C0

X

18

18

18x19 multiplier size allows use of 18 bit data while using preadder

X 27

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

27x27 54 27

C0

Multiply Accumulate and Add Modes Cyclone V Variable Precision DSP Block

18

18

X

18

18

64-bit Acc

+ _

64

27

37

64-bit Acc

X 54

A* B +/- C 64

27

18

X

X

18

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

36

+ _

37

Two Block Complex Mode Cyclone V Variable Precision DSP Block Cyclone V Variable Precision DSP Block

37 REAL

18

IMAG

18 REAL

REAL

X

Complex Mult

18

IMAG

18

IMAG

37

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Internal Co-efficient Register Banks 18-bits

0 1 2 3 4 5 6 7     

27-bits

OR

0 1 2 3 4 5 6 7

Dual, independent 18-bit or single 27-bit wide banks Both are eight registers deep Dynamic, independent register addressing Eases timing closure and eliminates external registers Enough coefficients for most parallel systolic multi-channel FIR filters

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Variable Precision DSP Block Biased Rounding of Accumulator Results 0

63

0

62

0

61

+ 0

MSB

• Dynamically enable RND on 64 bit Accum result

= N

N-1th bit 1

N-1

0

N-2

0

1

0

0

RND Reg

Accum Reg

LSB

64-N Result Discard lower order bits

• Add ½ of LSB to Accum, then truncate • RND reg set to ½ desired LSB at compile time

DSP Block © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

18 bit Systolic Filter Mode Cyclone V Variable Precision DSP Block 44 bits 18

+

X

18

Systolic Register

18

+

X

18

Output Register

© 2012 Altera Corporation

44 bits

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

44 bits

18 bit Systolic Filter with Pre-Adder, Coeff Cyclone V Variable Precision DSP Block 44 bits 18

18

+

X

+/18 C0

Systolic Register

C1

18 18

+/-

+

X

18

Output Register

© 2012 Altera Corporation

44 bits

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

44 bits

27 bit Systolic Filter Mode Cyclone V Variable Precision DSP Block 64 bits

27

+

X

27

Output Register

64 bits

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

64 bits

27 bit Systolic Filter with Pre-Adder, Coeff Cyclone V Variable Precision DSP Block

64 bits

C1

27 25

+/-

+

X

25

Output Register

64 bits

© 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

64 bits

Cyclone V Direct Parallel Filter Block Diagram 18 bit precision 18x19

MLAB MLAB Coeff regs

18x19

MLAB MLAB Coeff regs

DSP Block

External Adder Tree

MLAB 18x19

MLAB Coeff regs

* Use MLAB for cases where number of coefficient per multiplier > 8 © 2012 Altera Corporation ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

Cyclone V Polyphase Serial Filter 18 bit Precision 18x19

M10K

N :1 compIex input data demux

DSP Block

18x19

M10K

18x19

M10K M10K © 2012 Altera Corporation

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.

N/2 : 1 multistage adder, using complex inputs and outputs

Questions

© 2012 Altera Corporation