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10/8/2015
MADE EASY ONLINE TEST SERIES
CBT 2016 Rahul Kumar Gautam (Enroll User)
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BUY PACKAGESolution Report For Digital Electronics (Practice Test) Represent whole test solution with correct and incorrect answers.
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Which of the following statement is Incorrect for the range of n bits binary numbers a. Range of unsigned numbers is 0 to 2n – 1. b. Range of signed numbers is –2n – 1 + 1 to 2n – 1 – 1 c.
Range of signed 1’s compliment numbers is –2n – 1 + 1 to 2n – 1
d. Range of signed 2’s compliment numbers is –2n – 1 to 2n – 1 – 1
Attempt
Q.2
Correct
Correct Ans.
FAQ?
c
The minimized expression for
Have any doubt?
Solution
is
a. b. c.
d.
Attempt
Correct
Correct Ans.
FAQ?
c
Have any doubt?
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Q.3
For a two level combination of gates which of the following combination is Degenerate form a. NAND NAND b.
OR NAND
c.
NAND NOR
d. NAND AND
Attempt
Q.4
Incorrect
Your Ans.
FAQ?
b
Correct Ans.
c
Have any doubt?
Solution
Consider a system which has two eight bit inputs D1 = 01010101, D2 = 00000000, the system produces eight bit output that is bitwise XOR of the inputs. The eight bit output of the system is input to the Gray Code Converter, the decimal equivalent of the output from Gray Code Converter is a. 0 b.
127
c. 255 d. 1
Attempt
Q.5
Correct
Correct Ans.
FAQ?
b
Have any doubt?
Solution
The minimum number of 2 × 1 multiplexers required to implement a half adder circuit are [when only basic inputs are available, compliments are not available]. a. 4 b.
2
c.
3
d. 5
Attempt
Q.6
Incorrect
Your Ans.
FAQ?
b
Correct Ans.
c
Have any doubt?
Solution
The number of states to be eliminated when mod 2014 counter is designed with 11 flipflops are a. 10 b.
34
c. 44 d. 24
Attempt
Correct
Correct Ans.
b
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FAQ? Q.7
Have any doubt?
Solution
The output of a logic gate is “1” when all its inputs are at logic “0”. The gate is either a. a NAND or an EXOR gate b. a NOR or an EXOR gate c. an AND or an EXNOR gate d.
a NOR or an EXNOR gate
Attempt
Q.8
Correct
Correct Ans.
FAQ?
d
Have any doubt?
Solution
Consider the statements A. Conjunctive form of boolean expression results in a NAND NAND logic circuit B. Disjunctive form of boolean expression results in a OR AND logic circuit Choose the correct option based on the statements. (T = True, F = False)
a. a b. b c. c d.
d
Not Attempt
Q.9
Correct Ans.
d
FAQ?
Have any doubt?
Solution
A flipflop has a delay of 10 nsec from the time the clock edge applied to the time the output is obtained. There is a mod10 ripple counter that uses this type of flipflops. The maximum delay in output is a.
100 nsec
b. 10.24 μsec c.
40 nsec
d. 33.21 μsec
Attempt
Q.10
Incorrect
Your Ans.
FAQ?
a
Correct Ans.
c
Have any doubt?
Solution
Which of the following statements is/are correct about Analog to Digital converters (ADCs).
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(i) Flash type ADCs are fastest (ii) In successive approximation type ADCs conversion time depends on magnitude of analog voltage. (iii) Counter type ADCs has fixed conversion time (iv) Dualslope type ADCs are slowest a.
All of these
b. (ii) and (iii) c.
(i) and (iv)
d. (i) only
Attempt
Q.11
Incorrect
Your Ans.
FAQ?
a
Correct Ans.
c
Have any doubt?
Solution
For a 4bit digital to analog convertor, analog voltage varies from 0 to 1.5 volts. The resolution of DAC is _________ %.
Attempt
Q.12
Incorrect
Your Ans.
FAQ?
9.375
Correct Ans.
Have any doubt?
6.67 Solution
In a particular number system having base B.
The value of ‘B ’ is _____.
Attempt
Q.13
Correct
Correct Ans.
FAQ?
6
Have any doubt?
Solution
A person wants to design a 4 × 1 multiplexer using only NAND gates. If NAND gates with any number of inputs are available, then total number of NAND gates required are _____.
Attempt
Q.14
Correct
Correct Ans.
FAQ?
7
Have any doubt?
Solution
A memory system has a total of 8 memory chips, each with 12 address lines and 4 data lines. The total size of the memory system is _________ kbytes.
Attempt
Q.15
Correct
Correct Ans.
FAQ?
16
Have any doubt?
Solution
A 12bit (3 digit) DAC that uses the BCD input code, has a full scale output
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of 9.99 V. The value of Vout for an input code of 0110 1001 0101 is ________ V.
Attempt
Q.16
Correct
Correct Ans.
FAQ?
6.95
Have any doubt?
Solution
If the waveforms A, B, C shown in figure below are applied to the ExNOR gates. The frequency of output is _____ kHz.
Attempt
Q.17
Correct
Correct Ans.
FAQ?
125.00
Have any doubt?
Solution
A particular number system has 18 symbols from 0 to 9, A, B, C, D, E, F, G and T. If two numbers GATE and ECE are given to an adder then output of the adder is a. G7CA b. T76C c.
T7CA
d. G76A
Attempt
Q.18
Correct
Correct Ans.
FAQ?
c
Have any doubt?
Solution
A switching circuit is given below. Based on this circuit the Boolean expression for the bulb is ____.
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a. b.
c. d.
Attempt
Q.19
Correct
Correct Ans.
FAQ?
b
Have any doubt?
Solution
Consider the function:
Where ‘f ’ represents Boolean function and ‘d ’ represents don’t care condition. Then simplified Boolean expression ‘f ’ is reduced to _____ literals. a.
4
b. 6 c. 5 d. 7
Attempt
Q.20
Correct
Correct Ans.
FAQ?
a
Have any doubt?
Solution
Which of the following statements is/are true. (i) Race around condition occurs in dynamic triggering. (ii) Static shift registers are made up of flipflops. (iii) An 8 bit Johnson counter is mod16 counter. (iv) A masterslave flipflop can store 2 bits of information. a. (i), (ii) and (iv) b.
(i), (ii) and (iii)
c.
(ii) and (iii)
d. (i) and (ii)
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Attempt
Q.21
Incorrect
Your Ans.
FAQ?
b
Correct Ans.
c
Have any doubt?
Solution
Two Half Adders are connected in cascade as shown in figure below. The output “S” and “C” are
a. S = A ⊕ B, C = AB b. c.
S = A + B, C = 0
d. S = AB, C = 0
Attempt
Q.22
Correct
Correct Ans.
FAQ?
c
Have any doubt?
Solution
A state diagram of a logic which exhibits a delay in the output is shown in the figure, where X is the do not care condition, and Q is the output representing the state.
The logic gate represented by the state diagram is a.
XOR
b. OR c. AND d.
Attempt
Q.23
NAND
Incorrect
Your Ans.
FAQ?
a
Correct Ans.
d
Have any doubt?
Solution
Consider the logic circuit given below. The min terms in f (A,B,C,D) are _____.
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a. Σm(1, 3, 5, 6, 7, 11, 14) b. Σm(3,6, 7, 8, 10, 12, 14, 15) c.
Σm(3, 6, 7, 8, 11, 12, 14, 15)
d. Σm(3,6, 7, 9, 11, 12, 14, 15)
Attempt
Q.24
Correct
Correct Ans.
FAQ?
c
Have any doubt?
Solution
A Boolean function P (A, B, C) is represented in its pictorial form as shown below. The ORANDINVERT logic for the function P(A, B, C) is
a. b.
c.
d.
Attempt
Q.25
Correct
Correct Ans.
FAQ?
b
Have any doubt?
Solution
In the following sequential circuit, the initial state (before the first clock pulse) of the circuit is Q1 Q0 = 00. The state (Q1 Q0 ), immediately after the 333rd clock pulse is
a. 00 b.
01
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Attempt
Q.26
Correct
Correct Ans.
FAQ?
b
Have any doubt?
Solution
If the input of a DAC is changed from 0111110100 to 0111111001 then output voltage change is 25 mV. The full scale reading of DAC is a.
25.57 V
b.
5.12 V
c. 4.25 V d. 5 V
Attempt
Q.27
Incorrect
Your Ans.
FAQ?
a
Correct Ans.
b
Have any doubt?
Solution
Consider a System S as shown in the figure below
System S performs 1’s compliment of the input and then 2’s compliment to produce output. A new System H is designed in which 3 System S are cascaded
the applied input (I3 I2 I1 I0 ) is 1010, then the output (O3 O2 O1 O0 ) is _________.
Attempt
Q.28
Correct
Correct Ans.
FAQ?
1101
Have any doubt?
Solution
The ratio of maximum conversion time of 8 bit digital ramp type ADC to that of 8 bit successive approximation type is _____.
Not Attempt
Correct Ans.
31.87 (31.50 32.00)
FAQ?
Have any doubt?
Solution
Q.29 http://onlinetestseriesmadeeasy.in/madeeasy/index.php?pageName=timeManagementReport&testid=518&t=cont1&testType=2
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Consider the sequential circuit shown below. The total number of different states followed by the circuit ________.
Attempt
Q.30
Correct
Correct Ans.
FAQ?
8
Have any doubt?
Solution
Minimum number of 2 input NOR Gates required to implement the function is ______.
Attempt
Q.31
Incorrect
Your Ans.
FAQ?
2
Correct Ans.
3
Have any doubt?
Solution
The following counter has ________ number of states.
Attempt
Q.32
Incorrect
Your Ans.
FAQ?
4
Correct Ans.
3
Have any doubt?
Solution
Consider a mod1000 ripple up counter. The duty cycle for its MSB is _____%.
Attempt
Correct
Correct Ans.
FAQ?
48.80
Have any doubt?
Solution
Q.33 http://onlinetestseriesmadeeasy.in/madeeasy/index.php?pageName=timeManagementReport&testid=518&t=cont1&testType=2
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A six bit shift register is initialized to a value of 100000. Minimum number of clock pulses needed to produce 101101 from the initial value is ___________.
Attempt
Correct
Correct Ans.
FAQ?
5
Have any doubt?
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Solution
11/11
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