Lect 2 - Logic Gates

 

CHAPTER 2

Binary Logic Gates Prepared by: NSZ FSG, UiTM Pahang

 

Lesson Outline • AND Gate • OR Gate • Inverter and Buffer  • NAND • NOR Gate • Exclusive OR Gate • Exclusive NOR Gate • Practical TTL and CMOS Gates 2

 

Lesson Outcomes  At the end of this lesson, students should be able to:  

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identify performance of three basic logic gates . describe the logic operation, the truth table, timing diagram and Boolean expression for the AND,OR, NOT, NOR, XOR and XNOR gates. construct the logic circuits diagram based on the th e lo logi gic c ope operati ration on of Boo oollean ean exp express ession. ion. write the Boolean expression based on the logic gates and combinational of logic gates circuits. iden id enti tify fy the the univ univer ersa sall logic ogic gate gates. s. 3

 

Introduction Logic is applied to digital circui rcuitts used sed to implement logic function. Lo Logi gic c fu func ncti tio on is an expression represents functions of the logic gates Logi c ga gate tes s are the basic building block ock in digital systems. Logic Logi Lo gic c gates ates ope operat rate wit ith h binar inary y numb number ers s ages es us used ed with logic gates will be either H r HIGH or LOW.   All volt voltag 

These circuits will respond only to HIGH voltages (called 1s) or  LOW LO W (gro (groun und) d) volt voltag ages es (cal (calle led d 0s). 0s).

 All digital systems are constructed by using only three basic logic gate ga tes s call called ed:: AND gate OR gate NOT/IN NOT /INVER VERTER TER gate gate 4

 

Boolean Constants and an d Variables Variables Boolean

constants

and

variables

allows only two possible values— 0 and 1. Boolean variables are often used to represent the voltage level (input/output).  Logic

0 can be: false, off, low, no, open op en sw swit itch ch..  Logic 1 can be: true, on, high, yes, ye s, cl clos osed ed sw swit itch ch Boolean algebra is means for   expressing th e relationship between a logic circuits inputs and outputs.. outputs The Th e th thre ree e ba basi sic c lo logi gic c op oper erat atio ions ns:: 

AND,, and NOT NOT.. OR,, AND OR These basic operations are called logic logi c ope operat rations ions..

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Truth Table





 A truth table describes the relation relationship ship between the input and output of a logic circuit. The number of entries corresponds to the number of inputs.  A 2-input table wo would uld have 22 = 4 entries.  A 3-input table wo would uld have 23 = 8 entries.



 

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 A 4-input table wo would uld have 2 = 16 entries.

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Truth Table

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Basic Gates/Logic Gates

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AND

“all or nothing” Gate

Operation :

The output is HIGH if both input A and B are HIGH If any inputs is LOW, LOW, output is LOW

Boolean expression/logical expression :

X = A.B

The + sign doe does s not  not stand stand for ordinary multiplication—it stands for the AND operation.

 x is true (1) when A AND B are true (1)

Truth Ta Table

Gate sy symbol

Timing d diiagram

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AND Gate 

 A truth table/ circui circuitt symbol for a three input input AND gate.

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AND Gate Making an AND Gate These are ways to make an AND gate from transistor   swiitche sw tches s or di diod ode es.

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AND Gate Making an AND Gate These are ways to make an AND gate from switches

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AND Gate IC7408 AND Gates This is an example of convenient packaging of AND gates in IC form. AND gate in integrated circuit (7408 IC)

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AND Gate Boolean algebra of AND gate The formal laws of Boolean algebra for the AND function are:

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OR  

“any or all” Gate

output will HIGH if input A or B are HIGH Operation : The or B is HIGH or both are HIGH

Boolean expression/logical expression : X = A+B The + sig sign nd does oes not  not stand stand for ordinary oper erat atio ion n addition—it stands for the OR op

 x is true (1) when when A is true (1) OR B is tru true e (1) (1)

Truth Table

Gate symbol

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OR Gate • Truth table/circuit symbol for a three input OR gate.

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OR Gate Making an OR Gate These are ways to make an OR gate from transistor   swiitche sw tches s or diodes odes

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OR Gate Making an OR Gate These are ways to make an OR gate from switches

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OR Gate IC 7432 OR Gates This is an example of convenient packaging of OR gates in IC form. OR gate in integrated circ circu uit (7 (74 432 IC IC))

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OR Gate Boolean algebra of OR gate The formal laws of Boolean algebra for the OR function are:

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OR Gate Example usesystem. of an OR gate in of anthe alarm

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Buffer The buffer  is a single-input which has a gain of 1, mirrorin ing g the input at the th e ou outp tput ut..  Also known as noninverting buffer /  driver . It serves no logical purpose (it does not invert), but is used to supply greater drive current at its output than is normal for a regular gate. Since regular digital ICs have limited drive current capabilities, the noni no ninv nver erti ting ng bu bufffe fer/ r/dr driv iver er is im impo port rtan antt when interfacing ICs with other   devices such as LEDs, lamps, and others. Buffer / drivers are available in both noni no ninv nver erti ting ng an and d in inve vert rtin ing g.

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Inverter Inverter/NOT is complement or invert a digital signal. Ia a HIGH level (1) input comes in it, it will produce Operation : a LOW level (0) output or Vice versa.

Boolean expression/logical expression :

X

A

  



A

'

Read as: NOT A  A” “ X equals  X equals NOT “ X equals  X equals the inverse of A of A” “ X   X equals the complement  of A”

 A NOT circuit—commonly called an INVERTER.

Trut ruth h Table able

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Inverter The INVERTER inverts (complements complements)) input signal at all points on the waveform.

Whenever the input = 0, output = 1, and vice versa.

the

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Inverter Typica call applicati tio on of th the e NOT gate.

This circuit provides an expression that is true when the button is not pressed.

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Inverter Making a Inverter  These are ways to make an inverter from collector   resi re sist stor or,, op op-a -amp mp inve invert rtin ing g ampl amplif ifie ier  r   A transistor switch with colllect co lecto or resi resist stor or ca can n se serv rve e as an in inve vert rtin ing g bu buff ffer er..

 An op-amp inverting amplifier with a gain of   one serve as an inverting buffer.

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Inverter IC7404 Inverter  This is an example of convenient packaging of Inverter in IC form. NOT gate in integrated circuit (7404 IC)

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Inverter Boolean algebra of INVERTER gate The formal laws of Boolean algebra for the INVERTER func fu ncti tion on ar are: e:

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Example 2.1 Write the Boolean expression for the logic circuit shown and draw the truth table for the logic in Fig. 3-33.

Answer:

Ans:

Ans:

Y  ABC   ABC  ABC 29

 

NAND @ not

AND

Gate

NAND D gate gate is an in inver verted ted AND gate. The NAN •  A n i n v e r s i o n “ b u b b l e ” i s p l a c e d a t t h e o u t p u t o f t h e  A N D g a t e ,

Operation :

The output is HIGH if one or the other inputs is HIGH, HIGH, but not both

Boolean expression/logical expression :

X



A.B

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NAND Gate Making a NAND Gate These are ways to make a NAND Gate from transistor  NAND Gate from transistor 

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NAND Gate IC7400 NAND Gate This is an example of convenient packaging of NAND Gate in IC form. NAND gate in an integrated circuit (IC 7400 Quad NAND gate)

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NAND Gate Output waveform of a NAND gate for  the input waveforms shown here.

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Universalit Univer sality y of NAND Gate Gate •   The   NAND

gate   and the   NOR gate   can be said to be   universal

gates since gates  since •   combinations

of them can be used to accomplish any of the basic

operations.

It is possible, however, to implement any logic expression using only

NAND gates and no other type t ype of gate, as shown.  

NOR Gate @ inclusive inclusive NOR gate e is an inv invert erted ed OR gate. The NOR gat •  A n i n v e r s i o n “ b u b b l e ” i s p l a c e d a t t h e o u t p u t of the OR gate,

Operation :

The output is LOW when input A or B is HIGH or both are HIGH

Boolean expression/logical expression :

X   A  B

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NOR Gate Making a NOR Gate These are ways to make a NAND Gate from transistor  NOR NO R Ga Gate te fr from om tr tran ansi sist stor  or 

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NOR Gate IC7402 NOR Gate This is an example of convenient packaging of NOR Gate in IC form. NOR gate in an in inte tegr grat edND ci circ rcui uittte) (I (IC C 7402 7402 Qua uad d ated NA NAND ga gat

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NOR Gate Output waveform of a NOR gate for  the input waveforms shown here.

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NOR Gate •

The NOR gate can also be classed as a "Universal" Universal" type gate.

•

NOR gates can be used to produce any other type of logic gate function like the NAND gate 

by connecting them together in various combinations the three basic gate types of 



AND, OR and NOT function can be formed AND, using only NOR' NOR's, for example.

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Universality Univer sality of NOR Gate Gate How combinations of NANDs or NORs are used to create the three logic functions.

2  – input OR Gate

NOR gates can be arranged to implement

any of the Boolean operations, as shown.  

Example 2.2 Develop a logic circuit of NAND by using switches and lamps

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Example 2.3 Develop a logic circuit of NOR by using switches and lamps

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Summary Univer Universal sal of NAND and NOR NAND

2  – input OR Gate

2  – input AND Gate

NOR

OR

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XOR

“any but not all” Gate

The exclusive -OR gate is sometimes referred to as the “odd 

but not even gate”.

an Exclusive-OR gate ONLY goes "HIGH" when its two input terminals are at "DIFFERENT DIFFERENT"" logic levels with respect to each other and they can both be at logic level "1" or both at logic level

"0" Operation : It produces a HIGH output only when an odd number of HIGH input are present. Boolean expression/logical expression :

X  AB    B.A  A.B

Gate Ga te Sy Sym mbo boll

Truth ruth Table able

 

XOR Gate B ooleaXnOR exgate prete. s.sion, symbol, and truth table for a three input ga

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Example 2.4 Develop Boolean input XOR gate expression, logic diagram and truth table for 4

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XOR Gate Logic circuit that performs the XOR function

Ex-OR function to: we can expand the Q = (A ⊕ B) = ( A   B  ).( A.B) which means we can realize this new expression using the following individ vidual gate.

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Exclusive OR Gate with NAND

X e i7n4a8n6 in rastie ciO rcR uitga (ItC Etxecglu vd e OR)

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XNOR Gate Using NOR gate with added invert bubble on the output side. LOW,, When both inputs A and B are HIGH or LOW Operation : the output will be HIGH Boolean expression/logical expression : X  A  B    A.B  A.B

Gate Ga te Sy Symb mbol ol

Trut ruth h Table able  

XNOR Gate

Truth ruth Table able

@

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Converting gates using inverter inverters s

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Converting gates using inverter inverters s

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Evaluating Evalua ting Logic Circuit Outputs 

Rules for for evalu aluatin ting a Boo Boolean expressi ssion: 

Performs all inversions of single terms.

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Perf Pe rfor orm m al alll op oper erat atiion ons s with within in pa pare rent nthe hesi sis s

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Performs AND operation before an OR operation unle un less ss pa pare rent nthe hesi sis s in indi dica cate te othe otherw rwis ise. e.

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If an expression has a bar over it, perform operations inside the expression, and then invert the result.

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Evaluating Evalua ting Logic Circuit Outputs •

The best way to analyze a circuit made up of multiple logic gates is to use a truth table. • It allows you to analyze one gate or logic combination

at a time. • It allows you to easily double-check your work. • When you are done, you have a table of tremendous

benefi fitt in troubl ble eshoot ooting the logic circuit.

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Evaluating Evalua ting Logic Circuit Outputs • The first step after listing all input combinations is to create a column in the truth table for each intermediate signal (node).

Node u has been filled as the complement of A

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Evaluating Evalua ting Logic Circuit Outputs • The next step is to fill in the values for column v.

v = AB — Node v should be HIGH when A when  A (node u) is HIGH AND B is HIGH

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Evaluating Evalua ting Logic Circuit Outputs • The third step is to predict the values at node w  which is the logical product of BC .

This column is HIGH whenever B is HIGH AND C is HIGH

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Evaluating Evalua ting Logic Circuit Outputs • The final step is to logically combine columns v and w to predict the output x  output x .

Since x = v + w, the x output will be HIGH when v OR w is HIGH

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Evaluating Evalua ting Logic Circuit Outputs • Example.

Table of logic state at each node of the circ ci rcui uitt sh show own. n.

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Practical TTL and CMOS Logic Logic Gates • The types of logic devices are classified in “families’,

of which the most important are   T T L and  CMOS . The main famil milies are: 

TTL (Transistor-Transistor Logic), made of bipolar  transistors.



CMOS (Complementary Metal Semi Se mico cond nduc ucto tor) r) made made from from MOSF MOSFET ETs. s.



ECL (Emitter Coupled Logic) for extremely high speeds.



NMOS, PMOS for VLSI (very large scale integrated circuits).

Oxide

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TTL Logic Gates • The transistor-transistor-logic (TTL) is a class of digital circuits

builtt fr buil from om bi bip pol ola ar jun unct ctio ion n tran trans sis isto torr (B (BJT JT)) an and d re resi sist sto ors rs.. • TTL family was developed in the use of transistor switches for  logical operations and defines the values as 

0V to 0.8V = Logic 0



2V to 5V

= Logic 1

• TTL is the largest family of digital ICs, but the CMOS family is

growin gro wing g rap rapidl idly y. • They are inexpensive inexpensive,,

  and must be supplied with +5 volts. • but draw a lot of power  a Individual gates may draw 3 to 4 mA. • The low power Schottky versions of TTL chips draw only 20% of 

the power, but are more expensi siv ve.

• Part numbers for these chips have LS in the middle of them.

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CMOS Logic Gates Gates •

CMOS ~ Complementary Metal Oxide Semiconductor.

•

CMOS chips are much lower in power requirements (drawing about 1mA) and

•

CMOS operate with a wide range of supply voltages (typically 3 to 18 volts).

•

The CMOS model number will have a C in the middle ofTLit,7e .g4.,(TthTeL)7. 4C04 is the CMOS equivalent to the T 40

•  A

high drawback drawback is extreme sensitivity sensitivity to static electricity  – they must be carefully protected from static discharges.

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Component Designations •

•

•

Integrated circuits in the TTL logic family have part numbers which are four to five digit numbers. With the introduction of other types of construction of  devices, letter were added to center of the numbers to remind the user that basic TTL chips are not being used.

The device numbers begin with a prefix which tells about its series followed by another number which iden id enti tifi fies es the the indi indivi vidu dual al de devi vice ce.. •7400 the TTL designation •74C00

the CMOS equivalent

•74LS00

the low-power Schottky implementation

~END~

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