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UNIVERSIDAD NACIONAL MAYOR DE SAN MARCOS

Facultad de Ingeniería Electrónica, Eléctrica y Telecomunicaciones Laboratorio de Circuitos Digitales - Nro. 1: Informe previo

Profesor:  Alarcon

Alumno:

Gutierrez Condor, Victor Alfonso

13190267

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a)

Para el circuito que se muestra Explicar el funcionamiento del sumador/restador de 4 bits en complemento a 2 El circuito Sumador/Restador mostrado en la figura tiene una entrada adicional denominada MODO DE CONTROL (in18). Si esta entrada está en un nivel bajo (0 lógico), las cuatro puertas XOR no tienen efecto en el dato de las entradas B (el dato pasa a través de las puertas XOR y no es invertido). La entrada Cin del primer FA es mantenido en un nivel BAJO, lo cual hace que este primer FA trabaje como semisumador. Cuando la entrada de Modo de Control está en un nivel alto (1 lógico), las cuatro XOR actúan como inversores. Se invierte el sustraendo (entradas B). La entrada Cin del primer FA está en un nivel ALTO, lo que es lo mismo que sumar +1 al sustraendo en complemento a 1. La diferencia (resultado) se puede apr eciar en las salidas

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Ejemplo

-

4=0100 complemento a 2: 4=1100 3=0011 3=1101 4+3=0100+0011

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-4+3=1100+1101=11001

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-4-3=1100+1101=11001

Data sheet 74LS283:

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A. Diseñar una década sumadora expandible con exceso a tres. 0111 0111 + 0101 0101 = = 0  011 1100 00 + 1101 1101 = 1 = 11001 1001 1000 1000 + 0101 01010 0 =  0  011 1101 01 + 1101 1101 = 11010

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-Diseñar un COMPARADOR común para dos números de 4 bits bits en binario natural   =  4 3 2   y  = 4 3 2   usar un solo bloque sumador completo (FA) de 4 bits y puertas simples. 

A=B



AB

SOL: Se hallará la comparación mediante una resta en complemento a dos

B. Convertir de BCD (2-4-2-1) conocido como AIKEN a BCD natural. Usar un full Adders de 4 bits. BCD (2-4-2-1) 0 0 0

0 0 0

0 0 1

0 1 0

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BCD natural 0 0 0 0 0 0 0 0 1 1

0 0 0 0 1 1 1 1 0 0

0 0 1 1 0 0 1 1 0 0

0 1 0 1 0 1 0 1 0 1

Haremos que nuestro circuito detecte los 1 del bit más a la izquierda y actué como sumador, el circuito hace que se le sume (-6) a la entrada para que se convierta en código BCD natural. Pero si en la entrada se detecta que el bit de la izquierda es 0, entonces el número seguirá igual.

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