Lab Report 1

EEE 52 WUV

01 December 2010

Laboratory 1: Bipolar Transistor Biasing and Temperature Effects YUTOC, Katherine Ann M. 2007-01733 Institute of Electrical and Electronics Engineering, University of the Philippines, Diliman Abstract — The transistor is a very useful component in making circuits but one must know its characteristics and limitations to fully use its capabilities. And as for this laboratory experiment, we explored the different ways on how to bias a transistor taking note of all its advantages and disadvantages. First is the Fixed Bias, which is the easiest circuit to make because it has only two resistors. Observations on changing resistance values and temperature effects were recorded and analysed. The second circuit is the Collector to Base Bias, which is a more stable bias than the first. Lastly, the Voltage Divider Bias which showed the best stability in terms of beta dependence and temperature changes. I. INTRODUCTION

B

IPOLAR Junction Transistor (BJT) is an active semiconductor device formed by two P-N junctions whose function is amplification of an electric current. Bipolar transistors are made from 3 sections of semiconductor material (alternating Ptype and N-type), with 2 resulting P-N junctions. Schematically, a bipolar transistor is shown in Figure 1

Figure 1 Bipolar Junction Transistor Bipolar transistors are classified as either NPN or PNP according to the arrangement of their N-type and P-type materials. Their basic construction and chemical treatment is implied by their names. These two basic types of transistors along with their circuit symbols are shown in Figure 2

Figure 2 NPN and PNP BJT has three regions of operations, cut-off, saturation, and forward active. The first region is called cut-off. This is the case where the transistor is essentially inactive. In cut-off, the following behaviour is noted:
  0,    
  0,        0.7 In cut-off, the transistor appears as an open circuit between the collector and emitter terminals. The second region is called saturation. This is where the base current has increased well beyond the point that the emitter-base junction is forward biased. In fact, the base current has increased beyond the point where it can cause the collector current flow to increase. In saturation, the transistor appears as a near short circuit between the collector and emitter

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terminals. In saturation, the following behaviour is noted:   0.2,     
  0 
  0   0.7 The final region of operation of the BJT is the forward active region. It is in this region that the transistor can act as a fairly linear amplifier. In this region, we see that: 0.2    
  0 
  0   0.7 Thus the transistor is on and the collector to emitter voltage is somewhere between the cutoff and saturated states. In this state, the transistor is able to amplify small variations in the voltage present on the base. The output is extracted at the collector. In the forward active state, the collector current is proportional to the base current by a constant multiplier called beta, denoted by the symbol . Thus in the forward active region we will also observe that:
 

parameters over which the device operates. The bipolar transistor, for example, has a ‘normal’ operating collector voltage range bounded by saturation for low voltages and collector junction breakdown for high voltages. Similarly the collector current is bounded by dissipation considerations on the one hand and cut-off on the other hand. In order to function properly the transistor must be biased properly, i.e., the steady-state operating voltages and currents must suit the purpose involved. On the other hand, BJTs are temperature dependent wherein different parameter affects its characteristics. II. EQUIPMENT USED

1 Digital Multi-meter 1 Soldering Iron 1 DC Power supply 1 Prototyping board #22 Hook up wires Resistors

Transistors

2 2.2kΩ 1 4.7kΩ 1 10kΩ 1 33kΩ 1 47kΩ 1 220kΩ 1 470kΩ NPN-2N3904 LM35

∙
 III. DATA

The operating point of a BJT can be found graphically using the concept of a load line. A load line is the relationship between  and  that is imposed on BJT by the external circuit. For a given value of , the   characteristics curve of a BJT is the relationship between  and  as is set by BJT internals. The intersection of the load line with the BJT characteristics represents a pair of  and  values which satisfy both conditions and, therefore, is the operating point of the BJT (often called the Q point for quiescent point). In general all electronic devices are nonlinear, and device operating characteristics can vary significantly over the range of

Part A-1 Q Point Measurements: Fixed Biased Circuit

Figure 3 Fixed Biased Circuit

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Figure 3 shows the first biasing technique. After wiring up the circuit, the voltage drops across the resistors were measured. The DC gain of the transistor was calculated: 





Also, the Vcc, Vce and Vbe were measured. All acquired measurements were recorded and is presented in Table 1. Figure 4 Collector to Base Bias Circuit R1 R2 VR1 VR2

468.50 kΩ Resistor Values 2.1615 kΩ 9.279 V Voltage Drops 6.334 V Supply Voltage VCC 9.995 V Collector-Emitter Voltage VCE 3.634 V Base-Emitter Voltage VBE 0.7033 V DC Current Gain β 147.93 Table 1 Data from Part A-1 A 2.2 kΩ was placed in parallel with Rc, making the total resistance equal to 1.1kΩ. Resistances and voltages were again measured. All acquired measurements were recorded and is presented in Table 2. 468.50 kΩ 1.0842 kΩ 9.285 V Voltage Drops 3.2466 V Supply Voltage VCC 9.995 V Collector-Emitter Voltage VCE 6.740 V Base-Emitter Voltage VBE 0.6989 V DC Current Gain β 150.87 Table 2 Data from Part A-1 with 2.2kΩ Resistor Values

R1 R2 // 2.2 kΩ VR1 VR2

Part A-2 Q Point Measurements: Collector to Base Bias Circuit

Figure 4 shows the second biasing technique. Same procedure was done. All acquired measurements were recorded and is presented in Table 3. A 2.2kΩ was also placed in parallel with Rc. All acquired measurements were recorded and is presented in Table 4. R4 219.13 kΩ R3 2.1615 kΩ VR4 3.3905 V Voltage Drops VR3 5.861 V Supply Voltage VCC 9.995 V Collector-Emitter Voltage VCE 4.1276 V Base-Emitter Voltage VBE 0.6959 V Table 3 Data from Part A-2

Resistor Values

R4 219.13 kΩ R3 // 2.2 kΩ 1.0841 kΩ VR4 4.4054 V Voltage Drops VR3 4.9440 V Supply Voltage VCC 9.995 V Collector-Emitter Voltage VCE 5.680 V Base-Emitter Voltage VBE 0.7020 V Table 4 Data from Part A-2 with 2.2 kΩ

Resistor Values

Part A-3 Q Point Measurements: Voltage Divider with Emitter Resistor Bias Circuit

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VR8 1.6040 V Supply Voltage (VCC) 9.995 V Collector-emitter Voltage (VCE) 4.9413 V Base-emitter Voltage (VBE) 0.6611 V Table 6 Data from Part A-3 with new R5 Part B Temperature Effects

Figure 5 Voltage Divider with Emitter Resistor Bias Circuit Figure 5 shows the third biasing technique. Same procedure was done. All acquired measurements were recorded and is presented in Table 5. And then, R5 was replaced with 33kΩ. All acquired measurements were recorded and is presented in Table 6. R5 46.969 kΩ R6 9.821 kΩ R7 4.6817 kΩ R8 2.1615 kΩ Voltage Drops VR5 8.272 V VR6 1.7020 V VR7 2.2502V VR8 1.0513 V Supply Voltage (VCC) 9.995 V Collector-emitter Voltage (VCE) 6.6777 V Base-emitter Voltage (VBE) 0.6508 V Table 5 Data from Part A-3 Resistor Values

Resistor Values

Voltage Drops

R5 R6 R7 R8 VR5 VR6 VR7

32.820 kΩ 9.821 kΩ 4.6817 kΩ 2.1615 kΩ 7.708 V 2.2643 V 3.4294 V

Each circuit schematic in Part A was again wired up, with the LM35 temperature sensor placed side by side to allow simultaneous action between the heating up of the transistor and the heating up of the sensor. For each circuit configuration in Part A, the time it took for the circuit to go to saturation was recorded. The temperature sensor voltage was also noted, together with the other measurements for the derivation of the Q-point. The measurements obtained were collated and presented in Table 7. Biasing Fixed Bias CB Bias Divider Bias

tSAT

VOUT

VCE,SAT

4min 22s

0.85 V

0.300 V

Did not saturate within allotted time Did not saturate within allotted time Table 7 Data from Part B

IV. ANALYSIS AND DISCUSSION OF RESULTS

A. For each circuit, calculate the DC current gain, β. Enter it in a table of values, against each circuit configuration. Write the currents and voltages beside all branches and node of each circuit. Since we already have the voltage across the resistors, the DC current gain (β) of the BJT can be computed by dividing the collector current by the base current,
" 
# Currents can be computed by dividing the voltage by the corresponding resistor. For the fixed bias circuit and collector-tobase bias circuit we have,

5 $" %  " $# %# For the voltage divider with emitter resistor bias circuit, we first have to get the Thevenin equivalent of the left side of the circuit, %& #  "" %' + %& %' %& %)  %' + %& we then use these values to compute for β, $" %  " $* %* Summary of computed values for β is presented in Table 8. Second SetFirst Set-Up Up Fixed Bias 147.93 150.87 Collector-to175.25 226.84 Base Bias Voltage Divider with Emitter 2.29 2.45 Resistor Bias Table 8 Computed values for β Based on the values in the table, decreasing the resistance in the collector side increases the value of β. Fixed bias and collector-to-base bias has higher β making it more suitable for amplification purposes. However, in the set-up of the collector-to-base bias, it is seen that values have a big difference. This is due to human error, VRC has a wrong value. B. For each circuit, calculate the theoretical quiescent (Q) point (ICQ and VCEQ). For the following solutions, it is assumed that β = 100 and VBE = 0.7

Fixed Bias Circuit. In figure 1, we have two KVL loops, one in the collector side another in the base side, "" 
#+ %# + #, (1) "" 
"+ %" + ",+ (2) Manipulating (1), we can get IBQ. Then substitute it to the formula of β to get ICQ, "" − #,
#+ = = 19.7923 %#
"+ =
#+ = 1.97943 By manipulating (2) and substituting ICQ, we can get VCEQ, ",+ = "" −
"+ %" = 5.6462 Collector-to-Base Bias Circuit. In the KVL equation at the base loop, we have, ", =
# %# + #, (3) Since the circuit is in active region
" ≅
, and
, = ( + 1)
# so the KVL equation in the collector loop, ", = "" − %"
, = "" − %" ( + 1)
# (4) Substituting (3) to (4) and manipulating the equation to get IB, we have,
# %# + #, = "" − %" ( + 1)
# "" − #,
# = = 21.0323 %# + ( + 1)%"
"+ =
# = 2.10343 Substituting IB to (3) ",+ = 5.327 Voltage Divider with Emitter Resistor Bias Circuit. We first get the Thevenin equivalent of the left side of the circuit, %:; = %' ||%& = 8245.614Ω %& :; = "" = 1.754 %' + %& By KVL, :; = %:;
# +
, %, + #, Substituting
, = ( + 1)
# and manipulating the equation to get IB, we have, :; = %:;
# +
# ( + 1)%, + #, :; − #,
# = = 4.5723 %:; + ( + 1)%,

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"+ =
# = 0.45743 KVL in the collector loop, ",  "" 0 (%" + %, )
"  6.8467 C. Draw the loadline. Scale the axes properly. Indicate the cut-off and saturation values. Plot the theoretical Q-points obtained.

Figure 8 Loadline for Voltage Divider with Emitter Resistor Bias Circuit D. Temperature Effects

Figure 6 Loadline for Fixed Bias Circuit

Figure 7 Loadline for Collector-to-Base Bias Circuit

Lastly, the effects of temperature on the saturation time of the 2N3904 for each of the three above-mentioned configurations were observed. With the soldering iron heating both the transistor and the temperature sensor, a multimeter was used to constantly measure VCE until it reaches a stabilization point (no more or at least minimal fluctuation in the reading). This state was then considered as the quiescent point and thus, output voltage and VCE,SAT were noted. Due to time constraints in the laboratory session, only the fixed bias configuration was able to saturate within the allotted time. This solidifies the fact that this configuration is among the less stable biasing methods for a BJT because of its sensitivity to changes in temperature (thus having a large change in β) and thus, makes it more prone to early saturation. Stability was better for the last two configurations due to an introduction of a voltage feedback path from collector to base (collector-to-base bias) and the independency of the circuit from β (voltage divider bias). It is because of lack of proper data due to none-saturating transistors that no proper load line can be presented in this report.

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V. CONCLUSION

Among the three biasing methods presented, the voltage divider bias proved to be the recommended configuration due to its high-beta property and stability despite temperature variation. The fact that it did not saturate easily promises gradual change in currents even with temperature variation, minimal change in β, and in the process, small swing of the quiescent point. This ensures that the transistor will operate within the desired operating region. Stability-wise, the collector-to-base configuration comes in second with longer saturation time, tSAT in comparison with the fixed bias configuration. However, it has the lowest gain among the three. Finally the Fixed Bias configuration is the least stable with very low saturation time. This is because of the fact that the said configuration has no emitter resistance, which could have improved stability for the said biasing method. VI. REFERENCES

[1] R. Boylestad, L. Nashelsky, An Introduction to Electronic Devices and Circuit Theory. Upper Saddle, New Jersey: Pearson-Prentice Hall, 2006, ch.4. [2] L. Sison, Introduction to Semiconductor Devices and Circuits. UP Diliman, QC: UP Press, 2007, ch.4 [3] 2n3904 Datasheet. ON Semiconductor. Available: http://www.datasheetcatalog.org