L2 V4 06 C264 PSL & Interlock Configuration E 01

MiCOM C264 PSL & INTERLOCKINGS CONFIGURATION PACiS Technical Training Level 2 CS&P – Support Team

PCL

• Content
General Features
PSL Creation
Interlocking Equation Creation

Schneider Electric - CS&P – C264 PSL 1 Interlock Configuration – E01

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• Content
General Features
PSL Creation
Interlocking Equation Creation

Schneider Electric - CS&P – C264 PSL 1 Interlock Configuration – E01

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• Technical Data (1) 1) Number max of PSL / INTERLOCK per MiCOM C264 => 768 2) PSL Inputs : - SPS, DPS, MPS (Boolean value per status defined in profile) - MV (Thresholds, Boolean values defined in profile) - SPC, DPC (Boolean value per control defined in profile) 3) PSL Outputs : - SPS (advised, advantage => follow execution) - SET when PSL TRUE - RESET when PSL FALSE - SELF-CHECK-FAULTY when PSL INVALID - SPC, DPC (FORBIDDEN) - SET/CLOSED when PSL TRUE - RESET/OPEN when PSL FALSE - NOTHING when PSL INVALID 4) PSL Timers : - Settable timer through MiCOM S1 PACiS 5) PSL Booleans : - Settable input through MiCOM S1 PACiS Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

Limit = 50 / C264

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• Technical Data (2) 1)

2)

Since PACiS V4.6 version, it is possible to filter the transient 00 position in PSL evaluation for DPS (jammed). This allow to see in FBD the last position during jammed position. Ex: if from Open state, it goes to jammed, so Open state is considered in the FBD till Closed state appears. To configure this possibility, in the “Interlocking” tab of DPS profile, choose “Ignored” for “Motion” parameter, as follow:

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Logic Function AND

AND

TRUE

FALSE

INV

TRUE

TRUE

FALSE

INV

FALSE FALSE FALSE INV

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

INV

FALSE

FALSE INV

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• Logic Function OR

OR

TRUE

FALSE

INV

TRUE

TRUE

TRUE

TRUE

FALSE

TRUE

FALSE

INV

INV

TRUE

INV

INV

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Logic Function NOT

NOT

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

TRUE

FALSE

FALSE

TRUE

INV

INV

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• Logic Function XOR

XOR

TRUE

FALSE

INV

TRUE

FALSE

TRUE

INV

FALSE

TRUE

FALSE

INV

INV

INV

INV

INV

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Logic Function BISTABLE (RS) !

This function is working like this up to PACiS V4.5.0

Properties : - Transition detection - Q is SET when SET input goes from 0 to 1 - Q is RESET when RESET input goes from 0 to 1 - Reset has priority on Set

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Logic Function BISTABLE (RS) !

This function is working like this since PACiS V4.5.1 Properties : - State detection - Q is SET when SET input 1 - Q is RESET when RESET input 1 - Reset has priority on Set - Q-1 is the previous value or the value before C264 Init (after DB change only = 0) Set

1 0 INV

Reset

1 0

Q

1 0

INV

INV

INV

Q-1 Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Logic Function TON !

This timer cannot use value less than 50ms

Pick-up Timer

Timer stops

1

Input 0

INV

INV

INV

INV

INV

1

Output 0

INV

Output delayed

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Logic Function TOFF !

This timer cannot use value less than 50ms

Drop-off timer

Timer stops

1

Input 0

INV

INV

INV

INV

INV

INV

1

Output 0

INV

INV

Drop-off output Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Logic Function nMPS nMPS MASK is used for Fast Load Shedding. It reads an MPS status and according on boolean values of the gate will output 1 or 0 depending on MPS status Ex: if MPS state is 3, R goes to 0, and if MPS state is 8, R goes to 1 …

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Timer & Boolean Settings 1) Possibility to dynamically change TON/TOFF timer value using a settable input. 2) Possibility to create a fixed Boolean value that can be dynamically changed by setting. 3) These parameters are configured in SCE then appears in C264 setting file which can be readable using MiCOM S1 PACiS.

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Content
General Features
PSL Creation
Interlocking Equation Creation

Schneider Electric - CS&P – C264 PSL 1 Interlock Configuration – E01

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• Add / Configure a PSL (1) 1) PSL = FBD Automation can be added at Substation, Voltage Level, Bay, Module level in Electric hierarchy.

FBD Automation : browse “User Function” in “Objects Entry”

2) Define PSL Inputs and Outputs under FBD Automation and link to datapoint

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Add / Configure a PSL (2) 3) FBD with Inputs and outputs linked to datapoints : FBD Inputs : using SPS, DPS, …

FBD Output : producing SPS

Runs on PLC : for substation, voltage level PSL, define on which C264 PSL is executed

4) FBD Edition Right Click, FBD Edit

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• PSL Edition (1) 1) FBD Editor : FBD Inputs FBD Output

Logic Functions

AND OR XOR NOT RS TON TOFF nMPS Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• PSL Edition (2) 2) FBD Construction (1): 1) Select by clicking on left mouse button, 2) click again to put it on the desired place

1) Select point to link by clicking to the left mouse button, 2) Keep the left mouse pressed to link two points 3) when “white” stroke, release mouse

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• PSL Edition (3) 2) FBD Construction (2):

to create connection click on the right button and choice

to invert input click on the right button and choice “toggle negation”

“insert H/VC”

to create new input click on the right button and choice “duplicate”

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Save PSL 1) PSL Saving : Coherence check done at FBD saving

FBD Status : computed by SCE - correct = no conception error inside editor - failure / modified = conception error inside editor

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Add Timer setting 1) 2) 3)

4)

To create a settable timer value, add an FBD timer object in your automation. Set the default, min, max and step values. Set if this parameter is visible & editable or visible & not editable in MiCOM S1

Edit your FBD and link your FBD Timer to the PT input of TON/TOFF gate

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Add Boolean setting 1) 2) 3)

4)

To create a settable boolean value, add an FBD Boolean object in your automation. Set the default value, true and false labels. Set if this parameter is visible & editable or visible & not editable in MiCOM S1.

Edit your FBD and use your FBD Boolean as any FBD input.

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Modify Timer & Boolean Values 1) 2) 3)

Start MiCOM S1 PACiS and open C264 setting file from zip package generated by SCE. Start WFTPD software (ftp server) FBD Timers and FBD Boolean will appears as following :

4) 5)

You can so modify values according to SCE configuration. Send new values

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Multi-C264 automation 1) as PSL Inputs : - SPS, DPS, MPS coming from another C264 2) C264 exchanges : - GOOSE transmission

C264 executing PSL “has for IEC Server” the C264 sending information to it, with property “Goose only” (or “Data Model and Goose”) “Auto Link Client / Server” is existing since PACiS 4.7.x Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Content
General Features
PSL Creation
Interlocking Equation Creation

Schneider Electric - CS&P – C264 PSL 1 Interlock Configuration – E01

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• Add an Interlocking equation 1) Interlocks are added at SPC DPC level

2) SPC Interlocking Close Intlk SPS : typed information, result of a FBD when SET => control is allowed

Intlk viol. SPS : 3) DPC Interlocking

typed information which is SET if a control is refused due to interlock equation. This is used for some SCADA which have no possibility to know the reason of a NACK (ex: Modbus protocol).

Close / Open Intlk SPS : typed information, result of a FBD when SET => control is allowed

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Configure an Interlocking equation (1) 1) Interlocks are Mini PSL, define inputs (no output, output is the interlock SPS) and link to datapoints

Close Intlk SPS : typed information, result of a FBD

FBD Inputs : linked to datapoints

FBD Interlock : runs on PLC

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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• Configure an Interlocking equation (2) 2) Interlocks Edition : No RS, No TON, No TOFF

Schneider Electric - CS&P – C264 PSL & Interlock Configuration – E01

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