JMicron/JM20337
JM20337 Hi-Speed USB to SATA&PATA Combo Bridge Datasheet Rev. 1.1
Version 1.1 © JMicron 2003. All rights reserved.
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JMicron/JM20337
Revision History Version
Date
Revision Description
1.0
2004/10/22 Initialization of this document.
1.1
2005/03/29 1.
Correct typo
2.
Add SATA Hot-plug feature on GPIO2.
3.
Add package outline.
4.
Update electrical characteristics.
© Copyright JMicron Technology, 2003. All Rights Reserved. Printed in Taiwan 2003 JMicron and the JMicron Logo are trademarks of JMicron Technology Corporation in Taiwan and/or other countries. Other company, product and service names may be trademarks or service marks of others. All information contained in this document is subject to change without notice. The products described in this document are NOT intended for use implantation or other life supports application where malfunction may result in injury or death to persons. The information contained in this document does not affect or change JMicron’s product specification or warranties. Nothing in this document shall operate as an express or implied license or environments, and is presented as an illustration. The results obtained in other operating environments may vary. THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIEDE ON AN “AS IS” BASIS. In no event will JMicron be liable for damages arising directly or indirectly from any use of the information contained in this document. JMicron Technology Corporation 4F, No.18, Prosperity 2nd Road, Science Based Industrial Park Hsinchu, Taiwan, R.O.C For more information on JMicron products, please visit the JMicron web site at http://www.JMicron.com or send email to
[email protected]
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JMicron/JM20337
Table of Contents 1. General Description ................................................................................................................................................ 4 2. Features ................................................................................................................................................................. 4 3. Main Applications................................................................................................................................................. 5 4. Block Diagram ...................................................................................................................................................... 5 5. Package and Pin Assignments.............................................................................................................................. 6 5.1 Package Pin Out ................................................................................................................................................................. 6 5.2 Package Outline.................................................................................................................................................................. 7 5.3 Pin List Table ...................................................................................................................................................................... 8
6. Pin Descriptions....................................................................................................................................................... 9 6.1 Pin Type Definition............................................................................................................................................................. 9 6.2 Serial ATA Interface ........................................................................................................................................................... 9 6.3 USB Interface...................................................................................................................................................................... 9 6.4 Crystal Interface............................................................................................................................................................... 10 6.5 Voltage Regulator ............................................................................................................................................................. 10 6.6 Parallel ATA Interface...................................................................................................................................................... 10 6.7 Digital Power Supply and System Control Interface..................................................................................................... 10 6.8 Parallel ATA Pin Reverse Mode Order........................................................................................................................... 12
7. Electrical Characteristics ..................................................................................................................................... 13 7.1 Absolute Maximum Rating.............................................................................................................................................. 13 7.2 Recommended Power Supply Operation Conditions .................................................................................................... 13 7.3 Recommended External Clock Source Conditions........................................................................................................ 13 7.4 Power Supply DC Characteristics................................................................................................................................... 13 7.5 ATA I/O AC Characteristics ............................................................................................................................................ 13 7.6 ATA I/O DC Characteristics ............................................................................................................................................ 14
8. External Serial EEPROM Configuration ........................................................................................................... 15
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JMicron/JM20337
1. General Description The JM20337 is single chip solution to bridge between Hi-Speed USB, SATAII Gen1 and ATA/ATAPI-based mass storage device. It provides the capability to translate USB mass storage commands to serial ATA and ATA/ATAPI communication protocol. The USB adheres the Mass Storage Class Bulk-Only Transport Specification, and supports dual LUN operation, which could connect to two ATA/ATAPI devices or one ATA/ATAPI device associated with one SATA device. The embedded command parser supports both ATA and ATAPI command set with LBA48 addressing capability. This chip also supports the optional hot plug feature of SATA to USB, which reports the USB disconnection/connection event to PC host while SATA device is attached or detached. This chip is designed by 0.18um CMOS technology with 64 LQFP package.
2. Features Compliance with Gen1i of Serial ATA II Electrical Specification 1.0 Support SATA Spread-Spectrum Clock Support SATA II Asynchronous Signal Recovery (Hot Plug) feature Compliance with USB 2.0 electrical specification Support USB High-Speed and Full-Speed Operation Compliance with USB Mass Storage Class, Bulk-Only Transport Specification Support ATA/ATAPI Ultra DMA Mode 0, 1, 2, 3, 4, 5 Support ATA/ATAPI Multi-Word DMA Mode 0, 1, 2 Support ATA/ATAPI PIO Mode 0, 1, 2, 3, 4 Support ATA/ATAPI PACKET command set Support ATA/ATAPI LBA48 addressing mode Support dual LUN (Logic Unit Number) with automatically master/slave enumeration Support 12MHz external crystal Support external NVRAM for Vender Specific VID/PID of USB Device Controller Embedded 3.3V to 1.8V voltage regulator Single power 3.3V power supply 0.18um CMOS technology 64 LQFP package
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JMicron/JM20337
3. Main Applications USB to PATA Device USB to SATA Device USB to PATA & SATA Combo Devices
IDE
IDE Device
JM20337
PC
USB
SATA
SATA Device
Figure 1 USB 2.0 to SATA&PATA Combo Bridge
4. Block Diagram
Register Files
USB 2.0 PHY
USB Serial Interface Engine (SIE)
FIFO FIFO
ATA/ATAPI Controller
IDE Bus Controller
ATA/ATAPI Controller
FIFO FIFO
SATA Transport Layer
SATA Link Layer
SATA Device
SATA Physical Layer
IDE Device
USB Host
Register Files
Figure 2 Block Diagram
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JMicron/JM20337
5. Package and Pin Assignments
PINTRQ
PDA1
PDA0
PDA2
PCS0#
PCS1#
DVDDK
DGND3
PPDIAG#
PDASP#
GPIO8
TME#
GPIO0
GPIO1
GPIO2
GPIO3
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
5.1 Package Pin Out
PDMACK#
49
32
TXP
PIORDY
50
31
TXN
PDIOR#
51
30
AGND
PDIOW#
52
29
AVDDTX
PDMARQ
53
28
RXN
PDD15
54
27
RXP
PDD0
55
26
REXT
DVDD2
56
25
AGND
DGND2
57
24
AVDDH
PDD14
58
23
AVDDP
PDD1
59
22
AGNDH
PDD13
60
21
AVDDH
PDD2
61
20
DP
PDD12
62
19
DM
PDD3
63
18
XTALO
PDD11
64
17
XTALI
JM20337 11
12
13
14
15
16
GPIO7
RST#
VBUS
AVREG
AVDDH
AGNDH
7 DGND1
10
6 PDD8
PRESET#
5 PDD6
9
4 PDD9
PDD7
3 PDD5
8
2 PDD10
DVDD1
1 PDD4
(LQFP64)
Figure 3 Package Pin Assignment
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JMicron/JM20337 5.2 Package Outline D D1 33
32 17
64
E1
E
49
48
1
16 1
b b1
WITH PLATING
A1
c c1
A A2
2
L e Symbol
b
Dimension in mm
L1
3 Dimension in inch
Symbol
Dimension in mm Min
Nom
Max
Min
Nom
Max
A
---
---
1.60
---
---
0.063
E
12.00 BSC
0.472 BSC
A1
0.05
---
0.15
0.002
---
0.006
E1
10.00 BSC
0.394 BSC
A2
1.35
1.40
1.45
0.053
0.055
0.057
e
0.05 BSC
0.020 BSC
b
0.17
0.22
0.27
0.007
0.009
0.011
L
b1
0.17
0.20
0.23
0.007
0.008
0.009
L1
c
0.09
---
0.20
0.004
---
0.008
Θ
c1
0.09
---
0.16
0.004
---
0.006
Θ1
0.45
Nom
0.60
0
o
0
o
3.5
o
---
Nom
0.018
0.024
7
o
---
0
o
0
o
3.5
o
--12 TYP
o
12 TYP
12.00 BSC
0.472 BSC
Θ2
12 TYP
10.00 BSC
0.394 BSC
Θ3
12 TYP
Max
0.030
0.039 REF
o
D
Page 7
0.75
Min
1.00 REF
D1
Version 1.1 © JMicron 2003. All rights reserved.
Max
Dimension in inch
Min
7
o
---
o o
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JMicron/JM20337 5.3 Pin List Table No.
Pin Name
No.
Pin Name
No.
Pin Name
No.
Pin Name
1 2
PDD4 PDD10
17 18
XTALI XTALO
33 34
GPIO3 GPIO2
49 50
PDMACK# PIORDY
3
PDD5
19
DM
35
GPIO1
51
PDIOR#
4
PDD9
20
DP
36
GPIO0
52
PDIOW#
5
PDD6
21
AVDDH
37
TME#
53
PDMARQ
6
PDD8
22
AGNDH
38
GPIO8
54
PDD15
7
DGND1
23
AVDDP
39
PDASP#
55
PDD0
8
DVDD1
24
AVDDH
40
PPDIAG#
56
DVDD2
9
PDD7
25
AGND
41
DGND3
57
DGND2
10
PRESET#
26
REXT
42
DVDDK
58
PDD14
11
GPIO7
27
RXP
43
PCS1#
59
PDD1
12
RST#
28
RXN
44
PCS0#
60
PDD13
13
VBUS
29
AVDDTX
45
PDA2
61
PDD2
14
AVREG
30
AGND
46
PDA0
62
PDD12
15
AVDDH
31
TXN
47
PDA1
63
PDD3
16
AGNDH
32
TXP
48
PINTRQ
64
PDD11
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JMicron/JM20337
6. Pin Descriptions 6.1 Pin Type Definition Pin Type
Definition
A
Analog
D
Digital
I
Input
O
Output
IO
Bi-directional
L
Internal week pull-low (Typical 31KΩ)
H
Internal week pull-high (Typical 31KΩ)
6.2 Serial ATA Interface Signal Name
Pin No.
Type
Description
RXP
27
AI
RXN
28
AI
TXP
32
AO
TXN
31
AO
REXT
26
AI
AVDDTX
29
AI
AGND AVDDP
30 23
AI AO
AVDDH AGNDH
24 25
AI AI
Serial ATA RX+ signal. A 10nF CAP should be connected between this pin and SATA connector. Serial ATA RX- signal. A 10nF CAP should be connected between this pin and SATA connector. Serial ATA TX+ signal. A 10nF CAP should be connected between this pin and SATA connector. Serial ATA TX- signal. A 10nF CAP should be connected between this pin and SATA connector. External Reference Resistance. A 12KΩ±1% external resistor should be connected to this pin. SATA Analog 1.8V Power Supply. This power could be sourced from internal 1.8V voltage regulator through AVREG pin. SATA Analog Ground. Analog Probe Pin. This pin is an analog probe pin, and should be reserved as No Connection (NC) in normal operation. SATA Analog 3.3V Power Supply. SATA Analog Ground.
Pin No.
Type
Description
DM DP VBUS
19 20 13
AIO AIO DIL
AVDDH AGNDH
21 22
AI AI
USB Bus D- Signal. USB Bus D+ Signal. USB Cable Power Detector. The 51KΩ and 100KΩ resistances should be connected to divide the 5V cable power into 3.3V. USB Analog 3.3V Power Supply. USB Analog Ground.
6.3 USB Interface Signal Name
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JMicron/JM20337 6.4 Crystal Interface Signal Name
Pin No.
Type
XTALI
17
AI
XTALO
18
AO
Pin No.
Type
14 15 16
AO AI AI
Description Crystal Input/Oscillator Input. It is connected to a 12MHz crystal or crystal oscillator. Crystal Output. It is connected to a crystal. While crystal oscillator is applied, this pin should be reserved as No Connection (NC).
6.5 Voltage Regulator Signal Name AVREG AVDDH AGNDH
Description Voltage Regulator 1.8V Output. Voltage Regulator 3.3V Power Supply. Voltage Regulator Ground.
6.6 Parallel ATA Interface Signal Name PDD[15:0]
PCS[1:0]# PDA[2:0] PDIOR# PDIOW# PDMACK# PDMARQ PINTRQ PIORDY PPDIAG# PRESET# PDASP#
Pin No.
Type
54, 58, 60, 62, 64, 2, 4, 6, 9, 5, 3, 1, 63, 61, 59, 55 43, 44 45, 47, 46 51 52 49 53 48 50 40 10 39
DIO
DIO DIO DIO DIO DIO DIO DIO DIO DIOH DIO DIOH
Description Parallel ATA Data Bus.
Parallel ATA Chip Select. Parallel ATA Device Address. Parallel ATA IO Read/Ultra DMA Ready/Ultra DMA Data Strobe. Parallel ATA IO Write/Stop Ultra DMA Burst. Parallel ATA DMA Acknowledge. Parallel ATA DMA Request. Parallel ATA Device Interrupt. Parallel ATA IO Ready/Ultra DMA Ready/Ultra DMA Data Strobe. Parallel ATA Diagnostic Signal. Parallel ATA Hardware Reset. Parallel ATA Slave Device Present.
6.7 Digital Power Supply and System Control Interface Signal Name DVDD[2:1] DVDDK DGND[3:1] RST#
Pin No.
Type
56, 8 42 41, 57, 7 12
DI DI DI DIH
37
DI
33, 34, 35, 36
DIOH
TME#
GPIO[3:0]
Version 1.1 © JMicron 2003. All rights reserved.
Description Digital 3.3V Power Supply. Digital 1.8V Core Power. Digital Ground. System Global Reset Input. Active-low to reset the entire chip. An external 10msec RC should be connected to this pin. While chip in reset state, all the PATA bus is tri-state. Test Mode Enable. This pin is reserved for IC mass production testing. Keep this pin to logic “1” in normal operation. General Purpose IO Interface. Pin Name
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JMicron/JM20337 Signal Name GPIO[8:7]
Pin No. 38, 11
Type
Description GPIO0
GPIO1
GPIO2
GPIO3 GPIO7
GPIO8
Version 1.1 © JMicron 2003. All rights reserved.
EEPROM 9346 Data Output (DO)/SATA SSC Enable The internal controller will detect the pin status after power on. The functionality of power on initial state determines the SATA SSC functionality. 0: SSC Enable. 1: SSC Disable. After power on status detecting, this pin becomes Data Output of serial EEPROM 9346. EEPROM 9346 Data Input (DI)/PATA Order The internal controller will detect the pin status after power on. The functionality of power on initial state determines the PATA interface pin order configuration. 0: REVERSE ORDER. 1: NORMAL ORDER. After power on status detecting, this pin becomes Data Input of serial EEPROM 9346. GPIO2: EEPROM 9346 Serial Clock (SK)/SATA Hot-plug Enable The internal controller will detect the pin status after power on. The functionality of power on initial state is as below. 0: SATA Hot-plug enable. 1: SATA Hot-plug disable. After power on status detecting, this pin becomes Serial Clock of serial EEPROM 9346. EEPROM 9346 Chip Select (CS) Note that it only supports 9346 with 64x16-bit mode. GPIO 7: USB Configuration. This pin will go high after the USB Device Controller accepts the USB Standard Request SetConfiguration(Index=1), and will go low in SUSPEND state or non-configured state. 1: USB in configured state. 0: others. GPIO 8: SATA Physical Layer Ready (PHYRDY) This pin will go high while SATA Physical Layer link is ready. 1: SATA Link ready. 0: SATA Link not ready.
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JMicron/JM20337 6.8 Parallel ATA Pin Reverse Mode Order Normal Order
Reverse Order
Normal Order
Reverse Order
PDD15
PDD2
PCS0#
PDD7
PDD14
PDD1
PCS1#
PRESET#
PDD13
PDD0
PDA2
PDD8
PDD12
PDMARQ
PDA1
PDD9
PDD11
PDIOR#
PDA0
PDD6
PDD10
PDMACK#
PDMARQ
PDD12
PDD9
PDA1
PDMACK#
PDD10
PDD8
PDA2
PIORDY
PDD4
PDD7
PCS0#
PDIOR#
PDD11
PDD6
PDA0
PDIOW#
PDD3
PDD5
PINTRQ
PINTRQ
PDD5
PDD4
PIORDY
PRESET#
PCS1#
PDD3
PDIOW#
PDASP#
PDASP#
PDD2
PDD15
PPDIAG#
PPDIAG#
PDD1
PDD14
PDD0
PDD13
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JMicron/JM20337
7. Electrical Characteristics 7.1 Absolute Maximum Rating Parameter
Symbol
Condition
Min
Max
Unit
Analog power supply
AVDDH
-0.5
6
V
Digital I/O power supply
DVDD
-0.5
6
V
Digital I/O input voltage
VI(D)
-0.4
DVDD+0.4
Storage temperature
TSTORAGE
-55
85
V o
C
7.2 Recommended Power Supply Operation Conditions Parameter
Symbol
Condition
Min
Typical
Max
Unit V
Operation digital power supply
DVDD
3.0
3.3
3.6
Operation analog power supply
AVDDH
3.0
3.3
3.6
V
70
o
C
125
o
C
Ambient operation temperature
TA
Junction temperature
-10
TJ
0
7.3 Recommended External Clock Source Conditions Parameter
Symbol
Condition
Min
External reference clock
Typical
Max
12
Clock Duty Cycle
Unit MHz
45
50
55
%
Min
Typical
Max
Unit
7.4 Power Supply DC Characteristics Parameter
Symbol
Condition
Digital I/O power supply
IDVDD
10
mA
Internal voltage regulator
IAVDDH_VR
100
mA
USB Analog Power Supply
IAVDDH_USB
30
mA
SATA Analog Power Supply
IAVDDH_SATA
20
mA
7.5 ATA I/O AC Characteristics Parameter
Min
Typical
Max
Unit
Rising slew-rate
0.4
0.7
1.0
V/ns
Falling slew-rate
0.4
0.7
1.0
V/ns
27
pF
Device Capacitance
Version 1.1 © JMicron 2003. All rights reserved.
Symbol
Condition
C device
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JMicron/JM20337 7.6 ATA I/O DC Characteristics Parameter DC sink current
Symbol
Condition
IOL
Min
Typical
Max
8
Internal pull-up current
40
Unit mA
160
uA
0.8
V
Input low-voltage
VIL
Input high-voltage
VIH
2.0
5.0
V
Output low-voltage
VOL
0
0.4
V
Output high-voltage
VOH
2.6
3.6
V
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JMicron/JM20337
8. External Serial EEPROM Configuration The external EEPROM only support 9346 at 64x16 mode. The vender could store the Vender specific USB Device Descriptor, Manufacture String (Index 0x0A), and Product String (Index 0x0B) according to the below table. Address 0x00 0x08
0x10 0x18
0x20 0x28 0x30 0x38 0x40 0x48 0x50 0x58
0x60 0x68
0x70 0x78
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
USB Device Descriptor bLength bDescriptorType bcdUSB bDeviceClass bDeviceSubClass bDeviceProtocol bMaxPacketSize0 12 01 00 02 00 00 00 40 USB Device Descriptor idVender idProduct bcdDevice iManufacture iProduct user user user user user user 0A 0B USB Device Descriptor Reserved Reserved String Descriptor – Index 0x0A iSerialNumber bNumConfig bLength bDescriptorType bString[0] bString[1] 05 01 00 00 user 03 user 00 String Descriptor – Index 0x0A bString[2] bString[3] bString[4] bString[5] bString[6] bString[7] bString[8] bString[9] user 00 user 00 user 00 user 00 String Descriptor – Index 0x0A bString[10] bString[11] bString[12] bString[13] bString[14] bString[15] bString[16] bString[17] user 00 user 00 user 00 user 00 String Descriptor – Index 0x0A bString[18] bString[19] bString[20] bString[21] bString[22] bString[23] bString[24] bString[25] user 00 user 00 user 00 user 00 String Descriptor – Index 0x0A bString[26] bString[27] bString[28] bString[29] bString[30] bString[31] bString[32] bString[33] user 00 user 00 user 00 user 00 String Descriptor – Index 0x0A bString[34] bString[35] bString[36] bString[37] bString[38] bString[39] bString[40] bString[41] user 00 user 00 user 00 user 00 String Descriptor – Index 0x0B bLength bDescriptorType bString[0] bString[1] bString[2] bString[3] bString[4] bString[5] user 03 user 00 user 00 user 00 String Descriptor – Index 0x0B bString[6] bString[7] bString[8] bString[9] bString[10] bString[11] bString[12] bString[13] user 00 user 00 user 00 user 00 String Descriptor – Index 0x0B bString[14] bString[15] bString[16] bString[17] bString[18] bString[19] bString[20] bString[21] user 00 user 00 user 00 user 00 String Descriptor – Index 0x0B bString[22] bString[23] bString[24] bString[25] bString[26] bString[27] bString[28] bString[29] user 00 user 00 user 00 user 00 String Descriptor – Index 0x0B bString[30] bString[31] bString[32] bString[33] bString[34] bString[35] bString[36] bString[37] user 00 user 00 user 00 user 00 String Descriptor – Index 0x0B Reserved Reserved Reserved Reserved bString[38] bString[39] bString[40] bString[41] user 00 user 00 00 00 00 00 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved 00 00 00 00 00 00 00 00 Reserved Reserved Reserved Reserved Reserved Reserved EEPROM Identifier 00 00 00 00 00 00 ‘J’ ‘M’
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