HVDC_LCC

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A simple introduction on HVDC LCC...

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HVDC LCC Modelling DIgSILENT PowerFactory ∗

Abstract This paper discusses the modelling of HighVoltage Direct Current (HVDC) Transmission Systems, in particular line-commutated (LCC) technology, for the purpose of load flow and time-domain simulation.

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Content

This document presents a model of a HVDC system. A few simulations are performed and the results are discussed. The simulations show the steady-state effect of tap changing commutation transformers, as well as the transient response to faults in the AC network on both sides of the HVDC system.

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Model for operation

steady-state

The model is based on the IEEE benchmark model [1]. It has been constructed in DIgSILENT PowerFactory version 15.0 and is contained in the file ”HVDC Example.pfd”. The single line diagram of the system as implemented in PowerFactory is shown in Figure 1. The system has twelve-pulse thyristor converters on both the rectifier and inverter side. The 500 kV DC line has a length of 500 km and is rated at 2 kA. If the study case ”0 BaseCase” is activated and a load flow ∗ DIgSILENT

GmbH, Heinrich-Hertz-Str. 9, 72810 Gomaringen, Germany, www.digsilent.de

DIgSILENT PowerFactory, r996

calculation performed, the user may observe that approximately 1000 MW flows through the DC link. The rectifiers set the DC current to 2 kA and the inverters set the DC voltage to 99%. The converter models include commutation transformers, which provide the 30 degree phase shift in AC voltage between the upper and lower converters. The transformers include tap changers, which, initially, have fixed positions of 1.01 on the rectifier side and 0.989 on the inverter side. The resulting voltage ratio leads to a firing angle of α = 15.2◦ on the rectifier side and γ = 14.6◦ on the inverters side. The overlap angle on the inverter side is 23.6◦ . The model also includes harmonic filters. In the load-flow calculation these harmonic filters can be seen to compensate the reactive power consumption of the converters. The study case ”1 TapControl” can be activated to demonstrate the effect of automatic tap changers (installed in the commutation transformers) on the steady-state operation. The settings of the tap changers can be seen under the load flow tab of the converters’ dialogue windows. The tap positions on the rectifier side are set so that the firing angle is α = 15◦ . The tap positions on the inverter side are set so as to lead to an extinction angle of γ = 20◦ . For the purpose of testing the tap changers the initial tap positions have been set to 0.95 on all converters.

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Model for time-domain simulation

The converter model used for the EMTsimulation reproduces the transients due to the six thyristor switches and their snubber

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HVDC LCC Modelling circuits. Either a built-in firing controller or a user-defined firing controller can be used. The built-in firing controller represents EPC (equidistant firing control). The firing angle is measured relative to an internal synchronising angle ”phiref”, which varies at the rate of the frequency signal that is connected to the converter model. The frequency is measured by a phase-locked loop (PLL). The model requires the commutation reactance to be entered correctly so that the internal angle ”phiref” can be initialised correctly. When either the study case ”2. . . ” or ”3. . . ” is activated then the variations ”HVDC Control” and ”Lower SCR” are activated. The former links dynamic controllers to the converter models and the latter modifies the short-circuit levels of the external AC grid elements. The graphic ”HVDC Controls” provides an overview of the controls. It shows how the converter models are linked with the dynamic controller models, phasemeasurement devices and voltage & current measurement devices. The graphic ”Rect Controller” shows the dynamic model of the rectifier controller. Under normal conditions, this controller regulates the DC current to the reference ”Id ref”, which is calculated from the load flow solution. In the event of a severe drop in the DC voltage the current reference is reduced through the VDCOL (voltagedependent current-order limiter). The graphic ”Inv Controller” shows the dynamic model of the inverter controller. Under normal conditions the controller regulates the extinction angle γ to gamma min, which is obtained from the load flow solution. In the event of a severe reduction in DC voltage the controller can switch to currentcontrol mode. In this case the inverter regulates the DC current (to the initial current less the margin, Im).

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Fault at the inverter side

The study case ”2 Fault InverterSide” is used to study the response of the HVDC system to a three-phase short circuit in the

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AC system on the inverter side using a timedomain simulation (EMT). After running the EMT simulation the simulation plots appear in the graphics named ”§. . . ”. The inverter phase currents in the graphic ”AC Waveforms” display thyristor commutation failures (see Figure 2). The graphic ”§Rec Ctrl” shows that the VDCOL is activated during the fault due to the reduction in the DC voltage. The rectifier controller reduces the DC current and alleviates the commutation problems on the inverter side.

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Fault at the rectifier side

The study case ”3 Fault Rectifier Side” is used to study the response of the HVDC system to a three-phase short circuit in the AC system on the rectifier side. The response is studied using a time-domain simulation (EMT). After running the EMT simulation the plots appear in the graphics named ”§. . . ”. The firing angle on the rectifier side reduces to the minimum value of 5 degrees, but the rectifier controller is unable to regulate the current to its set-point. The inverter controller switches to current control mode (see Figure 3). The inverter controller has a reference current equal to 90% (the initial 100% less a 10% margin). The inverter controller prevents the HVDC system from running down. When the fault clears the rectifier controller takes over current control again. After some time the inverter controller switches back to extinction-angle control.

References [1] M. Szechtman, T. Wess, and C.V. Thio. A benchmark model for HVDC system studies. In International Conference on AC and DC Power Transmission, pages 374–378. IET, 1991.

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HVDC LCC Modelling

Figure 1: Single line diagram for the HVDC system as modelled in PowerFactory

Figure 2: Commutation failure

Figure 3: Current control at the inverter

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