Hp Compaq Presario Cq40 Amd Uma - Compal La-4111p Jbl20 - Rev 0.4
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Description
A
B
C
D
E
1
2
1
Compal confidential
2
Schematics Document Mobile AMD S1G2 CPU with ATI RS780M(NB) & SB700(SB) core logic 3
3
2008-03-07 REV:0.4
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
o m . . l c Compal Electronics, Inc. a i m t Cover Sheet o
A
B
C
D
E
Compal Confidential
Consumer AMD 14" UMA - Ripley (JBL20) Thermal Sensor ADM1032ARMZ
Accelerometer ST LIS302DLTR
1
Page 30
AMD S1G2 CPU
DDR2 800MHz 1.8V
Page 6
Fan conn
BANK 0, 1, 2, 3
1
Clock Generator SLG8SP626VTR
Page 8, 9
Dual Channel
638-PIN uFCPGA 638 Page 4
72QFN
DDR2-SO-DIMM DDR2-SO-DI MM X2
Page 15
Page 4, 5, 6, 7
Side-Port DDR2 SDRAM 256Mbits(16Mbx16) Page 12
Hyper Transport Link 16X16
USB conn x2 LVDS Panel Interface Page
ATI RS780M
17
CRT
Page 16
2
DDR2 400MHz
Page 10, 11, 12, 13, 14
HDMI
USB2.0 X12
A-Link Express II
Page 18
4X PCI-E
Azalia (HDA I/F) SATA Master-1
ATI SB700 Realtek 8102E(10/100M)
Page 27
3
CardReader Socket
Mini-Card*2 WLAN & WWAN
Page 25
SATA Slave SATA Slave
Page 26
Page 19, 20, 21, 22, 23
Page 31
daughter board 2
26
Page 31
USB WebCam Page 17
SATA Master-2
Express Card
daughter board
Mini-Card WWAN Page 14" Only USB conn x1
PCI-E BUS*5
CardReader JMicron JMB385-LGEZ0A
BT Conn
Page 31
daughter board
FingerPrinter AES1610 USBx1 page 35
daughter board
MDC V1.5
daughter board
Page 26
LPC BUS
RJ45/11 CONN
Page 34
Audio CKT
Page 25
AMP & Audio Jack
Codec_IDT9271B7
Page 27
TPA6017A2
Page 28
KBC ENE KB926
3
Page 29
SATA HDD Connector
Page 24
Page 33
Docking CONN.
4
*RJ-45(LED*2) *RJ-11(Pass Through) *CRT *COMPOSITE Video Out *S-VIDEO OUT *SPDIF *Headphone/Line Out L/R *Stereo Mic L/R *Volume Control *Consumer IR *USB x1 *DC JACK
SATA ODD Connector
LED
Page 24
Touch Pad CONN.
P41
Int.KBD
Page 34
Page 33
Multi-Bay HDD/ODD Option Connector Page 24 14" UMA PA Only
RTC CKT. Page 19
SPI SPI ROM SST25VF080B
Consumer IR Page 34
e-SATA Connector
Page 32
Page 31
Power OK CKT. P35
4
Power On/Off CKT. P35
Compal Secret Data
Security Classification
DC/DC Interface CKT.
Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
Compal Electronics, Inc. Block Diagram
A
B
Voltage Rails
O MEANS ON
C
X MEANS OFF
D
E
Symbol Note :
1
1
: means Digital Ground +5VS +3VS
: means Analog Ground
+1.5VS
power plane
+VCCP +5VALW
+1.8V
Layout Notes
L
+0.9V
Please see VGA@ as no install. No support RX780M.
+CPU_CORE
+B +3VALW
+VGA_CORE +2.5VS
State
: Question Area Mark.(Wait check)
+1.8VS +1.2VS
"*" as default BOM setting *PA@ : means install when Ripley PA. PR@ : means install when Ripley PR. RM@ : means install when Rachman. *RP@ : means install when Ripley. SIDE@ : means install when SidePort support. *CY@ : means install when Function Board-Cypress. *ENE@ : means install when Function Board-ENE. @ : means just reserve , no build 45@ : Install when 45 level Assy.
+0.9VGA
2
S0
O
O
O
O
S1
O
O
O
O
S3
O
O
O
X
S5 S4/AC
O
O
X
X
S5 S4/ Battery only
O
X
X
X
S5 S4/AC & Battery don't exist
X
X
X
X
SMBUS Control Table SOURCE
3
SMB_EC_CK1
I2C / SMBUS ADDRESSING
SMB_EC_DA1 SMB_EC_CK2
DEVICE
HEX
A DDRESS
SMB_EC_DA2
DDR SO- DIMM 0
A0
10100000
I2C_CLK
DDR SO- DIMM 1
A4
10100100
I2C_DATA
CLOCK GENERATOR (EXT.)
D2
11010010
DDC_CLK0 DDC_DATA0 DDC_CLK1
EC SM Bus1 address
EC SM Bus2 address
DDC_DATA1 SCL0
Device
HEX
Address
Device
HEX
Address
Smart Battery
16H
0001 011X b
CPU
98H
1001 100X b
SCL1
A0H
1010 000X b
ADI1032-2 CPU 9AH
1001 101X b
SDA1
24C16
SDA0
SCL2 SDA2 4
2
SCL3 SDA3
KB926
KB926 RS780M
RS780M RS780M
SB700 SB700
SB700 SB700
BATT
X V X X X X X X X X X X X X X X X X
SERIAL EEPROM
THERMAL SENSOR CPU & ADM1032
SODIMM
I / II
X V V CPU CPU X V X ADM1032 X X X X X X X
X X X X X X X
X X X
V X X X
CLK CH CHIP
X X X X X
2007/08/02
Deciphered Date
2008/08/02
MINI CARD
Slot 2
Title
X X X X X X
LCD
HDMI
G-Sensor
X X X X V X X X V X X X X X X X V X V X X X X X X X V X X X X X
Compal Secret Data
Security Classification Issued Date
INVERTER
X X
o m . . l c Compal Electronics, Inc. a i m t Notes List o
3
4
A
B
C
D
1
11,16 CRT_VSYNC
1 1K_0402_5% 1 @ 1K_0402_5%
1
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
RS780 DFT_GPIO5 mux at CRT_VSYNC pull low to 3K 2 R 101 2 R 102
E
Enables the Test Debug Bus using GPIO. 1 : Disable (RS780) Enable (RX780) 0 : Enable (RS780) Disable (RX780) PIN: RX780:NB_TV_C; RS740: RS740_DFT_GPIO5; RS780: VSYNC#
+3VS
2
2
DFT_GPIO1: LOAD_EEPROM_STRAPS 11 AUX_CAL
RS780 DFT_GPIO1
11 SUS_STAT_R#
1 @ R 104 D4 2
2 150_0402_1% @ CH751H-40PT_SOD323-2 1
PLT_RST# 11,19,25,26,27,32,33
Selects Loading of STRAPS from EPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
RX780 DFT_GPIO1 mux at GREEN(Ball E18) and change pull low form 150 to 3K.
3
3
DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb 11 RS780_DFT_GPIO_0
2 @ R 10 5
1 1 K_ 04 02 _5 %
RX780: Enables the Test Debug Bus using PCIE bus 1 : Disable ( Can still be enabled using nbcfg register access ) 0 : Enable
RS780 use HSYNC to enable SIDE PORT (internal pull high) 11,16 CRT_HSYNC
2 1 R1 07 SIDE@3 K_ 04 02 _5 % 2 R1064
1
RS740/RS780: Enables Side port memory ( RS780 use HSYNC#) 1. Disable (RS740/RS780) 0 : Enable (RS740/RS780)
+3VS
3K_0402_5%
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
Compal Electronics, Inc. RS780 STRAPS
A
B
C
D
E
CRT CONNECTOR
1
+5VS
+R_CRT_VCC D36
1 @ D35
1 @ D37
+CRT_VCC F2
2
1 @ D34
1
1
2 1
RB491D_SOT23 1A_6VDC_MINISMDC110 C475 0.1U_0402_16V4Z
+3VS
02/22 Change R214, R211, R217 from 150 ohm to 75 ohm. 02/22 Change C858, C476, C472 from 22pF to 6pF.
DAN217_SC59 2 3
1
2
DAN217_SC59 2 3 DAN217_SC59 2 3 JCRT
11
RED
11
GREEN
11
BLUE
L47 1 2 BLM15AG121SN1D_0402 L48 GREEN 1 2 BLM15AG121SN1D_0402 L49 BLUE 1 2 BLM15AG121SN1D_0402 K K K 8 8 8 V V V 1 0 1 0 1 0 1 5 5 5 % 1 _ _ _ 1 2C859 2C469 2 _C471 C858 0 0 0 2 4 4 4 R217 0 4 2 0 2 0 2 0 _ _ _ 0 _ P P P 2 5 6 6 6 2 7 RED
1 R214 2
1 % 1 _ 2 0 R211 4 0 _ 2 5 2 7
% 1 _ 2 0 4 0 _ 5 7
RED_L D_DDCDATA GREEN_L HSYNC BLUE_L
K K K 8 8 8 V V V 0 0 0 5 1 5 1 5 _ _ _ 2 C476 2 C472 2 0 0 0 4 4 4 0 0 0 _ _ _ P P P 2 6 2 6 6
+CRT_VCC
VSYNC D_DDCCLK
6 11 1 7 12 2 8 13 3 9 14 4 10 15 5
RGND ID0 Red GGND SDA Green BGND Hsync Blue +5V Vsync res SGND SCL GND
16 17
GND GND
02/25 Add C1107.
+CRT_VCC
1
2
C1107 0.1U_0603_25V7K 2
CONN@ SUYIN_070546FR015S263ZR RE D_ L
35
GREEN_L 35 BLU E_L
+3VS
35
+CRT_VCC +CRT_VCC
1
2
R237 4.7K_0402_5%
R238 4.7K_0402_5%
R100
2 2 11 UMA_CRT_DAT
11 UMA_CRT_CLK
6.8K_0402_5%
1 1
R218 6.8K_0402_5% D_DDCDATA
6
Q10A 2N7002DW-7-F_SOT363-6 5 D_DDCCLK
4 3 Q10B 2N7002DW-7-F_SOT363-6
1 @ C857
11,14 CRT_HSYNC D_DDCDATA 35
D_DDCCLK 35
1 11,14 CRT_VSYNC
@ C856
3
470P_0402_50V8J
2
2 470P_0402_50V8J
D_VSYNC 35
1 2 C473 5 1 0.1U_0402_16V4Z P # D_HSYNC R240 1 2 A E OY 4 G U14 SN74AHCT1G125GW_SOT353-5 3
1 2 5 1 @ C477 0.1U_0402_16V4Z P # D_VSYNC 2 A E OY 4 G U13 3 SN74AHCT1G125GW_SOT353-5
R241 1
D_HSYNC 35
2 0_0603_5%
HSYNC
2 0_0603_5%
VSYNC
J J 8 8 V V 1 0 1 0 5 5 _ _ 2 2 @ C474 0@ C470 0 4 4 0 2 0 2 _ _ P P 0 0 1 1
4
3
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
Compal Electronics, Inc. CRT Connector
A
B
C
+5VALW
D
1
PJP4 PAD-OPEN 2x2m
C720
1
U54
PJP6 PAD-OPEN 2x2m
2
1
VIN
2
GND
2 3
2
R891
5
VOUT
2
EN
4
BP
1
C718
1
1
R1013
@ 215K_0402_1% 2 C719
1
RT9193-39GB_SOT23-5 10U_0805_10V4Z
USB_VCCA is +3.9V, R892:100K; R891:215KKohm G916 Vref=1.25V when U54 install G916-390T1UF
+USB_CAM
+5VS
1 1
E
0.1U_0402_16V4Z
2
0_0402_5%
R892
1
L
1
C718 install when U54 is RT9193-39GB
10U_0805_10V4Z
@ 100K_0402_1%
Close to JLVDS
L
2
D22
2
@ R1014 1 2 0_0402_5%
+USB_CAM CAM_SHDN# 21
USB20_N5
4
VIN
IO1
2
3
IO2 GND
1
USB20_P5
@ PRTR5V0U2X_SOT143-4
02/26 Add PJP6 to connect to +5VS. Stuff R1013 and reserve R1014.
+LCDVDD
+5VALW
1
2
2
R225 220_0402_5%
03/06 Change R225 from 470 ohm to 220 ohm.
2
2 6
80mil
1
3 S
Q45A 2N7002DW-7-F_SOT363-6
1
1 2 100K_0402_5% 2
3
B+ 5
11 UMA_ENVDD
2
1
1
2 LVDS_A2-
C10 56
1
2 @ 10P_04 02_50 V8J
LVDS_A2+
LVDS_A1-
C10 57
1
2 @ 10P_04 02_50 V8J
LVDS_A1+
LVDS_A0-
C10 58
1
2 @ 10P_04 02_50 V8J
LVDS_A0+
3
LVDS_ACLK- C10 59
1
2 @ 10P_04 02_50 V8J
20 20
LVDS_ACLK+
+3VS
C481
1
2 680P_0402_50V7K
L44 1 2 FBMA-L11-201209-221LMA30T_0805
1 C480
USB20_P5 USB20_N5
2
R276 2.2K_0402_5%
C1108 680P_0402_50V7K
1 Q45B 4 2N7002DW-7-F_SOT363-6
80mil +LCDVDD 1
C487 4.7U_0805_10V4Z
2
C491 0.1U_0402_16V4Z
1
LVDS CONN
680P_0402_50V7K 2
D
1
C863 1000P_0402_50V7K
INVPWR_B+
680P_0402_50V7K C479
SI2301BDS-T1-E3_SOT23-3 Q43
G
2
R222 2
+LCDVDD
+3VS
R224 1M_0402_5%
02/25 Add C1108.
JLVDS
USB20_P5 USB20_N5
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 GND
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 GND
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42
LVDS_A2LVDS_A2+ LVDS_A1LVDS_A1+ LVDS_A0LVDS_A0+ LVDS_ACLKLVDS_ACLK+
LVDS_A2- 11 LVDS_A2+ 11 LVDS_A1- 11 LVDS_A1+ 11 LVDS_A0- 11 LVDS_A0+ 11 LVDS_ACLK- 11 LVDS_ACLK+ 11
DMIC_DAT DMIC_CLK
DMIC_DAT 28 DMIC_CLK 28
INV_PWM BKOFF# DAC_BRIG LCD_DDC_CLK LCD_DDC_DAT
ACES_88242-4001 CONN@
9/20 SP02000EA00/SP02000BW00
3
+5VS R491 1
2 200_0805_5% INV_PWM 11,33 BKOFF# 33 DAC_BRIG 33
+USB_CAM LCD_DDC_CLK 11 LCD_DDC_DAT 11
K K 7 1 7 1 V V 6 0 7 0 6 5 6 5 _ _ 8 2 8 2 C 0 2 C 0 2 4 4 0 0 _@ _@ P P 0 0 8 8 6 6
+3VS
K 7 V 0 1 5 _ 2 2 8 0 4 4 C 0 2 _ P 0@ 8 6
K 7 V 0 5 _ 3 2 8 0 4 4 C 0 2 _ P @ 0 8 6 1
BKOFF# 1 @ 4.7K_0402_5%
2 R483
LCD_DDC_CLK 1 4.7K_0402_5%
2 R274
LCD_DDC_DAT 1 4.7K_0402_5%
2 R275
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
o m . l c Compal Electronics, Inc. a i m LCD CONN. / WebCam t o
A
B
C
REQUIRED STRAPS
1
PULL HIGH
PCI_CLK2
PCI_CLK3
BOOTFAIL TIMER ENABLED
USE DEBUG STRAPS
D
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
PCI_CLK4
PCI_CLK5 AZ_RST_CD# LPC_CLK1
RESERVED
RESERVED
ENABLE PCI MEM BOOT
CLKGEN ENABLED
RTC_CLK LPC_CLK0 INTERNAL RTC
EC ENABLED
DEFAULT
PULL LOW
BOOTFAIL TIMER DISABLED
IGNORE DEBUG STRAPS
DISABLE PCI MEM BOOT
CLKGEN DISABLED
DEFAULT
DEFAULT
DEFAULT
DEFAULT
+3VS
1 % 5 _ 7 2 4 0 4 3 0 R _ K 2 0 1 @
2
+3VS
1 % 5 _ 8 2 4 0 4 3 0 R _ K 2 0 1 @
E
+3VS
+3VS
1 % 5 _ 9 2 4 0 4 3 0 R _ K 2 0 1 @
1 % 5 _ 0 2 5 0 4 3 0 R _ K 2 0 1 @
+3VALW
1 % 5 _ 1 2 5 0 4 3 0 R _ K 2 0 1 @
1 % 5 _ 3 2 5 0 4 3 0 R _ K 2 0 1 @
1
H,H = Reserved
EC DISABLED
L,H = LPC ROM (Default)
DEFAULT
L,L = FWH ROM
+3VALW
1 % 5 _ 2 2 5 0 4 3 0 R _ K 2 0 1 @
GP16
Internal pull up
H,L = SPI ROM
EXT. RTC (PD on X1, apply 32KHz to RTC_CLK)
+3VALW
GP17
+3VALW
1 % 5 _ 4 2 5 0 4 3 0 R _ K 2 0 1 @
+3VALW
1 % 5 _ 5 2 5 0 4 3 0 R _ K 2 0 1 @
+3VALW
1 R356 2.2K_0402_5%
2
19 PCICLK2 19 PCI_CLK3 19 PCI_CLK4 19 PCI_CLK5 19,33 CLK_PCI_EC 19 LPCCLK1 19 RTC_CLK 20,33 HDARST# 20 GPIO17 20 GPIO16
2
1 % 5 _ 2 7 0 5 4 3 0 R _ K 0 2 1
1 % 5 _ 2 8 0 5 4 3 0 R _ K 0 2 1
1 % 5 _ 2 9 0 5 4 3 0 R _ K 0 2 1 @
1 % 5 _ 2 0 0 6 4 3 0 R _ K 0 2 1 @
1 % 5 _ 2 1 0 6 4 3 0 R _ K 0 2 1
1 % 5 _ 2 2 0 6 4 3 0 R _ K 0 2 1
1 % 3 5 _ 6 2 3 0 R 4 0 _ K 2 2 . 2 @
1 % 5 _ 2 4 0 6 4 3 0 R _ K 0 2 1
1 % 5 5 _ 6 2 3 0 R 4 0 _ K 2 2 . 2
1 % 6 5 _ 6 2 3 0 R 4 0 _ K 2 2 . 2 @
DEBUG STRAPS SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
PCI_AD28 PULL HIGH
3
PULL LOW
19 19 19 19 19 19
P CI _A D2 7
P CI _A D2 6
PCI_AD25
PCI_AD24
PCI_AD23
USE LONG RESET
USE PCI PLL
USE ACPI BCLK
USE IDE PLL
USE DEFAULT PCIE STRAPS
RESERVED
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
USE SHORT RESET
BYPASS PCI PLL
BYPASS ACPI BCLK
BYPASS IDE PLL
USE EEPROM PCIE STRAPS
1 % 4 5 _ 7 2 3 0 R 4 0 _ K 2 2 . 2 @
1 % 5 5 _ 7 2 3 0 R 4 0 _ K 2 2 . 2 @
1 % 6 5 _ 7 2 3 0 R 4 0 _ K 2 2 . 2 @
3
PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
1 % 3 5 _ 7 2 3 0 R 4 0 _ K 2 2 . 2 @
1 % 7 5 _ 7 2 3 0 R 4 0 _ K 2 2 . 2 @
1 % 8 5 _ 7 2 3 0 R 4 0 _ K 2 2 . 2 @
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
o m . l c Compal Electronics, Inc. a i m t SB700 STRAPS o
A
B
C
D
E
HDD Connector +5VS
Z 4 V 1 3 0 9 1 _ 5 5 C 0 8 0 2 _ U 0 1
1
JP9
1 C594 2 0.1U_0402_16V4Z
+3VS_HDD1 @R1009 1 2 Z 0_0805_5% 4 V 1 0 2 1 1 3 _ 0 5 1 @ C1033 0 8 C 0 2 _@ 2 U 0.1U_0402_16V4Z 0 1
Z 4 V 5 6 3 1 0 _ 1 2 0 C 4 2 2 @ 0 _ U 0.1U_0402_16V4Z 1 . 0 1
1
@ C1034
Pleace near HD CONN (JP23)
SATA_TXP0 SATA_TXN0 0.01U_0402_16V7K SATA_RXN0 2 SATA_RXP0 2 0.01U_0402_16V7K
1 C592 SATA_RXN0_C 1 C596 SATA_RXP0_C
SATA_TXP0 21 SATA_TXN0 21 1
SATA_RXN0_C 21 SATA_RXP0_C 21
Near CONN side. 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
V33 V33 V33 GND GND GND V5 V5 V5 GND Reserved GND V12 V12 V12
Pleace near HD CONN (JP23) +3VS
1 2 3 4 5 6 7
GND A+ AGND BB+ GND
Z 4 V 1 1 5 6 9 1 _ 5 2 C591 C 0 4 0 2 2 _ U 0.1U_0402_16V4Z 1 . 0
+3VS_HDD1
+5VS
CONN@ SUYIN_127072FR022G523_RV
Multi-Bay Connector-option 2
2
+5VS Max 3A
Z 4 V 1 0 1 1 0 _ 6 5 C 0 8 0 2 _ U 0 1
1
Z 4 V 6 4 1 0 _ 6 2 C 0 4 0 2 2 _ 0.1U_0402_16V4Z U 1 . 0 1
C602 2 0.1U_0402_16V4Z
1
C603
+3VS_HDD2
+5VS
CONN@ JP10
Pleace near HD CONN (JP23) +3VS
3
+3VS_HDD2 @R1010 1 2 0_0805_5% Z 4 V 1 1 6 0 3 1 _ 0 5 @ C1037 1 0 C 8 0 2 2 @ _ U 0.1U_0402_16V4Z 0 1
Z 4 V 9 6 3 1 _ 0 2 @ C1038 1 0 C 4 2 2 @ 0 _ U 0.1U_0402_16V4Z 1 . 0 1
1
2 4 6 8 10 12 14 16
VCC5 VCC5 VCC5 VCC3 VCC3 VCC3 GND GND
GND TX+ TXGND RXRX+ GND GND
1 3 5 7 9 11 13 15
18
GND
GND
17
SATA_TXP1 SATA_TXN1 0.01U_0402_16V7K SATA_RXN1 2 SATA_RXP1 2 0.01U_0402_16V7K
1 C605SATA_RXN1_C 1 C606 SATA_RXP1_C
SATA_TXP1 21 SATA_TXN1 21 SATA_RXN1_C 21 SATA_RXP1_C 21
Near CONN side.
TYCO_2023087-3
02/15 Change JP10 symbol and footprint.
Pleace near HD CONN (JP23)
3
CD-ROM Connector JP11
+5VS
Placea caps. near ODD CONN.
0 .1 U C 1 _ 0 6 4 1 0 3 2 _ 1 2 6 V 4 Z
1 U _ 0 1 6 0 C 3 6 _ 1 1 4 0 2 V 4 Z
1 0 U _ 1 0 8 C 0 6 5 1 _ 5 1 2 0 V 4 Z
GND A+ AGND BB+ GND
1 2 3 4 5 6 7
DP V5 V5 MD GND GND
8 9 10 11 12 13
1
2
C616 10U_0805_10V4Z
SATA_TXP3 SATA_TXN3 0.01U_0402_16V7K SATA_RXN3 2 SATA_RXP3 2 0.01U_0402_16V7K R970 0_0402_5% 1 2
1 C612 SATA_RXN3_C 1 C611 SATA_RXP3_C
SATA_TXP3 21 SATA_TXN3 21 SATA_RXN3_C 21 SATA_RXP3_C 21
Near CONN side.
+5VS
CONN@ SUYIN_127382FR013G509ZR 4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
Compal Electronics, Inc. HDD/CDROM
A
B
C
D
E
1
1
ACCELEROMETER +3VS
+3VS_ACL
RP@ D44 2
1
RP@ R959 1
+3VS_ACL_IO 0_0603_5% 2
CH751H-40PT_SOD323-2 RP@ C1030
2
1
1 RP@ C1031
2
2
10U_0805_6.3V6M 2
0.1U_0402_16V4Z
SMB_CK_CLK0 RP@ U63
VDDIO absolute man rating is VDD+0.1 +3VS_ACL_IO
RP@ R997 0_0402_5% 1 2
1
Vdd_IO
2
GND
3
Reserved
4
+3VS_ACL
SMB_CK_CLK0 8,9,15,20
4 1
0011101b
C P S / L C S SDA / SDI / SDO
13
SMB_CK_DAT0
SDO
12
Reserved
11
RP@ R998 0_0402_5% 1 2
SMB_CK_DAT0 8,9,15,20
10
GND
GND
5
GND
INT 2
9
HDD_HALTLED 34
6
Vdd
INT 1
8
ACCEL_INT 19
S C LIS302DLTR_LGA14_3x5 7
3
3
RP@ 2 R 99 9
L
1 1 0K _0 40 2_ 5%
Must be placed in the center of the system.
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
Compal Electronics, Inc. Accelerometer
A
B
Left side
Right side USB 0&1 Board Conn +USB_VCCA
+USB_VCCA
U40
C788
1 2 3 4
1
E
USB20_N2_R
GND IN IN EN#
8 7 6 5
OUT OUT OUT OC#
TPS2061IDGN_MSOP8~N 2
W=100mils M 1 V 3 9 . + 8 6 7 _ C D _ U 0 2 5 1
Z 4 V 6 0 1 1 9 _ 7 2 C 0 4 0 2 _ U 1 . 0
K 7 V 0 1 1 5 9 _ 2 7 0 C 4 0 2 _ P 0 0 0 1
USB_EN#
Z 4 V 6 1 1 2 _ +USB_VCCA 1 1 2 0 C 4 SATA_TXN2 0 2 _ U 1 . 0
4 3
+USB_VCCA
IO1
2
IO2 GND
1
VIN
USB20_P2_R 20
@ PRTR5V0U2X_SOT143-4
L51 4 4
USB20_N2
20
1
USB20_P2
D12
1
JP47
Max 0.5A
D11
Max 2.5A
1
D
USB CONNECTOR
+5VALW
4.7U_0805_10V4Z
C
3
1
1 2 3 4
USB20_N2_R USB20_P2_R
2
2
WCM-2012-900T_4P
4
VIN
IO1
2
3
IO2 GND
1
SATA_TXP2
@ PRTR5V0U2X_SOT143-4
21 21
SATA_TXP2 SATA_TXN2
SATA_TXP2 SATA_TXN2 C7 92 C7 93
21 SATA_RXN2_C 21 SATA_RXP2_C
1 1
+5VALW
JESAT 3
2 1 00 0P _0 40 2_ 50 V7 KSATA_RXN2 2 1 00 0P _0 40 2_ 50 V7 KSATA_RXP2
03/03 Add C1121. 03/06 Change C792 and C793 from 0.01uF to 1000pF.
VBUS DD+ GND
USB
33 20 20
5 6 7 8 9 10 11
GND A+ ESATA AGND BB+ GND
12 13 14 15
GND GND GND GND
USB_EN# USB20_N0 USB20_P0
20 20
USB_EN#
USB20_N1 USB20_P1
1 2 3 4 5 6 7 8 9 10
1 2 3 4 5 6 7 8 9 10
1
+5VALW 1
2
C1109 820P_0402_25V7K
11 12
GND1 GND2 ACES_87213-1000G
9/20 SP02000DX00 CONN@
CONN@ TYCO_1759576-1
02/25 Add C1109.
2
2
BT Connector
Finger printer
02/15 Change JP32 footprint and reverse pin define.
CONN@ JP32
+3VALW
Q31
+3VS
@ SI2301BDS-T1-E3_SOT23-3
S
D
3
+3VS_FB
1 1
G
USB_EN#
20 20
2 2
D21 +3VS_FB USB20_N7
R581 1 2 0_0603_5%
C832 0.1U_0402_16V4Z
USB20_N7 USB20_P7
USB20_N7 USB20_P7
4
VIN
IO1
2
3
IO2 GND
1
USB20_P7
@ PRTR5V0U2X_SOT143-4
GND2 GND1 8 7 6 5 4 3 2 1
JP39 1 2 3 4 5 6 7 8
10 9 8 7 6 5 4 3 2 1
+3VAUX_BT USB20_P6 USB20_N6 @ R517 1 @ R518 1
D16
ACES 87213-0800G
1 2 3 4 5 6 GND GND
USB20_P6 20 USB20_N6 20 BT_LED 34 CH_DATA 26 C H_CLK 26
1K_0402_5% 1K_0402_5%
2 2
+3VAUX_BT USB20_N6
9/20 SP02000HC00/SP02000HB00
4
VIN
IO1
2
3
IO2 GND
1
USB20_P6
@ PRTR5V0U2X_SOT143-4 +3VS Q24
ACES_85201-06051 CONN@
S
D
3
9/20 SP01000B000
02/15 Change from +3VALW to +3VS 3
1 1
2
+3VAUX_BT SI2301BDS-T1-E3_SOT23-3 0.1U_0402_16V4Z
1
G
2
C798
R519
1U_0603_10V4Z
100K_0402_5%
1
C799
2
2
1
C800
2
0.01U_0402_16V7K
1
3
C801
2 4.7U_0805_10V4Z
R520 21
BT_OFF
1 2 10K_0402_5%
1 C802
2 0.1U_0402_16V4Z
Check BT power consumption < 1A
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
o m . l c Compal Electronics, Inc. a i m USB, BT, eSATA,FPR t o
A
B
C
D
E
+3VL
SPI Flash (8Mb*1)1 1 @ R 99 5 +3VALW 1 R 99 6 1
2 0 _0 40 2_ 5% 1 C803
6,33,34,37 SMB_EC_CK1 6,33,34,37 SMB_EC_DA1
U29 8
0.1U_0402_16V4Z
2 0 _0 40 2_ 5%
0.1U_0402_16V4Z
20mils
C484
+3VAL
+3VL
2
33
R521 100K_0402_5% U31 8 7 6 5
33
2
VCC WP SCL SDA
A0 A1 A2 GND
1 2 3 4
SPI_CS# SPI_CLK
33 EC_SO_SPI_SI
SPI_CS#
INT_SPI_CS# 2 0 _0 40 2_ 5% SPI_CLK_R 2 0 _0 40 2_ 5% 1 EC_SO_SPI_SI_R 0 _0 40 2_ 5%
1 R 22 1 1 R 22 7 2 R 22 9
VSS
4
W
7
1
2
VCC
3
HOLD
1
S
6
C
5
D
1
Q
2
EC_SI_SPI_SO_R
2 R 22 3
1 0 _0 40 2_ 5%
EC_SI_SPI_SO 33
MX25L8005M2C-15G_SOP 8P
L Need add back R221 if no ext BIOS design U30 install.
@ AT24C16AN-10SI-2.7_SO8
1 R526 100K_0402_5%
2
2
2
02/18 Remove U30, C489, R226 and R228. Stuff R221.
+3VS 1
LPC Debug Port
LPC Debug Port
3
2
C1118 820P_0402_25V7K
+3VS
3
JP41 H31
+3VALW
19,33
SIRQ
19,33
LPC_AD3
19,33
LPC_AD1
19,33 LPC_FRAME#
6
5
LPC_DRQ#
SIRQ
7
4
PLT_RST#
LPC_AD3
8
3
LPC_AD2
LPC_AD1
9
2
LPC_AD0
LPC_FRAME#
10
1
CLK_PCI_SIO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
LPC_DRQ# 19 PLT_RST# 11,14,19,25,26,27,33 LPC_AD2 19,33 LPC_AD0 19,33 CLK_PCI_SIO 19
2 @ DEBUG_PAD
9/20 ??????
@ R232 22_0402_5%
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
02/26 Add 1118. CLK_14M_SIO CLK_14M_SIO LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ# PLT_RST# R137 1 CLK_PCI_SIO2 SIRQ
CLK_14M_SIO 15
1 @ R310 100_0402_5%
2 1
2 @ 0_0402_5% CLK_PCI_SIO 2 19
2
@ C502 100P_0402_25V8K
@ ACES_85201-2005
1 2
1
9/20 DC233105000 @ C486 22P_0402_50V8J
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
Compal Electronics, Inc. BIOS ROM/Debug Tool
A
B
C
D
E
BATT1
45@ CR2032
RTC BATTERY
+3VALW
1
1
PQ3 TP0610K-T1-E3_SOT23-3
3
BATT % 1 1 _ 2 0 1 4 R 0 P _ K 0 4 2 3
AC_LED# 33
2
1
ADP_ID 33
PR9 100K_0402_5%
1 2
2
PR8 100_0402_5%
1
ADP_SIGNAL 5 4 3 2 1
5 4 3 2 1
2
2
J 8 V 0 5 _ 1 2 0 4 0 _ 2 2 P 0 C 0 @PJSOT24C_SOT23-3 P 1 1 3
J 8 1 V 0 4 5 _ C 2 PC3 P 0 2 4 2 1000P_0402_50V7K 0 _ P 0 0 1 1
VMB
8 7 6 5 4 3 2 1 9 10
+DOCKVIN
EC_SMD EC_SMC
8 3
PJP2 8 7 6 5 4 3 2 1 GND GND
VIN
RLZ3.6B_LL34
PL1 SMB3025500YA_2P 1 2
2 PD1
K 7 V 1 4 0 1 5 _ C 2 0 2 P 4 0 _ P 0 2 8
@1000P_0402_50V7K
2
K 7 V 5 2 _ 1 2 1 0 C 4 P 0 _ U 2 1 0 . 0
% 1 1 _ 2 0 4 4 R 0 P _ K 9 9 2 4
1 2 PR3 10K_0402_5%
ADPIN
PJP1
2
1
PD4 PR2 10K_0402_5%
PC15 0.1U_0402_16V7K 2 1 1
ACES_88334-057N
PC12
1
+5VALW
PD2 @SM05_SOT23 3
1
1
PL2 SMB3025500YA_2P 2 1
K 7 V 0 1 5 5 C _ P 2 0 4 0 2 _ P 0 0 0 1
K 7 V 0 1 3 5 1 _ C 2 P 0 4 0 2 _ P 0 9 3
K 7 1 V 0 7 5 C _ P 2 0 2 4 0 _ P 0 0 2 2
2
2PC8 1000P_0402_50V7K
+ P 0
PR5 10K_0402_5% 2 1
1
BATT_OVP 33
- G
PU1A LM358ADT_SO8
4
2
PH1 under CPU botten side : CPU thermal protection at 90 +-3 degree C Recovery at 47 +-3 degree C
PL3 HCB2012KF-121T50_0805 1 2
1 2 PL4 HCB2012KF-121T50_0805
% 1 1 _ 2 0 6 4 R 0 P _ K 5 0 2 1
K 7 1 V 5 2 6 _ C 2 P 2 0 4 0 _ U 1 0 . 0
2
BATT
1 2PC9 0.01U_0402_50V4Z
3 2
SUYIN_200275MR008GXOLZR
PR7 47K_0402_1% 1 2
+5VS
3
CPU
1
3
1 PR14 100_0402_5% 2
PR13 100_0402_5% 2
1 PD3 @SM24.TC_SOT23-3
PH1 SMB_EC_DA1 SMB_EC_CK1
BAT_ID
1
10KB_0603_1%_TH11-3H103FT
SMB_EC_DA1 6,32,33,34
2
+5VALW
1
+3VL
1 2 PR11 150K_0402_1%
PR12 2.55K_0402_1%
PC10 0.22U_0603_10V7K 2
1
2 PR17 1K_0402_5%
2
8 5
38
1 PR16 6.49K_0402_1% 1 2
ENTRIP1 39
PR10 15K_0402_1% 1 2
SMB_EC_CK1 6,32,33,34
6
1
1D
+ P
0 7 - G PU1B LM358ADT_SO8 4
PQ1 @SSM3K7002FU_SC70-3
2 G
3S
1 PR15 150K_0402_1% 2
PC11 2 1000P_0402_50V7K
EN0
6,39
1D BATT_TEMP 33
PQ2 SSM3K7002FU_SC70-3
2 G
3S
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
o m . l c Compal Electronics, Inc. a i m DC Connector/CPU_OTP t o
A
B
C
D
E
2VREF_51125
1
1
1
PC302 0.22U_0603_10V7K 2
PR301 13.7K_0402_1% 1
B++
B+ PL301 HCB2012KF-121T50_0805 1
K 7 K V 7 1 0 1 V 1 2 5 _ 0 3 2 2 5 2 _ C 0 3 2 P 4 0 2 C 0 2 _ P 4 0 P _ 0 0 P 2 0 2 9 3
2
1
PR302 30.9K_0402_1% 2
PR303 20K_0402_1% 1 2
1
PR304 20K_0402_1% 2
+3VLP
2
K 4 V 6 5 1 1 2 _ 3 2 C 0 P 4 2 0 _ U 1 . 0 @
K 7 V 1 1 0 0 5 _ 3 2 C 0 2 P 4 0 _ P 0 0 2 2
PQ301 1 2 3 4
D1 D1 G2 S2
1G 1S/2D 1S/2D 1S/2D
1 PC306 U 10U_0805_6.3V6M G 2 1 _ 3 V
25 7
PR309 0_0402_5% 1 2
PL302 4.7UH_SIQB74B-4R7PF_4A_20% 2 1
VREG3
1
1
PC309
+
1 2 1 2 0_0402_5% PC307 0.1U_0402_10V7K LX_3V
9 10
BST_3V UG_3V
LG_3V
1
PC320
K 4 V 5 1 7 2 1 _ 3 2 C 0 P 4 2 0 _ U 1 . 0
VBST2
VBST1
22
DRVH2
DRVH1
21
11
LL2
12
DRVL2
6,37
EN0
LL1
20
VL
6 5
7 8 PQ302 AO4466_SO8
PR308 PC308 2.2_0402_5% 0.1U_0402_10V7K BST_5V 1 PR310 2 1 2 0_0402_5% UG_5V 1 2
2
3 2 1 PL303 4.7UH_PCMC063T-4R7MN_5.5A_20% 1 2
LX_5V
1
2
K K 6 6 V 1 V 1 5 5 3 5 0 2 1 2 3 _ 3 _ 5 5 C 0 C 0 8 2 P 8 2 P 0 0 _ _ U U 7 7 . . 4 4 4
LG_5V DRVL1 19 L E 5 S G K +3VL 0 P E L I D N K N N I R C E S G V V V 3 4 5 6 7 8 PU301 1 1 1 1 1 1 TPS51125RGER_QFN24_4X4 1
PR311 @620K_0402_5%
K 7 V 0 1 4 5 0 _ 3 2 C 0 P 4 0 2 _ P 0 0 2 2
24 23
PR315 @4.7_1206_5%
PC314 @680P_0603_50V8J 2
@
PGOOD
2 1
M V 2 3 . 6 _ D _ U 0 5 1
PR306 133K_0402_1% 2
2 2 L F 1 1 P B E E B P I F S R F I P PAD R V N V V R T T O N N T E E VO2 VO1
8
PR307
+3VALWP
1 P I R T N E 1
6 5 4 3 2 1
8 7 6 5
SP8K10S-FD5_SO8
2
@22U_0805_6.3V6M 2
2 P I R T N 2 E
PR305 140K_0402_1% 1
K 6 V 3 5 0 2 3 _ 5 2 C 0 P 8 0 _ U 7 . 4 1
B++
6 5
+5VALWP
7 8 1 1 PR316 4.7_1206_5%
4
1 +
2 1
PR317 100K_0402_5%
PC319 @22U_0805_6.3V6M 2 PC310 150U_D_6.3VM
2
PC315 680P_0603_50V8J 2 PQ304 FDS6690AS_NL_SO8
3 2 1 2 3/5V_OK 20,41
1 PC311 2 10U_0805_10V6K
1 B++ 37
3
2
ENTRIP1
1 D PQ305 SSM3K7002FU_SC70-3
PC312 0.1U_0603_25V7K
3
2VREF_51125
2 P I R T N E 1D 2
PQ306 SSM3K7002FU_SC70-3
2
G
G
S 3
PJP301
PJP302
1
38 PACIN_1
PQ308 SSM3K7002FU_SC70-3 1 2 2 PR318 G 604K_0402_1%
1
1D
1 D
PR313 100K_0402_5% 2
+5VALWP
G
3S
1
2
+5VALW
(4.5A,180mils ,Via NO.= 9)
+3VALW
(3A,120mils ,Via NO.= 6)
2
1 PAD-OPEN 2x2m
PAD-OPEN 4x4m PJP303
VL
PQ307 SSM3K7002FU_SC70-3 2
+3VL
+3VLP
3S
+3VALWP
1
2
+5VL
VL PJP304
PAD-OPEN 4x4m
2
EC_ON 33,36
1 PAD-OPEN 2x2m
S 3
1
PC318 0.022U_0603_25V7K 2
PR314 100K_0402_5%
2 4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
o m . l c Compal Electronics, Inc. a i m 3.3VALWP/5VALWP t o
A
B
C
D
1
1
26,33,34,36 SYSON
PR401 0_0402_5% 1 2
PL401
1
PC401 @1000P_0402_50V7K
2 6 5
+5VALW
W L A V 5 +
2
BST_1.8V 1
PU401 PR404 255K_0402_1% 1 2
2
PR405
2 1 0_0402_5%
1
BST1_1.8V1
PR402 0_0402_5%
1
PR403 316_0402_1%
+1.8VP
2
PC409 1U_0603_10V6K
2
+1.8VP
PR408 1 2 14.3K_0603_0.1%
5 1
1 V S P _ N E
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
D N G 7
PC402 0.1U_0402_10V7K
4
4 1 T S B V
P T
D N G P 8
DRVH
13
DH_1.8V
LL
12
LX_1.8V
TRIP
11
V5DRV
10
+5VALW 1
9
DRVL
PR410 1 0_0402_5%
1
7 8
2
2
3 2 1
DH_1.8V_1
1.8V_B+ K K 4 6 V V 5 5 2 1 _ 1 2 _ 1 2 5 0 0 3 4 4 1 8 0 0 4 4 _ C 2 0 _ C 2 2 U U P 1 . P 7 . 0 4 @
PQ401 AO4466_SO8
PL402 2.2UH_PCMC063T-2R2MN_8A_20% 1 2 1
2 PR406 15.4K_0402_1%
6 5
7 8
PC415 4.7U_0805_10V6K
PR407 @4.7_1206_5% 2 2
4
2
HCB1608KF-121T30_0603 1 2 K K 7 6 V V 0 5 5 2 1 _ 1 _ 2 5 0 0 4 4 5 8 0 0 0 0 4 _ 4 _ C 2 P C 2 U P 0 P 7 0 . 2 4 2
TPS51117RGYR_QFN14_3.5x3.5 DL_1.8V
1
PC412 @680P_0603_50V7K
M 5 2 R 1 _ Y V + 8 4 0 _ 4 2 C D P _ 2 U 0 2 2
B+
PC406 470P_0402_50V7K 2
+1.8VP
PQ402 3 2 1 FDS6690AS_NL_SO8
1 2 PC413 @10P_0402_50V8J 1 3
3
PR409 10K_0603_0.1% 2
PJP401 +1.8VP
1
2
+1.8V
(7A,280mils ,Via NO.= 14)
PAD-OPEN 4x4m
4
4
Compal Secret Data
Security Classification Issued Date
2007/05/29
Deciphered Date
2008/05/29
Title
Compal Electronics, Inc. 1.8VP
A
B
C
D
E
1
1
PR518 0_0402_5% 1 2
+1.1VS
B+++
+1.1VSP
1 2 PR517 10_0402_5%
PR501 11.5K_0402_1% 1
2
PR502 24.9K_0402_1%
PR503 18.7K_0402_1%
PR504 11.5K_0402_1%
1
2
2
2
B+++
K 6 V 5 2 1 _ 5 7 0 1 8 5 0 C _ 2 P U 7 . 4
K 6 V 5 2 1 _ 5 1 0 0 8 5 0 C _ 2 P U 7 . 4
K 7 V 0 5 _ 2 1 2 0 0 4 5 0 _ C P 2 P 0 0 2 2
PR505 0_0402_5%
K 4 V 5 2 _ 1 2 0 8 4 1 0 5 _ C U 2 P 1 . 0 @
1
+1.2VALWP
1
2
B+++
B+ PL502 HCB2012KF-121T50_0805 2 1
1
+1.1VSP
VCCP_POK 8 7 6 5
PC503 @0.022U_0603_25V7K
2
AO4466_SO8
+1.1VSP
PC506 PR506 0.1U_0402_10V7K 0_0402_5% 2 1 2 1
1 2 3 PL501 2.2UH_PCMC063T-2R2MN_8A_20% 2 1
UG1_1.1V
2 0_0402_5%
1 PR508
K 6 V 3 . 1 6 9 _ 0 5 5 0 8 2 C 0 P _ U 7 . 4
8 7 6 5
PR515 4.7_1206_5%
PC519 470P_0603_50V8J
2 1
6 5 4 3 2 1
6 5
7
24
8
EN2
23
EN1
4
BST_1.1V
9
VBST2
VBST1
22
BST_1.2V
UG_1.1V
10
DR VH2
DR VH1
21
UG_1.2V
20
LX_1.2V
19
LG_1.2V
LX_1.1V
11
LG_1.1V
12
LL2
LL1
DR VL2
DR VL1
PR507 0_0402_5% 2 1 2
1
2
PR511 18.2K_0402_1% 1 2
26,28,33,36,38 SUSP#
PR510 17.8K_0402_1%
2
+5VALW
1 2
PC514 1U_0603_10V6K
1
1
2
2
@
+1.2VALWP +1.2VALWP
K 6 V 3 . 2 6 0 _ 1 5 5 0 8 1 C 0 P _ U 7 . 4
1 M 5+ 2 1 R 1 _ 5 Y C V 2 P 4 _ 2 D _ U 0 2 2
3/5V_OK 20,39
3
PC512 0.1U_0402_16V7K
PC515 4.7U_0805_10V6K
(4A,160mils ,Via NO.=8)
PJP501 1
PC520 2 470P_0603_50V8J
3 2 1
(6A,240mils ,Via NO.=12)
+1.1VSP
2
2
PR514 3.3_0402_5% PC513 @0.1U_0402_10V7K
PR516 4.7_1206_5%
2 1
4
PR512 33K_0402_5% 1 2
1 1
7 8
PQ504 AO4468_SO8
PR513 0_0402_5% 2 1
K 4 V 5 2 1 1 _ 2 2 0 5 4 C 0 _ P 2 U 1 . 0
1
2
3
PL503 3.3UH 30% MSCDRI-7030AB-3R3N 4.1A 1 2
6 5
1
PQ503 FDS6690AS_NL_SO8
K 7 V 0 5 _ 1 5 2 0 0 5 4 C 0 P _ 2 P 0 0 2 2
K 6 V 5 2 4 _ 1 0 5 5 0 8 C 0 P _ 2 U 7 . 4
3 2 1
UG1_1.2V
1 PR509 0_0402_5%
2 1 2 3
K 7 V 0 5 _ 6 2 1 1 0 5 4 C 0 P _ 2 P 0 7 4
PC507 0.1U_0402_10V7K
2 1 T 1 D D 2 L P I P N N I N I F I G R 5 5 R G P T V V T P TPS51124RGER_QFN24_4x4 3 4 5 6 7 8 1 1 1 1 1 1
4
7 8
PQ502 AO4466_SO8
2 2 L D 1 1 O B E N B F O S V P PAD V F V N G V O T PGOOD2 PGOOD1
25
4
1 M 5 1 2 R + _ 8 Y 0 5 V C 4 _ 2 P 2 D _ U 0 2 2
PU501
2
PQ501
+1.1VSP
1
PJP502 2
+1.1VS
+1.2VALWP
PAD-OPEN 4x4m
1
2
+1.2VALW
PAD-OPEN 4x4m
PJP503 4
+1.1VSP
1
2
4
+1.1VS
PAD-OPEN 4x4m
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
o m . l c Compal Electronics, Inc. a i m t 1.1VSP/1.2VALWP o
A
B
C
D
E
1
1
+1.8V +1.8V PU601
1 PC601 10U_0805_10V4Z 2
Z 4 V 0 1 2 1 0 _ 6 5 C 0 8 P 2 0 _ U 0 1 @
1
1
VIN
2
GND
3
PR601 1K_0402_1%
4
2
VCNTL
6
NC
5
VREF
NC
7
VOUT
NC TP
PU603
+5VALW 1 1
PC613 10U_0805_10V4Z 2
PC603 2 1U_0603_16V6K
8
1
Z 4 V 0 1 9 1 0 _ 6 5 C 0 8 P 2 0 _ U 0 1 @
9
G2992F1U_SO8
2
1
3
PR606 1K_0402_1%
4
VIN GND
VCNTL NC
VREF
NC
VOUT
NC
2
TP
6
+5VALW
5 7
1
8
PC612 2 1U_0603_16V6K
9
G2992F1U_SO8
35,36 SYSON#
1
2 PR602 0_0402_5%
1
PQ601 SSM3K7002FU_SC70-3 2
36
SUSP
1
2 PR604 @0_0402_5% 1
PR603 1K_0402_1% 2
1D
2 G
3S
K 7 V 6 1 _ 2 1 0 4 0 _ 4 U 0 1 2 6 . 0 C P
VREF1.5V
+0.9VP PQ602 SSM3K7002FU_SC70-3
1 PC605 2 10U_0805_6.3V6M
36
1
SUSP
PR608 0_0402_5%
PC606 2 @0.1U_0402_16V7K
2
K 7 1 V 6 1 _ 2 PR607 1 0 4 5.1K_0402_1% 0 _ 2 1 U 1 1 . 2 6 0 C P
1D
2 G
3S
1
+1.5VSP 2
1 2
PC614 10U_0805_6.3V6M
PC610 2 @0.1U_0402_16V7K
(500mA,40mils ,Via NO.= 1)
PU602 APL5508-25DC-TRL_SOT89-3
PJP601 3
+0.9VP
1
2
+0.9V
+3VS
(2A,80mils ,Via NO.= 4)
M 6 V 7 3 0 . 6 6 _ 2 C 3 P 0 6 0 _ U 1 1
PAD-OPEN 3x3m
PJP603 +1.5VSP
1
2
2
+1.5VS
(1A,40mils ,Via NO.= 2)
+2.5VS
(500mA,40mils ,Via NO.= 1)
IN
OUT GND 1
3
+2.5VSP
K 6 V 3 . 6 8 _ 0 5 6 0 2 C 8 P 0 _ U 7 . 4 1
3
1 PR605 @150_1206_5%
2
PAD-OPEN 3x3m
PJP602 +2.5VSP
1
2 PAD-OPEN 3x3m
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
Compal Electronics, Inc. 0.9VSP/2.5VSP/1.5VSP
A
1
B
C
D
E
1
37
DC Connector /CPU_OTP
9/29
Compal
for Layout
PL3 change the value from SMB3025500YA_2P to HCB2012KF-121T50_0805 and add PL4 the same of the value.
2
41
1.1VSP/1.2VALWP
9/29
Compal
HW request
PC508 and PC511 change the value from 220U_6.3VM_R15 to 220U_D24VY_R25M
3
41
1.1VSP/1.2VALWP
9/29
Compal
HW request
Add PJP503
4
43
CPU_CORE
9/29
Compal
HW request
PC202 change the value from 220U_6.3VM_R15 to 220U_D24VY_R25M
5
43
CPU_CORE
9/29
Compal
TI FAE suggested that after he review the layout.
Add PC241 PC242 PC243, and the value are 1000P_0402_50V7K. Reserve PC244 PC245 PC246 PC247, and the value are 1000P_0402_50V7K.
6
43
CPU_CORE
9/29
Compal
TI FAE suggested that after he review the layout.
Add PJP201
7
38
Charger
9/29
Compal
the footprint is wrong
Change the footprint of PR102
8
37
10/08
Compal
for Layout
These two choke are parallel ,it's not series.
9
38
Charger
10/08
Compal
the footprint is wrong
Change the footprint of PR102
10
40
1.8VP
10/08
C ompal
PWR request
Delete PC410 and PC411
11
41
1.1VSP/1.2VALWP 10/08
Compal
PWR request
Add PR517
2
DC Connector /CPU_OTP
、
1
、
、
、
、
2
PJP202
、
PR518
、
3
3
12
37
13
37
14
43
15
37
16
37
17
43
DC Connector /CPU_OTP
11/01
Compal
PWR request
Add PD4
11/01
Compal
for Layout
change PQ301, Cencel PQ303
11/02
Compal
EMI request
Add PC248, PC249, PC250
3.3VALWP/5VALWP
11/12
Compal
for Layout
Change PC310, add PC319
3.3VALWP/5VALWP
12/31
Compal
PWR request
12/31
Compal
Vendor request
3.3VALWP/5VALWP
CPU_CORE
CPU_CORE
PC12
、
Add PU302, control signal changed to ACOFF
Change Change Change Change
4
and PR231 to 16.6K_ohm and PR233 to 4.02K_ohm to 17.8K_ohm to 100K_ohm
4
Compal Secret Data
Security Classification Issued Date
PR221 PR217 PR223 PR224
2007/08/02
Deciphered Date
2008/08/02
Title
Compal Electronics, Inc. Power Changed-List History-1
A
B
C
D
E
1
1
18
19
2
38
37
Charger
DC Connector /CPU_OTP
Compal
EMI request
Add PC128 220pF
01/09
Compal
01/14
Compal
for layout
Change PC309 to D size and add PC320
AC LED change to KBC control
AC_LED# connect to KBC pin 97
20
37
21
38
Charger
02/27
Compal
EMI request
CHG_B+ Add 1200pF and 330pF
22
43
CPU_CORE
02/27
Compal
EMI request
CPU_B+ Add 1800pF*2 2200pF*1 and 390pF*2
23
37
02/27
Compal
EMI request
B+ Add 2200pF and 390pF
24
37
02/27
Compal
25
26
27
37 43
43
3.3VALWP/5VALWP
01/08
3.3VALWP/5VALWP
DC Connector /CPU_OTP
3.3VALWP/5VALWP CPU_CORE
CPU_CORE
02/27 Compal 02/15
Compal
03/04
Compal
EMI request
VIN Add 2200pF and 390pF, ADPIN add 820pF
Change OTC shun down pin.
Change OTC shun down pin to PU301 pin13.
Change high-side MOS for WWAN issue
HW request
2
Change PQ203 and PQ206 to powerpak
add H_PWRGD control net
3
3
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
o m . l c Compal Electronics, Inc. a i m t Power Changed-List History-1 o
A
1
37 38 39 40 41 42
25 33 11 17 15 15
LAN EC NB LVDS Clock GEN. Clock GEN.
B
01/14 01/14 01/15 01/15 01/15 01/15
HW HW HW HW HW Vendor
C
D
E
8102E (10/ 100M 48 pin) can not support DSM function.
Reserve Q1056, Q1057, C1077 and Q144. Change PJP605 to R1067 .
8102E (10/ 100M 48 pin) can not support DSM function.
Reserve R544
No s upport daul chan nel panel .
Rem ove LVDS signal of Ch annel B .
No support daul channel panel.
Remove LVDS signal of Channel B (remove C1061~C10 63)
To slove noise issue.
Chagne C1074~C1076 to 12pF
Clock Gen. spec. update
Change R379 to 158 ohm and R380 to 90 .9 ohm .
0.3 0.3 0.3 0.3 0.3 0.3
1
2
2
3
3
4
4
Compal Secret Data
Security Classification Issued Date
2007/08/02
Deciphered Date
2008/08/02
Title
o m . l c Compal Electronics, Inc. a i m HW Changed-List History-2 t o
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