Half/Full Adder AndHalf/Full Subtractor

April 19, 2018 | Author: James Kevin Ignacio | Category: Subtraction, Arithmetic, Electronic Engineering, Electronics, Electrical Engineering
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Laboratory Experiment No: 2

Half/Full Adder And Half/Full Subtractor Objective: 

To realize half/full adder and half/full subtractor.



Using X-OR and basic gates

Instruments and Components: ICs 

7486  7432 Breadboard with power supply (5V, 350 mA) Digital Multimeter  Long nose pliers

 

7408 7404

Procedure: 1. Verify the gates. 2. Make the connections as per the circuit diagram. 3. Switch on VCC and apply various combinations of input according to the truth table. 4. Note down the output readings for half/full adder and half/full subtractor sum/difference and the carry/borrow bit for different combinations of input.

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Circuit Diagram: Half Adder using Basic Gates:

Full Adder using Basic Gates:

Full-Adder Half-Adder  A 0 0 1 1

B 0 1 0 1

S 0 1 1 0

C 0 0 0 1

S(V) C(V) 0.11 0.15 2.27 0.15 2.29 0.15 0.13 2.25

 A 0 0 0 0 1 1 1 1 Page 2 of 6

B 0 0 1 1 0 0 1 1

Cn-1 0 1 0 1 0 1 0 1

S 0 1 1 0 1 0 0 1

C 0 0 0 1 0 1 1 1

S(V) 0.12 2.28 2.32 0.15 2.30 0.15 0.12 2.27

C(V) 0.14 0.14 0.14 2.27 0.14 2.28 2.24 2.24

(a) Half Subtractor:

(b) Full Subtractor:

Half-Subtractor  A 0 0 1 1

B 0 1 0 1

D 0 1 1 0

B 0 1 0 0

D(V) 0.11 2.29 2.29 0.13

B(V) 0.15 2.24 0.15 0.15

Full-Subtractor  A 0 0 0 0 1 1 1 1

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B 0 0 1 1 0 0 1 1

Cn-1 0 1 0 1 0 1 0 1

D 0 1 1 0 1 0 0 1

B 0 1 1 1 0 0 0 1

D(V) 0.12 2.30 2.29 0.15 2.29 0.15 0.11 2.30

B(V) 0.14 2.24 2.22 2.24 0.14 0.14 0.14 2.24

Breadboard Layout:

Half Adder 

Full Adder 

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Half Subtractor 

Full Subtractor 

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Conclusion: Digital computers perform variety of information tasks. Among the functions encountered are the various arithmetic operations. The most basic arithmetic operation is the addition or subtraction of two binary digits. A binary adder-subtractor is a combinational circuit that performs the arithmetic operations of addition and subtraction with binary numbers.

 A half-adder half-adder is composed composed of one one X-OR gate gate and one AND gate that produces produces two two binary outputs from two binary inputs. It adds two one-bit binary numbers (A, B). The output is the sum of the two bits (S) and the carry (C). The C output is 1 only when both inputs are 1. The S output represents the least significant bit of the sum.

 A full-adder full-adder is a combinational combinational circuit that forms the arithmetic sum sum of three bits. It consists of three inputs (A, B, Cn-1) and two outputs (S, C). The third input, Cn-1, represents the carry from the previous lower significant position. Two outputs are necessary because the arithmetic sum of three binary digits ranges in value from 0 to 3, and binary 2 or 3 needs two digits. The two outputs are designated by the symbols S for sum and C for carry. The binary variable S gives the value of the least significant bit of the sum. The binary variable C gives the output carry. The full-adder is simply two half-adders joined by an OR gate. The C output is 1 only when two or more inputs are 1.

 A half-subtractor half-subtractor is a combinational combinational circuit which is used used to perform perform subtraction subtraction of two bits. It has two inputs, A (minuend) and B (subtrahend) and two outputs D (difference) and B (borrow). It is made of X-OR gate, NOT gate (Inverter), and AND gate. The B output is 1 only when the subtrahend (B) is greater than the minuend (A).

 As in the case of the the addition addition using logic gates, gates, a full subtractoris subtractoris made made by combining combining two half-subtractors and an additional OR-gate. A full subtractor has the borrow in capability and so allows cascading which results in the possibility of multi-bit subtraction.

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