GATE Computer Organization & Architecture Book

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Syllabus

Computer Organization

Machine instructions and addressing modes, ALU and data-path, CPU control design, Memory interface, I/O interface (Interrupt and DMA mode), Instruction pipelining, Cache and main memory, Secondary storage.

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Contents

Computer Organization

Computer Design

1 – 4



Binary Data Representation CPU Design



Binary Adder

4 – 12 12 – 13 13 – 19

 

Arithmetic Logic Unit Assignment 1 Assignment 2

19 – 22



Answer Keys Explanations

27 27 – 28



Memory Parameter

29 – 30 31 – 36 36 – 42

   

23 24 – 26

2.  

Main Memory Cache Memory



Virtual Memory Solved Examples



Assignment 1



42 – 45 45 – 47 48 – 51

Assignment 2 Answer Keys Explanations

51 – 53

Parallel Processing Pipelining Solved Example

61 – 65

75 – 77



Assignment 1 Assignment 2 Answer Keys



Explanations

79 – 82



Introduction Instruction format

83 83 – 86



Addressing Modes

86 -87

  

54 54 – 60

#3.     

65 – 74 74 77 – 78 79

4. 

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Contents

Computer Organization

CISC and RISC Solved Example Assignment 1

87 – 88 89



Assignment 2 Answer Keys



Explanations

93 – 94 95 95 – 99



CPU Operations



Data Path and Control Path

   

90 – 93

#5. 100 – 103 103 – 104 104 – 107



Machine Cycle Assignment Answer Keys



Explanations

110

Introduction Difference between the Computer and Peripheral Devices

111 111 111 – 112 112 – 116



I/O Bus and Interface Modules Modes of Data Transfer I/O Communication Technique



Direct Momory Access (DMA) Assignment 1 Assignment 2

119 – 124 125 – 126 126 – 128

Answer Keys Explanations

129 129 – 131

132 – 133



Von-Neumann Architecture Von-Neumann Bottleneck



Harvard Architecture

 

108 – 109 110

#6.    

   

116 – 118

#7. 

133 134 134 – 137 137 – 138



Control Unit Solved Examples Assignment



Answer Keys

141



Explanations

141

 

139 – 140

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Contents

Computer Organization



Test Questions Answer Keys

142 – 148 149



Explanations

149 – 153



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ChapterChapter-1

Computer Organization

Computer architecture deals with the structure and behavior of the computer system. It includes the information formats, the instruction set and the hardware units that implement the instructions along with the techniques for addressing memory. memory.

Computer organization deals with the way the various hardware components operate and the way they are connected together to form the computer system. It also deals with the units of the computer that receive information from external sources and send computed results to external destinations.

Computer design is concerned with the hardware design of the computer. This aspect of computer hardware is sometimes referred to as computer implementation. Figure 1.1 shows the basic building blocks of a typical computer c omputer system. MEMORY

ALU

CU

INPUT

OUTPUT CPU



The basic blocks available in any digital computer are, Arithmetic Logic Unit (ALU), Control Unit, Memory and Input/Output Unit.



It is a medium of communication between the user and the computer. With the help of input unit only, it is possible to enter programs and data to the computer.

Keyboard, floppy disk drive, hard disk drive, mouse, Magnetic Ink Character Recognition (MICR), Optical Character Recognition (OCR), paper tape reader, Magnetic tape reader, Scanner etc. 

It is a medium of communication between the computer and the user. With the help of output unit only, it is possible to get results from the computer. Example: Printers, Video Display Unit (VDU), Floppy disk drive, Hard disk drive, Magnetic tape drive, punched cards, paper tape, plotter, digitizer etc. th

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ChapterChapter-1

Computer Organization

The memory unit is responsible for storing the user programs and data. The digital computer memory unit mainly consists of two types of memories: Read Only Memory (ROM) and Read Write Memory (R/WM) or Random Access Memory (RAM). 

ROM is used to store permanent programs programs or system programs. It does not have write capability. PROM, EPROM, EEPROM 

It is also called user memory because the user programs or application programs are stored in this memory. The CPU is able to write or read information into or from this type of memory.  static, dynamic, scratch pad etc.

The ALU and Control Unit together are called CPU. It is the heart of any digital computer.

The data processing part of CPU is responsible for executing arithmetic and logical instructions on various operand types including fixed point and floating point numbers. Various circuits used to execute data processing instructions are usually combined in a single circuit called an arithmetic logic unit (ALU). The complexity of an ALU is determined by the way that perform fixed point addition and subtraction as well as word based logical operations, can be realized by combinational circuits. Much more extensive data processing and control logic necessary to implement is floating point arithmetic in hardware.

in which its arithmetic instructions are realized. Simple ALU’s

          

For finding the sum of a series , how will you use an ALU without a multiplier unit but with an adder and barrel shifter? Barrel shifter is a shifter that does  shift at an instance.

 bycomputi 3  and  means mean s mul t i p l i c ati o n by. Hence Hen ce the shi f t operati o ns wi l be faster for ng . Using the barrel shifter seven times for shifting by 3 .. we find Left shift by 7 means multiplication by 128,6 means multiplication by 64,5 means multiplication

and store left

shifted values of  in a register and add these.

combine the functions of ’s complement adder For example AND XOR and NOT. They can thus implement most of a CPU’s fixed point data

The simple ALU -subtracter with those of a circuit that generates word based logic functions of the form f(x, y). processing instructions.

Both multiplication and division can be implemented by combinational combinational logic. It is generally impractical to merge these operations with addition and subtraction into a single, combinational ALU.

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ChapterChapter-1

Computer Organization

The combinational multipliers and dividers are costly in terms of hardware. They are also much slower than addition and subtraction. An n-bit combinational multiplier or divider is typically composed of n or more levels of addaddition (or) subtraction, where addition and subtraction each take one clock cycle, while multiplication and division are multicycle operations.

subtract logic making multiplication and division at least ‘n’ times slower than

How many 16-bit ALU slices can be used for designing a 64-bit ALU? Four slices will be needed in parallel if ALU 64-bits operations are to take nearly the same time as 16-bit slice, and four slices will be needed in series if ALU 64- bits operations are to take nearly four times of 16-bit slice.

In order to form an operational system individual components or parts of computer that we hav which is defined as a group of lines that serves as a connecting path for several devices. These lines carry data, address and control signals.

e discussed need to be connected in some organized way for this purpose ‘ ’ is introduced

Figure 1.2 shows a exemplanary interconnection using single bus structure

Input

Output

Memory

CPU

Since, this bus can be used only for single transfer at a time  are introduced so as to achieve more concurrency concurrency in operations so that two or more transfers can be be carried out at the same time. Hereby, increasing performance but at an increased cost.

The control unit (CU) is the heart of the CPU. Every instruction CPU supports has to be decided by the CU and executed appropriately. Every instruction consists of a sequence of micro instructions that carries out that instruction the CU controls the elements inside the CPU the interface to the external data rate.

1. 2.

For each instruction the CU causes the CPU to go through a sequence of control steps: In each control step the CU issues a set of signal which caused the corresponding operation to be executed. th

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ChapterChapter-1

3.

Computer Organization

The signals to be generated by CU depends upon the actual step to be executed, the condition and states of flag register of the processor, the actual instruction to be executed and any external signals received on the system bus (i.e., interrupt signals) IR

Common signals internal to the CPU Flags

Control Unit (CU)

Common signals internal on system bus Signals from system bus

Clock

In digital computer, integers are represented as binary numbers of fixed length. A binary number of length x is an ordered sequence

x x x...x x x

Of binary digits where each digit  (also known as a bit) Can assume one of the values 0 or 1 The above sequence of x digits represents the integer value

 X  x  x....x  x  ∑ x.  Since operands and results in an arithmetic unit are started in resisters of a fixed length, there is a finite number of distances that can be represented with in an arithmetic unit. Let x and xofthe denote the smallest and largest representable value. We say that x  x  is the range number A sequence of n digits in a register does not necessarily have to represent an integer. We can get such a sequence to represent a mixed number that has a fractional part as well as an integral part. This is done by portioning the n digits into two series; k digits in integral part and in digits in the fractional part, satisfying k +m = n

x⏟x   x x x .....x  ⏟ .....x        

The above sequence of n digits represents the value

 ∑ x    The radix point is now stored in the register but is understood to be in a fixed position between

X  x  x .....x  x  x.....x 

k most significant digits and the m least significant digits. For this reason we call such representation as  representation

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ChapterChapter-1

Computer Organization

For fixed point numbers, we have to determine the way negative numbers are represented. Two different terms are commonly used: 1. Which is also called the signed-magnitude method 2. Which comprises two alternatives

 

In this representation the first digit is the sign digit and the remaining  digits represent magnitude. In binary case sign bit is normally selected to be o for +ve numbers and 1 for +ve ones. Let the  digits representing the magnitude be partitioned into  and m digits in the integral and fractional part, respectively. The largest representable number is then,



   (  ) [   ] – –

Thus the range of +ve numbers numbers is  and the range of ve number is We therefore have two representations of zero, one +ve and ve.

(  )

.

A major disadvantage of the signed-magnitude representation is that the operation to be performed may depend on the signed of the operands. This is avoided in the complement representation methods There are two alternatives 1. 2.

Radi o compl e ment al s o cal l e d ’ s compl e ment Diminished radix complement also called ’s complement –          – –         

In both complement method, a +ve number is represented in the same way as in the signal magnitude method, where a negative number   is represented by , where R is a constant. Such a representation satisfies the basis identify

  

One of the major advantages of a complement method is that no decisions have to be made before executing an addition or substation



If  the ve result  is already in the same complement form. However if , the correct result should be , while . The addition term R must be discarded, and the value of R should be selected to simplify or completely eliminate this correction step.

In case of ’s complement the value of R is  Therange ofnumbers i n the two’ s compl e ment for i s    

 and for complement the value of R is

– hehe one’s complement system is symmetric

  

.

This range is slightly a symmetric as then is one more ve number than are +ve numbers, on the hand these is a unique representation for 0. The range of representable number in t 

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