Eletronics Lab Report - MOSFET

EGR 220 Laboratory Experiment #10 MOSFET Amplifiers Gabriel Chong, Than Aung March 24, 2008

INTRODUCTION

VDD

The purpose of this lab is to explore the operation of MOSFETs. The operation of the MOSFET will be investigated under both the DC and AC operation conditions. Point by point characteristics will be taken using the multimeter to view the DC operation and the oscilloscope will be used to view the AC operation.

RD=1k +5V 10k pot.

RGG=10k

S

C= 0.1F

Figure 2

For this lab the HP 54603B Oscilloscope is used in junction with the HP BenchLink XL software to capture data and visual representations of inputs and outputs of the transformer. The HP E3630A Power Supply is used to provide power to the circuits built. The HP 33120A Function generator will be used to supply the AC signals to the circuit. The circuits are comprised of the CD 4007 MOS array, various capacitors, resistors, a potentiometer and wires. PROCEDURE 1 The purpose of this section is to analyze the DC operation of the MOSFET and use point by point measurements to determine the threshold voltage, VTN, the FET characteristic, K, and the Early voltage, VA. 13

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VGG

EQUIPMENT

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The circuit in Figure 2 was constructed using one of the NMOS devices in the CD 4007 MOS array. The threshold voltage was determined by first setting VDD to 10V and VG to 0V. The potentiometer was then slowly adjusted, effectively altering VGG until a small drain current began to flow through the MOSFET. The value of VG was recorded at this point as the threshold voltage, VT. Next, VG was rounded up to the closest integer value. The drain current, ID, and drain voltage, VD, were recorded at this point. VDD was then decreased by 1V and the drain values were recorded again. This process was repeated until 0V was reached. VG was then increased by 1V and VDD was set back to 10V and the process of measuring drain voltage and current then reducing VDD was repeated. This process was repeated until VG reached a value of 5V. The ID-VD graphs were then plotted as a function of VG and the values of VT, K and VA were determined from this graph. Results Procedure 1 VTN = 1.617V

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Figure 1

Figure 1 shows the layout of the CD 4007 MOS array used for this lab. The chip contains three nchannel MOSFETs and three p-channel MOSFETs. This lab will concentrate on the use of the NMOS devices.

Vg=2V Vdd (V) 10 9 8 7 6 5 4 3 2 1 0

Id(uA) 97.3 95.8 94.5 93.3 92.1 90.8 89.4 87.8 85.9 82.8 0

Vd (V) 9.88 8.88 7.88 6.89 5.89 4.91 3.91 2.9 1.91 0.92 0

I-V Graph for MOSFET as a function of V GS

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x 10

3.5

Vg=3 Vdd (V) 10 9 8 7 6 5 4 3 2 1 0

Id(mA) 0.745 0.737 0.728 0.721 0.712 0.703 0.692 0.678 0.658 0.5 0

Vd (V) 9.23 8.25 7.26 6.27 5.29 4.3 3.31 2.31 1.34 0.49 0

Vg=4 Vdd (V) 10 9 8 7 6 5 4 3 2 1 0

Id(mA) 1.866 1.848 1.83 1.81 1.789 1.762 1.724 1.627 1.248 0.671 0

Vd (V) 8.14 7.15 6.91 5.2 4.22 3.24 2.28 1.37 0.74 0.34 0

VGS = 2V VGS = 3V 3

VGS = 4V VGS = 5V

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ID (A)

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Graph 1- I-V Graph for MOSFET as a Function of V GS K =.18794749386742178681145468836546e-2 I-V Graph for MOSFET as a function of V GS

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VGS = 2V VGS = 3V

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VGS = 4V VGS = 5V

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Triode/Saturation Separation

ID (A)

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Vg=5 Vdd (V) Id(mA) Vd (V) 10 3.31 6.72 9 3.28 5.74 8 3.24 4.77 7 3.2 3.81 6 3.14 2.88 5 3.02 1.98 4 2.65 1.34 3 2.07 0.91 2 1.43 0.55 1 0.751 0.26 0 0 0 Table 1- Results from point by point measurement

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Graph 2- Line Separating Triode and Saturation Regions VGS

VDS Separating Triode and Saturation Region 2 0.1 3 0.78 4 1.3 5 1.74 Table 2- Values of VDS Separating Regions at Different VGS

points as a starting point a line was calculated using MATLAB to extend until the line crossed the voltage axis, and the current became zero. The voltage at this point defines the early voltage. The values determined match up with the range for expected values.

I-V Graph for MOSFET as a function of V GS

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x 10

4 VGS = 2V 3.5

VGS = 3V VGS = 4V

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VGS = 5V Triode/Saturation Separation

ID (A)

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Graph 3- Lines Used to Calculate Early Voltage Early Voltage as determined by VGS=2V graph = -25.5200V Early Voltage as determined by VGS=5V graph = -20.6700V

DISCUSSION AND SUMMARY Discussion on Procedure 1 Graph 1 shows a plot of the ID vs.VD data collected plotted as a function of VGS. This plot is very similar to graphs seen in Sedra Smith’s ‘Microelectronic Circuits’ which show the value of I vs. V plotted as a function of VGS, therefore the experimental method is sound and the data collected very accurate. This data was then used to determine a value for K based on the drain current and overdrive voltage at the highest values of current and voltage in the saturation region. An average was taken across the varying VGS values. The value for K is on the correct order of magnitude as would be expected. Once this value of K was determined it was possible to plot the line separating the triode region from the saturation region, by knowing the equation which defined this line. Once this line was drawn, the points of intersection between this line and the I-V plots of the MOSFET were discovered in the MATLAB plot window. The values determined are closed to the expected values, however they vary slightly because the method for determining K was not exact, but rather an average. The values on the 2V and 5V I-V plots closest to the separation between triode and saturation, while still in saturation, were used to define the slope for the line used to find the Early voltage. Using these