EE361 Lab3

October 24, 2017 | Author: Trang Pham | Category: Telecommunications Engineering, Force, Computer Engineering, Electrical Engineering, Electricity
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DaNang university of technology ***************

EE 361 LAB 3

Group 8

Member Pham Thi Trang Ong Thi Hoang Anh Duong Viet Le Ngoc Tan

*************DaNang 2012************

Question 1: Plot the voltage at the source and load ends of the transmission line for t = 0…50 ns. Using your understanding of “bounce diagrams”, explain whether this plot makes sense and shows what you would expect to see in the “exact” answer. Do the two agree? If not, why not? A full credit answer will describe the bounce diagram until a reasonable (whatever you consider reasonable) number of bounces, which can explain what exactly is happening in this situation. Please do the same in any other bounce diagram questions that may follow. Answer: ZG 0V

50

T1 Input 0V

ZL Load 0V

V

50 V

TD = 25ns Z0 = 50 V2 0V T1 = 0 T2 = 0.0001ns 0VV1 = 0 V2 = 10

0

0V

0

0

-

Using PSpice, we have the simulation of Vinput and Vload

-

The bounce diagram

0V

0

-

By the theory, we have: The reflection coefficient at the source is: = The reflection coefficient at the load is: = So there is no reflected wave at the source and load. The value of Vinput is:

-

Since TD is 25ns, after 25ns Vload = 5V. Therefore, the results from simulation and the theory are the same.

Question 2: Plot the voltage at the source and load ends of the transmission line for t = 0…100 ns. Using your understanding of “bounce diagrams”, compare this with what you would expect to see in the “exact” answer. Do the two agree? If not, why not? How long does it take the answer to settle to the final answer? Answer: ZG 0V

50

T1 Input 0V

ZL Load 0V

V

20 V

TD = 25ns Z0 = 50 V2 0V T1 = 0 T2 = 0.0001ns 0VV1 = 0 V2 = 10

0

0V

0

0

-

Using PSpice, we have the simulation of Vinput and Vload

0V

0

-

By the theory, we have: The reflection coefficient at the source is: = The reflection coefficient at the load is: =

+ At t = 0, from the figure, z=0 and Γ =

and we have

The initial voltage at the input end of the transmission line is:

So the voltage at the source is: +At t = T = 25ns, from the figure, z = l and Γ =

and we have

So the voltage at the load is: + At t = 2T = 50ns, from the figure, z=0 and Γ =

and we have

So the voltage at the source is: +At t = 3T = 75ns, from the figure, z = l and Γ = (since So the voltage at the load is:

and we have )

+ At t = 4T = 100ns, from the figure, z=0 and Γ =

and we have

So the voltage at the source is: -

Therefore, the results from simulation and the theory are the same. It takes 50ns for the answer to settle to the final answer.

Question 3: Plot the voltage at the source and load ends of the transmission line for t = 0…300 ns. Using your understanding of “bounce diagrams”, compare this to the “exact” answer. Do the two agree? If not, why not? How long does it take the answer to settle down to the final answer? Answer: ZG 0V

200

T1 Input 0V

ZL Load 0V

V

20 V

TD = 25ns Z0 = 50 V2 0V T1 = 0 T2 = 0.0001ns 0VV1 = 0 V2 = 10

0

0V

0

0

-

Using PSpice, we have the simulation of Vinput and Vload

0V

0

-

By the theory, we have: The reflection coefficient at the source is: = The reflection coefficient at the load is: =

+ At t = 0, from the figure, z=0 and Γ =

and we have

The initial voltage at the input end of the transmission line is:

So the voltage at the source is: +At t = T = 25ns, from the figure, z = l and Γ =

and we have

So the voltage at the load is: + At t = 2T = 50ns, from the figure, z=0 and Γ =

and we have

So the voltage at the source is: +At t = 3T = 75ns, from the figure, z = l and Γ =

and we have

So the voltage at the load is: + At t = 4T = 100ns, from the figure, z=0 and Γ =

and we have

So the voltage at the source is: Similarly, we have: t=0 t = T =25ns t = 2T = 50ns t = 3T = 75ns t = 4T = 100ns t = 5T = 125ns t = 6T =150ns t = 7T =175ns t = 8T =200ns t = 9T =225ns t = 10T =250ns t = 11T =275ns t = 12T =300ns We have:

-

Therefore, the results from simulation and the theory are the same. From the table, we see that it takes about 200ns for the answer to settle to the final answer.

Question 4: Plot the voltage at the source, middle, and load ends of the transmission lines for t =

0…100 ns. Sketch the bounce diagram; do you understand the voltage plots? How long before the “ghost” pulse (the pulse you are seeing at the middle of the transmission line) arrives at the load end? How large is the “ghost” pulse? Answer: RG 0V

200

T1

T2

Vinput 0V

RL

Vmiddle 0V V

Vload 0V

V

Z0 = 50 TD = 12.5ns

20 V

TD = 12.5ns Z0 = 50

V1 0V V4 = 0 V3 = 10 V2 = 10 V1 = 0 T4 = 10.001ns 0VT3 = 10ns T2 = 0.001ns T1 = 0

0

0V 0V

0V

0V

0

0

0

0

-

Using PSpice, we have the simulation:

-

By the theory, we have: The reflection coefficient at the source is: = The reflection coefficient at the load is: =

0

+ At t = 0, from the figure, z=0 and Γ = and we have The initial voltage at the input end of the transmission line is:

So the voltage at the source is: + At t = T/2 = 12.5ns, so = 0V The voltage at the middle is: Vmiddle = 2V (since Vinput (t = 0) = 2V and T/2VC>VB>VD - When the pulse arrives, VC is 4 times greater than VD. VD arrives first.

Question 15: When does a signal arrive at B? If you change the values of the load resistances at C and D, can you eliminate the reflection? If so what value should the load have? Answer: - A signal arrives at B at 195ns. - We cannot eliminate the reflection by changing the values of the load resistances at C and D. However, we can decrease VB, VC and VD to 0 by changing the values of the load resistances at C and D. - This is the simulation for RC = RD = 0.0001𝛀

Question 5.1A: Design a quarter-wave transformer to match a 150 Ω load to a source resistance of 75 Ω. State the length of your transmission line(s) in terms of the wavelength. Answer: From the Eq.2.77, the value of Z0 is √ √ Since we use a quarter-wave transformer to match the load to a source resistor, the length of the transmission line is in which n=0 or a positive number

Question 5.1B: Using the Smith Chart, if the characteristic impedance is given as 75 Ω, design a stub-matching network to match a 150 Ω load to a 75 Ω source. Do this for both a shorted and an

open circuited stub. State the length of your transmission line(s) in terms of wavelength. Answer: From the hypothesis: Z0 = 75 Ω; ZL = 150 Ω => Normalized load impedance: z L = ZL / Z0 = 150/75 =2

1) From the hypothesis: Z0 = 75 Ω; ZL = 150 Ω => Normalized load impedance: z L = ZL / Z0 = 150/75 = 2 Locate zL as point A on Smith Chart (the intersection point of the Real cure 2 and the Imaginary cure 0) 2) Locate normalized load admittance YL at point B (YL =0.5)

3) Move from the load toward the generator a distance d in which the normalized input admittance (

of the line terminated in the load has a real part equal to 1. Therefore, we will

determine two matching point C and D on the Smith Chart (a shorted and an open circuited stub). + At point C: Yd = 1+ j0.72 (0.152 λ on the WTG scale). In the other hand,the normalized input admittance at juncture is Yin = Ys +Yd and we need =>

= 1+j0 to match the transmission line

= -j*0.72 (0.41 λ on the WTG scale).

Then, we will find out its length:

length1 = 0.41 λ- 0.25 λ = 0.16 λ

+ At point D: Yd = 1- j0.72 (0.348 λ on the WTG scale). With the same explanation as in the case point =>

= j*0.72 (0.098 λ on the WTG scale).

Then, we will find out its length:

length2 =| 0.098 λ- 0.25 λ| = 0.348 λ

Question 5.2. A: Find the actual length of the quarter-wave matching network you designed in part 5.1.A if up = 2E+8 (m/s) and frequency = 1 GHz. Simulate the frequency response of the circuit by sweeping the frequency from 1 MHz to 3 GHz using a 5Vpp sine wave source with a source resistance of 75 Ω. Plot the input and load voltage over frequency. Plot the magnitude of the reflection coefficient of the matching network and find the bandwidth where |Γ| is less than 0.2. What is the input impedance of the matching network at 1 GHz?

B: Using the assumptions of section 5.2.A, simulate your pre-lab design in part 5.1.B and find the Γ bandwidth (the portion of the signal less than 0.2) of the matching network as well as the input impedance at 1 GHz. Include the same plots as in section 5.2.A. Answer: The value of the wavelength is

Choose n=0, we have the length of the transmission line:

The time delay of the transmission line is

In this circuit, we use VAC

R6

T8

R7

input5

load5

75

150 TD = 0.25ns Z0 = 106

V4 2.5Vac 0Vdc

0

0

0

-

The simulation of the input and output voltages

-

The magnitude of the reflection coefficient of the matching network:

0

From the simulation, Γ=1E-30 -

We have the simulation of the input impedance

From the figure, the input impedance is 75𝛀 at 1 GHz.

Question 16: Compare the results for the matching networks that you designed in the lab (quarter wave, open and short stub). Which one is a better choice? Why? Answer: The quarter wave is a better choice since it is very easy to construct, can be used to transform a wide range of impedances and doesn't require a ground plane to work as designed.

Question 17: For stub matching networks compare the performance of an open stub versus a shorted stub. Answer: Open stub

Short stub

-The advantage of an open stub is tunable and -The advantage of short stub is that it can inexpensive provide ground return. -Open stub has open-end capacitance that is -Short stub has via inductance that is effectively making it longer than desire effectively making it shorter than desired - Open stubs tend to leak at high powers.

- Shorted stubs are easier to build properly

-Open stub is used to minimize the received -Shorted stubs are both transmitting and signal from transmitter on bands below the one receiving stubs-they kill harmonic of our where we’re listening. transmitter and they also reject the signal on harmonically related bands received from nearby transmitter.

Question 18: Suppose you had a lossless line terminated by a complex load, but wanted to carry out the match using a quarter-wave transformer. How could you accomplish this? Answer: We accomplish that by placing a matching network to ignore the reflection by the transmission line and the network. Take an example, we want to design a matching network to make Z = Z0 at AA’ as looking into the network from the transmission line. If the network is lossless line, the power of source will reach the load.

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