EC_PAPER_1
Short Description
EC gate paper...
Description
:2:
E & TE
PAPER REVIEW Except a few out of scope questions from EDC, remaining questions in the paper can be easily attempted. Particular in this paper selection of questions plays a vital role in securing a good score. For example Section-A is relatively tougher than Section-B, so choosing 3 questions from Section-B will fetch you a big advantage.
SUBJECT WISE REVIEW SUBJECT(S)
LEVEL MARKS
Basic Electronics
Hard
75
Network Theory
Easy
77
Basic Electrical Engineering
Moderate
89
Electronic Measurements & Instrumentation Moderate
74
Analog Electronics & Digital Electronics
Easy
94
Materials Science
Hard
71
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SECTION-A 01. (a) In a long semiconductor bar (EG = 2 eV), conduction band electrons come in from the left in the positive x-direction with a kinetic energy of 3 eV. They move from location A to B to C to D. Between A and B, the electric field is zero; between locations B and C, there is a linearly varying voltage increase of 4 V; between C and D, the field is again zero. Assuming no scattering, sketch a simplified band diagram describing the motions of these electrons. Assuming that these electrons can be described as plane waves, with a free-electron mass, write down the wave function of the electrons at location D. Leave your result in terms of an arbitrary normalization constant. Assume the mass of free electron to be 9.11 10–31 kg. (12 M) 01.
(a)
Sol:
Given, band-gap = 2eV Energy of electron, E = 3eV Zero electric field from A to B and C to D Voltage between B and C = 4V m0 = 9.1110–31 kg Band diagram: 2eV
A
B
4eV
D
V0 = +4V W = –V0q = –4eV Time-independent Schrodinger’s wave equation is given by 2 ( x ) 2m 2 E V( x ) ( x ) 0 x 2 h ACE Engineering Academy
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E & TE
V(x) V0 Region-II
Region-I
x
0 Figure: Potential function
The general solution to this can be written as: 1 ( x ) A1e jk1x B1e jk1x Where k1
(x 0)
2mE h2
and 2 ( x ) A 2 e k 2x B2 e k 2x Where k 2
(x 0)
2m(V0 E) h2
01. (b) Calculate the Fermi energy EFO at 0K for copper and estimate the average speed of the conduction electrons in Cu. The density of Cu is 8.96 gm/cm3 and atomic weight is 63.5. Given Avogadro’s number is 6 1023. 01.
(b)
Sol:
Fermi-energy is the maximum energy occupied by electron at 0ok
(12 M)
The conduction electron population for a metal is calculated by multiplying the density of conduction electron states (E) and Fermi function, f(E).
dn ( E ) . f ( E ) dE 8 2m3 / 2 1 E ( E E F ) kT 3 h 1 e ACE Engineering Academy
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n
CONVENTIONAL PAPER - 1
8 2m 3 / 2 2 3 2 EF h3 3 23
h 2 3 2 3 n E F 8m
Every atom of Cu contributes one electron n = Atomic concentration
A 0d A
; Where A0 is Avogadro’s no.
= 8.46 1022 cm–3
d is density, A is atomic weight
EF = 7.026 eV 12
6E Average speed of conduction electrons in Cu is v e F 0 5m e We get Ve = 1.2 106 m/s
01. (c) In the common source amplifier shown, evaluate voltage gain Av, given RD = 2.7 k, = 50 and rds = 25 k. Derive the expression used.
+
(12 M)
VDD RD +
vi
+ –
RG
RS
CS
v0
–
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:6: 01.
(c)
Sol:
Given circuit is
E & TE
VDD RD +
Vi
+ –
+
V0
RG
–
CS
RS
– RD = 2.7 k = 50 rds = 25k We know = gm rds 50 = gm 25k gm = 2 mA/V Small signal equivalent circuit is
G Vi
+
RG Vgs
+ gmVgs
rds 25k
RD V0
–
–
V0 = –gm Vgs (rds ||RD) V0 = –gm Vi (rds||RD)
V0 r R D 50 R D A V g m ds 4.90V / V Vi rds R D rds R D ACE Engineering Academy
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E & TE
01. (d) Define lumen and candela. The wavelength of visible light ranges from violet at approximately 380 nm to red at 720 nm. Obtain the bandwidth available of visible light. (12 M) 01.
(d)
Sol:
Lumen:
It is measure of total quantity of visible light emitted by source” It is S.1 unit of Luminous flux Candela:
It is measure of Luminous power per unit solid angle emitted by a point light source in a particular direction It is S.1 unit of Luminous Intensity 1 lumen = 1 candela Sr Frequency of violet spectrum is given by f1
3 108 38 10 8 3 1016 38
0.7895 1015 Hz 789.5 THz Frequency of red spectrum is given by f2
3 108 72 10 8 3 1016 72
0.4167 1015 Hz 416.7 THz Band width of visible light = f1 – f2 = 372.8 THz ACE Engineering Academy
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01. (e) Implement the following expression using NAND gates only: Y a c a b c 01.
(e)
Sol:
Y = (a + c) (a b c )
(12 M)
= (a + c) abc
a (abc) c(abc)
a b c
a (abc) c(abc)
y
a (abc) . c(abc)
02.
(a) For the MOSFET characteristic shown in the figure, calculate: (i) Linear VT and KN (ii) Saturation VT and KN (iii) The gate oxide thickness and substrate doping.
Assume channel mobility = 500
cm 2 Vs
VFB = 0, Z = 100 m, L = 2 m Where Z is the depth of the channel and L is the length of the channel.
(25 M)
ID(mA) 2.0
VG= 5V
1.0
VG= 4V VG= 3V
0
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1
3 2 VD(V)
4
5
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02. (b) (i) What is compensated doping? (ii) An n-type semiconductor containing 1016 phosphorus (donor) atoms/cm3 has been doped with 1017 boron (acceptor) atoms/cm3.Calculate the electron and hole concentrations in the semiconductor. 02.
(b) (i)
Sol:
Compensated doping:
(15 M)
Compensated doping is a term used to describe the doping of a semiconductor with both donors and acceptors to control the properties. For example, a p-type semiconductor doped with NA acceptors can be converted to a n-type semiconductor by simply adding donors until the concentration ND exceeds NA. The effect of donors compensates for the effect of acceptors and vice-versa The electron concentration is then given by ND–NA provided the latter is larger than NA. What essentially happens is that electrons from donors recombine with the holes from the acceptors so that the mass action law np n i2 is obeyed 02.
(b) (ii)
Sol:
ND = 1016 atoms/cm3 NA = 1017 atoms/cm3 Since more acceptors are added into donor atoms it becomes p-type compensated semiconductor So the resultant hole concentration = NA – ND [ valid when NA – ND >> 2ni ] = 1017 – 1016 = 9 1016 atoms/cm3
Now electron concentration =
n i2 hole concentration
n i2 atoms / cm3 9 1016
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02. (c) Define Fan-in and Fan-out with an example. Draw the circuit diagram of an NMOS circuit to realize f (a, b, c) = a b ac.
(20 M)
02.
(c)
Sol:
Fan-In: The maximum number of inputs connected to the logic gate is called fan-in Ex:
k
Here fan-in = k In generally Gates with large fan-in are slower than gates with small fan-in
Fan-Out: fanout is the maximum number of logic gates that can be driven by a logic gate output
by maintaining the output levels without affecting the logic gate performance. (or) Fan-out of a gate specifies no of standard loads that can be connected to the output of the gate without degrading it’s normal operation. Ex:
(o/p= high)
IOH
(o/p= low) IIH n gates
(a) High-level output I OH n fanout H I IH ACE Engineering Academy
IOL
IIL
IIL
n gates
(b) low level output I OL n fanout L I IL
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E & TE
f (a , b, c) a b ac a b ac a b ac
(a b). ac VDD
VDD
RD
RD
f
a c VDD RD a
VDD RD
b
03. (a) (i) Consider the ac equivalent circuit of a MOSFET Colpitts oscillator.
R
C2
C1
L Derive the expression for oscillation frequency. Also find the condition on the gain to initiate the oscillations spontaneously. (ii) As per the Barkhausen criterion, the positive feedback exists a particular frequency range and
the resulting feedback signal reinforces the error signal. Explain the
phenomenon which limits the amplitude of the oscillations under steady state. (20 M) ACE Engineering Academy
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03. (a) (i) Sol:
Given circuit
R
C1
C2
L
Equivalent circuit is sC2 vgs
L G + vgs –
sC2 vgs C2
VD gmvgs
R
C1
1 VD sL sC 2 v gs sC 2 VD s 2 LC2 1v gs ......1
Apply KCL at drain terminal VDsC1
VD g m v gs sc 2 v gs 0 R
1 v gs sC1 s 2 LC2 1 g m v gs sC 2 v gs 0 R sC1R 1 s 2 LC 1 g sC 0 2 m 2 R
s 3LC1C2R+ s C1R+ s 2LC2+1+gmR+ s C2R= 0 ACE Engineering Academy
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E & TE
Make imaginary part of the above equation is equal to zero –3 LC1C2R + LC1R+ C2 = 0 [RC1+RC2–2LC1C2R] = 0 R C1 C 2 2 LC1C 2 0
C1 C 2 LC1C 2
CC 1 C eq 1 2 C1 C 2 LCeq
Condition for the gain to initiate the oscillations 1– 2LC2+gmR = 0 1+gmR = 2LC2 1 gmR
C1 C 2 LC2 LC1C 2
1 gmR 1
gmR
03.
C2 C1
C2 C1
(a) (ii)
Sol:
Vi
+ +
A1
V0
2 V0 A1 2 10 Vi Conditions for sustained oscillations as per Backhouses criterion (i) |A| = 1 (ii) A = 1+2 = 0 ACE Engineering Academy
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Amplitude stabilization:
Given that the circuit is in positive feed back (|A|>1) for the given frequency range of operation. In order to generate and sustain oscillations the gain control mechanism is as follows first to ensure that oscillations will start, initial design is such that A is slightly greater than unity. This corresponds to designing the circuit so that the poles are in the right half of the splane. Thus as the power supply is turned on oscillations will grow in amplitude. When the amplitude reaches the desired level, the non linear network comes into action and causes the loop gain to be reduced to exactly unity. In other words, the poles will be “ pulled back” to j axis. This action will cause the circuit to sustain. oscillations at this desired amplitude. A=1
[gain adjustment]
A>1 X
X
X
X Generation of oscillations
initially
Sustained oscillations
sustained Generation
A=1
A>1 Amplitude Stabilization:
Vz+ 0.7 V Slope = A2 V0
Slope A1 0
Vf
–(Vz+ 0.7V) Slope A2
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E & TE
RB R1 –
RF
+
+
C
Vf
R
C R
C R
–
+ Vo –
To have amplitude stabilization in the oscillator, it is necessary to limit the output voltage by introducing nonlinearity. Stability can be achieved by adding two zener diodes in series with resistance RB. As long as the magnitude of the voltage V0 across Rf is less than the Vz + 0.7V, the gain of the Amplifier A1
RF R1
If V0 increases more than Vz + 0.7, then zener diodes are ON A2
R F || R B R1
V0
A
Zener ON
Zener OFF
A
V0
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E & TE
03. (b) A typical 1 MHz quartz crystal has the following properties: fs = 1 MHz, fa = 1.0025 MHz Co = 5 pF,
R = 20
The two frequencies fs and fa are called the series and parallel resonant frequencies. In the equivalent circuit, C0 is parallel with LCR. What are C and L in the equivalent circuit of the crystal? What is the quality factor Q of the crystal? 03.
(b)
Sol:
Quartz crystal equivalent circuit
(20 M)
Co
Rs
Ls
Cs
Given, fs = 1MHz fa = 1.0025MHz C0 = 5pF Rs = 20 fa fs 1
Cs C0
f C s C 0 a f s
2 1.0025 10 6 1 5 10 12 6 1 10
2 1
= 25.03125 ×10–15F fs
1 2 L s C s
Ls
1
2fs
2
Cs
1
2 110 25 10 6 2
15
1.013211H ACE Engineering Academy
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CONVENTIONAL PAPER - 1
Quality factor Q
2f s L s Rs
2 106 1.013211 20
318309.8862
03. (c) What is a multiplexer? Write the symbol and truth table of a 4-1 multiplexer. Implement the same using logic gates. 03.
(20 M)
(c)
Sol: (c) Multiplexer: It is a combinational circuit that selects one of several inputs and forwards it to
output. In general a n 1 MUX has n inputs and log2n selection lines. It is also called as Data selector Symbol of 4 1 MUX:
I0 I1 I2 I3
41
output
s1 s0
Truth table:
S1 S0 Output 0
0
I0
0
1
I1
1
0
I2
1
1
I3
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E & TE
S0 S1
I0 output
I1
I2 I3
04. (a) Consider a CMOS inverter biased at VDD = 5V with transistor parameters of KN= KP and VTN = –VTP 1 V. Then consider another CMOS inverter biased at VDD = 10 V with the same transistor parameters. Determine the critical voltages on the voltage transfer curve of the CMOS inverter. 04.
(20 M)
(a)
Sol:
V0
VDD
Vin
Slope= –1
Slope = –1
Vout VIL
VIH
VI
Voltage transfer characteristics VIL: By definition, VIL is the smaller of the two input voltage at which the slope of the VTC
becomes equal to (–1), i.e.,
dVout 1 . In this case nMOS transistor is in saturation while the dVin
pMOS transistor is in linear mode. From IDn = IDp we obtain: ACE Engineering Academy
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k kn 2 VGSn VTn 2 p 2VGSn VTn VDSp VDSp 2 2
CONVENTIONAL PAPER - 1
Note that VGSn = Vin, VDSn = Vout, VGSp= –(VDD – Vin), and VDSp = –(VDD – Vout) Substituting these values in above equation
k kn Vin VTn 2 p 2Vin VDD VTp Vout VDD Vout VDD 2 …………(1) 2 2
To satisfy
dVout 1 , we differentiate both sides of (1) dVin
dV k n Vin VTn k p Vin VDD VTp out dVin Substituting Vin = VIL and
dV Vout VDD Vout VDD out dVin
dVout 1 into, we obtain dVin
k n (VIL VTn ) k p 2Vout VIL v Tp VDD Then VIL as a function of Vout can be expressed as: VIL
2Vout VTp VDD k R VTn 1 kR
…………(2)
where kR
kn kp
Case-i:For VDD = 5V, VTN = –VTP 1V, k R
kn 1 kp
Substituting values into (2) produces
VIL
2V0 1 5 1 11
VIL = V0 – 2.5 …………(3) From (1) and (3)
k kn V0 2.5 12 p 2V0 2.5 5 1V0 5 V0 52 2 2 ACE Engineering Academy
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E & TE
V0 3.52 2V0 6.5V0 5 V0 52
V02 (3.5) 2 7V0 2 V02 11.5V0 32.5 V02 25 10V0
V02 (3.5) 2 7V0 2V02 23V0 65 V02 25 10V0 6V0 = 40 – (3.5)2 = 40 – 12.25
V0
27.75 4.625V 6
VIL = V0 – 2.5 = 2.125V Case-ii: For VDD = 10V, VTN = –VTP = 1V, k R
kn 1 kp
Substituting values into (2) produces VIL
2V0 1 10 1 2
VIL = V0 – 5 …………(3) From (1) and (3)
k kn V0 5 12 p 2V0 5 10 1V0 10 V0 102 2 2
V0 62 2V0 14V0 10 V0 102
V02 36 12V0 2 V02 24V0 140 V02 100 20V0
V02 36 12V0 2V02 48V0 280 V02 100 20V0 16V0 = 180 – 36 V0 = 9V VIL = V0 – 5 = 9 – 5 = 4V
VIH: In this point nMOS is in linear mode and pMOS in saturation. Similarly to VIL we apply
KCL to the output node:
k kn 2 2 2VGSn VTn VDSn VDSn p VGSp VTp 2 2
Again, using VGSn = Vin, VDSn = Vout, VGSp= –(VDD – Vin), and VDSp = –(VDD – Vout) ACE Engineering Academy
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By substituting these values
k kn 2 2 2Vin VTn Vout Vout p Vin VDD VTp …………(4) 2 2
Differentiating both sides with respect to Vin dV dV k n Vin VTn out Vout Vout out k p Vin VDD VTp dVin dVin Substituting Vin = VIH and
dVout 1 in above equation, we obtain dVin
k n (VIH VTn 2Vout ) k p VIH VDD VTp Then VIH as a function of Vout can be expressed as: VIH
VDD v Tp k R (2Vout VTn ) 1 kR
…………(5)
Case-i:For VDD = 5V, VTN = –VTP = 1V, k R
kn 1 kp
Substituting values into equation(5) produces
VIL
5 1 2V0 1 = V0 + 2.5 ………(6) 2
From (4) and (6) 2V0 2.5 1(V0 ) V02 V0 2.5 5 1
2
2(V0 1.5)(V0 ) V02 V0 1.5
2
2V02 3V0 V02 V02 3V0 2.25 6V0 = 2.25 V0 = 0.375 VIH = V0 + 2.5 = 2.875 V Case-ii: For VDD = 10V, VTN = –VTP = 1V, k R
VIH ACE Engineering Academy
kp kn
1
10 1 2V0 1 = 5 + V0 ………(7) 2
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E & TE
From (4) and (7) 2V0 5 1(V0 ) V02 V0 5 10 1
2
2(V02 4V0 ) V02 V0 4
2
2V02 8V0 V02 V02 16 8V0 16V0 = 16 V0 = 1V VIH = V0 + 5 = 6V
Critical voltages: For VDD = 5V
For VDD = 10V
04. (b) If
VIL = 2.125V, VIH = 2.875V VIL = 4V,
VIH = 6V
1 is defined as the mean probability per unit time that an electron scattered, show that τ
the mean time between collisions is .
(15 M)
04.
(b)
Sol:
Consider an infinitesimally small interval dt at time t. Let N be the number of unscattered 1 electrons at time ‘t’. The probability of scattering during dt is dt, and the no. of scattered 1 1 electrons during dt is N dt . The change dN in N is thus dN N dt The negative sign indicates a reduction in N because, as electrons becomes scattered, N decreases. Integrating this equation, we can find N at any time t, given that at time t = 0, N0 is the total number of unscattered electrons. N N 0 e t This equation represents the no. of unscattered electrons at time t. It reflects an exponential decay law for the no. of unscattered electrons the mean free time t can be calculated from the mathematical definition of t
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CONVENTIONAL PAPER - 1
t
t N dt 0
N dt 0
Where we have used N N 0 e t Clearly, (1/) is the mean probability of scattering per unit time
04. (c) (i) The transistor circuit shown has = 100, VBE(ACTIVE)= 0.7 V. Find the operating point (VCE, IC) and the mode of operation when S1, S2, are closed and S1, S2, are open.
S1 IC 1k
470k
+ – 10V
IB
S2
1k
(10 M) (ii) Find the diode current ID in the circuit shown below when the diode has cut-in voltage, V = 0.7 and forward resistance, Rf = 25
100 + 10V
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(15 M)
ID 100
100
–
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04.
(c) (i)
Sol:
Given data is =100
E & TE
VBE (active) = 0.7V S1 IC 1k
470k
+ – 10V
IB
S2
1k
When S1,S2 are open 10V IC 1k 470k 1k
Transistor is in cutoff mode so IC = 0 10V IC 1k
VCE = 10V Operating point (VCE,IC) = (10,0) When S1&S2 are closed
470k IB 0.7V
1k
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CONVENTIONAL PAPER - 1
Let us consider transistor is in active region 10V IC 1k
470k IB + 0.7V – IB
10 0.7 19.7A 470k
IC = IB = 1.977mA VE = 0V VC =10 –1k(IC) = 8.03V VCE > 0.2 Transistor is in active region Operation point (VCE,IC) = (8.03V,1.97mA) 04.
(c) (ii)
Sol:
Given circuit is
100 + 10V
ID 100
100
–
After applying thevenin’s equivalent at 100 50 5V
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ID 100
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E & TE
Given Rf = 25 V =0.7V 50 + 5V –
ID
ID
+ 0.7–
25 100
5 0.7 24.57mA 175
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SECTION-B 05.
(a) Find the Thevenin resistance for the circuit shown below by zeroing the sources. Then, find the short-circuit current and the Thevenin equivalent circuit.
5 20V +–
20
2A (12M)
05.
(a)
Sol:
Finding Rth:
5 20
Rth = 5//20 = 4 Finding Isc:
5 20V
+ –
0V
20
2A
Isc
0 20 0 0 2 I sc 0 5 20 – 4 – 2 + Isc = 0 Isc = 6A ACE Engineering Academy
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CONVENTIONAL PAPER - 1
Finding VOC:
5
VOC +
20V
+ –
20
2A
VOC –
VOC 20 VOC 20 5 20 4VOC – 80 + VOC – 40 = 0 5VOC = 120 VOC = 24V OR
VOC = ISCRth = 64 = 24V 4 24V
+ –
05. (b) A voltmeter and an ammeter are to be used to determine the power dissipated in a resistor. Both the instruments are guaranteed to be accurate within 1% at full-scale deflection. If the voltmeter reads 80 V on its 150 V range and the ammeter reads 70 mA on its 100 mA range, Determine the limiting error for the power calculation. 05.
(b)
Sol:
Given data:
(12 M)
Both voltmeter and ammeter accurate within 1% of fsd. Voltmeter reads 80 V on 150 V range ACE Engineering Academy
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E & TE
Ammeter reads 70 mA on 100 mA range For voltmeter error =
1 150 1.5V 100
Relative error for voltmeter = For ammeter error =
1.5 100 1.875 % 80
1 100 mA 1mA 100
Relative error for ammeter =
1 100 1.43% 70
% limiting error in power measurement % P = %V + %I = 1.875 % + 1.43 % = 3.305 % Power = 8070 mA = 5.6 W Limiting Error = 5.6
3.305 0.18W 100
Power = 5.6 0.18 W 05. (c) The following measurements pertain to a two-port circuit operating in the sinusoidal steady state. With port 2 open, a voltage equal to 150 cos 4000t V is applied to port 1. The current into port 1 is 25 cos (4000t-45) A, and the port 2 voltage is 100 cos (4000t+15) V. With port 2 short-circuited, a voltage equal to 30 cos 4000t V is applied to port1. The current into port 1 is 1.5 cos(4000t+30) A, and the current into port 2 is 0.25cos(4000t+150)A. Find the parameters that can describe the sinusoidal steady-state behaviour of the circuit. (12M) 05.
(c)
Sol:
25–450 15000
I2=0 N/W
+ –
+ 100150 –
V1 = AV2 – BI2 I1= CV2 – DI2 ACE Engineering Academy
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I2 = 0 A C
CONVENTIONAL PAPER - 1
V1 1500 0 1.5 150 V2 100150
I1 25 450 1 600 0 V2 10015 4
Now
1.5300
3000
V2 = 0 B D
0.251500
N/W
+ –
V1 300 0 12030 0 0 I2 0.25150
I1 1.530 0 660 0 0 I2 0.25150
The parameters that can describe the sinusoidal steady state behaviour are A B 1.5 150 12030 0 C D 0 660 0 0.25 60
05. (d) For the circuit shown in the figure, find the branch currents I1,I2 and I3 using Mesh analysis.
I1
I2 5
(12 M)
6
I3
15V +–
10
4
+– 10V 05.
(d)
5
Sol:
+ 15V
+ –
6
I1 –
I3
+ – 10 – + + –
ACE Engineering Academy
+
–
I2 + –
4
10V
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E & TE
I3 = I1 – I2 15 – 5I1 – 10(I1–I2) – 10 = 0 15I1 – 10I2 = 5 3I1 – 2I2 = 1 --------(1) 6I2 + 4I2 – 10 +10(I2–I1) = 0 2I2 – I1= 1 -------(2) from (1) & (2) I1 = 1A I2 = 1A I3 = I1 – I2 = 1–1 I3 = 0A 05. (e) (i) Briefly discuss only the basic principles of a Thermistor and Thermocouple. (ii) Explain why a semiconductor has a negative resistance coefficient. (12 M) 05.
(e) (i)
Sol:
Thermistors are essential semiconductor devices that behave as resistors with high negative temperature coefficient and are atleast 10 times as sensitive as the platinum resistance thermometer. Thermisters can detect very small changes in temperature which could not be observed with an RTD or a thermocouple. Sensitivity of thermister is higher than both RTD and thermocouple. Sensitivity of thermistor is higher than both RTD and thermocouple. Thermistors exhibits a highly nonlinear characteristic of resistance versus temperature. The approximate relationship between resistance and temperature applying to most thermistors is R1 = R 0 e
1 1 T1 T0
= thermistor constant in Kelvin R1, R0 Resistance at absolute temperature T1 and T0 . Thermistors widely involve in temperature measurement in range of –60oC to 15oC. ACE Engineering Academy
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CONVENTIONAL PAPER - 1
The response time of thermistors can vary from a fraction of second to minutes depending on the size of the detecting mass and thermal capacity of the thermistor. Thermocouples consists of two dissimilar metal wires A and B insulated from each other but welded or brazed together at their ends forming two junctions. Metal A Hot T1
Cold T2
Metal B Thermo junctions If two wires of different metals are joined together at each form a complete circuit in which current flows if two junctions are kept at two different temperature called seeback effect. The relation between the thermo emf setup and temperature difference of hot and cold junction is given by E = (T – T0) + ( T 2 T02 ) E = Thermoelectric emf (Volts) T = Absolute temperature of hot junction T0 = Absolute temperature of cold junction , - Constants depends upon the metals used.
05.
(e)(ii)
Sol:
Conductivity in a semiconductor is given by i n i n p n i
[Let = n + p]
Let ni is intrinsic carrier concentration, be the mobility of intrinsic semiconductor as temperature increases ni increases decreases But here dominant factor is ni [∵ ni > ] ACE Engineering Academy
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E & TE
Conductivity of intrinsic semiconductor increases and hence its resistivity decreases there by resistance decreases from this we can say that intrinsic semiconductor has negative resistance coefficient
ni
T
Temperature coefficient
i
R
R Ve T
06. (a) (i) Use source transformations to aid in solving for the currents i1 and i2 shown in the circuit below.
i1
5
(15 M)
i2 20V
+ –
1A
10
06.
(a) (i)
Sol:
Applying source transformation to current source and resistance in parallel i1
20V
i1
5
10
+ –
+ –
10V
20 10 2 A 15 3
Applying source transformation to voltage source and resistance in series i2 4A
i2
5
10
1A
5 5 4 1 A 5 10 3
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CONVENTIONAL PAPER - 1
06. (a) (ii) Find the phasor voltage and the phasor current through each element in the circuit shown in the figure.
(10 M)
iC 5 cos (200t)
06.
iL
iR
1H
100
+
v –
100F
(a) (ii)
Sol:
iC
iL L
C
5cos200t
iR 100
Y(Admittance) 1 j jC R L
Y
1 j j 100 50 200
1 3j 100 200
2 3j 200
I = Y.V
V
I 5 cos 200t 1000 200 cos 200 t 56.30 Y 2 3j 13
iR
V 10 cos200t 56.30 R 13
iL
V 5 cos 200t 146.30 jL 13
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i C V( jC)
1000 j 200 10 4 cos 200t 56.30 13
20 j cos200t 56.30 13
20 cos 200t 33.7 0 13
E & TE
06. (b) Find the equivalent resistance and capacitance that causes a Wien bridge to null with the following component values:
(15 M)
R1 = 3.1 k , R3 = 25k, R4 = 100k C1 = 5.2 F and f = 2.5 kHz 06.
(b)
Sol:
I1
C2
b
R2
R4 I1
a
G
I2
c
R1
R3 C1
d
I2
E
Wien’s bridge is used to determine the frequency at a AC source and also used in many applications like capacitance having series resistance at balance. R2 j R 3 R 1 R 4 1 j C R C 2 2 1
i.e.,
R 3 R1 C2 1 j C1R 2 C 2 R 1 R 4 R 2 C1
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CONVENTIONAL PAPER - 1
Equating the real and imaginary parts, R 3 R1 C2 R 4 R 2 C1 and
1 R 1 R 2 C1 C 2
f
1 2 R 1R 2C1C 2
6.25 106 R 2C2
1 4 (3.110 ) (5.2 10 6 ) R 2C 2 2
3
1 4 (3.1 10 ) (5.2 10 6 ) 6.25 106 2
3
= 0.25110–6 ------- (1) C2 R 3 R1 --------- (2) C1 R 4 R 2 Using equation (1) & (2) C2 is 20 pF R2 = 12.5 k
06. (c) (i) The voltage source Vg drives the circuit shown in the figure. The response signal is the voltage across the capacitor, V0. Calculate the numerical expression for the transfer function.
(10 M)
1000
+ 250
+ Vg –
50mH
1F V0 –
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06.
(c) (i)
Sol:
Voltage gain transfer function is given by R1
E & TE
+ R2
Vg
+ –
sL
1/cs V0 –
1 R 2 SL // CS V0 (s) Vg (s) 1 R SL // R1 2 CS SL R 2 V0 (s) Vg (s) 2 R 1LCS (R 1R 2 C L)S R 1 R 2
Now substitute the given values where, R1 = 1000 R2= 250 L = 50mH C = 1F then the voltage gain T.F is V0 (s) 250 (0.05 s) Vg (s) 5 10 5 s 2 0.3s 1250
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ACE Engineering Academy
CONVENTIONAL PAPER - 1
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E & TE
06. (c) (ii) Write down the incidence matrix and cut-set matrices for the network shown below. (10 M)
5
5
4
10V 4
4
5
06.
(c) (ii)
Sol:
Writing graph for given network
C
6
1
2
D
4 A Incident matrix given by
5 B
3
1 2 3 4 5 6 A 1 0 0 1 0 1 B 0 1 1 0 1 0 C 1 1 0 0 0 1 D0 0 0 1 1 1 Now writing tree for given graph and identifying basic cut sets C3
C
6
1
2 5
4 A C1 ACE Engineering Academy
B
3 C2
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CONVENTIONAL PAPER - 1
Now writing down cutest matrix 1 2 C1 C2 C3
3
4 5 6
1 0 1 1 0 0 0 1 1 0 1 0 1 1 0 0 0 1
07. (a) A certain 5-hp three-phase induction motor operates from a 440-V-rms (line-to-line) threephase source and draws a line current of 6.8 A rms at a power factor of 78 percent lagging under rated full load conditions. The full load speed is 1150 rpm. Under no-load conditions, the speed is 1195 rpm, and the line current is 1.2 A rms at power factor of 30 percent lagging. Find the power loss and efficiency with full load, the input power with no load, and the speed regulation. 07.
(a)
Sol:
Given
(20 M)
VLL = 440V If1 = 6.8A cosf1= 0.78lag Nf1 = 1150 rpm I0 = 1.2A cos0= 0.3lag N0 = 1195 rpm Power rating of machine = 5hp Pf10 = 5735 = 3675W Power output at full load (P0) = 3675W Power input at full load Pin = Pin =
3VL I f1 cos f1
3 440 6.8 0.78
Pin = 4042.19W
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E & TE
At full load:
Power loss Ploss = Pin – P0 = 4042.19 – 3675 PLoss = 367.19W efficiency =
Power output Power input
3675 4042.19
= 90.91%
Input power at no load is Pin O 3VL I O cos 0
=
3 440 1.2 0.3
Pin O = 274.36W speed regulation
No load speed full load speed full load speed
1195 1150 1150
speed regulation = 3.9%
07. (b) (i) Explain the operation of a Voltage-to Frequency Converter. Given the primary advantages and limitations of voltage-to-frequency converters. (ii) The relationship between the input voltage vi and the output frequency f for the VCO is given as vi = f/50. If 530 pulses are passed by the AND gate during 0.1 sec gating pulse, what is the amplitude of vi?
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(20 M)
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CONVENTIONAL PAPER - 1
07.
(b) (i)
Sol:
In voltage to frequency converter the analog input is applied to an integrator. C R
Comparator
Counter
R Digital Output Pulse Generator
Pulse trigger output
Output of integrator Zero Level Trigger Level Time between two threshold levels The integrator produces a ramp signal whose slope is proportional to the input voltage signal level. When this ramp signal reaches a present threshold level, a trigger pulse is produced. Also a current pulse is produced which discharges the capacitor of the integrator, after which a new ramp is initiated. The time between successive threshold level crossings is inversely proportional to the slope of the ramp. Since the slope of the ramp is proportional to the input analog voltage, hence the frequency pf output pulses from the comparator is directly proportional to the input voltage. Advantages:
(1) V to F converters integrate noise and so are useful under circumstances similar to dual slope units (2) V to F are precise, accurate, simple, inexpensive, low powered and mostly run for a wide range of supply voltages ACE Engineering Academy
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E & TE
Limitations:
(1) Due to changeover switch there is integrator transient problem. (2) The switch isn’t closed for long time as there will be residual potential on the integrator and the time to integrate to threshold will be reduced. (3) It relatively slow. 07.
(b) (ii)
Sol:
Vi =
f 50
530 pulses 0.1 sec 5300 pulses 1 sec f = 5300 Vi =
5300 530 f 106V = 50 5 50
Vi = 106 V
07. (c) For the circuit shown in the figure below, let vc (0) = 15V (i) Find vc,vx and ix for t > 0.
5 0.1F
07.
(10 M)
8
ix + 12 vx –
+ –vc
(c) (i)
Sol:
Vc(s) 5
+ –
15/s 10/s
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8 Ix(s) + 12 Vx(s) –
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Vc (s) 5
CONVENTIONAL PAPER - 1
15 s Vc (s) 0 10 / s 20
Vc (s)
1 3 1 s Vc (s) 5 10 20 2 4 2s 1 3 Vc (s) 20 2 Vc (s)
30 15 2s 5 s 5 2
v c ( t ) 15e
5 t 2
; t>0
Vx(s) = Ix(s).12
Vc (s) 12 20 15 12 5 20 s 2 9 s
5 2
v x ( t ) 9e I x (s)
5 t 2
; t>0
Vc (s) 20 15 1 20 s 5 2 5
3 t i x ( t ) e 2 ; t >0 4
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E & TE
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CONVENTIONAL PAPER - 1
07. (c) (ii) Compute V1 and V2 in the circuit shown below. (10 M)
10450V +–
V1
300A
4
–j3
07.
(c) (ii)
Sol:
Using super node analysis
j6
V2 12
V1 V2 V2 30 0 -------(1) 3 j 6 j 12 V1 –V2 = 10450 V1 V V j 2 ( j) 2 30 0 3 6 12 (4 j)V1 V2 (2 j) V2 360 0 V1 (4 j) V2 (1 2 j) 360 0 4 j(V1 ) 4 j(V2 ) 401350 0 V2 (2 j 1) 360 401350 360 0 401350 V2 1 2 j
= 31.4–87.180 V1 = V2+10450 = 25.78–70.470
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E & TE
08. (a) (i) Two coils are wound on a toroidal core as illustrated in the figure below. The reluctance of the core is 107 (ampere-turns)/Wb. Determine the self-inductances and mutual inductance of the coils. Assume that the flux is confined to the core so that all of the flux links both the coils.
(10 M)
i2
i1 +
+ e1
e2 –
– N2 = 200
N1 = 100
08. (a) (i) Sol:
Given reluctance of core c = 107 AT/wb N1 = 100 N2 = 200 Self inductance of coil 1 L1 L1 L1
N12
2 100
10 7
10 4 107
L1 = 10–3H Self conductance of coil 2 L 2 L2
N 22
2 200
L2
2002
L2 = 410–3H Since the flux is confined only to core coefficient of coupling K = 1 ACE Engineering Academy
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CONVENTIONAL PAPER - 1
Mutual inductance M = K L1L 2 M = 1 10 3 4 10 3 M = 210–3H
08. (a) (ii) Consider the source, transformer and load shown in the figure below. Determine the rms values of the currents and voltages, (case-1) with the switch open and (case-2) with (10 M)
the switch closed. I1 +
110 Vrms 50 Hz –
I2
N1:N2
+
+
V1
V2
–
– N1 5 N2
08. (a) (ii) Sol:
10
Case I: switch open I1 +
110 Vrms 50 Hz –
I2
N1:N2
+
+
V1
V2
–
10
–
N1 5 N2 Assuming zero voltage drop V1= 110V When secondary is open I2 = 0A From current transformation formula I1 N 2 1 I 2 N1 5 I1 = 0A ACE Engineering Academy
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but
E & TE
V1 N1 (Voltage transformation) V2 N 2
110 5 V2 V2 = 22V V1= 110V
I1 = 0A
V2 = 22V
I2= 0A
Case II: When switch is closed: I1 + 110 Vrms 50 Hz –
I2
N1:N2
+
+
V1
V2
–
10
– N1 5 N2
Assuming negligible voltage drop V1= 110V From voltage transformation V1 N1 V2 N 2 V2
N2 1 110V 110 N1 5
V2= 22V From secondary side we can say that V2 = I2RL = I2(10) 22 = I2(10) I2= 2.2A ACE Engineering Academy
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CONVENTIONAL PAPER - 1
From current transformation I1 N 2 1 I 2 N1 5 I1 I 2 I1
1 5
2.2 5
I1= 0.44A
08.
V1= 110V
I1= 0.44A
V2= 22V
I2= 2.2A
(b) (i) Describe sampling oscilloscope and storage oscilloscope in brief. (ii) If, in the figure given below, the distance Y1 is 1.8 cm and Y2 is 2.3 cm, what is the
phase angle using the X-Y mode of oscilloscope? (15 M)
Y1
Y2
08.
(b) (i)
Sol:
A sampling oscilloscope generally used to test fast varying signals. The advantage of a sampling oscilloscope is that it can measure very high speed events, which require sweep speeds of the order of 10 psec per division and amplifier bandwidths of 15 GHz. While the disadvantage of a sampling oscilloscope is that it can only make measurements on repetitive wave form signals, continuous display for frequencies in the range of 50 – 300 MHz. The sampling oscilloscope is able to respond and store rapid bits of information and present them in a continuous display. However it should be understood that sampling techniques cannot be used for the display of transient waveforms.
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E & TE
The horizontal deflection of the electron beam is obtained by application of a staircase waveform to X deflection plates Input Waveform Sampling Plates
Stair case time base waveform
Figure: Sampling Oscilloscope A digital oscilloscope digitises the input signal, so that all subsequent signals are digital. A conventional CRT is used and storage occurs in electronic digital memory. Input Signal
Amplifier
Digitiser
Memory
Analyser Circuitry
Vertical Plates
Waveform Reconstruction
CRT Trigger Clock
Time Base
Horizontal Amplifier
Horizontal Plates
Figure: Block diagram of basic DSO The input signal is digitised and stored in memory in digital form as shown in block diagram. In this state it is capable of being analysed to produce a variety of different information. To view the display on the CRT the data from memory is reconstructed in analog form. Digitising occurs by taking a sample of the input waveform at periodic intervals. In order to ensure that no information is lost, sampling theory states that the sampling rate must be atleast twice as fast as the highest frequencies in the input signal. To full fill this requirement we require digitiser which is flash A/D converter which is fastest in conversion rate many different input channels are used with DSO. However if all these channels share a common store, through a multiplexer then the memory available to each channel is reduced. ACE Engineering Academy
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: 55 :
08.
(b) (ii)
Sol:
Y Phase angle = sin 1 int Ymax
CONVENTIONAL PAPER - 1
Y 1.8 o = sin 1 1 = sin 1 = 51.5 2.3 Y2
But as direction of movement of Lissagious figure not given phase angle may be two possible cases 1.8 o 1 = sin 1 = 51.5 2.3
or
1.8 o 1 1.8 2 = – sin 1 = 360 – sin = 308.5 2.3 2.3
08. (c) For the S-domain circuit shown in the figure, find: (i) the transfer function H(s) = V0/V1, (ii) the impulse response, (iii) the response when vi(t) = u(t) V, and (iv) the response when vi(t) = 8 cos 2t V. 1
Vi
a
S + 1 V0 –
1
+ –
(25 M)
b
08.
(c)
Sol: (i)
1
Vi
+ –
Va a 1
S + 1 V0 –
Va Vi Va V a 0 -------(1) 1 1 s 1 V0
1 Va ------(2) s 1
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(1) 2Va – Vi+
E & TE
Va 0 s 1
1 Va 2 Vi s 1 Va s 1 Vi 2s 3 (2)
V0 1 Va s 1
V0 V0 Va 1 s 1 Vi Va V1 s 1 2s 3 V0 1 Vi 2s 3
(ii)
V0 1 / 2 Vi s 3 2 3
h(t)
1 2t e ;t0 2
(iii) Vi(t) = u(t) Vi (s)
1 s
1 1/ 2 1 1 1 2 V0 (s) Vi (s) 3 3 3 s s 3 s s s 2 2 2 V0 ( t )
1 1 e 3 t / 2 u ( t ) 3
(iv) When Vi(t) = 8cos2t H( j)
1 3 2 j
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CONVENTIONAL PAPER - 1
When input is sine, output is also sine for LTI system 1 Magnitude of output = 8 at =2 2 9 4
8 5
2 Angle of output = Tan 1 3 2 4 Tan 3 = –53.130 So, output = 1.6cos(2t–53.130)
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ACE Engineering Academy
E & TE
Hyderabad|Delhi|Bhopal|Pune|Bhubaneswar| Lucknow|Patna|Bengaluru|Chennai|Vijayawada|Vizag |Tirupati | Kukatpally| Kolkata
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