DIGITAL WGIC LAB KL-300 EXPERIMENT MANUAL
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KL-300 DIGITAL LOGIC LAB
EXPERIMENT MANUAL
CONTENTS
CHAPTER 1 BASIC LOGIC GATE EXPERIMENTS 1-1
Introduction to Logics and Switches .................... ........... ..............
1-2
1-2
Logic Gates Circuits........ ... ...... ..... ............ .. ... ..... .... .... ........ .... ... ..
1-10
a. Diode Logic (DL) Circuit b. Resistor-Transistor Logic (RTL) Circuit c.
Diode-Transistor Logic (DTL) Circuit
d. Transistor-Transistor Logic (TTL) Circuit e. Complementary-Metal-Oxide-Semiconductor (CMOS) Circuit
1-3
Threshold Voltage Measurement . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . .. .. .
1-29
a. TTL Threshold Voltage Measurement b. CMOS Threshold Voltage Measurement
1-4
Voltagi/C~frerit Measurement...... .......... ...... ......... ......... ....... ...... ....
a. b.
1-5
1-31
Ttl.:: II~ \!Q!~ge and Current Measurement CMP$\ldtt~ge and Current Measurement
Basic Logic Gate Transmission Delay Measurement... .............. ......... . 1-36 a. TTL Gate Delay Time Measurement b. CMOS Gate Delay Time Measurement
1-6
Measurements of Basic Logic Gates Characteristics............. ... ...... .... . 1-43 a. AND Gate Characteristics Measurement b. OR Gate Characteristics Measurement c. INVERTER Gate Characteristics Measurement d . NAND Gate Characteristics Measurement e . NOR Gate Characteristics Measurement f.
XOR Gate Characteristics Measurement
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KL300-E061 229-EC
CONTENTS
1-7
Interface Between Logic Gates ......................................................... 1-55 a. TTL to CMOS Interface b. CMOS to TTL Interface
CHAPTER 2 COMBINATIONAL LOGIC CIRCUIT$ EXPERIMENTS 2-1
NOR Gate Circuit .... . .. ...... ......... ... .... . ..... . .... .... .. .. .. .. .. . .... .. .... .. . .. ..
2-3
2-2
NAND Gate CircJ.dt:·...... ... .. .. ...... .. . .. .... .. .. .. .. .. . ... .... .. .... ... .. .. .. .. .... .. ..
2-8
2-3
XOR Gate eiflcoit . ~;}. .. ......... ... ...... ....... ........ ... ...... ... ...... ...... ........
::,.__ ,:::::::;:::;::::::::::::::::::;::::::::::::::::::::::::··_,:=::
2-13
a, Con~tryctrng )(OR Gate with NAND Gate b ... . . C
