Complete LICA Lab Manual

DEPARTMENT LICA LAB MANUAL OF ECE

K L UNIVERSITY

LINEAR INTEGRATED CIRCUITS LAB Laboratory Manual

PREPARED BY

B.T.P.MADHAV P.POORNA PRIYA

KL University Guntur 2010-2011

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DEPARTMENT LICA LAB MANUAL OF ECE

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ACKNOWLEDGEMENTS We take this opportunity to thank Dr. Habibulla Khan Head of the Department, E.C.E for his support and encouragement during

this

work.

Especially

we

would

like

to

thank

Dr.S.Lakshminarayana Sr. Professor, Department of ECE for his continuous encouragement and suggestions towards the preparation of this manual and we thank all other teaching and non-teaching staff members for their encouragement and help during the preparation of this laboratory manual.

B.T.P.Madhav

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PREFACE Linear integrated circuits lab is a basic course taught to Electronics and Communication students at KL University. Operational amplifiers (Op-Amp 741) and IC 555 timer and IC 565 related experiments will be conducted in this lab. Learning objectives for each experiment is given in the beginning of the experiment in the manual. For each experiment a list of review questions are included. Answering to these questions ensures learning of the process in terms of its application. Students are expected to answer all the review questions and to enter their observations in the manual itself. Students will be working with each facility on rotation basics weekly twice. At the end of the semester, students are expected to familiarize completely for using all the facilities in the linear integrated circuits lab.

Authors

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LINEAR INTEGRATED CIRCUITS LAB List of experiments S.NO

Contents

Pg.no

1

Measurement of Op-Amp parameters

2

Applications

of

Op-Amp

(Adder,

8-13 Subtractor,

adder- 14-17

subtractor, average amplifier, Current to voltage converter) 3

Integrator and Differentiator using Op-Amp

18-21

4

Instrumentation Amplifier using Op-Amp

22-24

5

Wave form generation using Op-Amp (square, triangular)

25-26

6

Design of Active filters (LPF,HPF)

27-31

7

Analogue frequency meter

32-34

8

Study of Op-Amp comparator

35-36

9

Study of D/A converter using R-2R ladder

37-38

10

Study of Op-Amp logarithmic amplifier

39-40

11

Applications

of

555

timer

(Astable,

Monostable 41-44

multivibrator) 12

Study of PLL using 565, study of capture range, lock range, 45-49 VCO

13

Op-Amp voltage Regulator

50-51

14

Frequency Modulation using 566

52-54

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OP-AMP 741

IC-741 is a 8-pin IC. The pin diagram is shown in Fig. 1. Every IC should be supplied with positive and negative dc voltages of +12 and –12 volts respectively. +12V should be supplied to pin-7 and –12V to pin-4. Pin-2 is the inverting input pin and Pin-3 is the non-inverting input pin. Output can be measured at the output pin-6 with respect to the breadboard ground. Pins 1 and 5 are used for output offset voltage compensation. These two pins are not required for normal applications.

741 op-amp internal diagram 1. First, the input transistors are connected as NPN emitter followers, feeding their outputs directly to a pair of PnP transistors configured as common-base amplifiers. This configuration isolates the inputs, preventing signal feedback that might otherwise have some harmful frequency-dependent effects. Note the two pairs of transistors shown in red. One transistor in each pair has its collector connected to its base, as well 5

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as to the base of the other transistor. In addition, the transistor emitters are connected together, in this case to the V+ power source. In some diagrams, the transistor with the collector and base shorted together is rendered as a diode, which shows bias for the other transistor, but doesn't show the full value of this configuration. This arrangement is known as a current mirror. The two transistors are manufactured side by side on the same silicon die, at the same time. Thus, they have essentially identical characteristics. The controlling transistor (on the left in each pair) will necessarily set its emitter-base voltage to exactly that value that will sustain the collector current it is carrying, even down to fractions of a mill-volt. In so doing, it also sets the emitterbase voltage of the second transistor to the same value. Since the transistors are essentially identical, the second transistor will carry exactly the same current as the first, even to an independent circuit.

2. The use of a current mirror on the input circuit allows the inputs to accommodate large common-mode voltage swings without exceeding the active range of any transistor in the circuit. The second current mirror in red provides a constant-current active load for the output circuitry, again without regard for the actual output voltage. A third current mirror, shown in blue, is a bit different. That 5K resistor in series with the emitter of the mirrored transistor limits its collector current to virtually nothing. Thus, it serves as a high-impedance connection to the negative power supply, providing a reference without loading the input circuit. This particular circuit is therefore able to provide the slight base bias current needed for the PNP transistors in the differential input circuit, while allowing those transistors to operate correctly over a wide common-mode input voltage range.

3. The final odd circuit within the op amp is shown in green. Here, the two resistors bias the transistor in what would seem to be an unusual way, since there is no apparent signal input to the base of the transistor. To understand its purpose, assume zero base current for a moment, and a VBE of 0.625 volt. Ohm's Law then requires a current of 0.625 ÷ 7.5K = 0.0833mA through the 7.5K resistor. The same current must also flow through the 4.5K resistor, which will therefore exhibit a voltage drop of 0.0833mA × 4.5K = 0.375V. The total voltage across the two resistors, then, and therefore across the transistor, is 0.625V + 0.375V = 1.0V. This, then, is a simple 6

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voltage reference, providing an internal 1-volt difference without a connection to either power supply, nor to ground. This circuit floats internally, and provides its 1volt bias regardless of the actual dc output voltage of the overall circuit. Op-Amp Applications  It Performs many different ―operations‖ like Addition/Subtraction, Integration, Differentiation, Buffering, Amplification DC and AC signals +, −, Σ, ×, dx/dt, ∫ and used in Comparators, Oscillators, Filters, Sensors, Sample and Hold, Instrumentation Amplifier . Op-Amp Characteristics  High gain  High input impedance  Low output impedance  CMRR is high  Slew rate is high

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Measurement of Op-Amp parameters

AIM: To measure AC and DC parameters of Op-Amp EQUIPMENT REQUIRED: 1. Bread board. 2. Resistor-1, 10, 100, 200, 330KΩ--1no. 3. Capacitor-0.01, 0.1μf—1no. 4. Function generator 5. CRO with Probes. 6. Connecting wires Theory: DC Parameters:1. Input Bias Current: An input bias current I B is defined as t h e average value of base currents entering into the terminals of OP-AMP (i .e . IB1 and IB2 )

In the above characteristics (a) represents, ideal transfer characteristics (b) and (c) represents non ideal characteristics. Vos=±off set voltage. If Vos=1mv, Av=5000, output=-5v 2. Input offset Voltage: It is defined as the voltage that has to be applied between the op-amp input terminals to obtain zero voltage at the output. AC Parameters:1) Bandwidth: It is defined as the maximum frequency at which a full sized undistorted sine wave can be obtained at the op-amp output. 2) Slew Rate (SR): It is defined as the maximum rate of change of the output voltage per unit of time and is expressed in volts/micro sec.

3) Common Mode Rejection Ratio (CMRR): It is defined as the r a t i o o f the differential voltage gain Ad to t h e common mode voltage gain A c 8

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CMRR=A d /Ac The differential voltage gain is same as t h e l ar ge signal voltage gain A. Commonmode voltage gain can be determined from t h e c i r c u i t given below using the equation Acm = Vocm / V cm Vocm = Output common-mode voltage V cm = Input common-mode voltage Acm = Common-mode voltage gain Circuit Diagram: DC Parameters: 1) Input Bias current a) Non-inverting Since the bias current is in µAmps, to measure reasonably large voltage uses 10Mohms instead of 1Mohm. V0=-I2R

b) Inverting:

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Input Bias Current procedure: 1) Connections are made as per circuit diagram. 1) Switch on the dual power supply 3) Note down (lie Output voltage with DMM 4) I0 = V () / R is the input bias current in the non-inverting mode 5) Repeat the above procedure in the inverting mode and calculate current from I0 + =V o /R By definition, it is the average of the two input bias currents, Ibias = (I1+I2)/2. For 741 opamps, it is less than 500nA. If the feedback resistor is 1Mohm, V0 = 500mv. 2 Input offset voltage: VOS is the difference in the voltage between the inputs that is necessary to make Vout (error) = 0. Vout (error) is caused by a slight mismatch of VBE1 and VBE2. Typical values of VOS are 2mV. V0 = Vi R3/ (R3+R4)

Inverting Amplifier

Non-Inverting Amplifier

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1) Connections are made as per circuit diagram. 2) Switch on the dual power supply and note down the voltage with DMM Calculate the input offset voltage from the formula

Output

AC Parameters: 1 Bandwidth:

1) Connections are made as per circuit diagram. 2) Give a sinusoidal input of 2V PP. 3) Switch on the dual power supply. 4) Increase the frequency u n t i l the output voltage reduces to 0.707 times the input voltage. 5) Note down the frequency at this point and this gives the bandwidth of the op-amp at unity gain (at this frequency the gain is not unity but 0.707 of mid frequency) 2. Slew rate:

Unity gain, no o/p load, higher closed loop gain, higher supply voltage; slew rate is high SR decreases with increases with increasing of temperature. 1) Connections are made as per the circuit diagram 2) Give a sinusoidal input of 2 Vpp of 1 KHz 11

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3) Switch on the dual power supply 4) Vary the input frequency and observe the output 5) Note down the values of the input frequency at which the output get distorted. 6) Determine the slew rate from the formula given below Slew rate=2πfVm/106 V/µsec 7) Increase the amplitude at input note the slew rate 3 CMRR 1) Connections are made as per circuit diagram 2) Give a sinusoidal input of 1Vpp of 1 KHz 3) Switch on the dual power supply 4) Note the output voltage from CRO 5) Determine CMRR by the following procedure Common mode gain=Ac=V0/V1 Differential mode gain=Ad=R2/R1 CMRR=20 log (Ad/ Ac) Common Mode:

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Differential Mode:

RESULT: DC Parameters: Input Bias current=____________________mA Input off-set voltage=__________________ mV AC Parameters: Bandwidth=________________________ KHz Slew rate=_______________________ V/µsec CMRR=___________________________ dB

Review Questions: 1) 2) 3) 4)

Why op amp called with 741? What are the different parameters to get output off set voltage? Why op-amp open loop is not connected in all applications? In what way CMRR effect the output of Op amp?

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2. APPLICATIONS OF OP-AMP Aim: To observe the applications of the op-amp. Apparatus: 1) 2) 3) 4) 5)

Op-Amp (uA- 741)-3 No.s DC Power Supply ( 1 2 - 0 - 12) V CRO(0-20MHz range) Signal Generator (0 -1MHz range) Bread Board

Theory: 1) Summing Amplifier: Summing amplifier is used to add different voltage values applied at the input. Connections are made as per the circuit diagram Give input voltages from the DC power supply to the inverting terminal as shown in the figure. Measure the output voltage with the help of a multimeter. Verify the output voltage with the voltage obtained practically by using the formula Vo=-(Rf/R) [V1 + V2 + V3]

2) Subtractor: A basic differential amplifier can be used as a subtractor, as shown in the figure. I f a l l the resistors a r e equal in value, then the output voltage can be derived by using superposition principle

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Connections are made as per the circuit diagram Give input values from the DC power supply to both inverting terminal and non-inverting terminals as shown in the figure. Measure the output voltage with the help of a multimeter. Verify the output voltage with the voltage obtained practically by using the formula Vo= [V2 – V1] (since Rf = R considered)

3. Adder-Subtractor Connections are made as per the circuit diagram Give input values from the DC power supply to both inverting terminal and non-inverting terminals as shown in the figure. Measure the output voltage with the help of a multimeter.

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Averaging amplifier

Connections are made as per the circuit diagram Give input values from the DC power supply to both inverting terminal and non-inverting terminals as shown in the figure. Measure the Average output voltage with the help of a multimeter. The above circuit can be used as an averaging circuit in which the output of the circuit is equal to the average of all the input voltages. This is accomplished by using all resistors of equal value, Ra= Rb= Rc=R In addition, the gain by which each input is amplified must be equal to 1 over the number of inputs; that is, RF/R=1/n. where n is the number of inputs. Thus for a circuit with 3 inputs, consequently from equation3 Vo= (Va+Vb+Vc)/3 1) Current to voltage converter

Photocell, photodiode and photovoltaic cell give an output current that is proportional to an incident radiant energy or light. The current through these devices can be converted to

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voltage by using a current-to-voltage converter and thereby the amount of light or radiant energy incident on the photo-device can be measured. Above figure shows an op-amp used as I to V Converter Since the (-) input terminal is at virtual ground, no current flows through Rs and current ii flows through the feedback resistor Rf. Thus the output voltage v0 = - ii Rf. It may be pointed out that the lowest current that this circuit can measure will depend upon the bias current IB of the op-amp. This means that 741 (IB = 3 nA) can be used to detect lower currents. The resistor R f is sometimes shunted with a capacitor Cf to reduce high frequency noise and the possibility of oscillations. Result:

Review questions: 1) System applications for the 741 op amp? 2) What are the uses for a 741 op amp? 3) Which amplifier is a summing amplifier with a closed loop gain equal to the reciprocal of number of inputs? 4) A current-to-voltage converter produces?

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3. Op-Amp as Integrator and Differentiator Aim: To observe Op-Amp as integrator and differentiator. Apparatus: 1) Op-Amp (uA- 741)-3 No.s 2) DC Power Supply ( 1 2 - 0 - 12) V 3) CRO(0-20MHz range) 4) Signal Generator (0 -1MHz range) 5) Bread Board 6) Resistors 1K, 10K and capacitors 0.01uf Integrator: It is defined as the maximum rate of change of the output voltage per unit of time and is expressed in volts/micro sec. Integrators produce output voltages that are proportional to the running time integral of the input voltages. In a running time integral, the upper limit of integration is t.

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Integrator procedure: Connections are made as per circuit diagram. Give a square wave input 1 Vpp, 1 KHz from the AC power supply to the inverting terminal as shown in the figure. Observe and measure the output wave obtained in the CRO. Differentiator: It is defined as the maximum frequency at which a full sized undistorted sine wave can be obtained at the op-amp output.

Differentiator procedure: Simple differentiator without R1 and Cf will not function well since the gain Rf/Xc1 increases with increase in frequency at a rate of 20dB/decade. This makes the circuit unstable.

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Input impedance Xc1 decreases with increase of frequency which makes the circuit very susceptible to high frequency noise. When amplified this noise can completely over ride the differentiated output signal. The frequency fa is the frequency at which the gain is 0dB. fa=1/(2πRfC1) [ for simple differentiator] fc is the unity gain Bandwidth and f is some relative operating frequency. The response of practical differentiator (with Rf and Cf) is given by RED lines. From f to fb the gain increases at 20db/decade. fb= 1/(2πR1C1); R1C1=RfCf if fa < fb < fc fa=1/(2πRfC1) ; fb=1/(2πR1C1)=1/(2πRfCf); fc=unity gain bandwidth The input signal will be differentiated properly if the time period T of the signal T≥ RfC1 Connections are made as per circuit diagram. Give a square wave input 1 Vpp, 1 KHz from the AC power supply to the inverting terminal as shown in the figure. Observe and measure the output wave obtained in the CRO. Verify the output voltage with the voltage obtained practically by using the formula Vo= -RfC1dV1 /dt

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Comparison between Integrator and Differentiator The process of integration involves the accumulation of signal over time and hence sudden changes in the signal are suppressed. Therefore an effective smoothing of signal is achieved and hence, integration can be viewed as low-pass filtering. The process of differentiation involves identification of sudden changes in the input signal. Constant and slowly changing signals are suppressed by a differentiator. It can be viewed as high-pass filtering.

Result:

Review Questions: 1) Why op amp integrator has high value resistor connected across input? 2) Why op amp integrators are not used? 3) Integrator produces an output that approximates the area under the curve of an input function(T/F) 4) differentiator is used to measure________________ 5) Mention the drawback of differentiator

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4 INSTRUMENTATION AMPLIFIER USING OP - AMP Aim: To study the performance of an Instrumentation amplifier. Apparatus: 1) 2) 3) 4) 5)

Op-Amp (uA - 7 4 1 ) - 3 No.s DC Power Supply ( 1 2 - 0 - 1 2 ) V CRO((0-20MHz range) Resistors Bread board

INSTRUMENTATION AMPLIFIER USING TRANSDUCER BRIDGE: Fig shows a simplified differential instrumentation amplifier using a transducer bridge. A resistive transducer whose resistance changes as a function of some physical energy is connected in one arm of the bridge with a small circle around it and is denoted by (RT±ΔR), where RT is the resistance of the transducer and ΔR is the change in resistance RT.

The bridge in the circuit of fig is dc excited but could be ac excited as well. For the balanced bridge at some reference condition, Vb=Va RB(Vdc)

= RA(Vdc)

RB+ RC

RA+RT 22

DEPARTMENT LICA LAB MANUAL OF ECE RC RB

=

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RT RA

Generally resistors RA,RB, RC are selected so that they are equal in value to the transducer resistance RT at some reference condition. The reference condition is specific value of the physical quantity under measurement at which the bridge is balanced. This value is normally established by the designer and depends on the transducers characteristics, the type of physical quantity to be measured, and the desired application. The bridge is balanced initially at a desired reference condition. However, as the physical quantity to be measured changes, the resistance of the transducer also changes, which causes the bridge to unbalance (Va≠Vb).The output voltage of the bridge can be expressed as a function off the change in resistance of the transducer. Let the change in resistance of the transducer be ΔR.Since R B and RCare fixed resistors, the voltage Vb is constant.However,voltage Va varies as a function of the change in transducer resistance.Therefore, according to the voltage divider rule, Va=RA(VDC)/RA+RT+ΔR Vb= RB(VDC)/RB+RC

Consequently, the voltage Vab across the output terminals of the bridge is Vab=Va-Vb =(RA(VDC)/RA+RT+ΔR) - RB(VDC)/RB+RC However if RA=RB=RC=RT=R Vab=ΔR(Vdc)/2(2R+ΔR) The negative sign indicates the Va T/ 2 where T is the (period of square wave. As a general rule, R4C2 should be equal to T. It may also be necessary to shunt the capacitor C2 with resistance R5 = 10 R4 and connect an offset volt compensating network at the non-inverting (+) input terminal of op-amp A2 so as to obtain a stable triangular wave.

Procedure: 1) Connections are made as per the circuit diagram 2) Give the biasing voltage as power to the IC 3) Observe the square wave output at 1st op-amp sixth pin and triangular wave output at 2nd op-amp sixth pin. 4) Adjust the potentiometer to observe the undistorted square wave output. 5) Calculate the frequency and amplitude of the square and triangular wave observed from the CRO. 6) Compare the practical waves obtained with the theoretical values 25

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Result: Practical values Frequency= Amplitude of square wave= Amplitude of triangular wave = Theoretical values: Frequency= Amplitude of square wave= Amplitude of triangular wave =

Review Questions: 1) In which region the op amp is acts like a wave form generator 2) Another name for square wave generator is -------------------3) The triangular wave amplitude is depends on --------------------

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6. Design of active filters using Op-Amp Aim: To design and test the low pass filter and high pass filter using op-amp Apparatus: 1) 2) 3) 4) 5) 6)

Op-Amp (uA - 7 4 1 ) - 2 No’s DC Power Supply ( 1 2 - 0 - 1 2 ) V CRO((0-20MHz range) Signal Generator (0 to 1MHz range) Bread board Resistors and capacitors

Low pass filter:

Figure (1) frequency response

Figure (2) Low pass filter using op-amp

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Experimental procedure: 1) Vary the input frequency at regular intervals and note down the output response from the CRO. 2) Calculate the gain in dB. 3) Verify practical and theoretical cutoff frequency 4) Plot the frequency response on semi-log sheet

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Second order Low pass filter

Where AF = 1+RF/R1 = Passband gain of the filter f = frequency of the input signal fH = 1/2Π√R2R3C1C2 = high cutoff frequency (Hz) High pass filter:

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Experimental procedure: 1) Vary the input frequency at regular intervals and note down the output response from the CRO. 2) Calculate the gain in dB. 3) Verify practical and theoretical cutoff frequency 4) Plot the frequency response on semi-log sheet

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Second order high pass filter

The voltage gain magnitude of the second order high pass filter is Vo/Vin = AF/√1+ (fL/f) 4 Result: Practical values Cut-off Frequency of low pass filter = Cut-off Frequency of high pass filter = Theoretical values: Cut-off Frequency of low pass filter = Cut-off Frequency of high pass filter = Review Questions: a. b. c. d. e.

What happens when the no. of stages of filter increases ? What is the necessity of Op-Amp in designing of Active filters What is the another name for butter worth low pass /high pass filter Mention the application of Butterworth filter What is the difference between First-order filter and second order filter?

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K L UNIVERSITY ANALOGUE FREQUENCY METER

AIM To design and construct an analogue frequency meter (0-1 kHz). APPARATUS IC 741— Two with bases, Diodes—Two(2) ,Voltmeter (EVM or DVM), Capacitors and resistors, 10 W potentiometer, Dual power supply (15-0-15) 1.5 V battery.

INTRODUCTION Radiation transducers like photomultipliers and particle detectors produce signals in the frequency domain. These signals have to be converted into analogous current or voltage signals in order to display or record them using analogue devices like recorders, etc. A simple circuit to convert frequency to voltage is shown in Fig. 9.4.1. The input signal is given to one of the inputs of an op amp comparator. The other input of the comparator is referenced at a convenient value nsitions that occur at the output of the comparator contain information regarding the input signals. They enable us to count events. The comparator output is coupled to a diode pump circuit shown in the figure. After the positive transition, the capacitor Cx gets charged through D{. The capacitor gets charged through D2 after negative transitions, as the anode of D2 is maintained at the virtual ground. The charge after each transition is given by Q - CXAV

(1)

Where AV is the peak-to-peak value of the comparator output. The average charging current through D2 at a frequency/is given by 32

DEPARTMENT LICA LAB MANUAL OF ECE -l a v =f C t dV

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The minus sign indicates that the current must be supplied to the current pump. The charging current is converted into voltage by the op amp current follower. The output voltage is given by v0 =~ R7fCxA V

(3)

The output voltage may be monitored by an average reading voltmeter. DESIGN PROCEDURE Let us design an analogue frequency meter with a transfer function of one volt per kH z the maximum operating frequency being 1 kHz. For the op amp 741, with 15-0-15 V as power

supply, AV — 20 V. The capacitor Cx should be charged to the full comparator output after each transition. Since a capacitor is fully charged after five time constants.

5C\Ri < the lowest time period of the input wave, i.e., 5C,/?, < lcr 3 s

We may choose 10 k£? for i?1# EXPERIMENTAL PROCEDURE Frequency Meter

1. Wire the circuit as shown in Figure with the values Monitor the output voltage using DVM or EVM.

of components as per the design.

2. Adjust the potentiometer (P) such that v T = 0.2 V. 3. Adjust the output of the audio oscillator to be 0.1 V. 4. Increase the output of the audio oscillator to 0.3 V. Vary frequency of the input signal from lowest available to 1 kHz in able steps. Measure the output voltage at each step. Tabulate results as indicated in Table

the suit the

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Frequency

Output voltage

(Hz)

vn

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Transfer function Design

Measured

10 100 200 300 . .

1000 5. Plot VQ as a function of frequency. Evaluate the slope (dv{)jdf). Compare with the design value. 6. Measure the output voltage at 1.5 kHz, 2.0 kHz and 4 kHz. Does the output voltage increase linearly with frequency? Discuss.

Result:

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8. Study OP-Amp Comparator (window detector) Aim: to study the comparator operation using Op-Amp Apparatus: 1) 2) 3) 4) 5)

Op-Amp (uA - 7 4 1 ) - 2 No’s DC Power Supply ( 1 2 - 0 - 1 2 ) V Bread board Resistors (4.2k, 6.3k)-2 No’s LED’s

If Vcc = 6v Input(Volts)

LED3

LED2

LED1

Less than 2V

ON

OFF

OFF

Less than 4V & More than 2V

OFF

ON

OFF

More than 4V

OFF

OFF

ON

1) Connect the circuit as shown in the figure 2) Apply voltages according to table given and verify the LED’s.

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Comparison between Schmitt trigger and comparator S.No.

Schmitt Trigger

Comparator

1.

The feedback is used.

No feedback is used.

2.

Op-amp is used in closed loop mode.

Used in open loop mode.

3.

No false triggering.

False Triggering.

4.

Two different threshold voltages exists as VUT & VLT

Single reference voltage Vref or –Vref.

5.

Hysteresis exists.

No Hysteresis exists.

Result:

Review Questions: 1) What is the principle of comparator? 2) Which type of circuit use comparator?

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9. D/A CONVERTER USING R – 2R LADDER Aim: To study the operation of DAC using IC – 741. Apparatus: 1) 2) 3) 4)

Op-Amp (µA – 741) – 1No.s DC Power Supply (12 – 0 – 12) V Bread Board Resistors – 3.3k, 6.6k-No’s-4

Theory: Analog signal is a smooth, but continuous time varying signal. It is not possible to study such a change in signals. In order to study the signal, we require discrete samples of the signal at different instances of time. i.e. we require a digitized signal or digital signal. Digital signal is therefore a discrete signal. Discrete signal obtained for the purpose of analysis must be converted back again into the original analog signal after the analysis of the signal. Thus we require ADC and DAC. The input to a DAC is a digital signal. A digital signal is a sequence of 1’s and 0’s. Each bit is positional weighed in a digital port or signal. A digital port in electronics can be of N – bit length. Circuit Diagram:

Procedure: 1) Connect the circuit as per circuit diagram. 2) Give the biasing voltages as power supply to the IC – 741(+Vee and –Vee) 3) Give the binary inputs from (000 – 111) and measure the output using a multimeter and note the values under V0(P) 4) Theoretical value of V0 is given by V0 = -Rf [(B0/4R) + (B1/8R) + (B2/16R)] 37

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5) Compare theoretical and practical values and calculate the percentage of error. Result:

B2

B1

B0

0

0

0

0

0

1

0

1

0

0

1

1

1

0

0

1

0

1

1

1

0

1

1

1

V0(T)

V0(P)

Result:

Review Questions: 1) What is the another name for this type of DAC? 2) The output voltage is the ---------- sum of all the input voltages in this circuit. 3) List the other types of DAC’s that are available?

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LOGARITHMIC AMPLIFIER Aim: to verify the op amp as logarithmic amplifier Apparatus: op-amp, diode, resistor, function generator, bread board, power supply

A logarithmic amplifier has an Output voltage that is proportional to the logarithm of the input, or: Vout=0.06 log Vin+k, where k=0.495 for above circuit. For a logarithmic amplifier to function properly, its nonlinear element, such as a diode or transistor, must have logarithmic function. For a diode, the voltage drop across it (VD) as a function of the current that flows through it is essentially given by the relation: VD= K log (I).

Where the constant A is based on the semiconductor properties of the diode. For building practical logarithmic amplifiers, transistors are usually preferred over diodes, as shown in the transdiode logarithmic amplifier circuit of Fig. 1 using a grounded base NPN transistor in the feedback loop when the input is positive. Note: 2N2222 gets heated and the output is temperature sensitive. I/P offset voltage causes error. Remedy: use offset pot between 1&5 terminals of opamp. Diode is used for protection of the transistor when output voltage is positive. Capacitor reduces the AC gain and eliminates the high frequency oscillations.

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Result:

Review Questions: 1) 2) 3) 4)

A log amplifier has ________ in the feedback loop. An antilog amplifier has a ________ in series with the input.

The process known as signal compression is used with a(n) log amplifier.(T/F)? What part of the characteristic curve of a diode is useful for log amplifiers?

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APPLICATIONS OF 555 TIMER Aim: to study the applications of 555 timer Apparatus: IC 555, power supply, CRO, Resistors, capacitors, connecting wires, bread board. Pin Diagram of 555 The pinouts for the 8 pin DIP package are as follows:

A block diagram of the 555 timer:

Pin descriptions for the 555 PIN

DESCRIPTION

PURPOSE

1

Ground

DC Ground

Trigger

The trigger pin triggers the beginning of the timing sequence. When it goes LOW, it causes the output pin to go HIGH. The trigger is activated when the voltage falls below 1/3 of +V on pin 8.

2

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3

Output

The output pin is used to drive external circuitry. It has a "totem pole" configuration, which means that it can source or sink current. The HIGH output is usually about 1.7 volts lower than +V when sourcing current. The output pin can sink up to 200mA of current. The output pin is driven HIGH when the trigger pin is taken LOW. The output pin is driven LOW when the threshold pin is taken HIGH, or the reset pin is taken LOW.

4

Reset

The reset pin is used to drive the output LOW, regardless of the state of the circuit. When not used, the reset pin should be tied to +V.

5

Control Voltage

The control voltage pin allows the input of external voltages to affect the timing of the 555 chip. When not used, it should be bypassed to ground through an 0.01uF capacitor.

6

Threshold

The threshold pin causes the output to be driven LOW when its voltage rises above 2/3 of +V.

7

Discharge

The discharge pin shorts to ground when the output pin goes HIGH. This is normally used to discharge the timing capacitor during oscillation.

8

+V

DC Power - Apply +3 to +18VDC here.

a) Astable Multivibrator

This circuit diagram shows how a 555 timer IC is configured to function as an astable multivibrator. An Astable multivibrator is a timing circuit whose 'low' and 'high' states are both unstable. As such, the output of an astable multivibrator toggles between 'low' and 'high' continuously, in effect generating a train of pulses. This circuit is therefore also known as a 'pulse generator' circuit. 42

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In this circuit, capacitor C1 charges through R1 and R2, eventually building up enough voltage to trigger an internal comparator to toggle the output flip-flop. Once toggled, the flip-flop discharges C1 through R2 into pin 7, which is the discharge pin. When C1's voltage becomes low enough, another internal comparator is triggered to toggle the output flip-flop. This once again allows C1 to charge up through R1 and R2 and the cycle starts all over again. C1's charge-up time t1 is given by: t1 = 0.693(R1+R2) C1. C1's discharge time t2 is given by: t2 = 0.693(R2) C1. Thus, the total period of one cycle is t1+t2 = 0.693 C1 (R1+2R2). The frequency f of the output wave is the reciprocal of this period, and is therefore given by: f = 1.44/ (C1 (R1+2R2)), wherein f is in Hz if R1 and R2 are in megaohms and C1 is in microfarads. b) Monostable Multivibrator

This circuit diagram shows how a 555 timer IC is configured to function as a basic monostable multivibrator. A monostable multivibrator is a timing circuit that changes state once triggered, but returns to its original state after a certain time delay. It got its name from the fact that only one of its output states is stable. It is also known as a 'oneshot'. In this circuit, a negative pulse applied at pin 2 triggers an internal flip-flop that turns off pin 7's discharge transistor, allowing C1 to charge up through R1. At the same time, the flip-flop brings the output (pin 3) level to 'high'. When capacitor C1 as charged up to about 2/3 Vcc, the flip-flop is triggered once again, this time making the pin 3 output 'low' and turning on pin 7's discharge transistor, which discharges C1 to ground. This circuit, in effect, produces a pulse at pin 3 whose width t is just the product of R1 and C1, i.e., t=R1C1. 43

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The reset pin, which may be used to reset the timing cycle by pulling it momentarily low, should be tied to the Vcc if it will not be used. Result:

Review questions: 1) 2) 3) 4) 5)

What is the basic principle of 555 to act like a astable multivibrator? How astable mode of 555 can be changed to square wave generator How the duty cycle of astable multivibrator using IC555 can be changed? What is the basic principle of 555 to act like a monostable multivibrator? What is the difference between astable multivibrator and mono stable multivibrator using IC 555

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PHASE LOCKED LOOP (PLL) Principle of PLL:

PLL has emerged as one of the fundamental building block in electronic technology. It is used for the frequency multiplication. Fm stereo detector, FM demodulator, frequency shift keying decoders, local oscillator in TV and FM tuner. The block diagram of PLL is as shown in figure. It consists of phase detector, a LPF and a voltage controlled oscillator(VCO).The phase detector or comparator compares the input frequency, fin, with feedback frequency, fout(output frequency).The output of the phase detector is proportional to the phase difference between fin and fout. The output voltage of the phase detector a DC voltage and therefore, is often refers to as error voltage. The output of the phase detector is then applied to the LPF, which removes the high frequency noise and produces a DC level. The DC level in turn is the input to the VCO. The output frequency of the VCO is directly proportional to the input DC level. The VCO frequency is compared with the input frequencies and adjust until it is equal to the input frequency. In short, PLL keeps its output frequency constant at the input frequency. Thus, PLL goes through 3 states, 1. Free running state 2. Capture range/mode 3. Phase lock state. Before input is applied, the PLL is in the free running state. Once the input frequency is applied, the VCO frequency starts to change and the PLL is said to be the capture range/mode. The VCO frequency constitutes to change(output frequency)until it equals the input frequency and the PLL is then in the phase locked state. When phase is locked, the loop tracks any change in the input frequency through its respective action.

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IC version of PLL: Today, the PLL is even available as a single package, and examples are560, 561,562,564,565 and 567.These are all monolithic ICs. These differ mainly in operating frequency range, power supply requirements, etc. Characteristics of 565 IC: 1. Operating frequency: 0.001Hz to 500 KHz. 2. Operating Voltage: ±6V to ±12V 3. Input level required for tracking: 10mV (rms) to 3V (pp) 4. Input impedance: 10KΩ (typical) 5. Output sink current: 1mA (typical) 6. Output source current: 10mA (typical) Frequency Multiplication using PLL:

The frequency divider is inserted between the VCO and the phase detector in the feed-back path. Since the output of the divider is locked to the input frequency, fin, the VCO is actually running at the multiple of the input frequency and hence names the multiplier. The dividerby-N network is a modulo-N multiplication (MOD-N) binary counter. A proper divided by N network can obtain the desired amount of multiplication. Where N is an integer. Example: to obtain the output frequency,fout=5fin, a divided-by-5 network is needed. Relationship between Fout FL,FC

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EXPERIMENT :( Phase Locked Loop) Aim: study of IC 565 PLL and find the following parameters 1. Lock range 2. Capture Range Equipment Required: Equipment

Range

Quantity

Signal generator

(0-1) MHz

1

CRO

(0-20) MHz

1

Dual Power supply

(12-0-12) V

1

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Circuit Diagram:

Procedure: 1. Connect the circuit as per the circuit diagram 2. Measure the free running frequency of IC565 at pin 4 using CRO with the input signal(say0v) from the signal generator OR shorting pin2 to ground 3. Set the input signal say 1 V,1KHz to pin 2 using signal generator and observe the waveform on the CRO. 4. The frequency varied till the output signal is 1800 out of phase with input. This is the upper end of the lock range. 5. The frequency is reduced till the output is 900 out of phase with the input. This is the upper end of the capture range. 6. The frequency is varied till a 900 phase shift is obtained in the output with reference to the input once again. This is the lower end of the locking range. 7. As the frequency is decreased further, output goes to 1800 out of phase with the input once again. This is the lower end of the capture range. 8. The lock range, ΔfL = (f2 – f4) The capture range, Δfc = (f3 – f1) 9. Compare these values with its theoretical value.

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Result:

___________________________________________________________________________ Parameter

Theoretical value

Practical value

___________________________________________________________________________ Lock Range

ΔfL = ± (7.8 f0)/ 12

Capture Range

Δfc = ± [Δ fL/ (2π * 3.6 * 103 * C)]1/2

Free running frequency

f0 = 0.25/ (RTCT)

Review questions: 1) Define locking range of phase locked loop 2) Define capture range of phase locked loop 3) Mention three main blocks of IC 565 4) Define free running state of phase locked loop

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DEPARTMENT LICA LAB MANUAL OF ECE

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Op-Amp Voltage Regulator Aim: Design and construct a voltage regulator using Op-Amp 741 Apparatus: 1) IC – 741, 1 No. 2) DC Power Supply(12 -0 -12) V 3) Bread Board

Figure (1) Op-Amp Voltage Regulator Theory: Figure shows a simple voltage regulator circuit that employs an operational amplifier (op-amp). As its name implies, this circuit accepts an unregulated voltage input (i.e., a fluctuating input voltage), and provides a regulated voltage output (a stable output voltage that remains at or very close to its intended output level). The unregulated input voltage must be higher than the desired output level by a sufficient margin in order to achieve 'effective' regulation. The zener diode Vz acts as a voltage reference for the circuit, and is fed into the noninverting input of the operational amplifier. The voltage divider formed by R1 and RF sets the voltage level of the inverting input of the op amp, which is basically a feedback from the circuit output to the op amp. The NPN transistor is used to boost the output current of the circuit. The voltage at the non-inverting input of the op amp is pegged at the zener voltage, while the voltage at the inverting input is always a fraction of the output voltage as defined by RF and R1. When the output exceeds the set level, the inverting input voltage exceeds that of the non-inverting input, causing the output of the op-amp to go 'low'. This turns off the NPN transistor, causing the output voltage to dip. When the output goes below the set level, the reverse happens, i.e., the op-amp's output goes 'high', causing the NPN transistor to turn on and pull the voltage up. 50

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Thus, this circuit works by turning off the transistor when the output voltage is too high and turning it on when the output is too low. This balancing act happens continuously, with the circuit reacting instantaneously to deviations in the output voltage. Resistor RF is adjusted to set the desired output voltage of the circuit. The zener diode needs to be replaced by a voltage reference IC if a more stable and more precise output is required. Procedure: 1) 2) 3) 4) 5)

Give the biasing voltages as power to the IC. Connect the circuit with the above designed values. Observe the outputs and compare them with the theoretical values. Connect the constant voltage regulator circuit as shown above. Give the input from a regulated DC power supply varying it from (0 to 10) V and observe the output.

Result:

Review Questions: 1) IC 741 can be used as either a linear or -------------- regulator 2) List out other IC regulators that are commonly used.

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FREQUENCY MODULATION USING 566

Aim: To verify Frequency modulation using IC 566 and to calculate the modulation index for various modulating voltages. Apparatus: IC NE566, Resistors, Capacitor, CRO, Bread board and connecting wires, RPS Theory: Frequency modulation is a process of changing the frequency of a carrier wave in accordance with the slowly varying base band signal. The main advantage of this modulation is that it can provide better discrimination against noise. Frequency Modulation using IC 566 A VCO is a circuit that provides an oscillating signal whose frequency can be adjusted over a control by Dc voltage. VCO can generate both square and triangular Wave signal whose frequency is set by an external capacitor and resistor and then varied by an applied DC voltage. IC 566 contains a current source to charge and discharge an external capacitor C1 at a rate set by an external resistor. R1 and a modulating DC output voltage. The Schmitt trigger circuit present in the IC is used to switch the current source between charge and discharge capacitor and triangular voltage developed across the capacitor and the square wave from the Schmitt trigger are provide as the output of the buffer amplifier. The R2 and R3 combination is a voltage divider, the voltage VC must be in the range ¾ VCC < VC < VCC. The modulating voltage must be less than 3/4VCC the frequency fc can be calculated using the formula fo = 2 (VCC-Vc) R1 C1 VCC For a fixed value of VC and a constant C1 the frequency can be varied at 10:1 similarly for a constant R1 C1 product value the frequency modulation can be done at 10:1 ratio. Pin Diagram of IC 566

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Circuit diagram

Frequency modulation Model graph

Procedure; 1. The circuit connection is made as shown in the circuit diagram. 2. The modulating signal FM is given from an AFO (1KHZ) 53

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3. For various values of modulating voltage Vm the values of Fmax and Fmin are noted 4. The values of the modulation index are calculated. RESULT: Thus the FM circuit using IC566 was performed and the modulation index was found. REVIEW QUESTIONS 1. What will be the changes in the wave under FM when the amplitude or frequency of the modulating signal is increased? 2. The FM station has less noise while receiving the signal. Justify your answer. 3. What happens when a stronger signal and a weaker signal both overlap at the same frequency in FM? 4. Name two applications of two way mobile radio? 5. Which mathematical expression is used to decide the side band amplitudes in a FM signal?

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