Commn Systems Lab Manual

Communication Systems Lab Manual

Part A:

Hardware Experiments

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Communication Systems Lab Manual Experiment No. 1

Pulse Code Modulation (PCM) Aim: To design and set up a pulse code modulator.

Components and equipments required: Op-amps, ICs 4016, 7408, 7404, 311, 741, 7493, resistors, signal generator, DC source, bread board and CRO.

Theory: In the PCM circuit the input analog signal is regularly sampled at uniform intervals and quantized first and each quantized level is represented by a code number. It has excellent advantages compared to PAM and PWM. The PCM circuit gives the binary code corresponding to the input samples. The sampling of the input analog signal is done by the PAM circuit. Clock frequency is selected satisfying sampling theorem. DAC output and sampled output are compared by 311 IC. As long as the sampled output is high, comparator output remains high and the counting progresses. PCM is used in digital telephone systems and for digital audio in computers. Two limitations of PCM are aliasing error and quantization error.

Procedure: 1. Verify the conditions of ICs and other discrete components and setup the circuit. 2. Observe the PCM output on the CRO screen. Design:

Design of non-inverter circuit: Let Gain = 1 + Rf/Ri = 2, so that the ratio Rf/Ri = 1, Take Rf and Ri = 22 k. Design of DAC circuit: Take R= 10 k, 2R= 22 k

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Communication Systems Lab Manual Circuit Diagram:

Waveforms:

Result: Designed and set up a pulse code modulator. Waveforms are also plotted.

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Communication Systems Lab Manual Experiment No. 2

Delta Modulation Aim: To design, set up and study a delta modulator circuit. Components and equipments required: Op-amps, 7474 IC, resistors. capacitors, signal generator, DC supplies, bread board and CRO. Theory: Delta modulation (DM) is a differential PCM scheme in which the difference signal is encoded into a single bit. This single bit is transmitted per sample to indicate whether the signal is larger or smaller than the previous sample. Circuit for delta modulation is shown in figure. The _____

modulating signal m(t) and its quantized approximation m(t ) are applied to the comparator. _____

Comparator provides a high level output when m(t) > m(t ) and it provides low level output when _____

m(t) < m(t ) . The LM 311 chip is used in the circuit as the comparator. The output of the comparator is fed to a sample and hold circuit made by a D flip flop. The clock frequency to flip flop is selected at the sampling rate. Pulses at the output of D flip flop are made bipolar by an op-amp comparator. Bipolar pulses are converted to analog signal before feeding to the comparator using a RC low pass filter. Procedure: 1. Verify the conditions of ICs and other discrete components. 2. Set up the circuit. Feed an input signal of 5 V, 200 Hz sine wave to the input. Set the clock frequency at 2 kHz. 3. Observe the DM output and Vo simultaneously on the CRO screen. Design: Let the input signal amplitude = 5 V and frequency = 200 Hz i.e.., m(t) = 5 sin 400πt Maximum slope of m(t) = 2πfA = 2π200x5 _____

To avoid slope over load error, slope of m(t ) should be more than that of m(t). VCC/RC > Emωm VCC/RC > 2πfA = 2π200x5 Selecting Vcc = 15 V and C = 0.01 µF, we get R < 228 k. Take R = 1 k. Threshold voltage VT = VR2 = 1.35 V Vcc R2 = l.35 V Take R2= l k. Then R1= 10k. R1 + R2 Let the clock frequency be 2 kHz. Department of Electronics, PAACET

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Communication Systems Lab Manual Circuit Diagram:

Waveforms:

Result: Designed and set up a Delta modulator. Waveforms are also plotted.

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Communication Systems Lab Manual Experiment No. 3

Binary Amplitude Shift Keying (BASK) and Demodulator Aim: To design and set up an Amplitude Shift Keying (ASK) generator and demodulator.

Components and equipments required: DC sources, CRO, bread board, signal generator, op-amp, transistor, capacitors, potentiometer and resistors.

Theory: The modulation process of switching the amplitude, frequency or phase of the carrier in accordance with the message data are called Amplitude Shift Keying, Frequency Shift Keying and Phase Shift Keying respectively. In ASK system the carrier frequency is switched between two preset amplitudes according to the binary input. When the input is at logic 1, a finite number of cycles of a sinusoidal signal are granted and when the input is at logic 0, same numbers of cycles of sinusoidal signal having different amplitude are generated. Referring the circuit diagram, the two switches in the analog multiplexer IC 4016 are used to multiplex two signals. Input to one of the switches is a sinusoidal signal with peak amplitude 5 V. This signal is applied to a voltage divider circuit. The resistors are chosen such that Vout = ½ Vin. Choose R1= R2 = 1kΩ and amplitude is reduced by half (2.5 V). When the modulating signal is at logic 1, 5 Vpp sine wave appears at the output and when the modulating signal is at logic 0, 2.5 Vpp sine wave appears at the output. Demodulator can be set up by an envelope detector and a comparator. Comparator gives either high or low output according to the amplitude of the signal at the inverting terminal. The circuit consists of diode and RC network that picks the amplitude variations and 324 op-amp functions as a comparator. Capacitor charges to the positive peaks of sine wave half cycle through diode and discharges through R. Before discharging fully, next peak appears and capacitor charges further the obtained low frequency signal is converted to a square wave by the comparator. Potentiometer is used to adjust the reference voltage. BASK is susceptible to noise because it does not have constant amplitudes.

Procedure: 1. Set up the circuit part by part and verify the functions.

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Communication Systems Lab Manual 2. Join both the circuits and feed a square wave of low frequency at the input and observe the ASK output on CRO. 3. Set up the demodulator circuit and feed the ASK signal to its input and observe demodulated output. Design: Voltage divider Network: Vout =

Vin * R 2 , Take R1 = R2 = 1 kΩ R1  R 2

Therefore, Vout = ½ Vin Transistor as a NOT gate: Select BC107 transistor, its hfe = 100, Ic= 2 mA RC = VCC - VCEsat / IC = (5 – 0.3) / 2mA = 2.35 kΩ, Take RC = 1 kΩ Base current Ib should be greater than Ic/hfe to function as a NOT gate. Take IB = 10* Ic/hfe = 0.2 mA RB = Vin – VBEsat / IB = (5 – 0.6) / 0.2mA = 22 kΩ, Take RB = 10 kΩ Circuit Diagram: ASK Modulator

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Communication Systems Lab Manual ASK Demodulator

Waveforms:

Result: Designed and set up a BASK modulator and demodulator. Waveforms are also plotted.

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Communication Systems Lab Manual Experiment No. 4

Binary Frequency Shift Keying (BFSK) Aim: To design and set up a Binary Frequency Shift Keying (BFSK) generator.

Components and equipments required: DC sources, CRO, bread board, signal generators and resistors.

Theory: In BFSK system the carrier frequency is switched in between two preset frequencies according to the binary input. The frequencies corresponding to logic 1 and logic 0 states are called mark and space frequencies. CD 4016 is a quad bilateral switch. The modulating signal input is fed to one control pin of 4016 and the inverted input is fed to the control pin of the other 4016. Two sinusoidal signals having two different frequencies are fed to the inputs of the two switches of 4016. The outputs of the two bilateral switches are joined and the FSK output is taken.

Procedure: 1. Set up the circuit after testing the components. 2. Feed two different frequency sine waves at the input and verify the output. Design: Transistor as a NOT gate: Select BC107 transistor, its hfe = 100, Ic= 2 mA RC = VCC - VCEsat / IC = (5 – 0.3) / 2mA = 2.35 kΩ, Take RC = 1 kΩ Base current Ib should be greater than Ic/hfe to function as a NOT gate. Take IB = 10* Ic/hfe = 0.2 mA RB = Vin – VBEsat / IB = (5 – 0.6) / 0.2mA = 22 kΩ, Take RB = 10 kΩ

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Communication Systems Lab Manual Circuit Diagram:

Waveforms:

Result: Designed and set up a BFSK modulator. Waveforms are also plotted.

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Communication Systems Lab Manual Experiment No. 5

Binary Phase Shift Keying (BPSK) Aim: To set up a Binary Phase Shift Keying (BPSK) circuit.

Components and equipments required: ICs 4016, 7404, 741, bread board and resistors.

Theory: In the BPSK modulation system phase of the carrier wave is inverted according to logic level of the input data. When the modulating input is at logic 1 level, the sinusoid has one fixed phase and when the modulating input is at the other level, the phase of the sinusoid changes. Two switches inside the quad analog switch CD 4016 are used in the circuit. Op-amp functioning as an inverting amplifier and having unity gain is used to invert the phase of the input sine wave by 180o. Sine wave can be obtained either from function generator or using a wien bridge oscillator using op-amp. BFSK has constant amplitude as in the case of BFSK signal. Therefore the noise can be removed easily. Procedure: 1. Set up the circuit as shown in figure. 2. Feed the sine wave and clock from the function generator. 3. Keep the clock frequency lower than the sine wave frequency and observe the output. Design: Op-amp circuit functions as an inverting amplifier with gain 1 Gain = RF/Ri = 1 Take RF and Ri 4.7k each. Transistor as a NOT gate: Select BC107 transistor, its hfe = 100, Ic= 2 mA RC = VCC - VCEsat / IC = (5 – 0.3) / 2mA = 2.35 kΩ, Take RC = 1 kΩ Base current Ib should be greater than Ic/hfe to function as a NOT gate. Take IB = 10* Ic/hfe = 0.2 mA RB = Vin – VBEsat / IB = (5 – 0.6) / 0.2mA = 22 kΩ, Take RB = 10 kΩ

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Communication Systems Lab Manual Circuit Diagram:

Waveforms:

Result: Designed and set up a BPSK modulator and demodulator. Waveforms are also plotted.

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Communication Systems Lab Manual Experiment No. 6

Error Checking and Correcting Codes Aim: To design and set up a non-systematic Hamming code generator to encode and detect error in a 4 bit message word.

Components and equipments required: ICs 7486, 7404, 7442, trainer kit and LEDs.

Theory: Various types of equipments used in computer systems such as key boards, printers, magnetic storage devices, video terminals transmit and receive data in the form of codes. Hamming code is one of the block codes. In this system one error can be detected and corrected. In linear block code n is the number of bits in the coded word, k is the number of bits in uncoded word and r = n - k is the number of parity bits. The relation between the n, r, M and k are as given below. The number of bits in the coded word is n = 2r – 1. The number of valid uncoded words are M = 2k A nonsystematic code can be constructed by placing the parity check bits at positions, 2i where i = 0, 1,2,…..r-1 of the code word. Thus the code word structure is P1 P2 M1 P3 M2 M3 M4 where P1, P2 and P3 are parity bits and M1, M2, M3 and M4 are message bits. Construction of the error correcting code: 1. Write the BCD of length (n - k) = r for decimal numbers from 1 to n. 2. Arrange the sequences in bit-reverse order in matrix form. 3. Transpose the matrix in step no.2 to get the H matrix. Procedure: 1. Set up the encoder 2. Take any one of the valid 16 code words. 3. Feed 7 bit code word to the syndrome block. LED will not glow indicating no error since S will be [0 0 0].

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Communication Systems Lab Manual 4. Introduce an error in any position in the received code word and observe the LED glow indicating the position of error. 5. Repeat the step no. 4 by introducing one error at a time at other positions in the code word. Design: Take n=7, k=4 and r=n-k= 3. Step 1: Write BCD of length ‘3’ for numbers 1 to 7. 001 010   011   100  101    110  111    Step 2: Reversing the bits we get, 100  010   110    001 101    011 111    Step 3: Take transpose of the above matrix to get H matrix.

1010101  0110011   0001111 Code Words [T] are selected such that THT = 0. 100  010   110    i.e., [P1 P2 M1 P3 M2 M3 M4] 001 = 0 101    011 111    This gives, P1 ⊕ M1 ⊕ M2 ⊕ M4= 0 P2 ⊕ M1 ⊕ M3 ⊕ M4= 0 P3 ⊕ M2 ⊕ M3 ⊕ M4= 0

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Communication Systems Lab Manual or, P1 = M1 ⊕ M2 ⊕ M4 P2 = M1 ⊕ M3 ⊕ M4 P3 = M2 ⊕ M3 ⊕ M4 Step 4: Realize the equations using EXOR gates. Decoding The Syndrome used to detect the error = [S] = RHT where S is of length n - k. i.e., S1 S2 S3, Let [R] be the received word = [r1 r2 r3 r4 r5 r6 r7] where ri = 0 or 1.

100  010   110    S = [ S1 S2 S3] = RHT = [r1 r2 r3 r4 r5 r6 r7] 001 101    011 111    i.e., S1 = r1 + r3 + r5 + r7, S2 = r2 + r3 + r6 + r7, S3 = r4 + r5 + r6 + r7, Realize the circuit using EXOR gates. In this type of construction, the syndrome obtained directly indicates the position of error. Only single error pattern can be corrected using Hamming code. [S1 S2 S3] can express seven single error pattern and one pattern for no error (all zeros). S = RHT = (T + E) HT = THT + EHT = EHT since THT = 0. If the first position is in error, then E = [1 0 0 0 0 0 0]. Then using H matrix, we get, S = [S1 S2 S3] = [1 0 0] then S3 S2 S1 = 0 0 1 = decimal 1. If second position is in error, then E = [0 1 0 0 0 0 0] and using H matrix, we get, S = [S1 S2 S3] = [0 1 0] then S3 S2 S1= 010 = decimal 2. If third position is in error, then E = [0 0 1 0 0 0 0] and using H matrix, we get, S = [S1 S2 S3] = [1 1 0 ] then S3 S2 S1= 0 1 1 = decimal 3 and so on. So, [S3 S2 S1] gives the BCD equivalent of the decimal number indicating the position of error. Decoding part can be connected separately from encoding.

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Communication Systems Lab Manual Circuit Diagram: Encoder

Decoder and error detector

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Communication Systems Lab Manual Observations: Encoder: Message Bits M1

M2

Code Word

M3

M4

P1

P2

M1

P3

M2

M3

M4

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Error Detector:

r7 0 0 0 0 0 0 0 1

r6 0 0 0 0 0 0 1 0

Received Code Word r5 r4 r3 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0

r2 0 0 1 0 0 0 0 0

r1 0 1 0 0 0 0 0 0

S2 0 0 0 0 1 1 1 1

Syndrome S1 0 0 1 1 0 0 1 1

S0 0 1 0 1 0 1 0 1

Result: Designed and set up a non-systematic Hamming code generator to encode and detect error in a 4 bit message word.

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Communication Systems Lab Manual Experiment No. 7

4 Channel Digital Multiplexing (using PRBS signal and digital multiplexer) Aim: To study 4 channel digital multiplexing using PRBS generator and 74153 digital MUX. Components and equipments required: ICs 7495, 74153, 7486, 7404, digital trainer kit, and breadboard. Theory: Pseudo Random Binary Sequences are generated using a linear feedback shift register. A LFSR is a shift register whose input bit is a linear function of its previous state. The only linear functions of single bits are XOR and XNOR. Thus it is a shift register whose input bit is drive by the XOR of some bits of the shift register output. The initial value of LFSR is called the seed and because the operation of the register is deterministic the sequence of values produced by the register is completely determined by its current value. Likewise, because the register has a finite number of possible states, cycle will repeat. However, an LFSR with a well-chosen feedback function can provide sequence of bits which appears random as well as having a very long cycle. If the register size is n stages, maximum length of the sequence will be 2n-1. The sequence repeats after every 2n-1 clock pulses. PRBS output is available at any output. The PRBS output and its inverted form are given as two inputs to a 4:1 MUX. The other two inputs are tied to Vcc and GND. According to the select lines, one of the input appears at output. Procedure: 1. Set up circuit on the bread board. Apply 1 kHz clock pulses and observe the PRBS output from Q0 output. The PRBS repeats after every 15th clock cycle. 2. Set up the circuit using 7495 and 74153. Apply clock pulses and observe the output. 3. Give the PRBS output and its inverted form are given as inputs to a 4:1 MUX. 4. The other two inputs are given Vcc and GND. 5. Observe MUX output for various combinations of select lines.

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Communication Systems Lab Manual Circuit Diagram:

Observation: PRBS Output: MUX Truth Table: Select Lines S1 0 0 1 1

S0 0 1 0 1

Output V0

Result: Studied 4 channel digital multiplexing using PRBS generator and 74153 digital MUX.

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Communication Systems Lab Manual

Part B:

Matlab Experiments

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Communication Systems Lab Manual Experiment No. 1

Implementation of LMS Algorithm Aim: To study the implementation of LMS algorithm for adaptive equalization. Platform Used: Matlab Theory: Least mean squares (LMS) algorithms are a class of adaptive filter used to mimic a desired filter by finding the filter coefficients that relate to producing the least mean squares of the error signal (difference between the desired and the actual signal). It is a stochastic gradient descent method in that the filter is only adapted based on the error at the current time.

The LMS algorithm changes (adapts) the filter tap weights so that e(n) is minimized in the mean-square sense. When the processes x(n) & d(n) are jointly stationary, this algorithm converges to a set of tap-weights which, on average, are equal to the Wiener-Hopf solution. The LMS algorithm is a practical scheme for realizing Wiener filters, without explicitly solving the Wiener-Hopf equation. Features of LMS algorithm are simplicity in implementation and stable and robust performance against different signal conditions. Drawback is its slow convergence due to eigenvalue spread. The output y(n) of the adaptive equalizer in response to the input sequence x(n) is given as, N

y(n) =

 wk.x(n  k ) k 0

where wk is the weight of kth tap and (N+1) is the total number of taps. This is shown in figure below, Department of Electronics, PAACET

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Communication Systems Lab Manual

The adaptation may be achieved by observing the error between the desired pulse shape and actual pulse shape at the filter output, measured at the sampling instants and then using this error to estimate the direction in which the weights of the filter should be changed so as to approach the optimum set of values. Let e(n) denotes the error signal, then e(n) = d(n) - y(n) Where d(n) is the desired response and y(n) is the output response. In LMS algorithm e(n) activates the adjustment applied to the weights, as the algorithm proceeds from one iteration to another. In words LMS algorithm is expressed as,  Updated value   Old value of   Input signal applied        Step size parameter *    of kth tap weight   kth tap weight   to kth tap signal 

i.e, wk(n+1) = wk(n) + µ * x(n-k) * e(n) where, k = 0,1,2,….N and N is the number of iterations. Steps: 1. Initialise the algorithm by setting w(1) = 0, i.e, set all the tap weights of equalizer to zero at n=1. 2. For n = 1,2,…. compute y(n) = xT(n) * w(n) ; e(n) = d(n) – y(n) ; w(n+1) = w(n) + µ * x(n) * e(n) , where µ is step size parameter. 3. Continue the iterative computation until the equalizer reaches a steady state by which we mean that the actual mean square of the equalizer essentially reaches a constant value. Department of Electronics, PAACET

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Communication Systems Lab Manual Program: %%%%

LEAST MEAN SQUARE ALGORITHM

%%%%

clc; clear all; close all; sysorder = input('Enter the System Order '); N = input('Enter the number of iterations '); x = randn(N,1); % Input to the filter b = fir1(sysorder-1,0.5); % FIR system to be identified n = 0.1*randn(N,1); % Uncorrelated noise signal d = filter(b,1,x) + n; % Desired signal = Output of FIR filter + Uncorrelated noise signal w = zeros(sysorder,1); % Initially filter weights are zeros for n = sysorder:N u = x(n:-1:n-sysorder+1); y(n) = w' * u; % Output of Adaptive filter e(n) = d(n) - y(n); % Error signal = Desired signal - Adaptive filter output mu = 0.008; w = w + mu*u*e(n); % Updating new filter weights end hold on plot(d,'g') plot(y,'r') semilogy((abs(e)),'m'); title('System Output'); xlabel('Samples'); ylabel('True and Estimated Outputs'); legend('Desired','Output','Error'); axis([0 N -2 2.5]) figure plot(b,'k+'); hold on plot(w,'r*') legend('Actual Weights','Estimated Weights'); title('Comparison of Actual weights and Estimated weights');

Observations: Enter the System Order 5 Enter the number of iterations 100

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Communication Systems Lab Manual Waveforms:

Result: LMS algorithm for adaptive equalization was implemented and studied.

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Communication Systems Lab Manual Experiment No. 2

Time Delay Estimation using Correlation Function Aim: To implement a matlab program for estimating time delay using correlation function Platform Used: Matlab Theory: A pulse x(t) is transmitted, the reflected signal from an object is returned to the receiver. The returned signal s(t) is delayed (say, D seconds), noisy and attenuated. The objective is to measure (estimate) the time delay between the transmitted and the returned signal. Analysis Let the transmitted signal be x(t), then the returned signal r(t) may be modeled as, r(t) = x(t-D) + w(t) where, w(t) is assumed to be the additive noise during transmission. is the attenuation factor (=a*L && t