Chroma3650 J750 D-10 Scud1A Comparison

Specification hourly rate Test Rate

Teradyne J750 2700 50/100MHZ

Chroma 3650

Maximum Number of Pi ns ns

512/1024 pin ( 64pins/unit )

512 pins ( 64pins/unit )

Multi-Site Test Programming Language / OS Driver VIL range/resol./accuracy VIH range/resol./accuracy VIL/VIH DC currrent Minimum Pulse Width (3V) Rise time/Fall time Output Impedance Comparator

32 WindowsNT IG-XL

32 Windows XP, C,C++

-1 ~ +6V /1 mV/±15 mV 0 ~ +7.1V /1 mV/±15 mV 35mA (static)/ 100mA (dynamic) 3 nS 1.9nS/2.0nS 50 ohms ± 5 ohms

-2 ~ +5V / 641uV/ ±5mV -1.9~+7V / 641uV/ ±5mV 50 mA (static)/ 100mA (dynamic) 3nS 2.0 nS/ 3Vp-p 10%~90% 50 ohms ± 5 ohms

35 mA (static)/ 70mA (dynamic) 2.5nS 1.2ns(1V)/1.6ns(3V) 50 ohms ± 5 ohms

0 ~ +5V /1 / 1 mV/±15 mV < ±2 uA 66 pF 3.3 nS 50 ohms ± 5 ohms

-2~+7V / 641uV/±(0.05%+10 mV) ±0.5 uA 65 pF ± 15 pF 4.0 nS 50 ohms ± 5 ohms

-1.5 ~ +6V /1 / 122uV/ ±25mV n/a n/a n/a n/a

50uA~50mA/5 uA/±(0.2%+50uA) -1~7V/±40 mV

0 ~ ±35 mA/6.41uA/±(0.3%+30uA) -2~7V/±(5 mV)

no -2 ~ +12V 50Ω,passive load only

16M/channel 1 chain: < 256M, 8 chain: < 32M 1K

16M/channel 1 chain: 1024M 1K

16M /channel 1 chain: 1152M x

Input Leakage Current Input Capacitance Input Impedance Dynamic Load IOH/IOL Current Vref Level Pattern Generation Vector Depth Scan Depth Subroutine Memory Timing Generator  No. of Edges Drive/IO/Strobe No. of of Ti Timing Se Sets Rate Range Rate Resolution Edge Range Egde Setting Resolution Edge Placement Accuracy Overall Timing Accuracy DPS No. of Channels Voltage Range Maximum Output Current PMU Channels  Vo  Voltage Range  Cu  Current Range  Vo  Voltage Accuracy  Cu  Current Accuracy PPMU Channels  Vo  Voltage Range  Cu  C urrent Range Freq Measurement  Ch  Channels Measure Range Options AD/DA Converter Test ALPG

50/100MHZ

6 edges / pin 6 edges / pin 2 Drive, 1 Drive/IO, 1 IO, 2 Strobe 2 Drive, 2 Drive/IO, 2 Strobe 32 sets / pi pin, 25 256 combination/system 32 sets / pi pin, 4K 4K combination/16 pins 10 nS ~ 10 mS 20 nS ~ 1 mS 10 nS/2**28 125 pS 0nS ~ (8 cycle-40nS) 0 nS ~ 4 cycle 39.0625ps 62.5ps Drive: ±500pS,Edge: ±500pS, Drive: ±450pS,Edge: ±500pS, Window: ±1000pS Window: ±700pS ±1 nS ± 850ps

D-10 2200 100/200MHZ 768 pins(96ch/board) > 3000 pins for D40 256 Linux OS,C/C++ -1 ~ +6V +6V /122uV/ ±15mV ±15mV

4 edges / pin Drive/IO/Strobe at any edge 256 timing se set 10 nS ~ 327.68uS 0.07629pS 0 nS ~ 4 cycle-5ns 19.53125ps  ±350pS n/a

16 channels / 512pins ±10V ±1A ~ ±8A

32 channels ±8V , ±16V ±1.6A (8V) , ±0.8A(16V)

16 channels 0V to 6V 2A (gangable to 16A)

8 2/5/10/24V ±2uA ~± 200mA 2V: ±(0.1%+1.5mV) 200uA: ±(0.2%+0.3uA)

16 ±2.5V/±8V/±16V ±800nA ~± 250mA 2.5V: ±(0.1%+1.77mV) 80uA: ±(0.1%+80nA)

16/VIS16 ±20V , ±60

1 channel / pin -1V ~ 7V ±50mA

1 channel / pin -2V ~ 7V ±35mA

1 channel / pin

1 channel / pin ??

1 channel / pin ??

any pin (96) in one card

16bits (CTO) /Static 16X * 16Y * 16D (MTO)

16bits /Static /Dynamic 16X * 16Y * 16D

A/V AWG,Digitizer   16X*16Y*8Z*36D 1) 12 V at any pin in PE (standard) 2) 60V / 16 channels for VI Reid Ashman, Local Made

High Voltage PE

16V / 32 channels

15V / 32 channels

Manipulator

Intest / Reid Ashman

Intest / Reid Ashman

300mA/100mA

±0.06%FSR ±0.1%FSR

-2 ~12V

32mA

200Mhz/32 bit counter 

Scud1A 1300 50MHz 256/512 pin (64pins/unit) 8