Booth's Algorithm - Multiplication & Division
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Description
Multiplication More complicated than addition •
Accomplished via shifting and addition
More time and more area
Let's look at 3 versions based on grade school algorithm 01010010 x 01101101
(multiplicand) (multiplier)
Negative numbers: convert and multiply Use other better techniques like Booth’s encoding
ECE 369 :: Fundamentals of Computer Architecture
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ECE 369 - Fundamentals of Computer Architecture
Multiplication 01010010(multiplicand) × 01101101 (multiplier) 00000000 01010010 ×1 01010010 000000000 ×0 001010010 0101001000 ×1 0110011010 01010010000 ×1 10000101010 000000000000 ×0 010000101010 0101001000000 ×1 0111001101010 01010010000000 ×1 10001011101010 000000000000000 ×0 0010001011101010
01010010 × 01101101 00000000 01010010 00101001 00000000 00010100 01010010 00110011 01010010 01000010 00000000 00100001 01010010 00111001 01010010 01000101 00000000 00100010
(multiplicand) (multiplier) ×1 0 (add 0 ×0 10 (add 00 ×1 010 (add 000 ×1 1010 (add 0000 ×0 01010 (add 00000 ×1 101010 (add 000000 ×1 1101010 (add 0000000 ×0 11101010 (add
& shr) & shr) & shr) & shr) & shr) & shr) & shr) & shr) 1
Multiplication: Implementation Start
Multiplier0 = 1
1. Test Multiplier0
Multiplier0 = 0
Multiplicand Shift left 64 bits
1a. Add multiplicand to product and place the result in Product register
Multiplier Shift right
64-bit ALU
32 bits Product Write
Control test
2. Shift the Multiplicand register left 1 bit
64 bits 3. Shift the Multiplier register right 1 bit
32nd repetition?
No: < 32 repetitions
Yes: 32 repetitions
Done
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Second version Start
Multiplier0 = 1
1. Test Multiplier0
Multiplier0 = 0
Multiplicand 32 bits
Multiplier Shift right
32-bit ALU
1a. Add multiplicand to the left half of the product and place the result in the left half of the Product register
32 bits Product
Shift right Write
Control test
2. Shift the Product register right 1 bit
64 bits 3. Shift the Multiplier register right 1 bit
32nd repetition?
No: < 32 repetitions
Yes: 32 repetitions
Done
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Final version Start
Product0 = 1
1. Test Product0
Multiplicand
Product0 = 0
32 bits 1a. Add multiplicand to the left half of the product and place the result in the left half of the Product register
32-bit ALU
Product
Shift right Write
Control test
64 bits
2. Shift the Product register right 1 bit
32nd repetition?
No: < 32 repetitions
Yes: 32 repetitions
Done
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Multiplication example: 0010 x 0110
Iteration
Multiplicand
0
0010
1
2
3
4
0010
0010
0010
0010
ECE 369 :: Fundamentals of Computer Architecture
Original Algorithm Step
Product
Initial values
0000 0110
1: 0 -> No operation
0000 0110
2: Shift right
0000 0011
1a: 1 -> Product = Product + Multiplicand
0010 0011
2: Shift right
0001 0001
1a: 1 -> Product = Product + Multiplicand
0011 0001
2: Shift right
0001 1000
1: 0 -> No operation
0001 1000
2: Shift right
0000 1100
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ECE 369 - Fundamentals of Computer Architecture
Signed Multiplication
The easiest way to deal with signed numbers is to first convert the multiplier and multiplicand to positive numbers and then remember the original sign.
It turns out that the last algorithm will work with signed numbers provided that when we do the shifting steps we extend the sign of the product.
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ECE 369 - Fundamentals of Computer Architecture
Speeding up multiplication (Booth’s Algorithm) The way we have done multiplication so far consisted of repeatedly scanning the multiplier, adding the mutiplicand (or zeros) and shifting the result accumulated. Observation: if we could reduce the number of times we have to add the multiplicand that would make the all process faster. Let say we want to do: b x a where a=7ten=0111two With the algorithm used so far we successively: add b, add b, add b, and add 0 If we “recode” the number 7ten as (8-1)ten = (1000 – 0001)two = 100-1 all we need to do is: sub b, add 0, add 0, add 0, and add b 3
ECE 369 - Fundamentals of Computer Architecture
Booth’s Algorithm Observation: If besides addition we also use subtraction, we can reduce the number of consecutives additions and therefore we can make the multiplication faster. This requires to “recode” the multiplier in such a way that the number of consecutive 1s in the multiplier (indeed the number of consecutive additions we should have done) are reduced. The key to Booth’s algorithm is to scan the multiplier and classify group of bits into the beginning, the middle and the end of a run of 1s 0
End of Run
1
1
1
1
Middle of Run
0
A string of 0s already avoids arithmetic, so we can leave them alone Beginning of Run 4
ECE 369 - Fundamentals of Computer Architecture
Using Booth’s encoding for multiplication If the initial content of A is an-1…a0 then i-th multiply step, the low-order bit of register A is ai and step (i) in the multiplication algorithm becomes: 1. If ai=0 and ai-1=0, then add 0 to P 2. If ai=0 and ai-1=1, then add B to P 3. If ai=1 and ai-1=0, then subtract B from P 4. If ai=1 and ai-1=1, then add 0 to P (For the first step when i=0, then add 0 to P) Current bit
Bit to the right
Type
Action Subtract the multiplicand
1
0
Beg. Run
1
1
Middle Run
No arithmetic operation
1
1
End Run
Add the multiplicand
0
0
Middle Run
No arithmetic multiplicand
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ECE 369 - Fundamentals of Computer Architecture
Booth’s algorithm Start
Test multiplier[i:i-1]
01 Add multiplicand to the left half of the product and place the result in the left half of the product register
00
11
10 Subtract multiplicand from the left half of the product and place the result in the left half of the product register
Shift the product register right by 1
< 32 rep
= 32 rep Done
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Booth's algorithm example
Booth's Algorithm
Iteration
Multiplicand
0
0010
Initial values
0000 1101 0
0010
10 -> Product = Product - Multiplicand
1110 1101 0
Shift right
1111 0110 1
01 -> Product = Product + Multiplicand
0001 0110 1
Shift right
0000 1011 0
10 -> Product = Product - Multiplicand
1110 1011 0
Shift right
1111 0101 1
11 -> No operation
1111 0101 1
Shift right
1111 1010 1
1
2
3
4
0010
0010
0010
ECE 369 :: Fundamentals of Computer Architecture
Step
Product
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Division Even more complicated Can be accomplished via shifting and addition/subtraction More time and more area We will look at 3 versions based on grade school algorithm
0011 | 0010 0010
(Divisor)
(Dividend)
0011 | 0010 0010 (Dividend)
Negative numbers: Even more difficult There are better techniques, we won’t look at them
ECE 369 :: Fundamentals of Computer Architecture
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ECE 369 - Fundamentals of Computer Architecture
Division
Divisor 1000
1001 (Quotient) 1001010 (Dividend) -1000 10 101 1010 -1000 10 (Remainder)
Dividend = Quotient x Divider + Remainder
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ECE 369 - Fundamentals of Computer Architecture
Division: First Algorithm Start
1. Subtract the Divisor register from the Remainder register and place the result in the Remainder register
Remainder –> 0
Test Remainder
2a. Shift the Quotient register to the left, setting the new rightmost bit to 1
Remainder < 0
2b. Restore the original value by adding the Divisor register to the Remainder register and place the sum in the Remainder register. Also shift the Quotient register to the left, setting the new least significant bit to 0
3. Shift the Divisor register right 1 bit
33rd repetition?
No: < 33 repetitions
Yes: 33 repetitions
Done
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Division - Implementation Divisor Shift right 64 bits
Quotient Shift left
64-bit ALU
32 bits Remainder Write
Control test
64 bits
Divisor 32 bits
Quotient Shift left
32-bit ALU
32 bits Remainder
Shift left Write
Control test
64 bits
ECE 369 :: Fundamentals of Computer Architecture
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Division Start
1. Shift the Remainder register left 1 bit
Divisor
2. Subtract the Divisor register from the left half of the Remainder register and place the result in the left half of the Remainder register
32 bits
32-bit ALU
Remainder > –0
Remainder
Shift right Shift left Write
64 bits
Control test
Test Remainder
3a. Shift the Remainder register to the left, setting the new rightmost bit to 1
Remainder < 0
3b. Restore the original value by adding the Divisor register to the left half of the Remainder register and place the sum in the left half of the Remainder register. Also shift the Remainder register to the left, setting the new rightmost bit to 0
32nd repetition?
No: < 32 repetitions
Yes: 32 repetitions
Done. Shift left half of Remainder right 1 bit
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Restoring division example
Iteration
Divisor
0
0010
1
0010
2
0010
3
0010
4
0010
Done
0010
Divide Algorithm Step
Product
Initial values
0000 0111
Shift reminder left by 1
0000 1110
2. Reminder = Reminder - Divisor
1110 1110
3b. (Reminder < 0); +Div; Shift left, R0 = 0
0001 1100
2. Reminder = Reminder - Divisor
1111 1100
3b. (Reminder < 0); +Div; Shift left, R0 = 0
0011 1000
2. Reminder = Reminder - Divisor
0001 1000
3a. (Reminder > 0); Shift left, R0 = 1
0011 0001
2. Reminder = Reminder - Divisor
0001 0001
3a. (Reminder > 0); Shift left, R0 = 1
0010 0011
Shift left half of reminder right by 1
0001 0011
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Non-restoring division How can we avoid adding the divisor back to the reminder? •
Note that this addition is performed whenever the reminder is negative!
So, what exactly are we doing when the reminder is negative? •
We have a certain reminder: R (R < 0)
•
We add the divisor back to it: R + D
•
We shift the result left by 1:
•
We subtract the divisor again in the next step: 2*R + 2*D - D = 2*R + D
•
Equivalent of left shifting the reminder R by 1 bit
•
Add the divisor in the next step, instead of subtracting
2*(R + D) = 2*R + 2*D
ECE 369 :: Fundamentals of Computer Architecture
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Non-restoring division example
Iteration
Divisor
0
0010
1
0010
2
0010
3
0010
4
0010
Done
0010
Divide Algorithm Step
Product
Initial values
0000 0111
Shift reminder left by 1
0000 1110
Reminder = Reminder - Divisor
1110 1110
(Reminder < 0); Shift left, R0 = 0
1101 1100
Reminder = Reminder + Divisor
1111 1100
(Reminder < 0); Shift left, R0 = 0
1111 1000
Reminder = Reminder + Divisor
0001 1000
(Reminder > 0); Shift left, R0 = 1
0011 0001
Reminder = Reminder - Divisor
0001 0001
(Reminder > 0); Shift left, R0 = 1
0010 0011
Shift left half of reminder right by 1
0001 0011
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Floating point numbers (a brief look) We need a way to represent •
Numbers with fractions, e.g., 3.1416
•
Very small numbers, e.g., 0.000000001
•
Very large numbers, e.g., 3.15576 x 109
Representation (–1)sign x significand x 2exponent
•
Sign, exponent, significand:
•
More bits for significand gives more accuracy
•
More bits for exponent increases range
IEEE 754 floating point standard •
Single precision: 8 bit exponent, 23 bit significand
•
Double precision: 11 bit exponent, 52 bit significand
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IEEE 754 floating-point standard Leading “1” bit of significand is implicit
Exponent is “biased” to make sorting easier •
All 0s is smallest exponent, all 1s is largest
•
Bias of 127 for single precision and 1023 for double precision
•
Summary:
(–1)sign x (1+significand) x 2(exponent – bias)
Example •
Decimal: -.75 = -3/4 = -3/22
•
Binary: -.11 = -1.1 x 2-1
•
Floating point: exponent = 126 = 01111110
•
IEEE single precision: 1 01111110 10000000000000000000000
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Floating point complexities Operations are somewhat more complicated (see text) In addition to overflow we can have “underflow”
Accuracy can be a big problem •
IEEE 754 keeps two extra bits, guard and round
•
Four rounding modes
•
Positive divided by zero yields “infinity”
•
Zero divide by zero yields “not a number”
•
Other complexities
Implementing the standard can be tricky Not using the standard can be even worse •
See text for description of 80x86 and Pentium bug!
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Floating point add/subtract To add/sub two numbers •
We first compare the two exponents
•
Select the higher of the two as the exponent of result
•
Select the significand part of lower exponent number and shift it right by the amount equal to the difference of two exponent
•
Remember to keep two shifted out bit and a guard bit
•
Add/sub the signifand as required according to operation and signs of operands
•
Normalize significand of result adjusting exponent
•
Round the result (add one to the least significant bit to be retained if the first bit being thrown away is a 1
•
Re-normalize the result
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Floating point multiply To multiply two numbers •
Add the two exponent (remember access 127 notation)
•
Produce the result sign as exor of two signs
•
Multiply significand portions
•
Results will be 1x.xxxxx… or 01.xxxx….
•
In the first case shift result right and adjust exponent
•
Round off the result
•
This may require another normalization step
ECE 369 :: Fundamentals of Computer Architecture
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Floating point divide To divide two numbers •
Subtract divisor’s exponent from the dividend’s exponent (remember access 127 notation)
•
Produce the result sign as exor of two signs
•
Divide dividend’s significand by divisor’s significand portions
•
Results will be 1.xxxxx… or 0.1xxxx….
•
In the second case shift result left and adjust exponent
•
Round off the result
•
This may require another normalization step
ECE 369 :: Fundamentals of Computer Architecture
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Summary on Chapter 3 Computer arithmetic is constrained by limited precision Bit patterns have no inherent meaning but standards do exist •
Two’s complement and IEEE 754 floating point
Computer instructions determine “meaning” of the bit patterns Performance and accuracy are important so there are many complexities in real machines (i.e., algorithms and implementation)
We designed an ALU to carry out four function Multiplication •
Unsigned, Signed, Signed using Booth’s encoding, and Carry save adders and their use
Division
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