Architecture and Programming of 8051 MCU's for Reverse Engineering

Architecture and programming of 8051 MCU's for reverse engineering

Chapter1: Introduction to Microcontrollers 1.1 What are microcontrollers and what are they used for? 1.2 What is what in microcontroller?

Introduction It was electricity in the beginning....The people were happy because they did not know that it was all around them and could be utilized. That was good. Then Faraday came and a stone has started to roll slowly... The first machines using a new sort of energy appeared soon. A long time has passed since then and just when the people finally got used to them and stopped paying attention to what a new generation of specialists were doing, someone came to an idea that electrons could be a very convenient toy being closed in a glass pipe. It was just a good idea at first, but there was no return. Electonics was born and the stone kept on rolling down the hill faster and faster... A new science - new specialists. Blue coats were replaced with white ones and people who knew something about electronics appeared on the stage. While the rest of humanity were passively watching in disbelief what was going on, the plotters split in two groups - “software-oriented” and “hardwareoriented”. Somewhat younger than their teachers, very enthusiastic and full of ideas, both of them kept on working but separate ways. While the first group was developing constantly and gradually, the hardwareoriented people, driven by success, threw caution to the wind and invented transistors. Up till that moment, the things could be more or less kept under control, but a broad publicity was not aware of what was going on, which soon led to a fatal mistake! Being naive in belief that cheap tricks could slow down technology development and development of the world and retrieve the good all days, mass market opened its doors for the products of Electronics Industry, thus closing a magic circle. A rapid drop in prices made these components available for a great variety of people. The stone was falling freely... The first integrated circuits and processors appeared soon, which caused computers and other products of electronics to drop down in price even more. They could be bought everywhere. Another circle was closed! Ordinary people got hold of computers and computer era has begun... While this drama was going on, hobbyists and professionals, also split in two groups and protected by anonymity, were working hard on their projects. Then, someone suddenly put a question: Why should not we make a universal component? A cheap, universal integrated circuit that could be programmed and used in any field of electronics, device or wherever needed? Technology has been developed enough as well as the market. Why not? So it happened, body and spirit were united and the first integrated circuit was designed and called the MICROCONTROLLER.

1.1 What are microcontrollers and what are they used for? Like all good things, this powerful component is basically very simple. It is made by mixing tested and high- quality "ingredients" (components) as per following receipt: 1. The simplest computer processor is used as the "brain" of the future system. 2. Depending on the taste of the manufacturer, a bit of memory, a few A/D converters, timers, input/output lines etc. are added 3. All that is placed in some of the standard packages. 4. A simple software able to control it all and which everyone can easily learn about has been

developed. On the basis of these rules, numerous types of microcontrollers were designed and they quickly became man's invisible companion. Their incredible simplicity and flexibility conquered us a long time ago and if you try to invent something about them, you should know that you are probably late, someone before you has either done it or at least has tried to do it. The following things have had a crucial influence on development and success of the microcontrollers: Powerful and carefully chosen electronics embedded in the microcontrollers can independetly or via input/output devices (switches, push buttons, sensors, LCD displays, relays etc.), control various processes and devices such as industrial automation, electric current, temperature, engine performance etc. Very low prices enable them to be embedded in such devices in which, until recent time it was not worthwhile to embed anything. Thanks to that, the world is overwhelmed today with cheap automatic devices and various “smart” appliences. Prior knowledge is hardly needed for programming. It is sufficient to have a PC (software in use is not demanding at all and is easy to learn) and a simple device (called the programmer) used for “loading” raedy-to-use programs into the microcontroller. So, if you are infected with a virus called electronics, there is nothing left for you to do but to learn how to use and control its power. How does the microcontroller operate? Even though there is a large number of different types of microcontrollers and even more programs created for their use only, all of them have many things in common. Thus, if you learn to handle one of them you will be able to handle them all. A typical scenario on the basis of which it all functions is as follows: 1. Power supply is turned off and everything is still…the program is loaded into the microcontroller, nothing indicates what is about to come… 2. Power supply is turned on and everything starts to happen at high speed! The control logic unit keeps everything under control. It disables all other circuits except quartz crystal to operate. While the preparations are in progress, the first milliseconds go by. 3. Power supply voltage reaches its maximum and oscillator frequency becomes stable. SFRs are being filled with bits reflecting the state of all circuits within the microcontroller. All pins are configured as inputs. The overall electronis starts operation in rhythm with pulse sequence. From now on the time is measured in micro and nanoseconds. 4. Program Counter is set to zero. Instruction from that address is sent to instruction decoder which recognizes it, after which it is executed with immediate effect. 5. The value of the Program Counter is incremented by 1 and the whole process is repeated...several million times per second.

1.2 What is what in the microcontroller? As you can see, all the operations within the microcontroller are performed at high speed and quite simply, but the microcontroller itself would not be so useful if there are not special circuits which make it complete. In continuation, we are going to call your attention to them. Read Only Memory (ROM) Read Only Memory (ROM) is a type of memory used to permanently save the program being executed. The size of the program that can be written depends on the size of this memory. ROM can be built in the microcontroller or added as an external chip, which depends on the type of the microcontroller. Both options have some disadvantages. If ROM is added as an external chip, the microcontroller is cheaper and the program can be considerably longer. At the same time, a number of available pins is reduced as the microcontroller uses its own input/output ports for connection to the chip. The internal ROM is usually smaller and more expensive, but leaves more pins available for connecting to peripheral environment. The size of ROM ranges from 512B to 64KB. Random Access Memory (RAM) Random Access Memory (RAM) is a type of memory used for temporary storing data and intermediate results created and used during the operation of the microcontrollers. The content of this memory is cleared once the power supply is off. For example, if the program performes an addition, it is necessary to have a register standing for what in everyday life is called the “sum” . For that purpose, one of the registers in RAM is called the "sum" and used for storing results of addition. The size of RAM goes up to a few KBs. Electrically Erasable Programmable ROM (EEPROM) The EEPROM is a special type of memory not contained in all microcontrollers. Its contents may be changed during program execution (similar to RAM ), but remains permanently saved even after the loss of power (similar to ROM). It is often used to store values, created and used during operation (such as calibration values, codes, values to count up to etc.), which must be saved after turning the power supply off. A disadvantage of this memory is that the process of programming is relatively slow. It is measured in

miliseconds.

Special Function Registers (SFR) Special function registers are part of RAM memory. Their purpose is predefined by the manufacturer and cannot be changed therefore. Since their bits are physically connected to particular circuits within the microcontroller, such as A/D converter, serial communication module etc., any change of their state directly affects the operation of the microcontroller or some of the circuits. For example, writing zero or one to the SFR controlling an input/output port causes the appropriate port pin to be configured as input or output. In other words, each bit of this register controls the function of one single pin. Program Counter Program Counter is an engine running the program and points to the memory address containing the next instruction to execute. After each instruction execution, the value of the counter is incremented by 1. For this reason, the program executes only one instruction at a time just as it is written. However…the value of the program counter can be changed at any moment, which causes a “jump” to a new memory location. This is how subroutines and branch instructions are executed. After jumping, the counter resumes even and monotonous automatic counting +1, +1, +1… Central Processor Unit (CPU) As its name suggests, this is a unit which monitors and controls all processes within the microcontroller and the user cannot affect its work. It consists of several smaller subunits, of which the most important

are: Instruction decoder is a part of the electronics which recognizes program instructions and runs other circuits on the basis of that. The abilities of this circuit are expressed in the "instruction set" which is different for each microcontroller family. Arithmetical Logical Unit (ALU) performs all mathematical and logical operations upon data. Accumulator is an SFR closely related to the operation of ALU. It is a kind of working desk used for storing all data upon which some operations should be executed (addition, shift etc.). It also stores the results ready for use in further processing. One of the SFRs, called the Status Register, is closely related to the accumulator, showing at any given time the "status" of a number stored in the accumulator (the number is greater or less than zero etc.).

A bit is just a word invented to confuse novices at electronics. Joking aside, this word in practice indicates whether the voltage is present on a conductor or not. If it is present, the approprite pin is set to logic one (1), i.e. the bit‟s value is 1. Otherwise, if the voltage is 0 V, the appropriate pin is cleared (0), i.e. the bit‟s value is 0. It is more complicated in theory where a bit is referred to as a binary digit, but even in this case, its value can be either 0 or 1. Input/output ports (I/O Ports) In order to make the microcontroller useful, it is necessary to connect it to peripheral devices. Each microcontroller has one or more registers (called a port) connected to the microcontroller pins.

Why do we call them input/output ports? Because it is possible to change a pin function according to the user's needs. These registers are the only registers in the microcontroller the state of which can be checked by voltmeter!

Oscillator

Even pulses generated by the oscillator enable harmonic and synchronous operation of all circuits within the microcontroller. It is usually configured as to use quartz-crystal or ceramics resonator for frequency stabilization. It can also operate without elements for frequency stabilization (like RC oscillator). It is important to say that program instructions are not executed at the rate imposed by the oscillator itself, but several times slower. It happens because each instruction is executed in several steps. For some microcontrollers, the same number of cycles is needed to execute any instruction, while it's different for other microcontrollers. Accordingly, if the system uses quartz crystal with a frequency of 20MHz, the execution time of an instruction is not expected 50nS, but 200, 400 or even 800 nS, depending on the type of the microcontroller! Timers/Counters Most programs use these miniature electronic "stopwatches" in their operation. These are commonly 8- or 16-bit SFRs the contents of which is automatically incremented by each coming pulse. Once the register is completely loaded, an interrupt is generated! If these registers use an internal quartz oscillator as a clock source, then it is possible to measure the time between two events (if the register value is T1 at the moment measurement has started, and T2 at the moment it has finished, then the elapsed time is equal to the result of subtraction T2-T1 ). If the registers use pulses coming from external source, then such a timer is turned into a counter. This is only a simple explanation of the operation itself. It‟s somehow more complicated in practice.

A register or a memory cell is an electronic circuit which can memorize the state of one byte. Besides 8 bits available to the user, each register has also a number of addressing bits. It is important to remember that: All registers of ROM as well as those of RAM referred to as general-purpose registers are mutually equal and nameless. During programming, each of them can be assigned a name, which makes the whole operation much easier. All SFRs are assigned names which are different for different types of the microcontrollers and each of them has a special function as their name suggests. Watchdog timer The Watchdog Timer is a timer connected to a completely separate RC oscillator within the microcontroller. If the watchdog timer is enabled, every time it counts up to the program end, the microcontroller reset occurs and program execution starts from the first instruction. The point is to prevent this from happening by using a special command. The whole idea is based on the fact that every program is executed in several longer or shorter loops. If instructions resetting the watchdog timer are set at the appropriate program locations, besides commands being regularly executed, then the operation of the watchdog timer will not affect the program execution. If for any reason (usually electrical noise in industry), the program counter "gets stuck" at some memory location from which there is no return, the watchdog will not be cleared, so the register‟s value being constantly incremented will reach the maximum et voila! Reset occurs!

Power Supply Circuit There are two things worth attention concerning the microcontroller power supply circuit:

Brown out is a potentially dangerous state which occurs at the moment the microcontroller is being turned off or when power supply voltage drops to the lowest level due to electric noise. As the microcontroller consists of several circuits which have different operating voltage levels, this can cause its out of control performance. In order to prevent it, the microcontroller usually has a circuit for brown out reset built-in. This circuit immediately resets the whole electronics when the voltage level drops below the lower limit. Reset pin is usually referred to as Master Clear Reset (MCLR) and serves for external reset of the microcontroller by applying logic zero (0) or one (1) depending on the type of the microcontroller. In case the brown out is not built in the microcontroller, a simple external circuit for brown out reset can be connected to this pin. Serial communication

Parallel connections between the microcontroller and peripherals established over I/O ports are the ideal solution for shorter distances up to several meters. However, in other cases, when it is necessary to establish communication between two devices on longer distances it is obviously not possible to use parallel connections. Then, serial communication is the best solution. Today, most microcontrollers have several different systems for serial communication built in as a standard equipment. Which of them will be used depends on many factors of which the most important are: How many devices the microcontroller has to exchange data with? How fast the data exchange has to be?

What is the distance between devices? Is it necessary to send and receive data simultaneously? One of the most important things concerning serial communication is the Protocol which should be strictly observed. It is a set of rules which must be applied in order that devices can correctly interpret data they mutually exchange. Fortunately, the microcontrollers automatically take care of this, so the work of the programmer/user is reduced to a simple write (data to be sent) and read (received data).

A byte consists of 8 bits grouped together. If a bit is a digit then it is logical that bytes are numbers. All mathematical operations can be performed upon them, just like upon common decimal numbers, which is carried out in the ALU. It is important to remember that byte digits are not of equal significance. The largest value has the leftmost bit called the most significant bit (MSB). The rightmost bit has the least value and is therefore called the least significant bit (LSB). Since 8 digits (zeros and ones) of one byte can be combined in 256 different ways, the largest decimal number which can be represented by one byte is 255 (one combination represents zero). Program Unlike other integrated circuits which only need to be connected to other components and turn the power supply on, the microcontrollers need to be programmed first. This is a so called "bitter pill" and the main reason why hardware-oriented electronics engineers stay away from microcontrollers. It is a trap causing huge losses because the process of programming the microcontroller is basically very simple. In order to write a program for the microcontroller, several "low-level" programming languages can be used such as Assembly, C and Basic (and their versions as well). Writing program procedure consists of simple writing instructions in the order in which they should be executed. There are also many programs running in Windows environment used to facilitate the work providing additional visual tools. This book describes the use of Assembly because it is the simplest language with the fastest execution allowing entire control on what is going on in the circuit.

Interrupt - electronics is usually more faster than physical processes it should keep under control. This is why the microcontroller spends most of its time waiting for something to happen or execute. In other words, when some event takes place, the microcontroller does something. In order to prevent the microcontroller from spending most of its time endlessly checking for logic state on input pins and registers, an interrupt is generated. It is the signal which informs the central processor that something attention worthy has happened. As its name suggests, it interrupts regular program execution. It can be generated by different sources so when it occurs, the microcontroller immediately stops operation and checks for the cause. If it is needed to perform some operations, a current state of the program counter is pushed onto the Stack and the appropriate program is executed. It's the so called interrupt routine. Stack is a part of RAM used for storing the current state of the program counter (address) when an interrupt occurs. In this way, after a subroutine or an interrupt execution, the microcontroller knows from where to continue regular program execution. This address is cleared after returning to the program because there is no need to save it any longer, and one location of the stack is automatically availale for further use. In addition, the stack can consist of several levels. This enables subroutines’ nesting, i.e. calling one subroutine from another.

Chapter 2 : 8051 Microcontroller Architecture

2.1 What is 8051 Standard? 2.2 8051 Microcontroller's pins 2.3 Input/Output Ports (I/O Ports) 2.4 8051 Microcontroller Memory Organisation 2.5 SFRs (Special Function Registers) 2.6 Counters and Timers 2.7 UART (Universal Asynchronous Receiver and Transmitter) 2.8 8051 Microcontroller Interrupts 2.9 8051 Microcontroller Power Consumption Control

2.1 What is 8051 Standard? Microcontroller manufacturers have been competing for a long time for attracting choosy customers and every couple of days a new chip with a higher operating frequency, more memory and upgraded A/D converters appeared on the market. However, most of them had the same or at least very similar architecture known in the world of microcontrollers as “8051 compatible”. What is all this about? The whole story has its beginnings in the far 80s when Intel launched the first series of microcontrollers called the MCS 051. Even though these microcontrollers had quite modest features in comparison to the new ones, they conquered the world very soon and became a standard for what nowadays is called the microcontroller. The main reason for their great success and popularity is a skillfully chosen configuration which satisfies different needs of a large number of users allowing at the same time constant expansions (refers to the new types of microcontrollers). Besides, the software has been developed in great extend in the meantime, and it simply was not profitable to change anything in the microcontroller‟s basic core. This is the reason for having a great number of various microcontrollers which basically are solely upgraded versions of the 8051 family. What makes this microcontroller so special and universal so that almost all manufacturers all over the world manufacture it today under different name?

As seen in figure above, the 8051 microcontroller has nothing impressive in appearance: 4 Kb of ROM is not much at all. 128b of RAM (including SFRs) satisfies the user's basic needs. 4 ports having in total of 32 input/output lines are in most cases sufficient to make all necessary connections to peripheral environment. The whole configuration is obviously thought of as to satisfy the needs of most programmers working on

development of automation devices. One of its advantages is that nothing is missing and nothing is too much. In other words, it is created exactly in accordance to the average user„s taste and needs. Another advantages are RAM organization, the operation of Central Processor Unit (CPU) and ports which completely use all recourses and enable further upgrade.

2.2 Pinout Description Pins 1-8: Port 1 Each of these pins can be configured as an input or an output. Pin 9: RS A logic one on this pin disables the microcontroller and clears the contents of most registers. In other words, the positive voltage on this pin resets the microcontroller. By applying logic zero to this pin, the program starts execution from the beginning. Pins10-17: Port 3 Similar to port 1, each of these pins can serve as general input or output. Besides, all of them have alternative functions: Pin 10: RXD Serial asynchronous communication input or Serial synchronous communication output. Pin 11: TXD Serial asynchronous communication output or Serial synchronous communication clock output. Pin 12: INT0 Interrupt 0 input. Pin 13: INT1 Interrupt 1 input. Pin 14: T0 Counter 0 clock input. Pin 15: T1 Counter 1 clock input. Pin 16: WR Write to external (additional) RAM. Pin 17: RD Read from external RAM. Pin 18, 19: X2, X1 Internal oscillator input and output. A quartz crystal which specifies operating frequency is usually connected to these pins. Instead of it, miniature ceramics resonators can also be used for frequency stability. Later versions of microcontrollers operate at a frequency of 0 Hz up to over 50 Hz. Pin 20: GND Ground. Pin 21-28: Port 2 If there is no intention to use external memory then these port pins are configured as general inputs/outputs. In case external memory is used, the higher address byte, i.e. addresses A8-A15 will appear on this port. Even though memory with capacity of 64Kb is not used, which means that not all eight port bits are used for its addressing, the rest of them are not available as inputs/outputs. Pin 29: PSEN If external ROM is used for storing program then a logic zero (0) appears on it every time the microcontroller reads a byte from memory. Pin 30: ALE Prior to reading from external memory, the microcontroller puts the lower address byte (A0-A7) on P0 and activates the ALE output. After receiving signal from the ALE pin, the external register (usually 74HCT373 or 74HCT375 add-on chip) memorizes the state of P0 and uses it as a memory chip address. Immediately after that, the ALU pin is returned its previous logic state and P0 is now used as a Data Bus. As seen, port data multiplexing is performed by means of only one additional (and cheap) integrated circuit. In other words, this port is used for both data and address transmission.

Pin 31: EA By applying logic zero to this pin, P2 and P3 are used for data and address transmission with no regard to whether there is internal memory or not. It means that even there is a program written to the microcontroller, it will not be executed. Instead, the program written to external ROM will be executed. By applying logic one to the EA pin, the microcontroller will use both memories, first internal then external (if exists). Pin 32-39: Port 0 Similar to P2, if external memory is not used, these pins can be used as general inputs/outputs. Otherwise, P0 is configured as address output (A0-A7) when the ALE pin is driven high (1) or as data output (Data Bus) when the ALE pin is driven low (0). Pin 40: VCC +5V power supply.

2.3 Input/Output Ports (I/O Ports) All 8051 microcontrollers have 4 I/O ports each comprising 8 bits which can be configured as inputs or outputs. Accordingly, in total of 32 input/output pins enabling the microcontroller to be connected to peripheral devices are available for use. Pin configuration, i.e. whether it is to be configured as an input (1) or an output (0), depends on its logic state. In order to configure a microcontroller pin as an input, it is necessary to apply a logic zero (0) to appropriate I/O port bit. In this case, voltage level on appropriate pin will be 0. Similarly, in order to configure a microcontroller pin as an input, it is necessary to apply a logic one (1) to appropriate port. In this case, voltage level on appropriate pin will be 5V (as is the case with any TTL input). This may seem confusing but don't loose your patience. It all becomes clear after studying simple electronic circuits connected to an I/O pin.

Input/Output (I/O) pin Figure above illustrates a simplified schematic of all circuits within the microcontroler connected to one of its pins. It refers to all the pins except those of the P0 port which do not have pull-up resistors built-in.

Output pin A logic zero (0) is applied to a bit of the P register. The output FE transistor is turned on, thus connecting the appropriate pin to ground.

Input pin A logic one (1) is applied to a bit of the P register. The output FE transistor is turned off and the appropriate pin remains connected to the power supply voltage over a pull-up resistor of high resistance.

Logic state (voltage) of any pin can be changed or read at any moment. A logic zero (0) and logic one (1) are not equal. A logic one (0) represents a short circuit to ground. Such a pin acts as an output. A logic one (1) is “loosely” connected to the power supply voltage over a resistor of high resistance. Since this voltage can be easily “reduced” by an external signal, such a pin acts as an input. Port 0 The P0 port is characterized by two functions. If external memory is used then the lower address byte (addresses A0-A7) is applied on it. Otherwise, all bits of this port are configured as inputs/outputs. The other function is expressed when it is configured as an output. Unlike other ports consisting of pins with built-in pull-up resistor connected by its end to 5 V power supply, pins of this port have this resistor left out. This apparently small difference has its consequences:

If any pin of this port is configured as an input then it acts as if it “floats”. Such an input has unlimited input resistance and indetermined potential.

When the pin is configured as an output, it acts as an “open drain”. By applying logic 0 to a port bit, the appropriate pin will be connected to ground (0V). By applying logic 1, the external output will keep on “floating”. In order to apply logic 1 (5V) on this output pin, it is necessary to built in an external pull-up resistor.

Only in case P0 is used for addressing external memory, the microcontroller will provide internal power supply source in order to supply its pins with logic one. There is no need to add external pull-up resistors. Port 1 P1 is a true I/O port, because it doesn't have any alternative functions as is the case with P0, but can be cofigured as general I/O only. It has a pull-up resistor built-in and is completely compatible with TTL circuits. Port 2 P2 acts similarly to P0 when external memory is used. Pins of this port occupy addresses intended for external memory chip. This time it is about the higher address byte with addresses A8-A15. When no memory is added, this port can be used as a general input/output port showing features similar to P1. Port 3 All port pins can be used as general I/O, but they also have an alternative function. In order to use these alternative functions, a logic one (1) must be applied to appropriate bit of the P3 register. In tems of hardware, this port is similar to P0, with the difference that its pins have a pull-up resistor built-in. Pin's Current limitations

When configured as outputs (logic zero (0)), single port pins can receive a current of 10mA. If all 8 bits of a port are active, a total current must be limited to 15mA (port P0: 26mA). If all ports (32 bits) are active, total maximum current must be limited to 71mA. When these pins are configured as inputs (logic 1), built-in pull-up resistors provide very weak current, but strong enough to activate up to 4 TTL inputs of LS series.

As seen from description of some ports, even though all of them have more or less similar architecture, it is necessary to pay attention to which of them is to be used for what and how. For example, if they shall be used as outputs with high voltage level (5V), then P0 should be avoided because its pins do not have pull-up resistors, thus giving low logic level only. When using other ports, one should have in mind that pull-up resistors have a relatively high resistance, so that their pins can give a current of several hundreds microamperes only.

2.4 Memory Organization The 8051 has two types of memory and these are Program Memory and Data Memory. Program Memory (ROM) is used to permanently save the program being executed, while Data Memory (RAM) is used for temporarily storing data and intermediate results created and used during the operation of the microcontroller. Depending on the model in use (we are still talking about the 8051 microcontroller family in general) at most a few Kb of ROM and 128 or 256 bytes of RAM is used. However… All 8051 microcontrollers have a 16-bit addressing bus and are capable of addressing 64 kb memory. It is neither a mistake nor a big ambition of engineers who were working on basic core development. It is a matter of smart memory organization which makes these microcontrollers a real “programmers‟ goody“. Program Memory The first models of the 8051 microcontroller family did not have internal program memory. It was added as an external separate chip. These models are recognizable by their label beginning with 803 (for example 8031 or 8032). All later models have a few Kbyte ROM embedded. Even though such an amount of memory is sufficient for writing most of the programs, there are situations when it is necessary to use additional memory as well. A typical example are so called lookup tables. They are used in cases when equations describing some processes are too complicated or when there is no time for solving them. In such cases all necessary estimates and approximates are executed in advance and the final results are put in the tables (similar to logarithmic tables).

How does the microcontroller handle external memory depends on the EA pin logic state:

EA=0 In this case, the microcontroller completely ignores internal program memory and executes only the program stored in external memory. EA=1 In this case, the microcontroller executes first the program from built-in ROM, then the program stored in external memory. In both cases, P0 and P2 are not available for use since being used for data and address transmission. Besides, the ALE and PSEN pins are also used. Data Memory As already mentioned, Data Memory is used for temporarily storing data and intermediate results created and used during the operation of the microcontroller. Besides, RAM memory built in the 8051 family includes many registers such as hardware counters and timers, input/output ports, serial data buffers etc. The previous models had 256 RAM locations, while for the later models this number was incremented by additional 128 registers. However, the first 256 memory locations (addresses 0-FFh) are the heart of memory common to all the models belonging to the 8051 family. Locations available to the user occupy memory space with addresses 0-7Fh, i.e. first 128 registers. This part of RAM is divided in several blocks. The first block consists of 4 banks each including 8 registers denoted by R0-R7. Prior to accessing any of these registers, it is necessary to select the bank containing it. The next memory block (address 20h-2Fh) is bit- addressable, which means that each bit has its own address (0-7Fh). Since there are 16 such registers, this block contains in total of 128 bits with separate addresses (address of bit 0 of the 20h byte is 0, while address of bit 7 of the 2Fh byte is 7Fh). The third group of registers occupy addresses 2Fh-7Fh, i.e. 80 locations, and does not have any special functions or features. Additional RAM In order to satisfy the programmers‟ constant hunger for Data Memory, the manufacturers decided to embed an additional memory block of 128 locations into the latest versions of the 8051 microcontrollers.

However, it‟s not as simple as it seems to be… The problem is that electronics performing addressing has 1 byte (8 bits) on disposal and is capable of reaching only the first 256 locations, therefore. In order to keep already existing 8-bit architecture and compatibility with other existing models a small trick was done. What does it mean? It means that additional memory block shares the same addresses with locations intended for the SFRs (80h- FFh). In order to differentiate between these two physically separated memory spaces, different ways of addressing are used. The SFRs memory locations are accessed by direct addressing, while additional RAM memory locations are accessed by indirect addressing.

Memory expansion In case memory (RAM or ROM) built in the microcontroller is not sufficient, it is possible to add two external memory chips with capacity of 64Kb each. P2 and P3 I/O ports are used for their addressing and data transmission.

From the user‟s point of view, everything works quite simply when properly connected because most operations are performed by the microcontroller itself. The 8051 microcontroller has two pins for data read RD#(P3.7) and PSEN#. The first one is used for reading data from external data memory (RAM), while the other is used for reading data from external program memory (ROM). Both pins are active low. A typical example of memory expansion by adding RAM and ROM chips (Hardward architecture), is shown in figure above. Even though additional memory is rarely used with the latest versions of the microcontrollers, we will describe in short what happens when memory chips are connected according to the previous schematic. The whole process described below is performed automatically. When the program during execution encounters an instruction which resides in external memory (ROM), the microcontroller will activate its control output ALE and set the first 8 bits of address (A0-A7) on P0. IC circuit 74HCT573 passes the first 8 bits to memory address pins. A signal on the ALE pin latches the IC circuit 74HCT573 and immediately afterwards 8 higher bits of address (A8-A15) appear on the port. In this way, a desired location of additional program memory is addressed. It is left over to read its content. Port P0 pins are configured as inputs, the PSEN pin is activated and the microcontroller reads from memory chip. Similar occurs when it is necessary to read location from external RAM. Addressing is performed in the same way, while read and write are performed via signals appearing on the control outputs RD (is short for read) or WR (is short for write). Addressing While operating, the processor processes data as per program instructions. Each instruction consists of

two parts. One part describes WHAT should be done, while the other explains HOW to do it. The latter part can be a data (binary number) or the address at which the data is stored. Two ways of addressing are used for all 8051 microcontrollers depending on which part of memory should be accessed: Direct Addressing On direct addressing, the address of memory location containing data to be read is specified in instruction. The address may contain a number being changed during operation (variable). For example: Since the address is only one byte in size (the largest number is 255), only the first 255 locations of RAM can be accessed this way. The first half of RAM is available for use, while another half is reserved for SFRs. MOV A,33h; Means: move a number from address 33 hex. to accumulator

Indirect Addressing On indirect addressing, a register containing the address of another register is specified in instruction. Data to be used in the program is stored in the letter register. For example: Indirect addressing is only used for accessing RAM locations available for use (never for accessing SFRs). This is the only way of accessing all the latest versions of the microcontrollers with additional memory block (128 locations of RAM). Simply put, when the program encounters instruction including “@” sign and if the specified address is higher than 128 ( 7F hex.), the processor knows that indirect addressing is used and skips memory space reserved for SFRs. MOV A,@R0; Means: Store the value from the register whose address is in the R0 register into accumulator

On indirect addressing, registers R0, R1 or Stack Pointer are used for specifying 8-bit addresses. Since only 8 bits are avilable, it is possible to access only registers of internal RAM this way (128 locations when speaking of previous models or 256 locations when speaking of latest models of microcontrollers). If an extra memory chip is added then the 16-bit DPTR Register (consisting of the registers DPTRL and DPTRH) is used for specifying address. In this way it is possible to access any location in the range of 64K.

2.5 Special Function Registers (SFRs) Special Function Registers (SFRs) are a sort of control table used for running and monitoring the operation of the microcontroller. Each of these registers as well as each bit they include, has its name, address in the scope of RAM and precisely defined purpose such as timer control, interrupt control, serial communication control etc. Even though there are 128 memory locations intended to be occupied by them, the basic core, shared by all types of 8051 microcontrollers, has only 21 such registers. Rest of locations are intensionally left unoccupied in order to enable the manufacturers to further develop microcontrollers keeping them compatible with the previous versions. It also enables programs written a long time ago for microcontrollers which are out of production now to be used today.

A Register (Accumulator)

A register is a general-purpose register used for storing intermediate results obtained during operation. Prior to executing an instruction upon any number or operand it is necessary to store it in the accumulator first. All results obtained from arithmetical operations performed by the ALU are stored in the accumulator. Data to be moved from one register to another must go through the accumulator. In other words, the A register is the most commonly used register and it is impossible to imagine a microcontroller without it. More than half instructions used by the 8051 microcontroller use somehow the accumulator. B Register Multiplication and division can be performed only upon numbers stored in the A and B registers. All other instructions in the program can use this register as a spare accumulator (A).

During the process of writing a program, each register is called by its name so that their exact addresses are not of importance for the user. During compilation, their names will be automatically replaced by appropriate addresses.

R Registers (R0-R7)

This is a common name for 8 general-purpose registers (R0, R1, R2 ...R7). Even though they are not true SFRs, they deserve to be discussed here because of their purpose. They occupy 4 banks within RAM. Similar to the accumulator, they are used for temporary storing variables and intermediate results during operation. Which one of these banks is to be active depends on two bits of the PSW Register. Active bank is a bank the registers of which are currently used. The following example best illustrates the purpose of these registers. Suppose it is necessary to perform some arithmetical operations upon numbers previously stored in the R registers: (R1+R2) - (R3+R4). Obviously, a register for temporary storing results of addition is needed. This is how it looks in the program: MOV A,R3; Means: move number from R3 into accumulator ADD A,R4; Means: add number from R4 to accumulator (result remains in accumulator) MOV R5,A; Means: temporarily move the result from accumulator into R5 MOV A,R1; Means: move number from R1 to accumulator ADD A,R2; Means: add number from R2 to accumulator SUBB A,R5; Means: subtract number from R5 (there are R3+R4)

Program Status Word (PSW) Register

PSW register is one of the most important SFRs. It contains several status bits that reflect the current state of the CPU. Besides, this register contains Carry bit, Auxiliary Carry, two register bank select bits, Overflow flag, parity bit and user-definable status flag. P - Parity bit. If a number stored in the accumulator is even then this bit will be automatically set (1), otherwise it will be cleared (0). It is mainly used during data transmit and receive via serial communication. - Bit 1. This bit is intended to be used in the future versions of microcontrollers. OV Overflow occurs when the result of an arithmetical operation is larger than 255 and cannot be stored in one register. Overflow condition causes the OV bit to be set (1). Otherwise, it will be cleared (0).

RS0, RS1 - Register bank select bits. These two bits are used to select one of four register banks of RAM. By setting and clearing these bits, registers R0-R7 are stored in one of four banks of RAM. RS1 RS2 Space in RAM 0 0 Bank0 00h-07h 0 1 Bank1 08h-0Fh 1 0 Bank2 10h-17h 1 1 Bank3 18h-1Fh F0 - Flag 0. This is a general-purpose bit available for use. AC - Auxiliary Carry Flag is used for BCD operations only. CY - Carry Flag is the (ninth) auxiliary bit used for all arithmetical operations and shift instructions. Data Pointer Register (DPTR) DPTR register is not a true one because it doesn't physically exist. It consists of two separate registers: DPH (Data Pointer High) and (Data Pointer Low). For this reason it may be treated as a 16-bit register or as two independent 8-bit registers. Their 16 bits are primarly used for external memory addressing. Besides, the DPTR Register is usually used for storing data and intermediate results.

Stack Pointer (SP) Register

A value stored in the Stack Pointer points to the first free stack address and permits stack availability. Stack pushes increment the value in the Stack Pointer by 1. Likewise, stack pops decrement its value by 1. Upon any reset and power-on, the value 7 is stored in the Stack Pointer, which means that the space of RAM reserved for the stack starts at this location. If another value is written to this register, the entire Stack is moved to the new memory location.

P0, P1, P2, P3 - Input/Output Registers

If neither external memory nor serial communication system are used then 4 ports with in total of 32 input/output pins are available for connection to peripheral environment. Each bit within these ports affects the state and performance of appropriate pin of the microcontroller. Thus, bit logic state is reflected on appropriate pin as a voltage (0 or 5 V) and vice versa, voltage on a pin reflects the state of appropriate port bit. As mentioned, port bit state affects performance of port pins, i.e. whether they will be configured as inputs or outputs. If a bit is cleared (0), the appropriate pin will be configured as an output, while if it is set (1), the appropriate pin will be configured as an input. Upon reset and power-on, all port bits are set (1), which means that all appropriate pins will be configured as inputs.

I/O ports are directly connected to the microcontroller pins. Accordingly, logic state of these registers can be checked by voltmeter and vice versa, voltage on the pins can be checked by inspecting their bits!

2.6 Counters and Timers As you already know, the microcontroller oscillator uses quartz crystal for its operation. As the frequency of this oscillator is precisely defined and very stable, pulses it generates are always of the same width, which makes them ideal for time measurement. Such crystals are also used in quartz watches. In order to measure time between two events it is sufficient to count up pulses coming from this oscillator. That is exactly what the timer does. If the timer is properly programmed, the value stored in its register will be incremented (or decremented) with each coming pulse, i.e. once per each machine cycle. A single machine-cycle instruction lasts for 12 quartz oscillator periods, which means that by embedding quartz with oscillator frequency of 12MHz, a number stored in the timer register will be changed million times per second, i.e. each microsecond. The 8051 microcontroller has 2 timers/counters called T0 and T1. As their names suggest, their main purpose is to measure time and count external events. Besides, they can be used for generating clock pulses to be used in serial communication, so called Baud Rate. Timer T0 As seen in figure below, the timer T0 consists of two registers – TH0 and TL0 representing a low and a high byte of one 16-digit binary number.

Accordingly, if the content of the timer T0 is equal to 0 (T0=0) then both registers it consists of will contain 0. If the timer contains for example number 1000 (decimal), then the TH0 register (high byte) will contain the number 3, while the TL0 register (low byte) will contain decimal number 232.

Formula used to calculate values in these two registers is very simple: TH0 × 256 + TL0 = T Matching the previous example it would be as follows: 3 × 256 + 232 = 1000

Since the timer T0 is virtually 16-bit register, the largest value it can store is 65 535. In case of exceeding this value, the timer will be automatically cleared and counting starts from 0. This condition is called an overflow. Two registers TMOD and TCON are closely connected to this timer and control its operation. TMOD Register (Timer Mode) The TMOD register selects the operational mode of the timers T0 and T1. As seen in figure below, the low 4 bits (bit0 - bit3) refer to the timer 0, while the high 4 bits (bit4 - bit7) refer to the timer 1. There are 4 operational modes and each of them is described herein.

Bits of this register have the following function: GATE1 enables and disables Timer 1 by means of a signal brought to the INT1 pin (P3.3): o 1 - Timer 1 operates only if the INT1 bit is set. o 0 - Timer 1 operates regardless of the logic state of the INT1 bit. C/T1 selects pulses to be counted up by the timer/counter 1: o 1 - Timer counts pulses brought to the T1 pin (P3.5). o 0 - Timer counts pulses from internal oscillator. T1M1,T1M0 These two bits select the operational mode of the Timer 1. T1M1 T1M0 Mode Description 0 0 0 13-bit timer 0 1 1 16-bit timer 1 0 2 8-bit auto-reload 1 1 3 Split mode GATE0 enables and disables Timer 1 using a signal brought to the INT0 pin (P3.2):

o o

1 - Timer 0 operates only if the INT0 bit is set. 0 - Timer 0 operates regardless of the logic state of the INT0 bit. C/T0 selects pulses to be counted up by the timer/counter 0: o 1 - Timer counts pulses brought to the T0 pin (P3.4). o 0 - Timer counts pulses from internal oscillator. T0M1,T0M0 These two bits select the oprtaional mode of the Timer 0. T0M1 T0M0 Mode Description 0 0 0 13-bit timer 0 1 1 16-bit timer 1 0 2 8-bit auto-reload 1 1 3 Split mode Timer 0 in mode 0 (13-bit timer) This is one of the rarities being kept only for the purpose of compatibility with the previuos versions of microcontrollers. This mode configures timer 0 as a 13-bit timer which consists of all 8 bits of TH0 and the lower 5 bits of TL0. As a result, the Timer 0 uses only 13 of 16 bits. How does it operate? Each coming pulse causes the lower register bits to change their states. After receiving 32 pulses, this register is loaded and automatically cleared, while the higher byte (TH0) is incremented by 1. This process is repeated until registers count up 8192 pulses. After that, both registers are cleared and counting starts from 0.

Timer 0 in mode 1 (16-bit timer) Mode 1 configures timer 0 as a 16-bit timer comprising all the bits of both registers TH0 and TL0. That's why this is one of the most commonly used modes. Timer operates in the same way as in mode 0, with difference that the registers count up to 65 536 as allowable by the 16 bits.

Timer 0 in mode 2 (Auto-Reload Timer) Mode 2 configures timer 0 as an 8-bit timer. Actually, timer 0 uses only one 8-bit register for counting and never counts from 0, but from an arbitrary value (0-255) stored in another (TH0) register. The following example shows the advantages of this mode. Suppose it is necessary to constantly count up 55 pulses generated by the clock. If mode 1 or mode 0 is used, It is necessary to write the number 200 to the timer registers and constantly check whether an overflow has occured, i.e. whether they reached the value 255. When it happens, it is necessary to rewrite the number 200 and repeat the whole procedure. The same procedure is automatically performed by the microcontroller if set in mode 2. In fact, only the TL0 register operates as a timer, while another (TH0) register stores the value from which the counting starts. When the TL0 register is loaded, instead of being cleared, the contents of TH0 will be reloaded to it. Referring to the previous example, in order to register each 55th pulse, the best solution is to write the number 200 to the TH0 register and configure the timer to operate in mode 2.

Timer 0 in Mode 3 (Split Timer) Mode 3 configures timer 0 so that registers TL0 and TH0 operate as separate 8-bit timers. In other words, the 16-bit timer consisting of two registers TH0 and TL0 is split into two independent 8-bit timers. This mode is provided for applications requiring an additional 8-bit timer or counter. The TL0 timer turns into timer 0, while the TH0 timer turns into timer 1. In addition, all the control bits of 16-bit Timer 1 (consisting of the TH1 and TL1 register), now control the 8-bit Timer 1. Even though the 16-bit Timer 1 can still be configured to operate in any of modes (mode 1, 2 or 3), it is no longer possible to disable it as there is no control bit to do it. Thus, its operation is restricted when timer 0 is in mode 3.

The only application of this mode is when two timers are used and the 16-bit Timer 1 the operation of

which is out of control is used as a baud rate generator. Timer Control (TCON) Register TCON register is also one of the registers whose bits are directly in control of timer operation. Only 4 bits of this register are used for this purpose, while rest of them is used for interrupt control to be discussed later.

TF1 bit is automatically set on the Timer 1 overflow. TR1 bit enables the Timer 1. o 1 - Timer 1 is enabled. o 0 - Timer 1 is disabled. TF0 bit is automatically set on the Timer 0 overflow. TR0 bit enables the timer 0. o 1 - Timer 0 is enabled. o 0 - Timer 0 is disabled. How to use the Timer 0 ? In order to use timer 0, it is first necessary to select it and configure the mode of its operation. Bits of the TMOD register are in control of it:

Referring to figure above, the timer 0 operates in mode 1 and counts pulses generated by internal clock the frequency of which is equal to 1/12 the quartz frequency. Turn on the timer:

The TR0 bit is set and the timer starts operation. If the quartz crystal with frequency of 12MHz is embedded then its contents will be incremented every microsecond. After 65.536 microseconds, the both registers the timer consists of will be loaded. The microcontroller automatically clears them and the timer keeps on repeating procedure from the beginning until the TR0 bit value is logic zero (0). How to 'read' a timer? Depending on application, it is necessary either to read a number stored in the timer registers or to register the moment they have been cleared. - It is extremely simple to read a timer by using only one register configured in mode 2 or 3. It is sufficient to read its state at any moment. That's all! - It is somehow complicated to read a timer configured to operate in mode 2. Suppose the lower byte is read first (TL0), then the higher byte (TH0). The result is: TH0 = 15 TL0 = 255 Everything seems to be ok, but the current state of the register at the moment of reading was: TH0 = 14 TL0 = 255 In case of negligence, such an error in counting (255 pulses) may occur for not so obvious but quite logical reason. The lower byte is correctly read (255), but at the moment the program counter was about to read the higher byte TH0, an overflow occurred and the contents of both registers have been changed (TH0: 14→15, TL0: 255→0). This problem has a simple solution. The higher byte should be read first, then the lower byte and once again the higher byte. If the number stored in the higher byte is different then this sequence should be repeated. It's about a short loop consisting of only 3 instructions in the program. There is another solution as well. It is sufficient to simply turn the timer off while reading is going on (the TR0 bit of the TCON register should be cleared), and turn it on again after reading is finished. Timer 0 Overflow Detection Usually, there is no need to constantly read timer registers. It is sufficient to register the moment they are cleared, i.e. when counting starts from 0. This condition is called an overflow. When it occurrs, the TF0 bit of the TCON register will be automatically set. The state of this bit can be constantly checked from within the program or by enabling an interrupt which will stop the main program execution when this bit is set. Suppose it is necessary to provide a program delay of 0.05 seconds (50 000 machine cycles), i.e.

time when the program seems to be stopped: First a number to be written to the timer registers should be calculated:

Then it should be written to the timer registers TH0 and TL0:

When enabled, the timer will resume counting from this number. The state of the TF0 bit, i.e. whether it is set, is checked from within the program. It happens at the moment of overflow, i.e. after exactly 50.000 machine cycles or 0.05 seconds. How to measure pulse duration?

Suppose it is necessary to measure the duration of an operation, for example how long a device has been turned on? Look again at the figure illustrating the timer and pay attention to the function of the GATE0 bit of the TMOD register. If it is cleared then the state of the P3.2 pin doesn't affect timer operation. If GATE0 = 1 the timer will operate until the pin P3.2 is cleared. Accordingly, if this pin is supplied with 5V through some external switch at the moment the device is being turned on, the timer will measure duration of its operation, which actually was the objective. How to count up pulses? Similarly to the previous example, the answer to this question again lies in the TCON register. This time it's about the C/T0 bit. If the bit is cleared the timer counts pulses generated by the internal oscillator, i.e. measures the time passed. If the bit is set, the timer input is provided with pulses from the P3.4 pin (T0). Since these pulses are not always of the same width, the timer cannot be used for time measurement and is turned into a counter, therefore. The highest frequency that could be measured by such a counter is 1/24 frequency of used quartz-crystal. Timer 1 Timer 1 is identical to timer 0, except for mode 3 which is a hold-count mode. It means that they have the same function, their operation is controlled by the same registers TMOD and TCON and both of them can operate in one out of 4 different modes.

2.7 UART (Universal Asynchronous Receiver and Transmitter) One of the microcontroller features making it so powerful is an integrated UART, better known as a serial port. It is a full-duplex port, thus being able to transmit and receive data simultaneously and at different baud rates. Without it, serial data send and receive would be an enormously complicated part of the program in which the pin state is constantly changed and checked at regular intervals. When using UART, all the programmer has to do is to simply select serial port mode and baud rate. When it's done, serial data transmit is nothing but writing to the SBUF register, while data receive represents reading the same register. The microcontroller takes care of not making any error during data transmission.

Serial port must be configured prior to being used. In other words, it is necessary to determine how many bits is contained in one serial “word”, baud rate and synchronization clock source. The whole process is in control of the bits of the SCON register (Serial Control). Serial Port Control (SCON) Register

SM0 - Serial port mode bit 0 is used for serial port mode selection. SM1 - Serial port mode bit 1. SM2 - Serial port mode 2 bit, also known as multiprocessor communication enable bit. When set, it enables multiprocessor communication in mode 2 and 3, and eventually mode 1. It should be cleared in mode 0. REN - Reception Enable bit enables serial reception when set. When cleared, serial reception is disabled. TB8 - Transmitter bit 8. Since all registers are 8-bit wide, this bit solves the problem of transmiting the 9th bit in modes 2 and 3. It is set to transmit a logic 1 in the 9th bit. RB8 - Receiver bit 8 or the 9th bit received in modes 2 and 3. Cleared by hardware if 9th bit received is a logic 0. Set by hardware if 9th bit received is a logic 1. TI - Transmit Interrupt flag is automatically set at the moment the last bit of one byte is sent. It's a signal to the processor that the line is available for a new byte transmite. It must be cleared from within the software. RI - Receive Interrupt flag is automatically set upon one byte receive. It signals that byte is received and should be read quickly prior to being replaced by a new data. This bit is also cleared from within the software. As seen, serial port mode is selected by combining the SM0 and SM2 bits: SM0 SM1 Mode Description Baud Rate 0 0 0 8-bit Shift Register 1/12 the quartz frequency

0 1 1

1 0 1

1 2 3

8-bit UART 9-bit UART 9-bit UART

Determined by the timer 1 1/32 the quartz frequency (1/64 the quartz frequency) Determined by the timer 1

In mode 0, serial data are transmitted and received through the RXD pin, while the TXD pin output clocks. The bout rate is fixed at 1/12 the oscillator frequency. On transmit, the least significant bit (LSB bit) is sent/received first. TRANSMIT - Data transmit is initiated by writing data to the SBUF register. In fact, this process starts after any instruction being performed upon this register. When all 8 bits have been sent, the TI bit of the SCON register is automatically set.

RECEIVE - Data receive through the RXD pin starts upon the two following conditions are met: bit REN=1 and RI=0 (both of them are stored in the SCON register). When all 8 bits have been received, the RI bit of the SCON register is automatically set indicating that one byte receive is complete.

Since there are no START and STOP bits or any other bit except data sent from the SBUF register in the pulse sequence, this mode is mainly used when the distance between devices is short, noise is minimized and operating speed is of importance. A typical example is I/O port expansion by adding a cheap IC (shift

registers 74HC595, 74HC597 and similar). Mode 1

In mode 1, 10 bits are transmitted through the TXD pin or received through the RXD pin in the following manner: a START bit (always 0), 8 data bits (LSB first) and a STOP bit (always 1). The START bit is only used to initiate data receive, while the STOP bit is automatically written to the RB8 bit of the SCON register. TRANSMIT - Data transmit is initiated by writing data to the SBUF register. End of data transmission is indicated by setting the TI bit of the SCON register.

RECEIVE - The START bit (logic zero (0)) on the RXD pin initiates data receive. The following two conditions must be met: bit REN=1 and bit RI=0. Both of them are stored in the SCON register. The RI bit is automatically set upon data reception is complete.

The Baud rate in this mode is determined by the timer 1 overflow.

Mode 2

In mode 2, 11 bits are transmitted through the TXD pin or received through the RXD pin: a START bit (always 0), 8 data bits (LSB first), a programmable 9th data bit and a STOP bit (always 1). On transmit, the 9th data bit is actually the TB8 bit of the SCON register. This bit usually has a function of parity bit. On receive, the 9th data bit goes into the RB8 bit of the same register (SCON).The baud rate is either 1/32 or 1/64 the oscillator frequency. TRANSMIT - Data transmit is initiated by writing data to the SBUF register. End of data transmission is indicated by setting the TI bit of the SCON register.

RECEIVE - The START bit (logic zero (0)) on the RXD pin initiates data receive. The following two conditions must be met: bit REN=1 and bit RI=0. Both of them are stored in the SCON register. The RI bit is automatically set upon data reception is complete.

Mode 3 Mode 3 is the same as Mode 2 in all respects except the baud rate. The baud rate in Mode 3 is variable.

The parity bit is the P bit of the PSW register. The simplest way to check correctness of the received byte

is to add a parity bit to it. Simply, before initiating data transmit, the byte to transmit is stored in the accumulator and the P bit goes into the TB8 bit in order to be “a part of the message”. The procedure is opposite on receive, received byte is stored in the accumulator and the P bit is compared with the RB8 bit. If they are the same- everything is OK! Baud Rate Baud Rate is a number of sent/received bits per second. In case the UART is used, baud rate depends on: selected mode, oscillator frequency and in some cases on the state of the SMOD bit of the SCON register. All the necessary formulas are specified in the table: Baud Rate BitSMOD Mode 0 Fosc. / 12 1 Fosc. Mode 1 BitSMOD 16 12 (256-TH1) Fosc. / 32 1 Mode 2 Fosc. / 64 0 1 Fosc. Mode 3 16 12 (256-TH1) Timer 1 as a clock generator Timer 1 is usually used as a clock generator as it enables various baud rates to be easily set. The whole procedure is simple and is as follows: First, enable Timer 1 overflow interrupt. Configure Timer T1 to operate in auto-reload mode. Depending on needs, select one of the standard values from the table and write it to the TH1 register. That's all. Baud Rate 150 300 600 1200 2400 4800 4800 9600 9600 19200 38400 76800

Fosc. (MHz) Bit SMOD 11.0592 12 14.7456 16 20 40 h 30 h 00 h 0 A0 h 98 h 80 h 75 h 52 h 0 D0 h CC h C0 h BB h A9 h 0 E8 h E6 h E0 h DE h D5 h 0 F4 h F3 h F0 h EF h EA h 0 F3 h EF h EF h 1 FA h F8 h F5 h 0 FD h FC h 0 F5 h 1 FD h FC h 1 FE h 1 FF h 1

Multiprocessor Communication As you may know, additional 9th data bit is a part of message in mode 2 and 3. It can be used for checking data via parity bit. Another useful application of this bit is in communication between two or more microcontrollers, i.e. multiprocessor communication. This feature is enabled by setting the SM2 bit of the SCON register. As a result, after receiving the STOP bit, indicating end of the message, the serial port interrupt will be generated only if the bit RB8 = 1 (the 9th bit).

This is how it looks like in practice: Suppose there are several microcontrollers sharing the same interface. Each of them has its own address. An address byte differs from a data byte because it has the 9th bit set (1), while this bit is cleared (0) in a data byte. When the microcontroller A (master) wants to transmit a block of data to one of several slaves, it first sends out an address byte which identifies the target slave. An address byte will generate an interrupt in all slaves so that they can examine the received byte and check whether it matches their address.

Of course, only one of them will match the address and immediately clear the SM2 bit of the SCON register and prepare to receive the data byte to come. Other slaves not being addressed leave their SM2 bit set ignoring the coming data bytes.

2.8 8051 Microcontroller Interrupts There are five interrupt sources for the 8051, which means that they can recognize 5 different events that can interrupt regular program execution. Each interrupt can be enabled or disabled by setting bits of the IE register. Likewise, the whole interrupt system can be disabled by clearing the EA bit of the same register. Refer to figure below. Now, it is necessary to explain a few details referring to external interrupts- INT0 and INT1. If the IT0 and IT1 bits of the TCON register are set, an interrupt will be generated on high to low transition, i.e. on the falling pulse edge (only in that moment). If these bits are cleared, an interrupt will be continuously executed as far as the pins are held low.

IE Register (Interrupt Enable)

EA - global interrupt enable/disable: o 0 - disables all interrupt requests. o 1 - enables all individual interrupt requests. ES - enables or disables serial interrupt: o 0 - UART system cannot generate an interrupt. o 1 - UART system enables an interrupt. ET1 - bit enables or disables Timer 1 interrupt: o 0 - Timer 1 cannot generate an interrupt. o 1 - Timer 1 enables an interrupt. EX1 - bit enables or disables external 1 interrupt: o 0 - change of the pin INT0 logic state cannot generate an interrupt. o 1 - enables an external interrupt on the pin INT0 state change. ET0 - bit enables or disables timer 0 interrupt: o 0 - Timer 0 cannot generate an interrupt. o 1 - enables timer 0 interrupt. EX0 - bit enables or disables external 0 interrupt: o 0 - change of the INT1 pin logic state cannot generate an interrupt. o 1 - enables an external interrupt on the pin INT1 state change. Interrupt Priorities It is not possible to forseen when an interrupt request will arrive. If several interrupts are enabled, it may happen that while one of them is in progress, another one is requested. In order that the microcontroller knows whether to continue operation or meet a new interrupt request, there is a priority list instructing it what to do.

The priority list offers 3 levels of interrupt priority: 1. Reset! The apsolute master. When a reset request arrives, everything is stopped and the microcontroller restarts. 2. Interrupt priority 1 can be disabled by Reset only. 3. Interrupt priority 0 can be disabled by both Reset and interrupt priority 1. The IP Register (Interrupt Priority Register) specifies which one of existing interrupt sources have higher and which one has lower priority. Interrupt priority is usually specified at the beginning of the program. According to that, there are several possibilities: If an interrupt of higher priority arrives while an interrupt is in progress, it will be immediately stopped and the higher priority interrupt will be executed first. If two interrupt requests, at different priority levels, arrive at the same time then the higher priority interrupt is serviced first. If the both interrupt requests, at the same priority level, occur one after another, the one which came later has to wait until routine being in progress ends. If two interrupt requests of equal priority arrive at the same time then the interrupt to be serviced is selected according to the following priority list: 1. 2. 3. 4. 5.

External interrupt INT0 Timer 0 interrupt External Interrupt INT1 Timer 1 interrupt Serial Communication Interrupt

IP Register (Interrupt Priority) The IP register bits specify the priority level of each interrupt (high or low priority).

PS - Serial Port Interrupt priority bit o Priority 0 o Priority 1 PT1 - Timer 1 interrupt priority o Priority 0 o Priority 1 PX1 - External Interrupt INT1 priority o Priority 0 o Priority 1 PT0 - Timer 0 Interrupt Priority o Priority 0 o Priority 1 PX0 - External Interrupt INT0 Priority o Priority 0 o Priority 1 Handling Interrupt When an interrupt request arrives the following occurs: 1. Instruction in progress is ended.

2. The address of the next instruction to execute is pushed on the stack. 3. Depending on which interrupt is requested, one of 5 vectors (addresses) is written to the program counter in accordance to the table below: 4. Interrupt Source Vector (address) IE0 3h TF0 Bh TF1 1B h RI, TI 23 h All addresses are in hexadecimal format 5. These addresses store appropriate subroutines processing interrupts. Instead of them, there are usually jump instructions specifying locations on which these subroutines reside. 6. When an interrupt routine is executed, the address of the next instruction to execute is poped from the stack to the program counter and interrupted program resumes operation from where it left off.

From the moment an interrupt is enabled, the microcontroller is on alert all the time. When an interrupt request arrives, the program execution is stopped, electronics recognizes the source and the program “jumps” to the appropriate address (see the table above). This address usually stores a jump instruction specifying the start of appropriate subroutine. Upon its execution, the program resumes operation from where it left off. Reset Reset occurs when the RS pin is supplied with a positive pulse in duration of at least 2 machine cycles (24 clock cycles of crystal oscillator). After that, the microcontroller generates an internal reset signal which clears all SFRs, except SBUF registers, Stack Pointer and ports (the state of the first two ports is not defined, while FF value is written to the ports configuring all their pins as inputs). Depending on surrounding and purpose of device, the RS pin is usually connected to a power-on reset push button or circuit or to both of them. Figure below illustrates one of the simplest circuit providing safe power-on reset.

Basically, everything is very simple: after turning the power on, electrical capacitor is being charged for several milliseconds throgh a resistor connected to the ground. The pin is driven high during this process. When the capacitor is charged, power supply voltage is already stable and the pin remains connected to the ground, thus providing normal operation of the microcontroller. Pressing the reset button causes the capacitor to be temporarily discharged and the microcontroller is reset. When released, the whole process is repeated… Through the program- step by step... Microcontrollers normally operate at very high speed. The use of 12 Mhz quartz crystal enables 1.000.000 instructions to be executed per second. Basically, there is no need for higher operating rate. In case it is needed, it is easy to built in a crystal for high frequency. The problem arises when it is necessary to slow down the operation of the microcontroller. For example during testing in real environment when it is necessary to execute several instructions step by step in order to check I/O pins' logic state. Interrupt system of the 8051 microcontroller practically stops operation of the microcontroller and enables instructions to be executed one after another by pressing the button. Two interrupt features enable that: Interrupt request is ignored if an interrupt of the same priority level is in progress. Upon interrupt routine execution, a new interrupt is not executed until at least one instruction from the main program is executed. In order to use this in practice, the following steps should be done: 1. External interrupt sensitive to the signal level should be enabled (for example INT0). 2. Three following instructions should be inserted into the program (at the 03hex. address):

What is going on? As soon as the P3.2 pin is cleared (for example, by pressing the button), the microcontroller will stop program execution and jump to the 03hex address will be executed. This address stores a short interrupt routine consisting of 3 instructions. The first instruction is executed until the push button is realised (logic one (1) on the P3.2 pin). The second instruction is executed until the push button is pressed again. Immediately after that, the RETI instruction is executed and the processor resumes operation of the main program. Upon execution of any program instruction, the interrupt INT0 is generated and the whole procedure is repeated (push button is still pressed). In other words, one button press - one instruction.

2.9 8051 Microcontroller Power Consumption Control Generally speaking, the microcontroller is inactive for the most part and just waits for some external signal in order to takes its role in a show. This can cause some problems in case batteries are used for power supply. In extreme cases, the only solution is to set the whole electronics in sleep mode in order to minimize consumption. A typical example is a TV remote controller: it can be out of use for months but when used again it takes less than a second to send a command to TV receiver. The AT89S53 uses approximately 25mA for regular operation, which doesn't make it a pover-saving microcontroller. Anyway, it doesn‟t have to be always like that, it can easily switch the operating mode in order to reduce its total consumption to approximately 40uA. Actually, there are two power-saving modes of operation: Idle and Power Down.

Idle mode Upon the IDL bit of the PCON register is set, the microcontroller turns off the greatest power consumerCPU unit while peripheral units such as serial port, timers and interrupt system continue operating normally consuming 6.5mA. In Idle mode, the state of all registers and I/O ports remains unchanged. In order to exit the Idle mode and make the microcontroller operate normally, it is necessary to enable and execute any interrupt or reset. It will cause the IDL bit to be automatically cleared and the program resumes operation from instruction having set the IDL bit. It is recommended that first three instructions to execute now are NOP instructions. They don't perform any operation but provide some time for the microcontroller to stabilize and prevents undesired changes on the I/O ports. Power Down mode By setting the PD bit of the PCON register from within the program, the microcontroller is set to Power down mode, thus turning off its internal oscillator and reduces power consumption enormously. The microcontroller can operate using only 2V power supply in power- down mode, while a total power consumption is less than 40uA. The only way to get the microcontroller back to normal mode is by reset. While the microcontroller is in Power Down mode, the state of all SFR registers and I/O ports remains unchanged. By setting it back into the normal mode, the contents of the SFR register is lost, but the content of internal RAM is saved. Reset signal must be long enough, approximately 10mS, to enable stable operation of the quartz oscillator. PCON register

The purpose of the Register PCON bits is: SMOD Baud rate is twice as much higher by setting this bit. GF1 General-purpose bit (available for use). GF1 General-purpose bit (available for use). GF0 General-purpose bit (available for use). PD By setting this bit the microcontroller enters the Power Down mode. IDL By setting this bit the microcontroller enters the Idle mode.

Chapter 3 : The 8051 Instruction Set 3.1 Types of instructions 3.2 Description of the 8051 instructions

Introduction The process of writing program for the microcontroller mainly consists of giving instructions (commands) in the specific order in which they should be executed in order to carry out a specific task. As electronics cannot “understand” what for example an instruction “if the push button is pressed- turn the light on” means, then a certain number of simpler and precisely defined orders that decoder can recognise must be used. All commands are known as INSTRUCTION SET. All microcontrollers compatibile with the 8051 have in total of 255 instructions, i.e. 255 different words available for program writing. At first sight, it is imposing number of odd signs that must be known by heart. However, It is not so complicated as it looks like. Many instructions are considered to be “different”, even though they perform the same operation, so there are only 111 truly different commands. For example: ADD A,R0, ADD A,R1, ... ADD A,R7 are instructions that perform the same operation (additon of the accumulator and register). Since there are 8 such registers, each instruction is counted separately. Taking into account that all instructions perform only 53 operations (addition, subtraction, copy etc.) and most of them are rarely used in practice, there are actually 20-30 abbreviations to be learned, which is acceptable.

3.1 Types of instructions Depending on operation they perform, all instructions are divided in several groups: Arithmetic Instructions Branch Instructions Data Transfer Instructions Logic Instructions Bit-oriented Instructions The first part of each instruction, called MNEMONIC refers to the operation an instruction performs (copy, addition, logic operation etc.). Mnemonics are abbreviations of the name of operation being executed. For example: INC R1 - Means: Increment register R1 (increment register R1); LJMP LAB5 - Means: Long Jump LAB5 (long jump to the address marked as LAB5); JNZ LOOP - Means: Jump if Not Zero LOOP (if the number in the accumulator is not 0, jump to

the address marked as LOOP);

The other part of instruction, called OPERAND is separated from mnemonic by at least one whitespace and defines data being processed by instructions. Some of the instructions have no operand, while some of them have one, two or three. If there is more than one operand in an instruction, they are separated by a comma. For example: RET - return from a subroutine; JZ TEMP - if the number in the accumulator is not 0, jump to the address marked as TEMP; ADD A,R3 - add R3 and accumulator; CJNE A,#20,LOOP - compare accumulator with 20. If they are not equal, jump to the address

marked as LOOP; Arithmetic instructions Arithmetic instructions perform several basic operations such as addition, subtraction, division, multiplication etc. After execution, the result is stored in the first operand. For example: ADD A,R1 - The result of addition (A+R1) will be stored in the accumulator.

Arithmetic Instructions Mnemonic Description Byte Cycle ADD A,Rn Adds the register to the accumulator 1 1 ADD A,direct Adds the direct byte to the accumulator 2 2 ADD A,@Ri Adds the indirect RAM to the accumulator 1 2 ADD A,#data Adds the immediate data to the accumulator 2 2 ADDC A,Rn Adds the register to the accumulator with a carry flag 1 1 ADDC A,direct Adds the direct byte to the accumulator with a carry flag 2 2 ADDC A,@Ri Adds the indirect RAM to the accumulator with a carry flag 1 2 ADDC A,#data Adds the immediate data to the accumulator with a carry flag 2 2 SUBB A,Rn Subtracts the register from the accumulator with a borrow 1 1 SUBB A,direct Subtracts the direct byte from the accumulator with a borrow 2 2 SUBB A,@Ri Subtracts the indirect RAM from the accumulator with a borrow 1 2 SUBB A,#data Subtracts the immediate data from the accumulator with a borrow 2 2 INC A Increments the accumulator by 1 1 1 INC Rn Increments the register by 1 1 2 INC Rx Increments the direct byte by 1 2 3 INC @Ri Increments the indirect RAM by 1 1 3 DEC A Decrements the accumulator by 1 1 1 DEC Rn Decrements the register by 1 1 1 DEC Rx Decrements the direct byte by 1 1 2 DEC @Ri Decrements the indirect RAM by 1 2 3 INC DPTR Increments the Data Pointer by 1 1 3 MUL AB Multiplies A and B 1 5 DIV AB Divides A by B 1 5 DA A Decimal adjustment of the accumulator according to BCD code 1 1 Branch Instructions There are two kinds of branch instructions: Unconditional jump instructions: upon their execution a jump to a new location from where the program

continues execution is executed. Conditional jump instructions: a jump to a new program location is executed only if a specified condition is met. Otherwise, the program normally proceeds with the next instruction. Branch Instructions Mnemonic ACALL addr11 LCALL addr16 RET RETI AJMP addr11 LJMP addr16

Description Absolute subroutine call Long subroutine call Returns from subroutine Returns from interrupt subroutine Absolute jump Long jump Short jump (from –128 to +127 locations relative to the following SJMP rel instruction) JC rel Jump if carry flag is set. Short jump. JNC rel Jump if carry flag is not set. Short jump. JB bit,rel Jump if direct bit is set. Short jump. JBC bit,rel Jump if direct bit is set and clears bit. Short jump. JMP @A+DPTR Jump indirect relative to the DPTR JZ rel Jump if the accumulator is zero. Short jump. JNZ rel Jump if the accumulator is not zero. Short jump. Compares direct byte to the accumulator and jumps if not equal. Short CJNE A,direct,rel jump. Compares immediate data to the accumulator and jumps if not equal. CJNE A,#data,rel Short jump. Compares immediate data to the register and jumps if not equal. Short CJNE Rn,#data,rel jump. CJNE Compares immediate data to indirect register and jumps if not equal. @Ri,#data,rel Short jump. DJNZ Rn,rel Decrements register and jumps if not 0. Short jump. DJNZ Rx,rel Decrements direct byte and jump if not 0. Short jump. NOP No operation

Byte Cycle 2 6 3 6 1 4 1 4 2 3 3 4 2

3

2 2 3 3 1 2 2

3 3 4 4 2 3 3

3

4

3

4

3

4

3

4

2 3 1

3 4 1

Data Transfer Instructions Data transfer instructions move the content of one register to another. The register the content of which is moved remains unchanged. If they have the suffix “X” (MOVX), the data is exchanged with external memory. Data Transfer Instructions Mnemonic MOV A,Rn MOV A,direct MOV A,@Ri MOV A,#data MOV Rn,A MOV Rn,direct MOV Rn,#data

Description Moves the register to the accumulator Moves the direct byte to the accumulator Moves the indirect RAM to the accumulator Moves the immediate data to the accumulator Moves the accumulator to the register Moves the direct byte to the register Moves the immediate data to the register

Byte Cycle 1 1 2 2 1 2 2 2 1 2 2 4 2 2

MOV direct,A MOV direct,Rn MOV direct,direct MOV direct,@Ri MOV direct,#data MOV @Ri,A MOV @Ri,direct MOV @Ri,#data MOV DPTR,#data MOVC A,@A+DPTR

Moves the accumulator to the direct byte Moves the register to the direct byte Moves the direct byte to the direct byte Moves the indirect RAM to the direct byte Moves the immediate data to the direct byte Moves the accumulator to the indirect RAM Moves the direct byte to the indirect RAM Moves the immediate data to the indirect RAM Moves a 16-bit data to the data pointer Moves the code byte relative to the DPTR to the accumulator (address=A+DPTR) Moves the code byte relative to the PC to the accumulator MOVC A,@A+PC (address=A+PC) MOVX A,@Ri Moves the external RAM (8-bit address) to the accumulator MOVX A,@DPTR Moves the external RAM (16-bit address) to the accumulator MOVX @Ri,A Moves the accumulator to the external RAM (8-bit address) MOVX @DPTR,A Moves the accumulator to the external RAM (16-bit address) PUSH direct Pushes the direct byte onto the stack POP direct Pops the direct byte from the stack/td> XCH A,Rn Exchanges the register with the accumulator XCH A,direct Exchanges the direct byte with the accumulator XCH A,@Ri Exchanges the indirect RAM with the accumulator XCHD A,@Ri Exchanges the low-order nibble indirect RAM with the accumulator

2 2 3 2 3 1 2 2 3

3 3 4 4 3 3 5 3 3

1

3

1

3

1 1 1 1 2 2 1 2 1 1

3-10 3-10 4-11 4-11 4 3 2 3 3 3

Logic Instructions Logic instructions perform logic operations upon corresponding bits of two registers. After execution, the result is stored in the first operand. Logic Instructions Mnemonic Description ANL A,Rn AND register to accumulator ANL A,direct AND direct byte to accumulator ANL A,@Ri AND indirect RAM to accumulator ANL A,#data AND immediate data to accumulator ANL direct,A AND accumulator to direct byte ANL direct,#data AND immediae data to direct register ORL A,Rn OR register to accumulator ORL A,direct OR direct byte to accumulator ORL A,@Ri OR indirect RAM to accumulator ORL direct,A OR accumulator to direct byte ORL direct,#data OR immediate data to direct byte XRL A,Rn Exclusive OR register to accumulator XRL A,direct Exclusive OR direct byte to accumulator XRL A,@Ri Exclusive OR indirect RAM to accumulator XRL A,#data Exclusive OR immediate data to accumulator XRL direct,A Exclusive OR accumulator to direct byte XORL direct,#data Exclusive OR immediate data to direct byte

Byte Cycle 1 1 2 2 1 2 2 2 2 3 3 4 1 1 2 2 1 2 2 3 3 4 1 1 2 2 1 2 2 2 2 3 3 4

CLR A CPL A SWAP A RL A RLC A RR A RRC A

Clears the accumulator 1 Complements the accumulator (1=0, 0=1) 1 Swaps nibbles within the accumulator 1 Rotates bits in the accumulator left 1 Rotates bits in the accumulator left through carry 1 Rotates bits in the accumulator right 1 Rotates bits in the accumulator right through carry 1

1 1 1 1 1 1 1

Bit-oriented Instructions Similar to logic instructions, bit-oriented instructions perform logic operations. The difference is that these are performed upon single bits. Bit-oriented Instructions Mnemonic Description CLR C Clears the carry flag CLR bit Clears the direct bit SETB C Sets the carry flag SETB bit Sets the direct bit CPL C Complements the carry flag CPL bit Complements the direct bit ANL C,bit AND direct bit to the carry flag ANL C,/bit AND complements of direct bit to the carry flag ORL C,bit OR direct bit to the carry flag ORL C,/bit OR complements of direct bit to the carry flag MOV C,bit Moves the direct bit to the carry flag MOV bit,C Moves the carry flag to the direct bit

Byte Cycle 1 1 2 3 1 1 2 3 1 1 2 3 2 2 2 2 2 2 2 2 2 2 2 3

3.2 Description of all 8051 instructions Here is a list of the operands and their meanings: A - accumulator; Rn - is one of working registers (R0-R7) in the currently active RAM memory bank; Direct - is any 8-bit address register of RAM. It can be any general-purpose register or a SFR (I/O port, control register etc.); @Ri - is indirect internal or external RAM location addressed by register R0 or R1; #data - is an 8-bit constant included in instruction (0-255); #data16 - is a 16-bit constant included as bytes 2 and 3 in instruction (0-65535); addr16 - is a 16-bit address. May be anywhere within 64KB of program memory; addr11 - is an 11-bit address. May be within the same 2KB page of program memory as the first byte of the following instruction; rel - is the address of a close memory location (from -128 to +127 relative to the first byte of the following instruction). On the basis of it, assembler computes the value to add or subtract from the number currently stored in the program counter; bit - is any bit-addressable I/O pin, control or status bit; and C - is carry flag of the status register (register PSW). ACALL addr11 - Absolute subroutine call addr11: Subroutine address

Description: Instruction unconditionally calls a subroutine located at the specified code address. Therefore, the current address and the address of called subroutine must be within the same 2K byte block of the program memory, starting from the first byte of the instruction following ACALL. Syntax: ACALL [subroutine name]; Bytes: 2 (instruction code, subroutine address); STATUS register flags: No flags are affected. EXAMPLE:

Before execution: PC=0123h After execution: PC=0345h ADD A,Rn - Adds the register Rn to the accumulator A: accumulator Rn: any R register (R0-R7) Description: Instruction adds the register Rn (R0-R7) to the accumulator. After addition, the result is stored in the accumulator. Syntax: ADD A,Rn; Byte: 1 (instruction code); STATUS register flags: C, OV and AC; EXAMPLE:

Before execution: A=2Eh (46 dec.) R4=12h (18 dec.) After execution: A=40h (64 dec.) R4=12h ADD A,@Ri - Adds the indirect RAM to the accumulator A: accumulator Ri: Register R0 or R1 Description: Instruction adds the indirect RAM to the accumulator. Address of indirect RAM is stored in the Ri register (R0 or R1). After addition, the result is stored in the accumulator. Syntax: ADD A,@Ri; Byte: 1 (instruction code); STATUS register flags: C, OV and AC; EXAMPLE:

Register address: SUM = 4Fh R0=4Fh Before execution: A= 16h (22 dec.) SUM= 33h (51 dec.) After execution : A= 49h (73 dec.) ADD A,direct - Adds the direct byte to the accumulator A: accumulator Direct: Arbitrary register with address 0 - 255 (0 - FFh) Description: Instruction adds the direct byte to the accumulator. As it is direct addressing, the direct can be any SFR or general-purpose register with address 0-7 Fh. The result is stored in the accumulator. Syntax: ADD A, register name; Bytes: 2 (instruction code, direct byte address); STATUS register flags: C, OV and AC; EXAMPLE:

Before execution: SUM= 33h (51 dec.) A= 16h (22 dec.) After execution: SUM= 33h (73 dec.) A= 49h (73 dec.) ADDC A,Rn - Adds the register to the accumulator with a carry flag A: accumulator Rn: any R register (R0-R7) Description: Instruction adds the accumulator with a carry flag and Rn register (R0-R7). After addition, the result is stored in the accumulator. Syntax: ADDC A,Rn; Byte: 1 (instruction code); STATUS register flags: C, OV and AC; EXAMPLE:

Before execution: A= C3h (195 dec.) R0= AAh (170 dec.) C=1 After execution: A= 6Eh (110 dec.) AC=0, C=1, OV=1 ADD A,#data - Adds the immediate data to the accumulator A: accumulator Data: constant within 0-255 (0-FFh) Description: Instruction adds data (0-255) to the accumulator. After addition, the result is stored in the accumulator. Syntax: ADD A,#data; Bytes: 2 (instruction code, data); STATUS register flags: C, OV and AC; EXAMPLE:

Before execution: A= 16h (22 dec.) After execution: A= 49h (73 dec.) ADDC A,direct - Adds the direct byte to the acumulator with a carry flag A: accumulator Direct: arbitrary register with address 0-255 (0-FFh) Description: Instruction adds the direct byte to the accumulator with a carry flag. As it is direct addressing, the register can be any SFRs or general purpose register with address 0-7Fh (0-127dec.). The result is stored in the accumulator. Syntax: ADDC A, register address; Bytes: 2 (instruction code, direct); STATUS register flags: C, OV and AC; EXAMPLE:

Before execution: A= C3h (195 dec.) TEMP = AAh (170 dec.) C=1 After execution: A= 6Eh (110 dec.) AC=0, C=1, OV=1 ADDC A,@Ri - Adds the indirect RAM to the accumulator with a carry flag A: accumulator Ri: Register R0 or R1 Description: Instruction adds the indirect RAM to the accumulator with a carry flag. RAM address is stored in the Ri register (R0 or R1). After addition, the result is stored in the accumulator. Syntax: ADDC A,@Ri; Byte: 1 (instruction code); STATUS register flags: C, OV and AC; EXAMPLE:

Register address: SUM = 4Fh R0=4Fh Before execution: A= C3h (195 dec.) SUM = AAh (170 dec.) C=1 After execution: A= 6Eh (110 dec.) AC=0, C=1, OV=1 ADDC A,#data - Adds the immediate data to the accumulator with a carry flag A: accumulator Data: constant with address 0-255 (0-FFh) Description: Instruction adds data (0-255) to the accumulator with a carry flag. After addition, the result is stored in the accumulator. Syntax: ADDC A,#data; Bytes: 2 (instruction code, data); STATUS register flags: C, OV and AC; EXAMPLE:

Before execution: A= C3h (195 dec.) C=1 After execution: A= 6Dh (109 dec.) AC=0, C=1, OV=1 AJMP addr11 - Absoulte jump addr11: Jump address Description: Program continues execution after executing a jump to the specified address. Similar to the ACALL instruction, the jump must be executed within the same 2K byte block of program memory starting from the first byte of the instruction following AJMP. Syntax: AJMP address (label); Bytes: 2 (instruction code, jump address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0345h SP=07h After execution: PC=0123h SP=09h ANL A,Rn - AND register to the accumulator A: accumulator Rn: any R register (R0-R7) Description: Instruction performs logic AND operation between the accumulator and Rn register. The result is stored in the accumulator. Syntax: ANL A,Rn; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A= C3h (11000011 Bin.) R5= 55h (01010101 Bin.) After execution: A= 41h (01000001 Bin.) ANL A,direct - AND direct byte to the accumulator A: accumulator Direct: arbitrary register with address 0 - 255 (0 - FFh) Description: Instruction performs logic AND operation between the accumulator and drect register. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh (o-127 dec.). The result is stored in the accumulator.

Syntax: ANL A,direct; Byte: 2 (instruction code, direct); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A= C3h (11000011 Bin.) MASK= 55h (01010101 Bin.) After execution: A= 41h (01000001 Bin.) ANL A,@Ri - AND indirect RAM to the accumulator A: accumulator Ri: Register R0 or R1 Description: Instruction performs logic AND operation between the accumulator and register. As it is indirect addressing, the register address is stored in the Ri register (R0 or R1). The result is stored in the accumulator. Syntax: ANL A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Register address SUM = 4Fh R0=4Fh Before execution: A= C3h (11000011 Bin.) R0= 55h (01010101 Bin.) After execution: A= 41h (01000001 Bin.) ANL A,#data - AND immediate data to the accumulator A: accumulator Data: constant in the range of 0-255 (0-FFh)

Description: Instruction performs logic AND operation between the accumulator and data. The result is stored in the accumulator. Syntax: ANL A,#data; Bytes: 2 (instruction code, data); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A= C3h (11000011 Bin.) After execution: A= 41h (01000001 Bin.) ANL direct,A - AND accumulator to direct byte Direct: arbitrary register with address 0-255 (0-FFh) A: accumulator Description: Instruction performs logic AND operation between direct byte and accumulator. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh (0-127 dec.). The result is stored in the direct byte. Syntax: ANL register address,A; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected. EXAMPLE:

Before execution: A= C3h (11000011 Bin.) MASK= 55h (01010101 Bin.) After execution: MASK= 41h (01000001 Bin.) ANL direct,#data - AND immediate data to direct byte Direct: Arbitrary register with address 0 - 255 (0 - FFh) Data: constant in the range between 0-255 (0-FFh)

Description: Instruction performs logic AND operation between direct byte and data. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh (0-127 dec.). The result is stored in the direct byte. Syntax: ANL register address ,#data; Bytes: 3 (instruction code, direct byte address, data); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: X= C3h (11000011 Bin.) MASK= 55h (01010101 Bin.) After execution: MASK= 41h (01000001 Bin.) ANL C,bit - AND direct bit to the carry flag C: Carry flag Bit: any bit of RAM Description: Instruction performs logic AND operation between the direct bit and the carry flag. bit C C AND bit 0 0 0 0 1 0 1 0 0 1 1 1 Syntax: ANL C, bit address; Bytes: 2 (instruction code, bit address); STATUS register flags: C; EXAMPLE:

Before execution: ACC= 43h (01000011 Bin.) C=1 After execution: ACC= 43h (01000011 Bin.) C=0

ANL C,/bit - AND complements of direct bit to the carry flag C: carry flag Bit: any bit of RAM Description: Instruction performs logic AND operation between inverted addressed bit and the carry flag. The result is stored in the carry flag. bit bit C C AND bit 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 0 Syntax: ANL C,/[bit address]; Bytes: 2 (instruction code, bit address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: ACC= 43h (01000011 Bin.) C=1 After execution: ACC= 43h (01000011 Bin.) C=1 CJNE A,direct,rel - Compares direct byte to the accumulator and jumps if not equal A: accumulator Direct: arbitrary register with address 0-255 (0-FFh) addr: jump address Description: Instruction first compares the number in the accumulator with the directly addressed byte. If they are equal, the program proceeds with execution. Otherwise, a jump to the specified address will be executed. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to +127 locations relative to the first following instruction). Syntax: CJNE A,direct,[jump address]; Bytes: 3 (instruction code, direct byte address, jump address); STATUS register flags: C; EXAMPLE:

Before execution: PC=0145h A=27h After execution: if MAX≠27: PC=0123h If MAX=27: PC=0146h CJNE A,#data,rel - Compares immediate data to the accumulator and jumps if not equal A: accumulator Data: constant in the range of 0-255 (0-FFh) Description: Instruction first compares the number in the accumulator with the immediate data. If they are equal, the program proceeds with execution. Otherwise, a jump to the specified address will be executed. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to +127 locations relative to the first following instruction). Syntax: CJNE A,X,[jump address]; Bytes: 3 (instruction code, data, jump address); STATUS register flags: C; EXAMPLE:

Before execution: PC=0445h

After execution: If A≠33: PC=0423h If A=33: PC=0446h CJNE Rn,#data,rel - Compares immediate data to the register Rn and jumps if not equal Rn: Any R register (R0-R7) Data: Constant in the range of 0 - 255 (0-FFh) addr: Jump address Description: Instruction first compares immediate data to the register Rn. If they are equal, the program proceeds with execution. Otherwise, a jump to the specified address will be executed. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to + 127 locations relative to the first following instruction). Syntax: CJNE Rn,data,[jump address]; Bytes: 3 (instruction code, data, jump address); STATUS register flags: C; EXAMPLE:

Before execution: PC=0345h After execution: If R5≠44h: PC=0323h If R5=44h: PC=0346h CJNE @Ri,#data,rel - Compares immediate data to indirectly addressed register and jumps if not equal Ri: Register R0 or R1 Data: Constant in the range of 0 - 255 (0-FFh) Description: This instruction first compares immediate data to indirectly addressed register. If they are equal, the program proceeds with execution. Otherwise, a jump to the specified address in the program will be executed. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to +127 locations relative to the next instruction). Syntax: CJNE @Ri,data,[jump address]; Bytes: 3 (instruction code, data, jump address); STATUS register flags: C; EXAMPLE:

Before execution: Register Address SUM=F3h PC=0345h R0=F3h After execution: If SUM≠44h: PC=0323h If SUM=44h: PC=0346h CLR A - Clears the accumulator A: accumulator Description: Instruction clears the accumulator. Syntax: CLR A; Byte: 1 (instruction code); STATUS register flags: No flags are affected. EXAMPLE:

After execution: A=0 CLR C - clears the carry flag C: Carry flag Description: Instruction clears the carry flag. Syntax: CLR C; Byte: 1 (instruction code); STATUS register flags: C; EXAMPLE:

After execution: C=0 CLR bit - clears the direct bit Bit: any bit of RAM Description: Instruction clears the specified bit. Syntax: CLR [bit address]; Bytes: 2 (instruction code, bit address); STATUS register flags: No flags are affected. EXAMPLE:

Before execution: P0.3=1 (input pin) After execution: P0.3=0 (output pin) CPL A - Complements the accumulator A: accumulator Description: Instruction complements all the bits in the accumulator (1==>0, 0==>1). Syntax: CPL A; Bytes: 1 (instruction code); STATUS register flags: No flags are affected. EXAMPLE:

Before execution: A= (00110110) After execution: A= (11001001) CPL bit - Complements the direct bit Bit: any bit of RAM Description: Instruction coplements the specified bit of RAM (0==>1, 1==>0). Syntax: CPL [bit address]; Bytes: 2 (instruction code, bit address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: P0.3=1 (input pin) After execution: P0.3=0 (output pin) CPL C - Complements the carry flag C: Carry flag Description: Instruction complements the carry flag (0==>1, 1==>0). Syntax: CPL C; Byte: 1 (instruction code); STATUS register flags: C; EXAMPLE:

Before execution: C=1 After execution: C=0 DA A - Decimal adjust accumulator A: accumulator Description: Instruction adjusts the contents of the accumulator to correspond to a BCD number after

two BCD numbers have been added by the ADD and ADDC instructions. The result in form of two 4digit BCD numbers is stored in the accumulator. Syntax: DA A; Byte: 1 (instruction code); STATUS register flags: C; EXAMPLE:

Before execution: A=56h (01010110) 56 BCD B=67h (01100111) 67BCD After execution: A=BDh (10111101) After BCD conversion: A=23h (00100011), C=1 (Overflow) (C+23=123) = 56+67 DEC A - Decrements the accumulator by 1 A: accumulator Description: Instruction decrements the value in the accumulator by 1. If there is a 0 in the accumulator, the result of the operation is FFh. (255 dec.) Syntax: DEC A; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A=E4h After execution: A=E3h DEC Rn - Decrements the register Rn by 1 Rn: any R register (R0-R7) Description: Instruction decrements the value in the Rn register by 1. If there is a 0 in the register, the result of the operation will be FFh. (255 dec.) Syntax: DEC Rn;

Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: R3=B0h After execution: R3=AFh DEC direct - Decrements the direct byte by 1 Direct: arbitrary register with address 0-255 (0-FFh) Description: Instruction decrements the value of directly addressed register by 1. As it is direct addressing, the register must be within the first 255 locations of RAM. If there is a 0 in the register, the result will be FFh. Syntax: DEC [register address]; Byte: 2 (instruction code, direct); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: CNT=0 After execution: CNT=FFh DIV AB - Divides the accumulator by the register B A: accumulator B: Register B Description: Instruction divides the value in the accumulator by the value in the B register. After division the integer part of result is stored in the accumulator while the register contains the remainder. In case of dividing by 1, the flag OV is set and the result of division is unpredictable. The 8-bit quotient is stored in the accumulator and the 8-bit remainder is stored in the B register. Syntax: DIV AB; Byte: 1 (instruction code); STATUS register flags: C, OV;

EXAMPLE:

Before execution: A=FBh (251dec.) B=12h (18 dec.) After execution: A=0Dh (13dec.) B=11h (17dec.) 13·18 + 17 =251 DEC @Ri - Decrements the indirect RAM by 1 Ri: Register R0 or R1 Description: This instruction decrements the value in the indirectly addressed register of RAM by 1. The register address is stored in the Ri register (R0 or R1). If there is a 0 in the register, the result will be FFh. Syntax: DEC @Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Register Address CNT = 4Fh R0=4Fh Before execution: CNT=35h After execution: CNT= 34h DJNZ direct,rel - Decrements direct byte by 1 and jumps if not 0 Direct: arbitrary register with address 0-255 (0-FFh) addr: Jump address Description: This instruction first decrements value in the register. If the result is 0, the program proceeds with execution. Otherwise, a jump to the specified address in the program will be executed. As it is direct addressing, the register must be within the first 255 locations of RAM. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to +127 locations relative to the first following instruction). Syntax: DJNZ direct,[jump address]; Bytes: 3 (instruction code, direct, jump address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0445h After execution: If CNT≠0: PC=0423h If CNT=0: PC=0446h DJNZ Rn,rel - Decrements the Rn register by 1 and jumps if not 0 Rn: any R register (R0-R7) addr: jump address Description: This instruction first decrements the value in the Rn register. If the result is 0, the program proceeds with execution. Otherwise, a jump to the specified address in the program will be executed. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (- 128 to +127 locations relative to the first following instruction). Syntax: DJNZ Rn, [jump address]; Bytes: 2 (instruction code, jump address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0445h After execution: If R1≠0: PC=0423h

If R1=0: PC=0446h INC Rn - Increments the Rn register by 1 Rn: any R register (R0-R7) Description: Instruction increments the value in the Rn register by 1. If the register includes the number 255, the result of the operation will be 0. Syntax: INC Rn; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: R4=18h After execution: R4=19h INC A - Increments the accumulator by 1 A: accumulator Description: This instruction increments the value in the accumulator by 1. If the accumulator includes the number 255, the result of the operation will be 0. Syntax: INC A; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A=E4h After execution: A=E5h INC @Ri - Increments the value of indirectly addressed register of RAM by 1

Ri: Register R0 or R1 Description: This instruction increments the value in the directly addressed register of RAM by 1. The register address is stored in the Ri Register (R0 or R1). If the register includes the number 255, the result of the operation will be 0. Syntax: INC @Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Register Address CNT = 4Fh Before execution: CNT=35h R1=4Fh After execution: CNT=36h INC direct - Increments the direct byte by 1 Direct: arbitrary register with address 0-255 (0-FFh) Description: Instruction increments the direct byte by 1. If the register includes the number 255, the result of the operation will be 0. As it is direct addressing, the register must be within the first 255 RAM locations. Syntax: INC direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: CNT=33h After execution: CNT=34h JB bit,rel - Jump if direct bit is set addr: Jump address Bit: any bit of RAM

Description: If the bit is set, a jump to the specified address will be executed. Otherwise, if the value of bit is 0, the program proceeds with the next instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to + 127 locations relative to the first following instruction). Syntax: JB bit, [jump address]; Bytes: 3 (instruction code, bit address, jump address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0323h After execution: If P0.5=0: PC=0324h If P0.5=1: PC=0345h INC DPTR - Increments the Data Pointer by 1 DPTR: Data Pointer Description: Instruction increments the value of the 16-bit data pointer by 1. This is the only 16-bit register upon which this operation can be performed. Syntax: INC DPTR; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: DPTR = 13FF (DPH = 13h DPL = FFh ) After execution: DPTR = 1400 (DPH = 14h DPL = 0) JC rel - Jump if carry flag is set

addr: Jump address Description: Instruction first checks if the carry flag is set. If set, a jump to the specified address is executed. Otherwise, the program proceeds with the next instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JC [jump address]; Bytes: 2 (instruction code, jump value); STATUS register flags: No flags are affected; EXAMPLE:

Before instruction: PC=0323h After instruction: If C=0: PC=0324h If C=1: PC=0345h JBC bit,rel - Jump if direct bit is set Bit: any bit of RAM addr: Jump Address Description: This instruction first checks if the bit is set. If set, a jump to the specified address is executed and the bit is cleared. Otherwise, the program proceeds with the first following instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JBC bit, [jump address]; Bytes: 3 (instruction code, bit address, jump address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0323h After execution: If TEST0.4=1: PC=0345h, TEST0.4=0 If TEST0.4=0: PC=0324h, TEST0,4=0 JNB bit,rel - Jump if direct bit is not set addr: Jump address Bit: any bit of RAM Description: If the bit is cleared, a jump to the specified address will be executed. Otherwise, if the bit value is 1, the program proceeds with the first following instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JNB bit,[jump address]; Bytes: 3 (instruction code, bit address, jump address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0323h After execution: If P0.5=1: PC=0324h If P0.5=0: PC=0345h

JMP @A+DPTR - Jump indirect relative to the DPTR A: accumulator DPTR: Data Pointer Description: This instruction causes a jump to the address calculated by adding value stored in the accumulator to the 16-bit number in the DPTR Register. It is used with complex program branching where the accumulator affects jump address, for example when reading a table. Neither accumulator nor DPTR register are affected. Syntax: JMP @A+DPTR; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=223 DPTR=1400h After execution: PC = 1402h if A=2 PC = 1404h if A=4 PC = 1406h if A=6 Note: As instructions AJMP LABELS occupy two locations each, the values in the accumulator specifying them must be different from each other by 2. JNZ rel - Jump if accumulator is not zero addr: Jump Address Description: This instruction checks if the value stored in the accumulator is 0. If not, a jump to the specified address will be executed. Otherwise, the program proceeds with the first following instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JNZ [jump address]: Bytes: 2 (instruction code, jump value); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0323h After execution: If A=0: PC=324h If A≠0: PC=283h JNC rel - Jump if carry flag is not set addr: Jump Address Description: This instruction first checks whether the carry flag is set. If not, a jump to the specified address will be executed. Otherwise, the program proceeds with the first following instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JNC [jump address]; Bytes: 2 (instruction code, jump value); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0323h After execution: If C=0: PC=360h If C=1: PC=324h LCALL addr16 - Long subroutine call addr16: Subroutine Address Description: This instruction unconditionally calls a subroutine located at the specified address. The current address and the start of the subroutine called can be located anywhere within the memory space of

64K. Syntax: LCALL [subroutine name]; Bytes: 3 (instruction code, address (15-8), address (7-0)); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0123h After execution: PC=1234h JZ rel - Jump if accumulator is zero addr: Jump Address Description: The instruction checks whether the value stored in the accumulator is 0. If yes, a jump to the specified address will be executed. Otherwise, the program proceeds with the following instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JZ [jump address]; Bytes: 2 (instruction code, jump value); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0323h After execution: If A0: PC=324h If A=0: PC=283h MOV A,Rn - Moves the Rn register to the accumulator Rn: any R register (R0-R7) A: accumulator

Description: The instruction moves the Rn register to the accumulator. The Rn register is not affected. Syntax: MOV A,Rn; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: R3=58h After execution: R3=58h A=58h LJMP addr16 - Long jump addr16: jump address Description: Instruction causes a jump to the specified 16-bit address. Syntax: LJMP [jump address]; Bytes: 3 (instruction code, address (15-8), address (7-0)); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=0123h After execution: PC=1234h MOV A,@Ri - Moves the indirect RAM to the accumulator Ri: Register R0 or R1 A: accumulator Description: Instruction moves the indirectly addressed register of RAM to the accumulator. The register address is stored in the Ri register (R0 or R1). The result is stored in the accumulator. The register is not affected. Syntax: MOV A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected;

EXAMPLE:

Register Address SUM=F2h R0=F2h Before execution: SUM=58h After execution: A=58h SUM=58h MOV A,direct - Moves the direct byte to the accumulator Direct: arbitrary register with address 0-255 (0-FFh) A: accumulator Description: Instruction moves the direct byte to the accumulator. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). After executing the instruction, the register is not affected. Syntax: MOV A,direct; Byte: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: Rx=68h After execution: Rx=68h A=68h MOV Rn,A - Moves the accumulator to the Rn register Rn: any R register (R0-R7) A: accumulator Desription: Instruction moves the accumulator to the Rn register. The accumulator is not affected. Syntax: MOV Rn,A; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A=58h After execution: R3=58h A=58h MOV A,#data - Moves the immediate data to the accumulator A: accumulator Data: Constant in the range of 0-255 (0-FFh) Desription: Instruction moves the immediate data to the accumulator. Syntax: MOV A,#data; Bytes: 2 (instruction code, data); STATUS register flags: No flags are affected; EXAMPLE:

After execution: A=28h MOV Rn,#data - Moves the immediate data to the Rn register Rn: any R register (R0-R7) Data: Constant in the range of 0-255 (0-FFh) Description: Instruction moves the immediate data to the Rn register. Syntax: MOV Rn,#data; Bytes: 2 (instruction code, data); STATUS register flags: No flags are affected; EXAMPLE:

After execution: R5=32h

MOV Rn,direct - Moves the direct byte to the Rn register Rn: Any R registar (R0-R7) Direct: arbitrary register with address 0-255 (0-FFh) Description: Instruction moves the direct byte to the Rn register. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). After executing the instruction, the register is not affected. Syntax: MOV Rn,direct; Bytes: 2 (instruction code, direct); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: SUM=58h After execution: SUM=58h R3=58h MOV direct,Rn - Moves the Rn register to the direct byte Rn: any R register (R0-R7) Direct: arbitrary register with address 0-255 (0 - FFh) Description: Instruction moves the Rn register to the direct byte. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). After executing the instruction, the register is not affected. Syntax: MOV direct,Rn; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: R3=18h After execution: R3=18h CIF=18h MOV direct,A - Moves the accumulator to the direct byte Direct: arbitrary register with address 0-255 (0 - FFh) A: accumulator

Description: Instruction moves the accumulator to the direct byte. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). After executing the instruction, the register is not affected. Syntax: MOV direct,A; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A=98h After execution: A=98h REG=98h MOV direct,@Ri - Moves the indirect RAM to the direct byte Direct: arbitrary register with address 0-255 (0 - FFh) Ri: Register R0 or R1 Description: Instruction moves the indirectly adressed register of RAM to the direct byte. The register is not affected. Syntax: MOV direct,@Ri; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:

Register Address SUM=F3 Before execution: SUM=58h R1=F3 After execution: SUM=58h TEMP=58h MOV direct1,direct2 - Moves the direct byte to the direct byte Direct: Arbitrary register with address 0-255 (0-FFh) Direct: Arbitrary register with address 0-255 (0-FFh) Description: Instruction moves the direct byte to another direct byte. As it is direct addressing, both registers can be any SFRs or general-purpose registers with address 0-7Fh. (0-127 dec.). The direct1 is not affected.

Syntax: MOV direct1,direct2; Bytes: 3 (instruction code, direct1 address, direct2 address); STATUS register flags: No flags are affected. EXAMPLE:

Before execution: TEMP=58h After execution: TEMP=58h SUM=58h MOV @Ri,A - Moves the accumulator to the indirect RAM A: accumulator Ri: register R0 or R1 Description: Instruction moves the accumulator to the indirectly addressed register of RAM. The register address is stored in the Ri register (R0 or R1). After executing the instruction, the accumulator is not affected. Syntax: MOV @Ri,A; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Register Address SUM=F2h Before execution: R0=F2h A=58h After execution: SUM=58h A=58h MOV direct,#data - Moves the immediate data to the direct byte Direct: Arbitrary register with address 0-255 (0-FFh) Data: Constant in the range of 0-255 (0-FFh) Description: Instruction moves the immediate data to the direct byte. As it is direct addressing, the direct byte can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). Syntax: MOV direct,#data; Bytes: 3 (instruction code, direct byte address, data); STATUS register flags: No flags are affected; EXAMPLE:

After execution: TEMP=22h MOV @Ri,#data - Moves the immediate data to the indirect RAM Ri: Register R0 or R1 Data: Constant in the range of 0-255 (0-FFh) Description: Instruction moves the immediate data to the idirectly addressed register of RAM. The register address is stored in the Ri register (R0 or R1). Syntax: MOV @Ri,#data; Bytes: 2 (instruction code, data); STATUS register flags: No flags are affected; EXAMPLE:

Register address TEMP=E2h Before execution: R1=E2h After execution: TEMP=44h MOV @Ri,direct - Moves the direct byte to the indirect RAM Direct: Arbitrary register with address 0-255 (0-FFh) Ri: Register R0 or R1 Description: Instruction moves the direct byte to a register the address of which is stored in the Ri register (R0 or R1). After executing the instruction, the direct byte is not affected. Syntax: MOV @Ri,direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:

Register address TEMP=E2h

Before execution: SUM=58h R1=E2h After execution: SUM=58h TEMP=58h MOV bit,C - Moves the carry flag to the direct bit C: Carry flag Bit: any bit of RAM Description: Instruction moves the carry flag to the direct bit. After executing the instruction, the carry flag is not affected. Syntax: MOV bit,C; Bytes: 2 (instruction code, bit address); STATUS register flags: No flags are affected; EXAMPLE:

After execution: If C=0 P1.2=0 If C=1 P1.2=1 MOV C,bit - Moves the direct bit to the carry flag C: Carry flag Bit: any bit of RAM Description: Instruction moves the direct bit to the carry flag. After executing the instruction, the bit is not affected. Syntax: MOV C,bit; Bytes: 2 (instruction code, bit address); STATUS register flags: C; EXAMPLE:

After execution: If P1.4=0 C=0 If P1.4=1 C=1 MOVC A,@A+DPTR - Moves the code byte relative to the DPTR to the accumulator A: accumulator

DPTR: Data Pointer Description: Instruction first adds the 16-bit DPTR register to the accumulator. The result of addition is then used as a memory address from which the 8-bit data is moved to the accumulator. Syntax: MOVC A,@A+DPTR; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Before execution: DPTR=1000: A=0 A=1 A=2 A=3 After execution: A=66h A=77h A=88h A=99h Note: DB (Define Byte) is a directive in assembly language used to define constant. MOV DPTR,#data16 - Loads the data pointer with a 16-bit constant Data: constant in the range of 0-65535 (0-FFFFh) DPTR: Data Pointer Description: Instruction stores a 16-bit constant to the DPTR register. The 8 high bits of the constant are stored in the DPH register, while the 8 low bits are stored in the DPL register. Syntax: MOV DPTR,#data; Bytes: 3 (instruction code, constant (15-8), constant (7-0)); STATUS register flags: No flags affected; EXAMPLE:

After execution: DPH=12h DPL=34h MOVX A,@Ri - Moves the external RAM (8-bit address) to the accumulator Ri: register R0 or R1 A: accumulator Description: Instruction reads the content of a register in external RAM and moves it to the accumulator. The register address is stored in the Ri register (R0 or R1). Syntax: MOVX A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Register Address: SUM=12h Before execution: SUM=58h R0=12h After execution: A=58h Note: SUM Register is stored in external RAM which is 256 bytes in size. MOVC A,@A+PC - Moves the code byte relative to the PC to the accumulator A: accumulator PC: Program Counter Description: Instruction first adds the 16-bit PC register to the accumulator (the current program address is stored in the PC register). The result of addition is then used as a memory address from which the 8-bit data is moved to the accumulator. Syntax: MOVC A,@A+PC; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

After the subroutine "Table" has been executed, one of four values is stored in the accumulator: Before execution: A=0 A=1 A=2 A=3 After execution: A=66h A=77h A=88h A=99h Note: DB (Define Byte) is a directive in assembly language used to define constant. MOVX @Ri,A - Moves the accumulator to the external RAM (8-bit address) Ri: register R0 or R1 A: accumulator Description: Instruction moves the accumulator to a register stored in external RAM. Its address is stored in the Ri register. Syntax: MOVX @Ri,A; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Register address: SUM=34h Before execution: A=58 R1=34h After execution: SUM=58h

NOTE: Register SUM is located in external RAM which is 256 bytes in size. MOVX A,@DPTR - Moves the external memory (16-bit address) to the accumulator A: accumulator DPRTR: Data Pointer Description: Instruction moves the content of a register in external memory to the accumulator. The 16bit address of the register is stored in the DPTR register (DPH and DPL). Syntax: MOVX A,@DPTR; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Register address: SUM=1234h Before execution: DPTR=1234h SUM=58 After execution: A=58h Note: Register SUM is located in external RAM which is up to 64K in size. MUL AB - Multiplies A and B A: accumulator B: Register B Description: Instruction multiplies the value in the accumulator with the value in the B register. The loworder byte of the 16-bit result is stored in the accumulator, while the high byte remains in the B register. If the result is larger than 255, the overflow flag is set. The carry flag is not affected. Syntax: MUL AB; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Before execution: A=80 (50h) B=160 (A0h) After execution: A=0 B=32h

A·B=80·160=12800 (3200h) MOVX @DPTR,A - Moves the accumulator to the external RAM (16-bit address) A: accumulator DPTR: Data Pointer Description: Instruction moves the accumulator to a register stored in external RAM. The 16-bit address of the register is stored in the DPTR register (DPH and DPL). Syntax: MOVX @DPTR,A; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Register address: SUM=1234h Before execution: A=58 DPTR=1234h After execution: SUM=58h Note: Register SUM is located in RAM which is up to 64K in size. ORL A,Rn - OR register to the accumulator Rn: any R register (R0-R7) A: accumulator Description: Instruction performs logic OR operation between the accumulator and Rn register. The result is stored in the accumulator. Syntax: ORL A,Rn; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Before execution: A= C3h (11000011 Bin.) R5= 55h (01010101 Bin.) After execution: A= D7h (11010111 Bin.)

NOP - No operation Description: Instruction doesn‟t perform any operation and is used when additional time delays are needed. Syntax: NOP; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Such a sequence provides a negative pulse which lasts exactly 5 machine cycles on the P2.3. If a 12 MHz quartz crystal is used then 1 cycle lasts 1uS, which means that this output will be a low-going output pulse for 5 uS. ORL A,@Ri - OR indirect RAM to the accumulator Ri: register R0 or R1 A: accumulator Description: Instruction performs logic OR operation between the accumulator and a register. As it is indirect addressing, the register address is stored in the Ri register (R0 or R1). The result is stored in the accumulator. Syntax: ANL A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Register address: TEMP=FAh Before execution: R1=FAh TEMP= C2h (11000010 Bin.) A= 54h (01010100 Bin.) After execution: A= D6h (11010110 Bin.)

ORL A,direct - OR direct byte to the accumulator Direct: arbitrary register with address 0-255 (0-FFh) A: accumulator Description: Instruction performs logic OR operation between the accumulator and a register. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh (0-127 dec.). The result is stored in the accumulator. Syntax: ORL A,direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags affected; EXAMPLE:

Before execution: A= C2h (11000010 Bin.) LOG= 54h (01010100 Bin.) After execution: A= D6h (11010110 Bin.) ORL direct,A - OR accumulator to the direct byte Direct: arbitrary register with address 0-255 (0-FFh) A: accumulator Description: Instruction performs logic OR operation between a register and accumulator. As it is direct addressing, the register can be any SFRs or general- purpose register with address 0-7Fh (0-127 dec.). The result is stored in the register. Syntax: ORL [register address], A; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags affected; EXAMPLE:

Before execution: TEMP= C2h (11000010 Bin.) A= 54h (01010100 Bin.) After execution: A= D6h (11010110 Bin.) ORL A,#data - OR immediate data to the accumulator Data: constant in the range of 0-255 (0-FFh)

A: accumulator Description: Instruction performs logic OR operation between the accumulator and the immediate data. The result is stored in the accumulator. Syntax: ORL A, #data; Bytes: 2 (instruction code, data); STATUS register flags: No flags affected; EXAMPLE:

Before execution: A= C2h (11000010 Bin.) After execution: A= C3h (11000011 Bin.) ORL C,bit - OR direct bit to the carry flag C: Carry flag Bit: any bit of RAM Description: Instruction performs logic OR operation between the direct bit and the carry flag. The result is stored in the carry flag. Syntax: ORL C,bit; Bytes: 2 (instruction code, direct bit address); STATUS register flags: No flags affected; EXAMPLE:

Before execution: ACC= C6h (11001010 Bin.) C=0 After execution: C=1 ORL direct,#data - OR immediate data to direct byte Direct: arbitrary register with address 0-255 (0-FFh) Data: constant in the range of 0-255 (0-FFh) Description: Instruction performs logic OR operation between the immediate data and the direct byte. As it is direct addressing, the direct byte can be any SFRs or general-purpose register with address 0-7Fh (0127 dec.). The result is stored in the direct byte.

Syntax: ORL [register address],#data; Bytes: 3 (instruction code, direct byte address, data); STATUS register flags: No flags affected; EXAMPLE:

Before execution: TEMP= C2h (11000010 Bin.) After execution: A= D2h (11010010 Bin.) POP direct - Pop the direct byte from the stack Direct: arbitrary register with address 0-255 (0-FFh) Description: Instruction first reads data from the location being pointed to by the Stack. The data is then copied to the direct byte and the value of the Stack Pointer is decremented by 1. As it is direct addressing, the direct byte can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). Syntax: POP direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags affected; EXAMPLE:

Before execution: Address Value 030h 20h 031h 23h SP==> 032h 01h DPTR=0123h (DPH=01, DPL=23h) After execution: Address Value SP==> 030h 20h 031h 23h 032h 01h ORL C,/bit - OR complements of direct bit to the carry flag C: carry flag Bit: any bit of RAM Description: Instruction performs logic OR operation between the addressed inverted bit and the carry flag. The result is stored in the carry flag.

bit bit C C AND bit 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 0 Syntax: ORL C,/bit; Bytes: 2 (instruction code, bit address); STATUS register flags: No flags affected; EXAMPLE:

Before execution: ACC= C6h (11001010 Bin.) C=0 After execution: C=0 RET - Return from subroutine Description: This instruction ends every subroutine. After execution, the program proceeds with the instruction following an ACALL or LCALL. Syntax: RET; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

PUSH direct - Pushes the direct byte onto the stack Data: Arbitrary register with address 0-255 (0-FFh) Description: Address currently pointed to by the Stack Pointer is first incremented by 1 and afterwards the data from the register Rx is copied to it. As it is direct addressing, the direct byte can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.) Syntax: PUSH direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags affected; EXAMPLE:

Before execution: Address Value SP==> 030h 20h DPTR=0123h (DPH=01, DPL=23h) After execution: Address Value 030h 20h 031h 23h SP==> 032h 01h RL A - Rotates the accumulator one bit left

A: accumulator Description: Eight bits in the accumulator are rotated one bit left, so that the bit 7 is rotated into the bit 0 position. Syntax: RL A; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Before execution: A= C2h (11000010 Bin.) After execution: A=85h (10000101 Bin.)

RETI - Return from interrupt Description: This instruction ends every interrupt routine and informs processor about it. After executing the instruction, the program proceeds from where it left off. The PSW is not automatically returned its pre-interrupt status. Syntax: RETI; Byte: 1 (instruction code); STATUS register flags: No flags affected; RR A - Rotates the accumulator one bit right A: accumulator Description: All eight bits in the accumulator are rotated one bit right so that the bit 0 is rotated into the bit 7 position. Syntax: RR A; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:

Before execution: A= C2h (11000010 Bin.) After execution: A= 61h (01100001 Bin.)

RLC A - Rotates the accumulator one bit left through the carry flag A: accumulator Description: All eight bits in the accumulator and carry flag are rotated one bit left. After this operation, the bit 7 is rotated into the carry flag position and the carry flag is rotated into the bit 0 position. Syntax: RLC A; Byte: 1 (instruction code); STATUS register flags: C; EXAMPLE:

Before execution: A= C2h (11000010 Bin.) C=0 After execution: A= 85h (10000100 Bin.) C=1

SETB C - Sets the carry flag C: Carry flag Description: Instruction sets the carry flag. Syntax: SETB C; Byte: 1 (instruction code); STATUS register flags: C; EXAMPLE:

After execution: C=1 RRC A - Rotates the accumulator one bit right through the carry flag A: accumulator Description: All eight bits in the accumulator and carry flag are rotated one bit right. After this operation, the carry flag is rotated into the bit 7 position and the bit 0 is rotated into the carry flag position. Syntax: RRC A; Byte: 1 (instruction code); STATUS register flags: C; EXAMPLE:

Before execution: A= C2h (11000010 Bin.) C=0 After execution: A= 61h (01100001 Bin.) C=0

SJMP rel - Short Jump (relative address) addr: Jump Address Description: Instruction enables jump to the new address which should be in the range of -128 to +127 locations relative to the first following instruction. Syntax: SJMP [jump address]; Bytes: 2 (instruction code, jump value); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: PC=323 After execution: PC=345 SETB bit - Sets the direct bit Bit: any bit of RAM Description: Instruction sets the specified bit. The register containing that bit must belong to the group of the so called bit addressable registers. Syntax: SETB [bit address]; Bytes: 2 (instruction code, bit address); STATUS register flags: No flags affected; EXAMPLE:

Before execution: P0.1 = 34h (00110100) pin 1 is configured as an output After execution: P0.1 = 35h (00110101) pin 1 is configured as an input SUBB A,direct - Subtracts the direct byte from the accumulator with a borrow Direct: arbitrary register with address 0-255 (0-FFh) A: accumulator Description: Instruction subtracts the direct byte from the accumulator with a borrow. If the higher bit is subtracted from the lower bit then the carry flag is set. As it is direct addressing, the direct byte can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). The result is stored in the accumulator. Syntax: SUBB A,direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: C, OV, AC; EXAMPLE:

Before execution: A=C9h, DIF=53h, C=0 After execution: A=76h, C=0 SUBB A,Rn - Subtracts the Rn register from the accumulator with a borrow Rn: any R register (R0-R7) A: accumulator Description: Instruction subtracts the Rn register from the accumulator with a borrow. If the higher bit is subtracted from the lower bit then the carry flag is set. The result is stored in the accumulator. Syntax: SUBB A,Rn; Byte: 1 (instruction code); STATUS register flags: C, OV, AC; EXAMPLE:

Before execution: A=C9h, R4=54h, C=1 After execution: A=74h, C=0 Note: The result is different (C9 - 54=75) because the carry flag is set (C=1) before the instruction starts execution. SUBB A,#data - Subtracts the immediate data from the accumulator with a borrow A: accumulator Data: constant in the range of 0-255 (0-FFh) Description: Instruction subtracts the immediate data from the accumulator with a borrow. If the higher bit is subtracted from the lower bit then the carry flag is set. The result is stored in the accumulator. Syntax: SUBB A,#data; Bytes: 2 (instruction code, data); STATUS register flags: C, OV, AC; EXAMPLE:

Before execution: A=C9h, C=0 After execution: A=A7h, C=0 SUBB A,@Ri - Subtracts the indirect RAM from the accumulator with a borrow Ri: register R0 or R1 A: accumulator Description: Instruction subtracts the indirectly addressed register of RAM from the accumulator with a borrow. If the higher bit is subtracted from the lower bit then the carry flag is set. As it is indirect addressing, the register address is stored in the Ri register (R0 or R1). The result is stored in the accumulator. Syntax: SUBB A,@Ri; Byte: 1 (instruction code); STATUS register flags: C, OV, AC; EXAMPLE:

Register address: MIN=F4 Before execution: A=C9h, R1=F4h, MIN=04, C=0 After execution: A=C5h, C=0 XCH A,Rn - Exchanges the Rn register with the accumulator Rn: any R register (R0-R7) A: accumulator Description: Instruction causes the accumulator and Rn register to exchange data. The content of the accumulator is moved to the Rn register and vice versa. Syntax: XCH A,Rn; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A=C6h, R3=29h After execution: R3=C6h, A=29h SWAP A - Swaps nibbles within the accumulator A: accumulator Description: A nibble refers to a group of 4 bits within one register (bit0-bit3 and bit4-bit7). This instruction interchanges high and low nibbles of the accumulator. Syntax: SWAP A; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A=E1h (11100001)bin. After execution: A=1Eh (00011110)bin.

XCH A,@Ri - Exchanges the indirect RAM with the accumulator Ri: register R0 or R1 A: accumulator Description: Instruction moves the contents of accumulator to the indirectly addressed register of RAM and vice versa. As it is indirect addressing, the register address is stored in the register Ri (R0 or R1). Syntax: XCH A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Register address: SUM=E3 Before execution: R0=E3, SUM=29h, A=98h After execution: A=29h, SUM=98h XCH A,direct - Exchanges the direct byte with the accumulator Direct: arbitrary register with address 0-255 (0-FFh) A: accumulator Description: Instruction moves the contents of the accumulator into the direct byte and vice versa. As it is direct addressing, the direct byte can be any SFRs or general-purpose register with address 0-7Fh (0127 dec.). Syntax: XCH A,direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A=FFh, SUM=29h After execution: SUM=FFh A=29h XRL A,Rn - Exclusive OR register to accumulator Rn: any R register (R0-R7) A: accumulator Description: Instruction performs exclusive OR operation between the accumulator and the Rn register. The result is stored in the accumulator. Syntax: XRL A,Rn; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A= C3h (11000011 Bin.) R3= 55h (01010101 Bin.) After execution: A= 96h (10010110 Bin.) XCHD A,@Ri - Exchanges the low-order nibble indirect RAM with the accumulator Ri: register R0 or R1 A: accumulator Description: This instruction interchanges the low-order nibbles (bits 0-3) of the accumulator with the low-order nibbles of the indirectly addressed register of RAM. High-order nibbles of the accumulator and register are not affected. This instruction is mainly used when operating with BCD values. As it is indirect addressing, the register address is stored in the register Ri (R0 or R1). Syntax: XCHD A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Register address: SUM=E3 Before execution: R0=E3 SUM=29h A=A8h, After execution: A=A9h, SUM=28h

XRL A,@Ri - Exclusive OR indirect RAM to the accumulator Ri: Register R0 or R1 A: accumulator Description: Instruction performs exclusive OR operation between the accumulator and the indirectly addressed register. As it is indirect addressing, the register address is stored in the Ri register (R0 or R1). The result is stored in the accumulator. Syntax: XRL A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:

Register address: TEMP=FAh, R1=FAh Before execution: TEMP= C2h (11000010 Bin.) A= 54h (01010100 Bin.) After execution: A= 96h (10010110 Bin.) XRL A,direct - Exclusive OR direct byte to the accumulator Direct: Arbitrary register with address 0-255 (0-FFh) A: accumulator Description: Instruction performs exclusive OR operation between the accumulator and the direct byte. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh (0127 dec.). The result is stored in the accumulator.

Syntax: XRL A,direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:

Before execution: A= C2h (11000010 Bin.) LOG= 54h (01010100 Bin.) After execution: A= 96h (10010110 Bin.) XRL direct,A - Exclusive OR accumulator to the direct byte Direct: arbitrary register with address 0-255 (0-FFh) A: accumulator Description: Instruction performs exclusive OR operation between the direct byte and the accumulator. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh (0127 dec.). The result is stored in the register. Syntax: XRL direct,A; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags affected; EXAMPLE:

Before execution: TEMP= C2h (11000010 Bin.) A= 54h (01010100 Bin.) After execution: A= 96h (10010110 Bin.) XRL A,#data - Exclusive OR immediate data to the accumulator Data: constant in the range of 0-255 (0-FFh) A: accumulator Description: Instruction performs exclusive OR operation between the accumulator and the immediate data. The result is stored in the accumulator. Syntax: XRL A,#data; Bytes: 2 (instruction code, data); STATUS register flags: No flags are affected;

EXAMPLE:

Before execution: A= C2h (11000010 Bin.) X= 11h (00010001 Bin.) After execution: A= D3h (11010011 Bin.) XRL direct,#data - Exclusive OR immediate data to direct byte Direct: arbitrary register with address 0-255 (0-FFh) Data: constant in the range of 0-255 (0-FFh) Description: Instruction performs exclusive OR operation between the immediate data and the direct byte. As it is direct addressing, the register can be any SFRs or general-purpose register with address 07Fh (0-127 dec.). The result is stored in the register. Syntax: XRL direct,#data; Bytes: 3 (instruction code, direct byte address, data); STATUS register flags: No flags affected; EXAMPLE:

Before execution: TEMP= C2h (11000010 Bin.) X=12h (00010010 Bin.) After execution: A= D0h (11010000 Bin.)

Chapter 4 : AT89S8253 Microcontroller 4.1 AT89S8253 Microcontroller ID 4.2 Pin Description 4.3 AT89S8253 Microcontroller Memory Organisation 4.4 SFRs (Special Function Registers) 4.5 Watchdog Timer (WDT) 4.6 Interrupts 4.7 Counters and Timers 4.8 UART (Universal Asynchronous Receiver Transmitter) 4.9 SPI System (Serial Peripheral Interface) 4.10 Power Consumption Control

Introduction It has been more than 20 years since the first version of the 8051 microcontroller was launched. During

that time it has undergone various upgrades and improvements. Today, the 8051 microcontroller is being manufactured across the globe by many manufacturers and under different names. Of course, the latest versions are by far more advanced than the original one. Many of them has the label “8051 compatible”, “8051 compliant”or “8051 family” in order to emphasize their “noble heritage”. These tags imply that microcontrollers have similar architecture and are programmed in a similar way using the same instruction set. Practically, if you know how to handle one microcontroller belonging to this family, you will be able to handle any of them. In other words, several hundreds of different models are at your disposal. This book covers one of them called the AT89S8253, manufactured by Atmel. Why this particular one? Because it is widely used, cheap and uses Flash memory for storing programs. The last feature mentioned makes it ideal for experimentation due to the fact that program can be loaded and erased from it for many times. Besides, thanks to the built-in SPI System (Serial Programing Interface), the program can be loaded to the microcontroller even after embedding the chip in the target device.

4.1 The AT89S8253 microcontroller ID Compatible with 8051 family. 12Kb of Flash Memory for storing programs. o Program is loaded via SPI System (Serial Peripheral Interface). o Program may be loaded/erased up to 1000 times. 2Kb of EEPROM Memory. Power supply voltage: 4-6V. Operating clock frequency: 0-24MHz. 256 bytes of internal RAM for storing variables. 32 input/output pins. Three 16-bit timers/counters. 9 interrupt sources. 2 additional power saving modes (low-power idle and power-down mode). Programmable UART serial communication. Programmable watchdog timer. Three-level program memory lock

The AT89S53 comes in the following packages:

4.2 Pinout Description VCC Power supply voltage (4-6V) GND Ground ( Negative supply pole) Port 0 (P0.0-P0.7) If configured as outputs, each of these pins can be connected to up to 8 TTL inputs. If configured as inputs, the pins can be used as high-impedance inputs as their potential is not defined

relative to ground, i.e. they are floating. If additional (external) memory is used, these pins are used for accessing it. Signal on the ALE pin determines what and when will be transferred to this port. Port 1 (P1.0-P1.7) If configured as outputs, each of these pins can be connected to up to 4 TTL inputs. When configured as inputs, these pins act as standard TTL inputs, that is, each of them is internally connected to the positive supply voltage via a resistor of relatively high impedance. Power supply voltage provided on these inputs is 5V. Also, the Port 1 pins have alternate functions as shown in the table below: Port Pin Alternate Function P1.0 T2 (Timer 2 input) P1.1 T2EX (Timer 2 control input) P1.4 SS (SPI system control input) P1.5 MOSI (SPI system I/O) P1.6 MISO (SPI system I/O) P1.7 SCK (SPI system clock signal) Port 2 (P2.0-P2.7) Whether configured as an input or an output, this port acts the same as Port 1. If external memory is used, the high byte of the address (A8-A15) comes out on the Port 2 which is thus used for addressing it. Port 3 (P3.0-P3.7) Similar to P1, Port 3 pins can be used as general inputs or outputs. They also have additional functions to be explained later in the chapter. Port Pin Alternate Function P3.0 RXD (serial input) P3.1 TXD (serial output) P3.2 INT0 (external interrupt 0) P3.3 INT1 (external interrupt 1) P3.4 T0 (Timer 0 external input) P3.5 T1 (Timer 1 external input) P3.6 WR (External data memory write signal) P3.7 RD (External data memory read signal) RST Logic one (1) on this pin causes the microcontroller to be reset. ALE/PROG In normal operation, the ALE pin is activated at a constant rate of 1/16 the oscillator frequency and can be used for external clocking and timing purposes. When external memory is used, a signal from this pin is used to latch the low byte of an address (A0-A7) from P0. During the process of writing a program to the microcontroller, this pin also serves as a control input. PSEN This pin provides a signal used for accessing external program memory (ROM). EA/VPP When this pin is connected to ground, the microcontroller reads program instructions from external program memory. If internal program memory is used, which is the common case, this pin should be connected to the positive power supply voltage (VCC). During the process of programming internal Flash mamory, this pin is supplied with +12V. XTAL 1 This is internal oscillator input. It is used for the purpose of synchronizing the operation of the microcontroller with some other circuit or for connecting external oscillator when used. XTAL 2 This pin is connected to internal oscillator output. Therefore, it is out of use when using external

oscillator.

4.3 The AT89S8253 Microcontroller Memory Organization Program Memory (ROM) Program memory (ROM) with a capacity of 12Kb is designed in FLASH technology, which enables programs to be loaded and erased a large number of times. It is programmed via embedded SPI module (Serial Peripheral Interface). If necessary, it is possible to add external ROM memory chip, although 12Kb of ROM is usually more than enough. Random Access Memory (RAM) RAM memory consists of 3 blocks containing 128 registers each. Its structure falls into the 8051 standard: 128 general-purpose registers; 128 memory locations reserved for SFRs. Even though only some of them are trully used, free locations shouldn‟t be used for storing variables; and 128 additional registers available for use (have no special purpose). Since they have the same addresses as SFRs, they are accessed by indirect addressing.

EEPROM Memory EEPROM is a special type of memory having features of both RAM and ROM. The contents of the EEPROM may be changed during operation, but remains permanently saved even after the loss of power. The AT89S8253 microcontroller has in total of 2K of EEPROM, that is 2048 locations. Memory Expansion All mentioned above about ROM and RAM memory expansion remains in force when it comes to the AT89S8253 microcontroller as it is based on the 8051 core. In other words, both memories can be added

as external chips with the capacity of up to 64Kb. The process of addressing is also the same as in the 8051 standard. Types of addressing Similar to all microcontrollers compatible with the 8051, there are two ways of addressing: Direct addressing (for example: MOV A,30h); and Indirect addressing (for example: MOV A,@R0).

4.4 Special Function Registers (SFRs) The AT89S8253 microcontroller has in total of 40 Special Function Registers. For the sake of the compatibility with the previous 8051 models, the core registers (22 in total) are the same for all of them, while the others were added later for the purpose of controlling upgraded functions of the microcontroller.

As shown in the table above, each of these registers has its name and specific address in RAM. Unoccupied locations are intended for the future upgraded versions of the microcontroller and shouldn‟t be used. As their name suggests, these registers are mostly in control of one specific circuit within the microcontroller such as timers or SPI etc. and they will be discussed later in the book. This chapter covers only those SFRs controlling more than one circuit within the microcontroller. Accumulator (ACC) The accumulator, otherwise marked as ACC or A, belongs to the core registers of the 8051 microcontroller. Its contents is not modified.

B register The B register also belongs to the core registers of the 8051 microcontroller. Bits of this register are not modified. It is used during multiply and divide operations (MUL and DIV instructions) to store the

operands upon which these operations are performed.

PSW register (Program Status Word Register) The PSW register belongs to the core registers of the 8051 microcontroller. Bits of this register are not modified.

SP registar (Stack Pointer Register) The SP register belongs to the core registers of the 8051 microcontroller. Bits of this register are not modified.

Registers P0, P1, P2, P3 Each bit of these registers corresponds to one of the port pins having the same name. These registers are therefore used for comminication with peripheral environment which is carried out by sending data from registers to the corresponding pins and vice versa. They belong to the core registers of the 8051 microcontroller and their bits are not modified.

R registers (R0 - R7)

They belong to the core registers of the 8051 microcontroller. Their bits are not modified.

AUXR register (Auxiliary register) The AUXR register contains only two active bits:

DISALE o 0 - ALE is activated at a constant rate of 1/6 the oscillator frequency. o 1 - ALE is active only during execution of MOVX or MOVC instructions. Intel_Pwd_Exit o 0 - When the microcontroller is in Power Down mode, the program proceeds with execution on high-to-low transition (1-0). o 1 - When the microcontroller is in Power Down mode, the program proceeds with execution on low-to-high transition (0-1). CLKREG register (Clock Register) X2

0 - The oscillator frequency (the XTAL1 pin) is divided by 2 before used as a clock (machine cycle lasts for 6 such periods). 1 - Quartz oscillator is used as a clock generator. This enables the quartz crystal of two times lower frequency (for example 6MHz instead of 12MHz) to be used for the same operating rate of the microcontroller. Data Pointers Data Pointers are not true registers as they don‟t physically exist. They consist of two separate registers: DPH (Data Pointer High) and DPL (Data Pointer Low). All 16 bits are used for addressing external and internal EEPROM memory. The DPS bit of the EECON register determines the registers to be used as data pointers:

DPS=0 -> Data pointer consists of DP0L and DP0H registers and is marked as DPTR0.

DPS=1 -> Data pointer consists of DP1L and DP1H registers and is marked as DPTR1.

Handling EEPROM memory 2 Kb of on-chip EEPROM memory enables this microcontroller to store data created during operation which must be permanently saved. In other words, all data stored in this memory remains permanently saved even after the loss of power. Minimum 100 000 writing cycles can be executed. This memory is easily used since there are only a few control bits enabling it. EEPROM write and read is under control of the EECON special function register. Since the process of programming EEPROM is relatively slow (write to one register takes approximately 4mS), a small hardware trick is done in order to speed it up. When the EELD bit of the EECON register is set, the data is not directly written to the EEPROM registers, but loaded in a small buffer (temporary memory) with a capacity of 32 bytes. When this bit is cleared, the first data following it will be normally written to the EEPROM (takes 4 mS) along with all registers currently loaded in the buffer. Thus, it takes only 4mS to write all 32 bytes instead of 128mS otherwise required in a single byte writing. EEPROM memory is handled in the same way as external memory. For this reason, a special instruction for additional memory chip (MOVX) is also used for EEPROM write and read. The EEMEN bit of the EECON register determines whether the data is to be written/read from additional memory chip or onchip EEPROM memory.

EECON register Bits of the EECON register controls the operation of EEPROM memory:

WRTINH The WRTINH bit is read-only. When the power supply voltage is too low for programming EEPROM, hardware automatically clears this bit, which means that write to EEPROM cannot be completed or is aborted if in progress. RDY/BSY The RDY/BSY bit is read-only. 0 - Write in progress (takes approximately 4mS). 1 - Write complete (data is written to EEPROM). DPS 0 - Address for EEPROM write/read is stored in the DP0H and DP0L registers. 1 - Address for EEPROM write/read is stored in the DP1H and DP1L registers. EEMEN 0 - Instruction MOVX is used for accessing external memory chip. 1 - Instruction MOVX is used for accessing internal EEPROM memory. If the register address is larger than 2K, the microcontroller will access external memory chip. EEMWE When set, the EEMWE bit enables write to EEPROM using the MOVX instruction. After completing

EEPROM write, the bit must be cleared from within the program. EELD When set, the EELD bit enables up to 32 bytes to be written simultaneously. The bit is set and the MOVX instruction writes data to EEPROM (buffer is loaded). The bit is cleared before writing the last data. When the last MOVX is executed, the entire buffer is automatically loaded to EEPROM for 4mS.

4.5 Watchdog Timer (WDT) The watchdog timer uses pulses generated by the quartz oscillator for its operation. It is disabled after reset and during Power Down Mode, thus having no effect on the program execution. If enabled, every time it counts up to the program end, the microcontroller reset occurs and program execution starts from the first instruction. Reset condition indicates that the program doesn‟t work properly for some reason. The point is to prevent this from happening by setting instruction to reset the watchdog timer at the appropriate program location. Practically, the whole this process is in control of several bits of the WDTCON register. Three bits (PS2, PS1 and PS0), which are in control of the prescaler, determine the most important feature of the watchdog timer- nominal time, i.e. time required to count up a full cycle. The values contained in the table below are applied only when the 12MHz quartz oscillator is used. Prescaler Bits Nominal Time PS2 PS1 PS0 0 0 0 16ms 0 0 1 32ms 0 1 0 64ms 0 1 1 128ms 1 0 0 256ms 1 0 1 512ms 1 1 0 1024ms 1 1 1 2048ms WDTCON Register (Watchdog Control Register)

PS2,PS1,PS0 These three bits are in control of the prescaler and determine the nominal time of the watchdog timer. If the program doesn‟t clear the WSWRST bit during that time, the watchdog timer will reset the microcontroller. When all three bits are cleared to 0, the watchdog timer has a nominal period of 16K machine cycles. When all three bits are set to 1, the nominal period is 2048K machine cycles. WDIDLE The WDIDLE bit enables/disables the watchdog timer in Idle mode: 0 - Watchdog timer is enabled in Idle mode (low-consumption mode). 1 - Watchdog timer is disabled in Idle mode.

DISRTO The DISRTO bit enables/disables reset of peripheral circuits connected to the RST pin: 0 - Watchdog controls the state of the input reset pin. At the moment of reset, this pin acts for a moment as an output and generates a logic one (1). It causes the microcontroller and all other circuits connected to the RST pin to be reset. 1 - Reset triggered by the watchdog timer doesn‟t affect the state of the reset pin. At the moment the watchdog timer resets the microcontroller, the reset pin remains configured as an input. HWDT The HWDT bit selects hardware or software mode for the watchdog timer: 0 - Watchdog is in software mode and can be enabled or disabled by the WDTEN bit. 1 - Watchdog is in hardware mode. To enable it, the sequence 1E/E1(hex) should be written to the WDTRST register. Only reset condition can disable the watchdog timer. In order to prevent the WCDT from resetting the microcontroller when the nominal time expires, the same sequence 1E/E1hex must be constantly repeated. WSWRST When set, this bit resets the watchdog timer in software mode (bit HWDT=0). In order to enable the microcontroller to operate without being interrupted, this bit must regularly be cleared from within the program. After being set, the watchdog timer is cleared by hardware, counting starts from zero and the bit is automatically cleared. If the watchdog timer is in hardware mode, setting this bit has no effect on the watchdog timer operation. WDTEN The WDTEN bit enables/disables the watchdog timer in software mode (HWDT=0): 0 - Watchdog disabled. 1 - Watchdog enabled. When the watchdog timer is in hardware mode (HWDT=1), this bit is read-only and reflects the status of the watchdog timer (whether it is enabled or disabled).

The WDTEN bit doesn‟t clear the watchdog timer, it only enables/disables it. This means that the current state of the counter remains unchanged as long as WDTEN=0.

4.6 Interrupts The AT89S8253 has in total of six interrupt sources, which means that it can recognize up to 6 different events that can interrupt regular program execution. Each of these interrupts can be individually enabled or disabled by setting bits of the IE register, whereas the whole interrupt system can be disabled by clearing the EA bit of the same register. Since this microcontroller has embedded Timer T2 and SPI (they don't fall under the “8051 Standard”) which can generate an interrupt, it was necessary to make some changes in registers controlling interrupt system. Besides, there is a new interrupt vector (address 2B), i.e. program memory address from which the program proceeds with execution when the Timer T2 generates an interrupt. All these changes are

made on the previously unused bits. This enables all programs written for the previous versions of the microcontrollers to be used in this one too without being modified. This is why the 8051-based microcontrollers are so popular.

IE register (Interrupt Enable Register)

EA bit enables or disables all interrupt sources (globally): 0 - disables all interrupts (even enabled). 1 - enables specific interrupts. ET2 bit enables or disables Timer T2 interrupt: 0 - Timer T2 interrupt disabled. 1 - Timera T2 interrupt enabled. ES bit enables or disables serial communication (UART and SPI) interrupts: 0 - UART and SPI interrupt disabled. 1 - UART and SPI interrupts enabled. ET1 bit enables or disables Timer T1 interrupt: 0 - Timer T1 interrupt disabled. 1 - Timer T1 interrupt enabled. EX1 bit enables or disables external interrupt through the INT0 pin: 0 - Interrupt on the INT0 pin disabled. 1 - Interrupt on the INT0 pin enabled. ET0 bit enables or disables Timer T0 interrupt:

0 - Timer T0 interrupt disabled. 1 - Timer T0 interrupt enabled. EX0 bit enables or disables external interrupt through the INT1 pin: 0 - Interrupt on the INT1 pin disabled. 1 - Interrupt on the INT1 pin enabled. Interrupt Priorities When several interrupts are enabled, it may happen that while one of them is in progress, another one is requested. In such situations, the microcontroller needs to know whether to proceed with the execution of current interrupt routine or to meet a new interrupt request. For this reason, there is a priority list on the basis of which the microcontroller knows what to do. The previous versions of the microcontrollers differentiate between two priority levels defined in the IP register. As for the AT89S8253 microcontroller, there is an additional SFR register IPH which enables all the interrupts to be assigned 1 out of 4 priorities (excluding reset). Here is a list of priorities: 1. Reset. If a reset request arrives, all processes are stopped and the microcontroller restarts. 2. The high priority interrupt (3) can be disabled by reset only. 3. The low priority interrupt (2, 1 or 0) can be disabled by any high priority interrupt and reset. It is usually defined at the beginning of the program which one of the existing interrupt sources have high and which one has low priority level. According to this, the following occurs: If two interrupt requests, at different priority levels, arrive at the same time then the higher priority interrupt is always serviced first. If the both interrupt requests, at the same priority level, occur one after another, the one which came later has to wait until routine being in progress ends. If two interrupt requests of equal priority arrive at the same time then the interrupt to be serviced is selected according to the following priority list : 1. 2. 3. 4. 5. 6.

External interrupt INT0 Timer T0 interrupt External interrupt INT1 Timer T1 interrupt Serial communication interrupt Timer T2 Interrupt

IP register (Interrupt Priority Register)

Bits of this register determine the interrupt source priority. PT2 Timer T2 interrupt priority: 0 - Priority 0 1 - Priority 1 PS Serial port interrupt priority:

0 - Priority 0 1 - Priority 1 PT1 Timer T1 interrupt priority: 0 - Priority 0 1 - Priority 1 PX1 External interrupt INT1 priority: 0 - Priority 0 1 - Priority 1 PT0 Timer T0 interrupt priority: 0 - Priority 0 1 - Priority 1 PX0 External interrupt INT0 priority: 0 - Priority 0 1 - Priority 1 IPH Register (Interrupt Priority High)

PT2H Timer T2 interrupt priority PSH Serial port interrupt priority PT1H Timer T1interrupt priority PX1H External interrupt INT1 priority PT0H Timer T0 interrupt priority PX0H External interrupt INT0 Priority Bits of this register can be combined with appropriate bits of the IP register. This is how a new priority list with 4 interrupt priority levels (5 including reset) is obtained. IP bit IPH bit Interrupts 0 0 Priority 0 (lowest) 0 1 Priority 1 (low) 1 0 Priority 2 (high) 1 1 Priority 3 (highest) Processing interrupt When an interrupt request arrives, the microcontroller automatically detects the interrupt source and the

following occurs: 1. Instruction in progress is ended; 2. The address of the next instruction to execute is pushed onto the stack; 3. Depending on which interrupt is requested, one of five vectors (addresses) is written to the program counter according to the table below: Interrupt Source Jump Address IE0 3h TF0 Bh IE1 13h TF1 1Bh RI, TI, SPIF 23h TF2, EXF2 2Bh All addresses are in hex format Appropriate subroutines processing interrupts are stored at these addresses. Instead of them, there are usually jump instructions specifying locations at which these subroutines reside. 4. When an interrupt routine is executed, the address of the next instruction to be executed is popped from the stack to the program counter and the program proceeds from where it left off.

4.7 Counters and Timers Timers T0 and T1 The AT89S8253 has three timers/counters marked as T0, T1 and T2. Timers T0 and T1 completely fall under the 8051 Standard. There are no changes in their operation. Timer T2 Timer 2 is a 16-bit timer/counter installed only in new versions of the 8051 family. Unlike timers T0 and T1, this timer consists of 4 registers. Two of them, TH2 and TL2, are connected serially in order to form a larger 16-bit timer register. Like timers 0 and 1, it can operate either as a timer or as an event counter. Another two registers, RCAP2H and RCAP2L, are also serially connected and operate as capture registers. They are used to temporarily store the contents of the counter register. The main adventage of this timer compared to timers 0 and 1 is that all read and swap operations are easily performed using one instruction. Similar to T0 and T1, it has four different modes of operation to be described later in this chapter.

T2CON (Timer/Counter 2 Control Register)

This register contains bits controlling the operation of timer 2. TF2 bit is automatically set on timer 2 overflow. In order to detect the next overflow, this bit must be cleared from within the program. If bits RCLK and TCLK are set, overflow has no effect on the TF2 bit. EXF2 bit is automatically set when a capture or a reload is caused by a negative transition on the T2EX pin. It generates an interrupt (if enabled), unless the DCEN bit of the T2CON register is set. The EXF2 bit must be cleared from within the program. RCLK is receive clock bit which determines which timer is to be used as receive clock for serial port: 1 - T2 is used as receive clock for serial port. 0 - T1 is used as receive clock for serial port. TCLK is transmit clock bit which determines which timer is to be used as transmit clock for serial port: 1 - T2 is used as transmit clock for serial port. 0 - T1 is used as transmit clock for serial port. EXEN2 is timer 2 external enable bit used to include the T2EX pin in timer 2 operation: 1 - Signal on the T2EX pin affects timer 2 operation. 0 - Signal on the T2EX pin is ignored. TR2 is timer 2 run control bit used to enable/disable timer 2: 1 - Timer 2 enabled.

0 - Timer 2 disabled. C/T2 is timer/counter 2 select bit used to select pulses to be counted by counter/timer 2: 1 - 16-bit register (T2H and T2L) counts pulses on the C/T2 pin (counter). 0 - 16-bit register (T2H and T2L) counts pulses from the oscillator (timer). CP/RL2 is timer 2 capture/reload bit used to define transfer direction: 1 - If EXEN=1, pulse on the T2EX pin will cause a number to be transferred from counter to capture register. 0 - Under the same condition, signal on the T2EX pin will cause a number to be transferred from capture to counter register. Timer T2 in Capture mode If the CP/RL2 bit of the T2CON register is set, timer 2 operates according to the figure below. This is so called Capture mode in which the value of the counter register (consisting of RCAP2H and RCAP2L) can be “captured” and copied to the capture register (consisting of RCAP2H and RCAP2L), thus not affecting the counting process. This is how it operates:

1. First, it is necessary to write a number from which the counting starts to a 16-bit register (TH2+TL2). 2. Timer 2 is enabled by setting the TR2 bit of the TCON register. Each coming pulse increments the number stored in the 16-bit register by 1. When both registers are loaded (decimal number 65536), the first next pulse causes an overflow, reset occurs and counting starts from zero. Settings:

Timer T2 in auto-reload mode The auto-reload mode configures timer 2 as a 16-bit timer or event counter with automatic reload. It is controlled by the DCEN bit of the T2MOD register. Setting the DCEN bit enables timer 2 to count up or down from the specified value. The T2EX pin controls the counting direction:

T2OE - Enables timer 2 to operate as independent clock generator. DCEN - When set, it enables counting in either direction- "up" and "down".

As seen in figure above, unlike Capture mode, the contents of the capture register (RCAP2H, RCAP2L) is now copied in the opposite direction upon an overflow occurs, from capture (RCAP2H, RCAP2L) to counter register (TH2, TL2). Settings of Auto Reload mode are shown in the table below:

All previously mentioned about timer 2 is in force only if the T2MOD register hasn't been changed, i.e. if DCEN = 0. Otherwise, timer/counter is enabled to count in either direction, which depends on the T2EX pin: T2EX = 0 Timer 2 counts down T2EX = 1 Timer 2 counts up

On counting up, the whole procedure is similar to the previous mode with one exception referring to the function of the EXF2 bit. On counting down, an overflow occurs when values stored in the counter and capture registers match. It causes the TF2 bit as well as all bits of registers T2H and T2L to be set while the counter keeps on counting down: 65535, 65534,65533... In either case, the EXF2 bit is assigned a new function. When an overflow occurs, this bit inverts the signal and cannot be used for generating an interrupt anymore. Instead, it serves as supplementary bit (the 17th bit) of the counter register, making this counter virtually a 17-bit register. Timer T2 as a baud rate generator The Timer T2 can be used as a baud rate generator and a clock generator simultaneously. If the RCLK or TCLK bit of the register TCON is set, timer T2 turns into a clock generator, so called Baud Rate

generator). This mode is very similar to auto-reload mode. The baud rate is computed using the following formula:

There are a few details to be aware of: 1. This formula works only if the internal oscillator is used as a clock generator (in this mode, clock is divided by 2, instead of 12) 2. Overflow has no effect on the TF2 bit and does not generate an interrupt. 3. Whether the EXEN2 bit is set or not, the T2EX pin logic state has no effect on the timer. It means that the T2EX pin can be used as an external interrupt source in this mode. 4. Timer should be disabled (TR2=0) prior to writing or reading from registers TH2 and TL2. Otherwise, an error in serial communication might occur. Timer T2 as a clock generator As previously mentioned, timer T2 can also be used as a clock generator. In all previous examples, the P1.0 pin (marked as T2 in figures) is used as an alternative clock generator for this timer, i.e. it acts as an input. Besides, it can also output pulses. By using a 16MHz quartz crystal, the frequency of pulses it generates ranges from 61Hz to 4MHz with a 50% duty-cycle. To configure this pin as an output, the C/T2 bit of the T2CON register must be cleared, whereas the T2OE bit of the T2MOD register must be set. The TR2 bit enables the timer and the pin outputs rectangular waves the frequency of which ca be calculated using the formula below:

4.8 Universal Asynchronous Receiver Transmitter (UART) The Universal Asynchronous Receiver Transmitter (UART) has the same features as that of the standard 8051 microcontrollers. It means that it can operate in 1 out of 4 different modes, which is controlled by bits SM0 and SM1 of the SCON register.

Multiprocessor Communication Multiprocessor communication (the SM2 bit of the SCON register is set) enables automatic address recognition by allowing the serial port to examine the adress of each incoming command. The process of writing a program is much easier therefore as the microcontrollers sharing the same interface don't have to check each address received via the serial port. Let's make it clear. Two special function registers, SADDR and SADEN, enable multiprocessor communication. Each device

has an individual address that is specified in the SADDR register, while the so called mask address is written to the SADEN register. The mask address contains don't care bits which provide the flexibility to address one or more slaves at a time. In other words, it defines which bits of the SADDR register are to be used and which are to be ignored.

When the master wants to transmit data to one of several slaves, it first sends out an address byte which identifies the target device. An address byte differs from a data byte in that the 9th bit is 1 in an address byte and 0 in a data byte. After receiving the address byte, all slaves check whether it matches their address. The adressed slave clears its SM2 bit and prepares to receive the data bytes to come. The slaves that weren't addressed leave their SM2 bits set and ignores the coming data bytes. The most simple example is a “mini-network” comprising only 3 microcontrollers: Microcontroller A is the master and communicates with devices “B” and “C”. Microcontroller B: SADDR = 1100 0000 SADEN = 1111 1101 Address = 1100 00X0 Microcontroller C: SADDR = 1100 0000 SADEN = 1111 1110 Address = 1100 000X

Although both microcontrollers B and C are assigned the same address (1100 0000), the mask in register SADEN is used to differentiate between them. It enables the master to communicate with both of them separately or at the same time: If transmit address is 1100 0010, the data will be sent to slave device B. If transmit address is 1100 0001 the data will be sent to slave device C. If transmit address is 1100 0000 the data will be sent to both slave devices.

4.9 SPI System (Serial Peripheral Interface) In addition to UART system, the AT89S8253 has also another system for serial communication which

doesn‟t fall into the 8051 Standard. It is SPI system which provides a high-speed synchronous data transfer between the microcontroller and one or more peripheral devices or between multiple microcontrollers. Here, one microcontroller is always considered main and is called master therefore. It defines rate, transfer direction (whether data is to be transferred or received) and data format. The other is slave device which is in subordinated position, which further means that it cannot start data transfer, but has to adjust to conditions set by the master device. The data are transferred via full duplex connection using 3 conductors connected to pins MISO (P1.6), MOSI (P1.5) and SCK (P1.7). The forth pin-control pin SS- is not used on the master side and may be used as a general-purpose input/output therefore, while on the slave side it must have voltage level 0. When the SS pin on the slave side is set, its SPI system is deactivated and the MOSI pin can be used as a general-purpose input.

As shown on the schematic, pins MISO and MOSI are configured differently in the master and slave device (as inputs or outputs), which is determined by the MSTR bit of the SPCR register.

Knowing abbraviations makes connection easier: MISO - master in, slave out; MOSI - master out, slave in; SCK - serial clock; SS - slave select; Similar to many other circuits within the microcontroller, the SPI system can also be configured to operate in several modes. Normal SPI mode (buffer out of use) Data written to the SPI data register SPDR is automatically transferred to an 8- bit shift register. SPI clock generator is enabled and serial data appears on the MOSI pin. An initial delay may occur for the sake of synchronization with the main oscillator.

After sending one byte, the SPI clock generator stops, the SPIF bit (flag) is set, the received byte is transferred to the SPDR register and, if enabled, an interrupt is generated. Any attempt to write another byte to the SPDR register while byte transmit is in progress will cause the WCOL bit to be set. It indicates that an error has occured. However, the byte will be succesfully transmitted, while the new byte will be ignored, i.e. it will not be transmitted. Enhanced SPI mode (buffer in use) Enhanced mode is similar to normal except that this time data goes through one more register while being transmitted. It makes no sense at first sight, but communication is really faster. Look at the figure below... Data written to the SPI data register SPDR is automatically transferred to the capture register (buffer), which causes the WCOL bit to be set. It means that the buffer is full and any further write will cause an overflow. Control electronics (hardware) cleares this bit after transmitting data from buffer to the shift register and after commencing serial data transmit. If the byte sent is the first, the data is immediately transmitted to the shift register (still empty), thus clearing the WCOL bit (buffer is empty).

While one byte transmit is in progress, the next byte to transmit may be written to the SPDR register. It will be immediately moved to buffer. In order to check whether data transmit is in progress, it is sufficient to check the logic state of the LDEN bit of the SPSR register. If this bit is set (Load Enable) and the WCOL bit is cleared, data transmit is in progress and buffer is empty so the next byte can be written to the SPDR register. How to select the right mode? If individual bytes are sent occasionally then there is no need to complicate- the best solution is the normal mode. If it is necessary to send a great amounts of data, it is

better to use enhanced mode in which the clock oscillator is enabled as far as buffer is regularly loaded and the WCOL bit is set. In addition, no time is needed for synchronization and data is easily and efficiently transferred. The SPI system is under control of 3 special function registers. These are SPDR, SPSR and SPCR. SPDR (SPI Data Register) The SPDR register is used for storing data to be transferred via SPI (in serial format). It is also used for storing received data.

SPSR (SPI Status Register)

SPIF Interrupt flag. Upon data transfer, this bit is automatically set and an interrupt is generated if SPIE=1 and ES=1. The SPIF bit is cleared by reading SPSR followed by reading/writing SPDR register. WCOL This bit is set in normal mode (ENH=0) if the SPDR register is written during data transfer is in progress. The write is premature and has no effect. It is called Write Collision. This bit is cleared in the same manner as the SPIF bit. The bit is set in enhanced mode (ENH=1) when buffer is full. It is indication that a new data is ready to be transmitted to the shift register. In enhanced mode, a new data can be written to buffer when the WCOL bit is set. In addition, the WCOL bit must be cleared. DISSO When set, this bit causes the MISO pin to float, thus enabling several slave microcontrollers to share the same interface. Normally, the first byte, called address byte, is received by all of them, but only one should clear its DISSO bit. ENH 0 SPI system operates in normal mode (without buffer). 1 SPI system operates in enhanced mode. SPCR (SPI Control Register)

SPIE When this bit is set, the SPI system can generate an interrupt. SPE This bit enables SPI communication. When set, pins SS, MOSI, MISO and SCK are connected to the microcontroller pins P1.4, P1.5, P1.6 and P1.7. DORD Bit determines which bytes in serial communication are to be sent first: 0 - MSB bit is sent first. 1 - LSB bit is sent first.

MSTR Bit determines whether the microcontroller is to operate as master or slave: 0 - Operate as slave. 1 - Operate as master. CPOL Bit controls the SCK pin logic state when the SPI communication is not in progress: 0 - Pin SCK is cleared. 1 - Pin SCK is set. CPHA This bit along with the CPOL bit controls relation between clock and data in serial format. Refer to the figure below. SPR1,SPR0 When SPI system operates as master, these two bits determine boud rate, i.e. clock signal frequency of the master device. When operates as slave, these bits have no effect and SPI system operates at a rate imposed by the master device. SPR1 SPR0 SCK 0 0 Fosc/4 0 1 Fosc/16 1 0 Fosc/64 1 1 Fosc/128 Serial data format if CPHA=0

* not defined. It is usually MSB of previously received byte. Serial data format if CPHA=1

* not defined. It is usually LSB of previously received byte. Two things are important to remember when configuring SPI system: Master should be configured before slave. When writing bits to the SPCR register, the SPE bit enabling SPI should be set last, i.e. after setting all other parameters.

4.10 Power Consumption Control Like all models belonging to the 8051 series, this microcontroller can operate in 1 out of 3 modes: normal (consumption ca. 25 mA), Idle (consumption ca. 6.5 mA) and Power Down (consumption ca. 40 uA). The mode of operation is selected by bits of the PCON register (Power Control Register). Three bits are changed compared to the basic model: PCON register

The purpose of the bits of the PCON register: SMOD1 When set, this bit makes boud rate twice as high. SMOD0 Bit determines the purpose of the 7th bit of the SCON register: 0 Seventh bit of the SCON register has the function of SM0, i.e. selects mode of operation. 1 Seventh bit has the function of FE, i.e. detects errors. It is rarely used. POF Bit is automatically set when the voltage level reaches maximum (must be higher than 3V) after powering on. It is used for detecting cause for reset (power on or restart condition after exiting Power Down mode). GF1 General purpose bit (available for use). GF0 General purpose bit (available for use). PD By setting this bit, the microcontroller is set in Power Down mode.

IDL By setting this bit, the microcontroller is set in Idle mode. When something goes wrong... If something unexpected happens during the operation of the microcontroller, what most bothers is the fact that it‟s never the microcontroller's fault. Although it‟s not self-evident, the microcontroller always obediently follows program instructions. For this reason, it is necessary to pay special attention to several “critical points” when writing a program. The first one is RAM memory. Even though it is designed to meet needs of the majority of users and has all required, a memory space intended for RAM is still only a single entity. It means that there are no phisically separated registers R0R7, general purpose registers, stack etc. Instead, these are differently designated parts of the same “memory shelf”. Refer to the figure below.

If we neglect this “detail”, there is a risk that the program suddenly starts to perform unpredictably. In order to prevent it, it is necessary to take care of the following: If only registers R0-R7 from bank 0 are in use, everything is easily kept under control and program memory locations from 08h to 1Fh are available for use. If registers, otherwise having the same names, from some other bank are in use, you should be careful when using locations whose addresses are less than 20h because it can cause “R” registers to be erased. If bit-variables are not used in the program, program memory locations 20h-2Fh are available for use. If the program contains bit-variables, you should be careful when using these location in order not to change them accidentaly. By default, the data pushed onto stack occupy program memory locations starting from 08h. If the banks 1, 2 or 3 are in use, their contents will be certainly erased. For this reason, it is recommended to set the Stack Pointer value to be greater than 20h or even greater at the beginning of the program. SFRs are used for controlling the microcontroller operation. Each of them has its specific purpose and it should be observed. It means that they cannot be used as general purpose registers even in the event that some of their locations is not occupied. Instruction set, recognized by the microcontroller, contains instructions which can be used for controlling individual bits of registers at program memory location 20h-7Fh. Besides, individual bits of some SFRs (not all of them) can also be directly accessed. Addresses of these registers are divisible by 8. If memory is expanded by adding external RAM or ROM memory chip, ports P0 and P2 are not available for use regardless of how many pins are actually used for memory expansion. The DPTR register is a 16-bit register comprised of registers DPH and DPL which are 8-bit wide each. The DPTR register should be considered like that practically. For example, when pushing it onto the Stack, DPL should be pushed first, then DPH. When used, serial communication is under control of the SCON register. Besides, registers TCON and TMOD should be configured for this purpose as well since the timer T1 is mostly used for boud rate generation. When some of the interrupts is enabled, you should be careful because there is a risk that program starts to perform unexpectedly. When an interrupt request arrives, the microcontroller will execute instruction

in progress, push the address of the first following location onto the stack (in order to know from where to continue) and jump to the specified interrupt routine address. When the routine has been executed, the microcontroller will pop the address from the stack and continue from where it left off. However... The microcontroller saves only the address to continue from after routine execution. What is usually neglected is the fact that the contents of many registers can be changed during routine execution. The program normally procedees with execution considering the changed registers correct if their original vaules haven't been saved, thus causing a total chaos. The worst thing is that this problem can be manifested anytime: at the moment or several days later (depending on the moment an interrupt occurs). Obviously, the only solution is to save the state of all important registers at the beginning of interrupt routine and to update these values before returning to the program. We are actually talking about the following registers: PSW DPTR (DPH, DPL) ACC B Registers R0 - R7 Note: Contents of registers are usually saved by being pushed onto the Stack using the PUSH instruction. However, instructions such as “PUSH R0” cannot be used here because the microcontroller “doesn‟t know” which register is concerned as there are 4 banks with registers haing the same names R0-R7. For this reason, it is necessary to save addresses of these registers instead of their names using the PUSH 00h instruction. When some of the instructions for indirect addressing is used, you should be careful not to use them for accessing SFRs as the microcontroller ignores their addresses and accesses free RAM locations having the same addresses as SFRs. When UART system for serial communication is used, setting bits RI and TI of the SCON register generated the same interrupt. If such an interrupt is generated, it is first necessary to detect interrupt source (byte is sent, received or both). It is important to remember that the microcontroller only sets these bits so that they must be cleared from within the program. Otherwise, the program gets stuck and executes the same interrupt routine over and over again. A list of bit-addressable registers Accumulator (Address: E0)

AC After reset 0 0 0 0 0 0 0 0 C Bit name - - - - - - - Bit address E7 E6 E5 E4 E3 E2 E1 E0 B register (Address: F0)

B

After reset 0 0 0 0 0 0 0 0 Bit name - - - - - - - Bit address F7 F6 F5 F4 F3 F2 F1 F0

Interrupt Priority register (Address: B8) I

P After reset X X 0 0 0 0 0 0 Bit name - - PT2 PS PT1 PX1 PT0 PX0 Bit address BF BE BD BC BB BA B9 B8 Interrupt Enable register (Address: A8)

0 0 0 0 0 I After reset 0 X 0 E Bit name EA - ET2 ES ET1 EX1 ET0 EX0 Bit address AF AE AD AC AB AA A9 A8 Port 0 (Address: 80)

P After reset 1 1 1 1 1 1 1 1 0 Bit name - - - - - - - Bit address 87 86 85 84 83 82 81 80 Port 1 (Address: 90)

P After reset 1 1 1 1 1 1 1 1 1 Bit name - - - - - - - Bit address 97 96 95 94 93 92 91 90 Port 2 (Address: A0)

P After reset 1 1 1 1 1 1 1 1 2 Bit name - - - - - - - Bit address A7 A6 A5 A4 A3 A2 A1 A0 Port 3 (Address: B0)

P After reset 1 1 1 1 1 1 1 1 3 Bit name - - - - - - - Bit address B7 B6 B5 B4 B3 B2 B1 B0 Program Status Word (Address: D0)

0 0 0 0 PS After reset 0 0 0 0 W Bit name CY AC F0 RS1 RS0 OV - P Bit address D7 D6 D5 D4 D3 D2 D1 D0 Serial Port Control register (Address: 98) SCO

N

After reset 0 0 0 0 0 0 0 0 Bit name SM0 SM1 SM2 REN TB8 RB8 TI RI Bit address 9F 9E 9D 9C 9B 9A 99 98

Timer Control register (Address: 88)

0 0 0 0 0 0 0 TCO After reset 0 N Bit name TF1 TR1 TF0 TR0 IF1 IT1 IF0 IT0 Bit address 8F 8E 8D 8C 8B 8A 89 88 Timer/Counter 2 Control register (Address: C8)

0 0 0 0 0 0 0 T2CO After reset 0 N Bit name TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2 CP/RL2 Bit address CF CE CD CC CB CA C9 C8 A list of non bit-addressable registers Auxiliary register (Address: 8E) AUX After reset X X X X X X X 0 R Bit name - - - - - - Intel_Pwd_Exit DISALE Clock register (Address: 8F) CLKRE After reset X X X X X X X 0 G Bit name - - - - - - - X2 Data Pointer 0 High (Address: 83) DP0 After reset 0 0 0 0 0 0 0 0 H Bit name - - - - - - - Data Pointer 0 Low (Address: 82) DP0 After reset 0 0 0 0 0 0 0 0 L Bit name - - - - - - - Data Pointer 1 High Byte (Address: 85) DP1 After reset 0 0 0 0 0 0 0 0 H Bit name - - - - - - - -

Data Pointer 1 Low Byte (Address: 84) DP1 After reset 0 0 0 0 0 0 0 0 L Bit name - - - - - - - EEPROM Control (Address: 96) EECO After reset X X 0 0 0 0 1 1 N Bit name - - EELD EEMWE EEMEN DPS RDY/BSY WRTINH Interrupt Priority High Byte (Address: B7) IP After reset X X 0 0 0 0 1 1 H Bit name - - PT2H PSH PT1H PX1H PT0H PX0H Power Control (Address: 87) PCO After reset 0 XXX0 0 0 0 N Bit name SMOD - - - GF1 GF0 PD IDL Slave Address (Address: A9) SADD After reset 0 0 0 0 0 0 0 0 R Bit name - - - - - - - Slave Address Enable (Address: B9) SADE After reset 0 0 0 0 0 0 0 0 N Bit name - - - - - - - Serial buffer (Address: 99) SBU After reset X X X X X X X X F Bit name - - - - - - - Stack Pointer (Address: 81) S After reset 0 0 0 0 0 1 1 1 P Bit name - - - - - - - SPI Control register (Address: D5)

SPC After reset 0 0 0 0 0 1 0 0 R Bit name SPIE SPE DORD MSTR CPOL CPHA SPR1 SPR0 SPI Data register (Address: 86) SPD After reset - - - - - - - R Bit name - - - - - - - SPI Status register (Address: AA) SPS After reset 0 0 0 ---0 0 R Bit name SPIF WCOL LDEN - - - DISSO ENH Timer 2 Reload Capture High (Address: CB) RCAP2 After reset 0 0 0 0 0 0 0 0 H Bit name - - - - - - - Timer 2 Reload Capture Low (Address: CA) RCAP2 After reset 0 0 0 0 0 0 0 0 L Bit name - - - - - - - Timer 0 Low (Address: 8A) TL After reset 0 0 0 0 0 0 0 0 0 Bit name - - - - - - - Timer 1 Low (Address: 8B) TL After reset 0 0 0 0 0 0 0 0 1 Bit name - - - - - - - Timer 2 Low (Address: CC) TL After reset 0 0 0 0 0 0 0 0 2 Bit name - - - - - - - Timer 0 High Byte (Address: 8C) TH 0 After reset 0 0 0 0 0 0 0 0

Bit name - - - - - - - Timer 1 High Byte (Address: 8D) TH After reset 0 0 0 0 0 0 0 0 1 Bit name - - - - - - - Timer 2 High Byte (Address: CD) TH After reset 0 0 0 0 0 0 0 0 2 Bit name - - - - - - - Timer Mode (Address: 89) TMO After reset 0 0 0 0 0 0 0 0 D Bit name GATE1 C/T1 T1M1 T1M0 GATE0 C/T0 T0M1 T0M0 Timer 2 Mode Control (Address: C9) T2MO After reset X X X X X X 0 0 D Bit name - - - - - - T2OE DCEN Watchdog Timer Control (Address: A7) WDTCO After reset 0 0 0 0 0 0 0 0 N Bit name PS2 PS1 PS0 WDIDLE DISRTO HWDT WSWRST WDTEN Watchdog Timer Reset (Address: A6) WDTCO After reset - - - - - - - N Bit name - - - - - - - Voltage characteristics of the AT89S8253 microcontrollers Symbol

Parameter

VIL

Input Low-voltage

VIL1

Input Low-voltage on EA pin

VIH

Input High-voltage

VIH1

Input High-voltage on pins XTAL1 and RST

VOL

Output High-voltage

Condition

Min.

Max. 0.2Vcc All pins except EA -0.5 V 0.1V 0.2Vcc -0.5 V 0.3V All pins except XTAL1 0.2 Vcc Vcc + and RST + 0.9V 0.5 V Vcc + 0.7 Vcc 0.5 V Iol = 10mA, Vcc = 0.4 V

Output High-voltage when Pull-up resistors are VOH1 enabled (Port P0 in External BUS mode, ports P1,2,3, pins ALE and PSEN)

IIL

Logical 0 input current (ports P1,2,3)

Input leakage current (port P0, pin EA) IILI RRST Reset pull-down resistor I/O pin Capacitance CIO

Power-supply current ICC Power-down mode

4.0V, Ta = 85°C Ioh = -40mA, Ta = 85°C Ioh = -25mA, Ta = 85°C Ioh = -10mA, Ta = 85°C Vin = 0.45V, Vcc = 5.5V, Ta = -40°C 0.45V < Vin < Vcc

2.4 V 0.75 Vcc 0.9 Vcc - 50 μA 50 KΩ

f = 1Mhz, Ta = 25°C Normal mode: f = 12Mhz, Vcc = 5.5V Ta = -40°C Idlle mode f = 12Mhz, Vcc = 5.5V Ta = -40°C Vcc = 5.5V Ta = -40°C Vcc = 4V Ta = -40°C

± 10 μA 150 KΩ 10 pF 25 mA 6.5 mA 100 μA 40 μA

Chapter 5: Assembly Language 5.1 Elements of Assembly Language

Introduction It was time that hardware-oriented to the core made compromise if they wanted to stay “in the game”. Namely, unlike other circuits which only need to be connected to other components and powered in order to be of any use, microcontrollers require to be programmed as well. Fortunately, they still didn't progress so far in their evolution, so that all microcontroller families “understand” only one language - machine language. That's a good thing. The bad one is that, even primitive, this language of zeros and ones can only be understood by microcontrollers and some of the experts working on its development. In order to bridge this gap between machine and humans, the first high-level programming language called Assembly language was created. The main problem of remembering codes recognized as instructions by electronics was solved therefore, but another one, equally complicated to both us and “them”(microcontrollers) arose. This problem was also easily solved by means of the program for a PC called assembler and a simple device called programmer. This program enables the PC to receive commands in the form of abbreviations and convert them unerringly into so called “executable file”. The moment of compiling a program into machine language is crucial as this file, called HEX file, represents a series of binary numbers understandable to microcontrollers only. The program written in assembly language cannot be executed practically unless this file is loaded into the microcontroller memory. This is the moment when the last link in the chain - the programmer - appears on the scene. It is a small device connected to a PC via some of the ports and has a socket for placing chip in.

5.1 Elements of Assembly Language Assembly language is basically like any other language, which means that it has its words, rules and syntax. The basic elements of assembly language are: Labels; Orders;

Directives; and Comments.

Syntax of Assembly language When writing a program in assembly language it is necessary to observe specific rules in order to enable the process of compiling into executable “HEX-code” to run without errors. These compulsory rules are called syntax and there are only several of them: Every program line may consist of a maximum of 255 characters; Every program line to be compiled, must start with a symbol, label, mnemonics or directive; Text following the mark “;” in a program line represents a comment ignored (not compiled) by the assembler; and All the elements of one program line (labels, instructions etc.) must be separated by at least one space character. For the sake of better clearness, a push button TAB on a keyboard is commonly used instead of it, so that it is easy to delimit columns with labels, directives etc. in a program.

Numbers If octal number system, otherwise considered as obsolite, is disregarded, assembly laguage allows numbers to be used in one out of three number systems: Decimal Numbers If not stated otherwise, the assembly language considers all the numbers as decimal. All ten digits are used (0,1,2,3,4,5,6,7,8,9). Since at most 2 bytes are used for saving them in the microcontroller, the largest decimal number that can be written in assembly language is 65535. If it is necessary to specify that some of the numbers is in decimal format, then it has to be followed by the letter “D”. For example 1234D.

Hexadecimal Numbers Hexadecimal numbers are commonly used in programming. There are 16 digits in hexadecimal number system (0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F). The largest hexadecimal number that can be written in assembly language is FFFF. It corresponds to decimal number 65535. In order to distinguish hexadecimal numbers from decimal, they are followed by the letter “h”(either in upper- or lowercase). For example 54h. Binary Numbers Binary numbers are often used when the value of each individual bit of some of the registers is important, since each binary digit represents one bit. There are only two digits in use (0 and 1). The largest binary number written in assembly language is 1111111111111111. In order to distinguish binary numbers from other numbers, they are followed by the letter “b” (either in upper- or lowercase). For example 01100101B. Operators Some of the assembly-used commands use logical and mathematical expessions instead of symbols having specific values. For example: IF (VERSION>1) LCALL Table_2 USING VERSION+1 ENDIF ...

As seen, the assembly language is capable of computing some values and including them in a program code, thus using the following mathematical and logical operations: Name Operation Example Result + Addition 10+5 15 Subtraction 25-17 8 * Multiplication 7*4 28 / Division (with no remainder) 7/4 1 MOD Remainder of division 7 MOD 4 3 SHR Shift register bits to the right 1000B SHR 2 0010B SHL Shift register bits to the left 1010B SHL 2 101000B NOT Negation (first complement of number) NOT 1 1111111111111110B AND Logical AND 1101B AND 0101B 0101B OR Logical OR 1101B OR 0101B 1101B XOR Exclusive OR 1101B XOR 0101B 1000B LOW 8 low significant bits LOW(0AADDH) 0DDH HIGH 8 high significant bits HIGH(0AADDH) 0AAH EQ, = Equal 7 EQ 4 or 7=4 0 (false) NE, Not equal 7 NE 4 or 74 0FFFFH (true) GT, > Greater than 7 GT 4 or 7>4 0FFFFH (true) GE, >= Greater or equal 7 GE 4 or 7>=4 0FFFFH (true) LT, < Less than 7 LT 4 or 7 Load HEX; and Click the 'Write' push button and wait...

That‟s all! The microcontroller is programmed and everything is ready for operation. If you are not satisfied, make some changes in the program and repeat the procedure. Until when? Until you feel satisfied... Development systems

A device which in the testing program phase can simulate any environment is called a development system. Apart from the programmer, the power supply unit and the microcontroller‟s socket, the development system contains elements for input pin activation and output pin monitoring. The simplest version has every pin connected to one push button and one LED as well. A high quality version has LED displays, LCD displays, temperature sensors and all other elements which can be supplied with the target device. These peripherals can be connected to the MCU via miniature jumpers. In this way, the whole program may be tested in practice during its development stage, because the microcontroller doesn't know or care whether its input is activated by a push button or a sensor built in a real device.

7.2 Easy8051A Development System The Easy8051A development system is a high-quality development system used for programming 8051 compatible microcontrollers manufactured by Atmel. In addition to chip programming, this system enables all the parts of the program to be tested as it contains most components which are normally built in real devices. The Easy8051A development system consists of: Sockets for placing microcontrollers in (14, 16, 20 and 40- pin packages) Connector for external power supply (DC 12V) USB programmer Power Supply Selector (external or via USB cable) 8 Mhz Quartz Crystal Oscillator 32 LEDs for output pin state indication 32 push buttons for input pin activation Four 7-segment LED displays in multiplex mode Graphic LCD display Alphanumeric LCD display (4- or 8- bit mode) Connector and driver for serial communication RS232 Digital thermometer DS1820 12- bit A/D converter (MCP3204) 12- bit D/A converter (MCP4921) Reference voltage source 4.096V (MCP1541) Multiple-pin connectors for direct access to I/O ports The following text describes in short some circuits within this development system. It is rather illustration of its features than complete manual. Besides, by learning about this device, one understands that microcontrollers and its tools are intended to everybody, not only to the privileged. Sockets

All microcontrollers manufactured by Atmel appear in a few standard DIP packages. In order to enable their programming using one device, corresponding pins (having the same name) on sockets are connected in parallel. As a result, by being placed in the appropriate socket, each microcontroller is automatically properly connected. Figure on the right shows a microcontroller in 40-pin package and connection of one of its I/O pins (P1.5). As seen, the pin can be connected to an external device (connector PORT1), LED (microswitch SW2), push button or resistor through connectors. In the last two cases, polarity of voltage is selected using on-board jumpers.

Programmer

The purpose of the programmer is to transfer HEX code from PC to appropriate pins and provide regular voltage levels during chip programming as well. For this development system, the programmer is built in it and should be connected to PC via USB cable. When the process of programming is completed, pins

used for it are automatically available for other application.

Development system power supply

There is a connector on the development board enabling commection to external power supply source (AC/DC, 8-16V). Besides, voltage necessary for device operation can also be obtained from PC via USB cable. Jumper J5 is used for power supply selection.

8MHz Oscillator

The EASY8051A development system has built-in oscillator used as a clock signal generator. The frequency of this oscillator is stabilized by 8Hz quartz crystal. Besides, it is also possible to select internal RC oscillator during chip programming,.

LEDs for output pin state indication

Each I/O port pin is connected to one LED which enables visual indication of its logic state. In the event that the presence of directly polarized LEDs and serial resistors is not acceptable in some applications, DIP switch SW2 enables them to be disconnected from the port.

Push buttons for input pin activation

Similar to LEDs, each I/O port pin is connected to one push button on the development board. It enables simple activation of input pins. Jumper J6 is used for selecting voltage polarity (+ or -) brought to pins by pressing appropriate push button.

7-segment LED displays

Being often applied in the industry, four high-performance LED displays set in multiplex mode belong to the development system. Display segments are connected to the port P0 via resistors. Transistor drivers used for activating individual digits are connected to the first four port P1 pins. It enables programs using 7-segment displays to be tested with minimum use of I/O ports. Similar to LEDs, DIP switch SW2 enables transistor drivers to be disconnected from microcontroller pins.

LCD displays

The EASY8051A development system provides connection to eather graphic or alphanumeric LCD display. Both types of displays are connected by being placed into appropriate connector and by switching position of the jumper J8. If displays are not in use, all pins used for their operation are available for other applications. Apart from connectors, there is also a potentiometer for contrast regulation on the board.

Serial communication via RS232

In order to enable programs using serial communication to be tested, the development system has built in standard 9-pin SUB-D connector. The MAX232 is used as a voltage regulator. Similar to other built-in circuits, electronics supporting serial communication can be enabled or disabled by using jumpers J9 and J10.

DS1820 Digital thermometer

Temperature measurement is one of the most common tasks of devices which operate in the industry. For this reason, there is a circuit DS1820 on the EASY8051A development system which measures temperature in the range of -55 to +125oC with accuracy greater than 0.50. Results of measurement are transferred via serial communication to the pins P3.3 or P2.7. Jumper J7 is used for selecting pins for data reception. In the event that no jumper is installed, port pins are available for other applications.

12-bit A/D converter MCP3204

A built-in 12-bit AD Converter MCP3204 has four input channels connected to on-board connectors. Data are interchanged with the microcontroller via SPI serial communication system using pins P1.5, P1.6, P1.7 and P3.5. If A/D converter is not in use, these pins can be used for other applications (DIP switch SW1). In order to check operation, there is a potentiometer on the development board used as a variable voltage source. It can be brought to the converter‟s input pins using one of four jumpers J12. As a special convenience, a reference voltage source MCP1541 (4,096V) is built in. Jumper J11 is used to select whether converter will use this voltage or 5V.

12-bit D/A converter MCP4921

Digital to analog conversion (D/A) is another operation ofen performed by the microcontroller in practice. For this reason, there is a special on-board chip which interchanges data with the microcontroller via SPI communication system. It can also generate analog voltage in 12-bit resolution on its output pin. When it is not in use, all microcontroller pins are available for other applications using DIP switch SW1. Similar to A/D converter, jumper J11 is used for selecting reference voltage.

Connectors for direct access to I/O ports

In order to enable microcontroller ports to be directly connected to additional components, each of them is connected to one on-board connector. Besides, two pins of each connector are connected to power supply voltage while each pin can be connected to + or - polarity of voltage via resistors (pull up or pull down resistors). Presence and connection of these resistors are determined by jumpers. Jumper J3 which controls port P3 is shown in figure on the right.