ANALOG CIRCUITS 18EC42 (Module - 3)

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Analog Circuits [18EC42]

Module -3

Feedback Amplifier: General feedback structure:   Figure

shows the basic structure of a feedback amplifier.

  Figure

shows a signal-flow diagram, where each of the quantities  x can represent either a voltage or a current signal.

  The

basic amplifier is unilateral and has a gain  A  A,, known as the open-loop output  xo is related to the input x input  xi by gain; thus its output x  =     The The feedback  feedback network measures or samples the output signal x signal  xo and provides a feedback signal x f  that is related to x to xo by  by the feedback factor β ,  x  f  =  βx o    The feedback signal  x f   is subtracted is  subtracted from the source signal  x s, which is the input to the complete feedback amplifier,1 to produce the signal  xi, which is

  

the input to the basic amplifier,  x  = x   x   -x   i

 s

 f 

The Closed-Loop Gain: The gain of the feedback amplifier, known as the closed-loop gain or the gaindenoted A , is  , with-feedback and denoted A f   is defined as

 ≡             −−    

We know that

 =

 =  = Rearranging the above expression  +

 

 

 

    =        

1  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]

            ≡     1+

We get

 =

 =

+

 

 

The quantity Aβ quantity Aβ is called the loop gain.

Properties of negative feedback: 1.  Desensitize the gain: that is, make the value of the gain less sensitive to variations in the values of circuit components, such as might be caused  by changes in temperature. 2.  Reduce nonlinear distortion: that is, make the output proportional to the input (in other words, make the gain constant, independent of signal level). 3.  Reduce the effect of noise: that is, minimize the contribution to the output of unwanted electric signals generated, either by the circuit components themselves or by extraneous interference. 4.  Control the input and output resistances: that is, raise or lower the input and output resistances by the selection of an appropriate feedback topology. 5.  Extend the bandwidth of the amplifier.

The Four Basic Feedback Topologies: Based on the quantity to be amplified (voltage or current) and on the desired form of output (voltage or current), amplifiers can be classified into four categories. 1.  Voltage Amplifiers 2.  Current Amplifiers 3.  Transconductance Amplifiers 4.  Transresistance Amplifiers 1.  Voltage Amplifiers:    Voltage amplifiers are intended to amplify an input voltage signal and  provide an output voltage signal.   The voltage amplifier is essentially a voltage-controlled voltage- controlled voltage source.   The input resistance is required to be high, and the output resistance is required to be low.   The most suitable feedback topology for the voltage amplifier is the voltagemixing, voltage-sampling one shown in Fig.

2  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]   Because

of the series connection at the input and the parallel or shunt connection at the output, this feedback topology is also known as series –  shunt feedback .

Fig: Block diagram of a feedback voltage amplifier. 2.  Current Amplifiers:    The input signal in a current amplifier is essentially a current, the output quantity of interest is current; hence the feedback network should sample should  sample the output current.   The feedback signal should be in current form so that it may be mixed in  shunt with the source current.   Thus the feedback topology most suitable for a current amplifier is the current- mixing, current-sampling topology illustrated in Fig.   Because of the parallel (or shunt) connection at the input, and the series connection at the output, this feedback topology is also known as shunt –  series feedback .

Fig: Block diagram of a feedback current amplifier. 3  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] 3.  Transconductan Transconductance ce Amplifiers:    In transconductance amplifiers the input signal is a voltage and the output signal is a current.   It follows that the appropriate feedback topology is the voltage-mixing , current-sampling topology, illustrated in Fig.   The presence of the series connection at both the input and the output gives series feedback . this feedback topology the alternative name series – series

Fig: Block diagram of a feedback transconductance amplifier. 4.  Transresistance Amplifiers:    In transresistance amplifiers the input signal is current and the output signal is voltage.   It follows that the appropriate feedback topology is of the current-mixing, voltage sampling type, shown in Fig.   The presence of the parallel (or shunt) connection at both the input and the output makes this feedback topology also known as shunt – shunt shunt feedback.

Fig: Block diagram of a feedback transresistance amplifier.

The Series – Shunt Shunt Feedback Amplifier (The Voltage Amplifier): 4  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]

Fig: Ideal structure of the series – shunt shunt feedback amplifier   The

ideal structure of the series – shunt shunt feedback amplifier is shown in Fig.   It consists of a unilateral open-loop amplifier (the A (the A circuit) and an ideal voltage-sampling, voltage-mixing voltage-mixing feedback network (the β circuit). circuit).     The The A  A circuit has an input resistance R resistance Ri, an open-circuit voltage gain A gain A,, and an output resistance R resistance Ro.   It is assumed that the source and load resistances have been absorbed inside the A the  A circuit.   The β circuit does not load the A the A circuit; that is, connecting the β circuit does

  ≡   ≡     

  ). not change the value of A of A (defined as circuit of Fig. (a) Exactly follows the ideal feedback model. Therefore the closed-loop voltage gain A gain A f  is given by

  The

 =

  + To determine Input resistance (R iif f ) and Output Resistance (R oof f ):   The equivalent circuit model of the series – shunt shunt feedback amplifier is shown in Fig.

5  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]

Fig: Equivalent circuit of the series – shunt shunt feedback amplifier.   Observe that is the open-circuit voltage gain of the feedback amplifier,  is its input resistance, and  is its output resistance.



Expressions for

   



 :

We know that

Af 

   = 1 +   ≡        = 1 +   ×  

   ∴       ∴   ∴     

We know that

    =

 

Substituting Vo in above equation gives:

 

 

 =

 =

 =

 ×

1+

1+

1+

 

 

 

              ≡ 

Thus the input current  becomes

 =

Since as 



 =

 is the current drawn from

1+

  =

1+

 

, the input resistance  

6  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 can be expressed

 

Analog Circuits [18EC42]

 ≡                          =

 =

Thus

 

1+

 =

 =

+

 

 

Thus, as expected, the series-mixing feedback results in an increase in the amplifier input resistance by a factor equal to the amount of feedback, +   , a highly desirable property for a voltage amplifier. 



  

: Expressions for   To determine the output resistance  of the feedback amplifier in Fig (a), we set   = 0  and apply a test voltage  between the output terminals, as shown in Fig.

 

Fig: Determining the output resistance of the Series-Shunt Seri es-Shunt feedback amplifier   If

 is output resistance    is  the   ≡    Applying KVL to the output loop, we get the following equations  −   −  = 0  ∴  =  −  From the input loop we get  = −    the current drawn from

 =

WKT

Thus

 

 Since



 =

 

 

    =   

7  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]

Substituting

   in

 −   − −   =

 

 equation we get

 =

 

 +      1+     =     =

Substituting

   in

 

 ≡           =

=

1+



 =

∴

1+

 

 

+

   

Thus, as expected, the shunt sampling (or voltage sampling) at the output results in a decrease in the amplifier output resistance by a factor equal to the amount of negative feedback, + , a highly desirable property for a voltage amplifier.

  

The Series – Series Series Feedback Amplifier (The Transconductan Transconductance ce Amplifier):

Fig: The ideal structure of the series – series series feedback amplifier 8  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]   The

ideal structure of the series – series series feedback amplifier is shown in Fig.   The series – series series feedback topology stabilizes  and is therefore best suited for transconductance amplifiers.   Figure shows the ideal structure for the series – series series feedback amplifier.   It consists of a unilateral open-loop amplifier (the A (the A circuit) and an ideal feedback network.

 

 

The A The  A circuit inputresistance resistance R.i , a short-circuit transconductance resistance R  andhas an an output

  ≡   



  

The  circuit samples the short-circuit output current  and provides a feedback voltage   =  that is subtracted from  in the series input loop.  circuit presents zero resistance to the output loop, and thus does not   The load the amplifier output.    Since the structure of series – series series feedback amplifier follows the ideal feedback structure of feedback amplifier, we can obtain the closed-loop gain  as

 

  

  

        ≡     =

1+

 

To determine Input resistance (R iif f ) and Output Resistance (R oof f ): The equivalent circuit model of the series – series series feedback amplifier is shown in Fig.

series feedback amplifier Fig: equivalent circuit of the series – series  

  

 Is the short-circuit transconductance.

Expressions for

 :  

9  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]

≡                ∴      ∴    ∴     We know that

Af 

 =

 =

 

1+

 ×

1+

We know that

    =

 

 

Substituting Vo in above equation gives:

 

 

 =

 =

 =

 ×

1+

 

 

1+

1+

 

            ≡      ≡                      

Thus the input current  becomes

 =

Since as 



 =

1+

  =

1+

 

, the input resistance

 is the current drawn from

 can be expressed

 

 =

 =

Thus

1+

 =

 =

  Because

 

+

 

 

of the series mixing, the input resistance with feedback, 

 , will be

larger than the input resistance of the A the A circuit,   , by a factor equal to the amount of feedback, +    = Expressions for

:  

10  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]   To



find the output resistance  of the series – series series feedback amplifier, we reduce  to zero and break the output circuit to apply a test current I , as shown in Fig.





Fig: Equivalent circuit to determine the output resistance Rof resistance  Rof of the series –  series feedback amplifier.

  ≡      −     −             −     − −−             ∴       ≡      

From the output circuit we get

 =

 

From the input loop we get WKT Thus

 =

 Since

 =

 =

 

 =

 

 

 =

Substituting

 in

 

 equation we get

 =

 

 =

 =

 +

 

 =

1+

 

 = 1 +

 

 = 1 +

 

 

11  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] Hence

     = 1 +

  That

 

is, in this case the negative feedback increases the output resistance.

The Shunt – Shunt Shunt Feedback Amplifier (Transresistance Amplifier):

Fig: Ideal structure for the shunt –  shunt feedback amplifier.  – shunt   The

ideal structure of the shunt –   – shunt shunt feedback amplifier is shown in Fig. The shunt –   – shunt shunt feedback topology stabilizes  and is thus best suited for transresistance amplifiers.

 

 

  It

consists of a unilateral open-loop amplifier (the  A circuit) and an ideal feedback network.   The  A circuit has an input resistance , an open-circuit transresistance , and an output resistance .   The  circuit ssamples amples the open-circuit output voltage   and provides a feedback current  that is subtracted from the signal-source current  at the input nodes.   The   circuit presents infinite impedance to the amplifier output and thus does not load the amplifier output.   The feedback signal   =  is provided as an ideal current source, and thus the  circuit does not load the amplifier input.

  ≡   

 

  

 

   





 A is a transresistance, dimensionless quantity.  is a transconductance and thus the loop gain A  is a



12  By: Mahendra Naik, Department of ECE, PESITM Shivamogga



 

Analog Circuits [18EC42]   The

closed-loop gain of shunt –  shunt – shunt shunt feedback amplifier

   ≡      =

1+

  

 as

 

To determine Input resistance (R iif f ) and Output Resistance (R oof f ): The equivalent circuit model of the shunt –   – shunt shunt feedback amplifier is shown in

Fig.

Fig: Equivalent circuit of the shunt –   – shunt shunt feedback amplifier   The

feedback transresistance amplifier can be represented by the equivalent circuit in Fig.    Is the open-circuit transresistance.

  



 : Expressions for shunt feedback amplifier causes   The shunt connection at the input of shunt –   – shunt the feedback current to subtract from  resulting in a reduced current  into the A the  A circuit,    =  

Substituting

   −          −             =

 =



 and rearranging, results in  =      +  =   1+  =  

 =

  1+  = 1 +      Equation indicates that the shunt mixing reduces the input current by the amount of feedback.



  The

input resistance with feedback,

  



   =  I 1 +   ≡     

13  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] Where



 =

  Thus,

  Substituting   in above equation we get     = 1 +  

as expected, the shunt connection at the input lowers the input resistance by a factor equal to the amount of feedback.



: Expressions for Derivation same as series – shunt shunt amplifier

      =

+

 

The Shunt – Series Series Feedback Amplifier (Current Amplifier):

Fig: Ideal structure for the shunt –  series feedback amplifier.  – series   Figure shows the ideal structure for the shunt –   – series series feedback amplifier.   It

consists of a unilateral open-loop amplifier (the  A circuit) and an ideal feedback network.

  The  A

circuit has an input resistance





, a short-circuit current gain

 

 =

 , 

and an output resistance .   The circuit samples the short-circuit output current  and provides a feedback current that is subtracted from the signal-source current  at the input node.   The feedback signal   =  is provided as an ideal current source, and thus the  circuit does not load the amplifier input.   the closed-loop current gain of shunt –   – series series feedback amplifier is



  

   ≡    = 1 +   

14  By: Mahendra Naik, Department of ECE, PESITM Shivamogga





 

Analog Circuits [18EC42] To determine Input resistance (R iif f ) and Output Resistance (R oof f ): The equivalent circuit model of the shunt –   – series series feedback amplifier is shown in Fig.

Fig: Equivalent circuit of the shunt –   – series series feedback amplifier Expressions for



 :

           =

Expressions for



:

1+

 = 1 +

 

 

For Derivation refer previous topologies

15  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]

OUTPUT STAGES AND POWER AMPLIFIERS: Classification of Output Stages:   Output stages are classified according to the collector current waveform that  

results when an input signal is applied.    Class A Stage They 1. are The 2.  The Class B Stage 3.  The Class AB Stage 4.  The Class C Amplifier Stage

The Class A Stage:   The class A stage, whose associated waveform is shown in Fig.   It is biased at a current  greater than the amplitude of the signal current,   The transistor in a class A stage conducts for the entire cycle of the input signal; that is, the conduction angle is 360°.



The Class B Stage:   The class B stage, whose associated waveform is shown in Fig.   It is biased at zero dc current.   Thus a transistor in a class B stage

conducts for only half the cycle of the input sine wave, resulting in a conduction angle of 180°.

16  By: Mahendra Naik, Department of ECE, PESITM Shivamogga



.

 

Analog Circuits [18EC42] The Class AB Stage:   The class AB stage, whose associated waveform is shown in Fig.   An intermediate class between A and B, appropriately named class AB, involves biasing the transistor at a nonzero dc current much smaller than the  peak current of the sine-wave signal.   the transistor conducts for an interval slightly greater than half a cycle, as

illustrated in Fig. resulting conduction angle is greater than 180° but much less than 360°.

  The

The Class C Amplifier Stage   Figure shows the collector-current waveform for a transistor operated as a class C amplifier.   The transistor conducts for an interval shorter than that of a halfcycle; that is, the conduction angle is less than 180°.   The result is the periodically pulsating current waveform shown.   To obtain a sinusoidal output voltage, this current is passed through a  parallel LC  parallel  LC circuit, tuned to the frequency of the input sinusoid. 

17  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] CLASS A OUTPUT STAGE:   The transistor in a class A stage conducts for the entire cycle of the input

signal; that is, the conduction angle is 360°.   Transfer characteristic of class an output stage:  

Figure shows an emitter Q1 biased with a constant current I current I supplied by transistor Q2follower .

In the above circuit:

  

 = +     The bias current I current I must be greater than the largest negative load current; otherwise, Q1 cuts off and class A operation will no longer be maintained.   The transfer characteristic of the emitter follower of above Fig. is described  by

  = 

   −    Where   depends on the emitter current   and thus on the load current   If.we neglect the relatively small changes in  , the linear transfer curve  shown in waveform results. 1

 

1

1

1

  The

thus

positive limit of the linear region is determined by the saturation of Q1;

  −  

 =   1   In the negative direction, depending on the values of I of I and and RL  RL,, the limit of the linear region is determined either by Q1 turning off,    = OR    −

18  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]   By

saturating Q2 we get

 −  

   =  + 2   The absolutely lowest (most negative) output voltage is that given g iven by above Eq. and is achieved provided the bias current I current  I is greater than the magnitude of the corresponding load current,  + 2  

      ≥ − 

Signal Waveforms: Consider the operation of the emitter-follower circuit of below Fig

19  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]   For

a sine-wave input Neglecting V CE  CE sat, sat, Selecting the proper bias current  I, The output voltage can swing from −VCC − VCC to +VCC + VCC with the quiescent value  being zero is as shown in Fig. (a).

  Figure

  Now,

(b) shows the corresponding waveform of



1=

V CC  CC  −



.

assuming that the bias current  I is selected to allow a maximum negative load current of , that is

      =

 

  The

collector current of Q1 will have the waveform shown in Fig. (c).

  Fig.

(d) shows the waveform of the instantaneous power dissipation in Q1, 1 1 1 

 ≡  

20  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] Power Dissipation:   Below waveform indicates that the maximum instantaneous power dissipation in Q1 is

   =

 

  This

power dissipation is equal to the power dissipation in Q1 with no input signal applied, that is, the quiescent power dissipation.   The emitter-follower transistor dissipates the largest amount of power when  

= 0.  The power dissipation in Q  depends on the value of R of R .     When    = ∞( output open circuit):  =  I is constant and the instantaneous power dissipation in   In this case, i  = I 1



 L

C 1

Q1 will depend on the instantaneous value of vO.   The maximum power dissipation will occur when vO  = −V CC  CC , for in this case vCE 1 is a maximum of 2V  2V CC  CC I . CC  and P D 1 = 2V CC    With an open-circuit load, the average power dissipation in Q1 is V CC   I . CC    When   = 0 ( output short circuit):   With an output short circuit, a positive input voltage would theoretically result in an infinite load current. 









 

A very large current may flow through Q1, and if inthe short-circuit condition persists; the resulting large power dissipation Q1 can raise its  junction temperature beyond the specified maximum, causing Q1 to burn up.   To guard against such a situation, outputs stages are usually equipped with short-circuit protection.   The power dissipation in Q2 also must be taken into account in designing an emitter follower output stage.   Since Q2 conducts a constant current I  current  I , and the maximum value of vCE 2 is 2V CC  CC , the maximum instantaneous power dissipation in Q2 is PD2=V CC  CC  I .    A significant quantity for design purposes is the average power dissipation in Q2, which is V CC   I . CC  I  





21  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] Power-Conversion Power-Conversi on Efficiency: The power-conversion efficiency of an output stage is defined as

≡   For



  Load power



Supply power

 

the emitter follower circuit, assuming that the output o utput voltage is a

 , the average load power will be    1  2         =    = 2   

sinusoid with the peak value

2

  Since

2

the current in Q2 is constant ( I ), ), the power drawn from the negative

supply is V CC   I . CC    The

average current in Q1 is equal to I  to I , and thus the average power drawn

from the positive supply is V CC   I . CC   

Thus the total average supply power is   = + +  = 2

  −       ∴       ≤    ≤         

  Substituting

 and

 in  we get

1 2    = 2

  Rearranging

 =

2

1 4

 

 

1

 

 

4

, maximum efficiency is obtained when

 =

  The

2

the above equation we get

 =

  Since

 

 =

maximum efficiency attainable is  =

 

 1

4

= 25%. 

22  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] TRANSFORMER-COUPLED POWER AMPLIFIERS:   In

the previous section we have seen transformer-less Class-A power amplifiers.   Transformer-less power amplifier is also known as RC  – coupled coupled power amplifiers.   The efficiency of RC-coupled Class-A power amplifier is very less, i.e 25%.   To improve the efficiency we prefer transformer coupled amplifiers. TRANSFORMER-COUPLED CLASS-A POWER AMPLIFIERS:

(a)

(b)

  The

schematic diagram of a transformer-coupled class A power amplifier is as shown in the figure (a).

  In this amplifier a   By adjusting turn

transformer is used to couple ac power to the load. ratio of the primary windings to the secondary windings, one can match the source and load impedance for a maximum power transfer.   This makes transformer coupled power amplifiers more efficient as compared to RC-coupled power amplifiers, as maximum power transfer can take place.   The impedance matching of the transformer can be

     1

1

=

2

2

Where

1

2

,

1

2

, and

1

2

 

 

1

2

=

2

 

1

  are the number of turns, voltages, and

currents respectively, in the primary (secondary) coil of the transformer.

        

23  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]

∴     ′ 2

1

2

1

=

 

   and  represents the Since   represents the effective load resistance   output load resistance  , then    =  ′   used to bias the transistor for class A   The resistor R    and R    are 1

1

2

2

1

2

2

2

1

2



1

2

operation.   The dc and ac load lines for the amplifier are shown in the figure (b).   The dc load line is vertical to VCC, with infinite slope.   The ac load line is -(1/R aacc), where R aacc is the ac resistance of the primary windings.   The intersection of dc and ac load lines gives the operating point of the amplifiers.   Due to counter- emf effect of the transformer, the output signal will swing from 0v to 2VCC as shown in fig (b). Efficiency (η) (η) of  of transformer-coupled class-A power amplifier: a mplifier:

η

 =

ac power delivered to the load Pac     = Pdc dc power supplied

        

Pdc   = Pac   =

 

 =

  2 2

From the load line graph, the peak values of output voltage and current are equal to   =VCC and   =ICQ , respectively.

 ∴η

 =

Hence

Pac Pdc

=

              η VCC

2 × ICQ

 =

Pac

Pdc

 

2

× 100 =

= 50% 

24  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

1 2

   

 × 100  100 

 

Analog Circuits [18EC42] CLASS B OUTPUT STAGE:   Figure

shows a class B output stage.   It consists of a complementary pair of transistors (an npn and a  pnp  pnp)) connected in such a way that both cannot conduct simultaneously.

Circuit Operation:    When the input voltage v I  is zero:   Both transistors are cut off and the output voltage vO is zero.   As v I  goes positive and exceeds about 0.5 V:   Q N  conducts and operates as an emitter follower.   In this case vO  follows v I (i.e., vO  = v I   −  v BEN ) and Q N   supplies the load current.   Meanwhile, the emitter  –   base junction of Q P  will be reverse-biased by the V  BE  of Q N , which is approximately 0.7V. 









Thus Q P  will be cut off. negative by more than about 0.5 V:   Q P  turns on and acts as an emitter follower.   Again vO  follows v I   (i.e., vO  = v I   + v EBP ), but in this case Q P   supplies the load current and Q N  will be cut off.   The circuit operates in a push – pull pull fashion: Q N  pushes (sources) current into the load when v I  is positive, and Q P  pulls (sinks) current from the load when v I  is negative.

  v I  goes   As 



25  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] Transfer Characteristic:   A sketch of the transfer characteristic of the class B stage is shown in Fig.   Note that there exists a range of v I   centered around zero where both transistors are cut off and vO is zero.

Crossover distortion:

  The

dead band where both transistors are cut off   vO is zero  results in the crossover distortion illustrated in Fig. for the case of an input sine wave.   The effect of crossover distortion will be most pronounced when the amplitude of the input signal is small.   Crossover distortion in audio power amplifiers gives rise to unpleasant sounds. 26  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] POWER-CONVERSION EFFICIENCY: The power-conversion efficiency of an output stage is defined as

≡



  Load power

  Supply power   To calculate the power-conversion power-conversion efficiency, η, of the class B stage, we neglect the crossover distortion and consider the case of an output sinusoid of peak amplitude .   The average load power will be





               2

 =

  The

2

  =

1

2

2

 

current drawn from each supply will consist of half-sine waves of peak

 

amplitude   Thus

.

the average current drawn from each of the two power supplies will be



.

  It

follows that the average power drawn from each of the two power supplies will be the same, 1  =  =   +

  the

   −        −                       −  ≅               

total supply power will be

 =

  Substituting

 and

 =

 

 in  we get

 =

  The

++

2

1 2

2

2

=

4

 

maximum efficiency is obtained when  is at its maximum.   This maximum  is limited by the saturation of Q N  and Q P  to  =     At this value of peak output voltage, the power-conversion efficiency is

  =  = 78.5%  4   The maximum average power available from a class B output stage is obtained by substituting  =  =     Substituting in  we get 2 1  =   2 27  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] Power Dissipation:

 

  The

quiescent power   = 0 dissipation of the class B stage is zero.   When an input signal is applied, the average average power  power dissipated in the class B stage is given by

 = 

 

  for−   =   results in   we get   Substituting for    =     and     1 2   =    − 2     2

2

 1

2

2

  From

symmetry we see that half of P  of  P  D  is dissipated in Q N   and the other half

in Q P .   Thus

Q N  and  Q P  must be capable of safely dissipating



  Since

1 2



watts.

 P  D  depends on  we must find the worst-case power dissipation, .  Eq. with respect to  and equating the derivative to zero   Differentiating  that results in maximum average power dissipation as gives the value of



We get

         −        −        −        ∴       

 

  = 0 

2

1 2

2

 

= 0 

2

2

1 2

1  × 2 × 2

2

 =

2

 = 0 

 = 0 

 

When maximum average power

 =

Substituting

 =

 2

 in

2

 

 we get

28  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]



 =

  

2

2

2

Thus

 

    2

   =    =     At the point of maximum power dissipation, the efficiency can be evaluated        we get  = 50%.   by substituting for    =   into   =   . of P   versus the peak output voltage    Figure shows a sketch of P  2



 2

4



 D

  From



2

π decreases the power dissipated in the class B stage while increasing the load

the above graph we can observe that: Increasing VO beyond  VCC  

 power.

29  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] CLASS AB OUTPUT STAGE:

  Crossover  

distortion can be virtually eliminated by complementary output transistors at a small nonzero current.

biasing

the

The class AB output is shown in the Fig.bases of Q  and Q . bias voltage V  BB is stage applied between  N   P    For v I   = 0, vO  = 0, and a voltage   2   appears across the base – emitter emitter  junction of each of Q N  and Q P .   Assuming matched devices,  2  =  =  =     The value of V  q uiescent current current I   I Q.  BB is selected to yield the required quiescent

  A

       

Circuit Operation:   When v I  goes

positive by a certain amount, the voltage at the base of Q N   increases by the same amount and the output becomes positive at an almost equal value,

   −      =

 +

  2   The positive vO causes a current i L to flow through R through R L, and thus i N  must increase; that is,   =  +     The increase in i N  will be accompanied by a corresponding increase in v BEN   (above the quiescent value of V  BB/2).   However, since the voltage between the two bases remains constant at V   BB, the increase in v BEN  will result in an equal decrease in v EBP  and hence in i P .   The relationship between i N  and i P  can be derived as follows:    +  =

          ln

 +

 ln

 = 2

 ln

30  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

 

Analog Circuits [18EC42]

      −   

 = 2    Thus, as i N   increases, i P   decreases by the same ratio while the product remains constant. Substituting   =  +  in   = 2  we get  = 2   2  = 2  2 2 = 0    From the equations above, we can see that for positive output voltages, the load current is supplied by Q N , which acts as the output emitter follower.   Meanwhile, Q P   will be conducting a current that decreases as vO  increases; for large vO the current in Q P  can be ignored altogether.   For negative input voltages the opposite occurs: The load current will be supplied by Q P , which acts as the output emitter follower, while Q N  conducts a current that gets smaller as v I  becomes  becomes more negative.

   ∴ −−− 

Transfer characteristic of the class AB stage:

  Figure

shows the transfer characteristic of the class AB stage.   For small v I   , both transistors conduct, and as v I   is increased or decreased, one of the two transistors takes over the operation.   Since the transition is a smooth one, crossover distortion will be almost totally eliminated.

31  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42] CLASS C OUTPUT STAGE:   In

the class C amplifier, the transistor is biased such that it remains off for no-signal conditions and operates in the saturation region when an input signal is present.    When the transistor is off, the current through it is very small and hence the

transistor dissipates negligible power. when transistor operates in  saturation   Similarly,

region, the voltage across it is very small, and again the power dissipation is small.    Therefore, in the class C amplifier, as the transistor dissipates less power, its efficiency is higher than that of class A amplifier.    However, drawback of the class C amplifier is, it is highly non-linear and  produces distorted output.    The drawback is overcome by connecting a low-pass filter at the output.   The Class C amplifier:

Fig (a): THE CLASS C AMPLIFIER 

  Fig (b): Input and waveforms at the collector terminal of the class C amplifier 32  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

 

Analog Circuits [18EC42]   The

schematic diagram of class C amplifier is as shown in the figure (a).   The figure (b) shows the input and the waveforms at the collector terminal.   When the input signal is positive and above the cut-in voltage of the transistor, the transistor operates in saturation region. o  During this period, the output voltage is equal to the saturation voltage of the transistor remains constant as long as the input voltage is above the cut-in and voltage.   When the input voltage is less than the cut-in voltage, the transistor remains off, while the induced emf in the inductor provides the collector voltage as shown in the graph.

33  By: Mahendra Naik, Department of ECE, PESITM Shivamogga

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