Adding microMIPS Backend to LLVM Compiler Infrastructure.pdf

21st Telecommunications forum TELFOR 2013

Serbia, Belgrade, November 26-28, 2013.

Adding microMIPS Backend to the LLVM Compiler Infrastructure Jozef Kolek !oran Jo"ano"i# $enad %l&i"i# 'ragan $aran(i#

 Abstract   – This work describes extending of the LLVM Compiler Infrastructure with the new backend support for microMIPS which is an architecture from MIPS famil! of archi archite tect ctur ures es"" #ew back backen end d cons consis ists ts of $%& $%& and and '(&b '(&bit it instru instructi ctions ons out of which which $)* of '(&bit '(&bit instru instructi ctions ons are recoded MIPS'( instructions and $+ of '(&bit instructions are new microMIPS microMIPS instructions" instructions" There There are the ', highl! optimi-ed $%&bit instructions"  Keywords –  Keywords – Compilers LLVM LLVM microMIPS

I) I$*+,'-C*I,$ As the LLVM Compiler Infrastructure ./0 has 1ecome  popular due to its ad"anced design and hand2 set of tools there is a need for more architectures support) MicroMIPS is one of the latest architecture from MIPS famil2 of architectures) MicroMIPS is designed to reduce the code size 3ithout performance losses) Some tests sho3ed that it is possi1le to reduce the code size up to 456 3ith onl2 76 of performance loss .70) *his 3ork descri1es ho3 to add support for microMIPS  1ackend to the LLVM LLVM Compiler Infrastructure) Part II descri1es LLVM in general and also its domain specific lang langua uage ge calle calledd *a1le a1le8e 8en n that that is used used to add add ne3 ne3  1ackends) Part III descri1es microMIPS architecture ho3 it is desi design gned ed and and its its diff differ eren ence cess 3hen 3hen comp compar ared ed to MIPS47 architecture) Part IV sho3s ho3 *a1le8en is used to add ne3 microMIPS 1ackend and mentions other steps that that must must 1e perfo perform rmed ed in orde orderr to get get ne3 ne3 1ack 1acken endd 3orked) II) *9: LLVM C,MPIL:+ I$;+AS*+-C*-+: LLVM Compiler Infrastructure is a set of modular and e repres represent entss optimi optimizer zer 3hich 3hich operates on source code and machine target independent intermediate representation kno3n as LLVM I+) Along 3ith this optimizer comes a code generation support for man2 CP-s) Clang Clang > a C?C@@? C?C@@?,1& ,1&ect ecti"e i"e>C >C front>e front>end nd for LLVM) LLVM) Clang parses the source code and generates the LLVM I+) ,ne of the interesting tool that is 1uilt using this front>end •

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Jozef Kolek +*>+K Computer Based S2stems $o"i Sad $arodnog ;ronta 74a 7/ $o"i Sad Ser1ia e>mail= &ozef)kolekrt>rk)co e>mail= &ozef)kolekrt>rk)com mD !oran Jo"ano"i# +*>+K Computer Based S2stems $o"i Sad  $arodnog ;ronta ;ronta 74a 7/ $o"i $o"i Sad Ser1ia e>mail= zoran)&o"ano"icrt>rk)comDD zoran)&o"ano"icrt>rk)com  $enad  $enad %l&i"i# +*>+K Computer Based S2stems $o"i Sad  $arodnog ;ronta ;ronta 74a 7/ $o"i $o"i Sad Ser1ia e>mail= nenad)sl&i"icrt>rk)comDD nenad)sl&i"icrt>rk)com 'ragan $aran(i# +*>+K Computer Based S2stems $o"i Sad  $arodnog ;ronta ;ronta 74a 7/ $o"i $o"i Sad Ser1ia e>mail= dragan)narancicrt>rk)comDD dragan)narancicrt>rk)com

978-1-4799-1420-3/13/$31.00 ©2013 IEEE

 

as a li1rar2 is Clang Static Anal2zer that automaticall2 finds 1ugs in source code) 'ragonegg > represents integration of 8CC front>ends 3ith LLVM optimizers and code generators) LL'B > LLVMEs nati"e de1ugger) li1c li1c@@ @@ and and li1c li1c@@ @@ AB ABII > impl implem emen enta tati tion on of C@@ C@@ Standard Li1rar2) VMKI* F LLVM 1ased implementations of Ja"a and )$:* Virtual Machines) In addi additi tion on to thes thesee pro& pro&ec ects ts ther theree are are man2 man2 othe otherr official and unofficial su1pro&ects of LLVM that 3ill not  1e mentioned here) •

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;ig) /) LLVM LLVM compiler phases) Ver2 er2 impo import rtan antt part part of the the LLVM LLVM pro& pro&ec ectt is its its Intermediate +epresentation I+D 3hich is programming language and target independent program representation that that is in Single Single Static Static Assign Assignmen mentt SSAD SSAD form) form) *his *his LLVM I+ can 1e represented in three different forms= /D terea reada1 da1le le assem1 assem1l2> l2>lik likee form 7D G1itcodeH form 3hich is a seuence of 1its and 4D in>memor2 data structures .40)  $e1it offset and in legac2 MIPS47 format the2 ha"e />1it offset) *o make summar2 there are four ke2 characteristics related to the microMIPS architecture .70=  $o performance loss 3hen compared to older MIPS47 architectures) A code size reduction up to 456 3ith eui"alent memor2 reduction) Support for eperformance micro>architecture •

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and legac2 MIPS47 support) IV) A''I$8 MIC+,MIPS BACK:$' *, *9: LLVM C,MPIL:+ I$;+AS*+-C*-+: Since microMIPS supports recoded MIPS47 instructions the first step 3as to map microMIPSEs recoded instructions to the eB *he microMIPS47 Instruction Set 'ecem1er 7/ MIPS *echnologies microMIPS AS: -sage June 7/ Qriting an LLVM Backend http=??ll"m)org?docs?QritingAnLLVMBackend)html LLVM *esting Infrastructture 8uide http=??ll"m)org?docs?*esting8uide)html  ,

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;ig) 4) Little endian 12te ordering)

LLVM Compiler Infrastructure http://llvm.org

.70 MIPS *echnologies microMIPS Instruction Set

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