23985042-Philips-q529-1e-Lc

Colour Television

Chassis

Q529.1E LC

ESSENCE

I_18020_000.eps 110908

Contents

Page

1. Technical Specifications, Connections, and Chassis Overview 2 2. Safety Instructions, Warnings, and Notes 7 3. Directions for Use 8 4. Mechanical Instructions 9 5. Service Modes, Error Codes, and Fault Finding 24 6. Block Diagrams, Test Point Overview, and Waveforms Wiring Diagram Essence 57 Block Diagram Video 58 Block Diagram Audio 59 Block Diagram Control & Clock Signals 60 Test Point Overview SSB 61-66 I2C IC Overview 67 Supply Lines Overview 68 7. Circuit Diagrams and PWB Layouts Drawing SSB (B01-B09) 69-116 SSB: SRP List Explanation 117 SSB: SRP List Part 1 118 SSB: SRP List Part 2 119 I/O Panel (G) 130 IR & LED Panel (ME TOP) (J) 132 LVDS2DP Panel: Connector & Supply (LD1) 134 LVDS2DP Panel: FPGA: I/O Banks (LD2) 135 LVDS2DP Panel: Genesis (LD3) 136 LVDS2DP Panel: Fan Control (LD4) 137 LVDS2DP Panel: FPGA: Control (LD5) 138 LVDS2DP: SRP List 139 Monitor Panel: DC/DC (M01A) 142 Monitor Panel: DC/DC (M01B) 143 Monitor Panel: Audio (M02A) 144 Monitor Panel: Audio (M02B) 145 Monitor Panel: DP-Rx (M03A) 146 Monitor Panel: DP-Receiver & Power (M03B) 147

Contents

8. 9. 10. 11.

Page

Monitor Panel: DP-Rx (M03C) 148 Monitor Panel: DP-Rx (M03D) 149 Monitor: SRP List 150 Alignments 153 Circuit Descriptions, Abbreviation List, and IC Data Sheets 170 Spare Parts List & CTN Overview 185 Revision List 185

151-152 151-152

PWB 120-129

131 133 140-141 140-141 140-141 140-141 140-141 151-152 151-152 151-152 151-152 151-152 151-152

© Copyright 2008 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

Published by EL 0872 BU TV Consumer Care

Printed in the Netherlands

Subject to modification

EN 3122 785 18022

EN 2

1.

Technical Specifications, Connections, and Chassis Overview

Q529.1E LC

1. Technical Specifications, Connections, and Chassis Overview 1.1.4

Index of this chapter: 1.1 Technical Specifications 1.2 Connections 1.3 Chassis Overview

Power supply: - Mains voltage (VAC) - Mains frequency (Hz)

Notes: • Figures can deviate due to the different set executions. • Specifications are indicative (subject to change).

1.1

Technical Specifications

1.1.1

Vision Display type Screen size Resolution (H × V pixels) Min. light output (cd/m2) Min. contrast ratio Max. response time (ms) Viewing angle (H × V degrees) Tuning system TV Colour systems

Video playback Tuner bands Supported video formats - 60 Hz - 60 Hz - 50 Hz - 50 Hz - 50, 60 Hz - 50, 60 Hz - 24, 25, 30, 50, 60 Hz Supported computer formats: - 60 Hz - 60 Hz - 60 Hz - 60 Hz - 60 Hz - 60 Hz - 60 Hz Presets/channels Tuner bands

1.1.2

Maximum power (WRMS) 1.1.3

: : : : : : : : : : : : : : :

LCD 42" (107 cm), 16:9 1920 × 1080 500 66000 : 1 2 176 × 176 PLL PAL B/G, D/K, I SECAM B/G, D/K, L/L’ DVB-T DVB-C (optional) MPEG4 (optional) NTSC, PAL, SECAM UHF, VHF, S, Hyper

: : : : : : :

480i 480p 576i 576p 720p 1080i 1080p

: : : : : : : :

640 × 480 800 × 600 1024 × 768 1280 × 768 1360 × 768 1920 × 1080i 1920 × 1080p automatic channel management VHF UHF S-band Hyper-band

: : : :

: Virtual Dolby Digital : BBE : 2 × 15

Multimedia Supported formats

USB input Network

Ambient conditions: - Temperature range (°C)

: 220 - 240 ±10% : 50 / 60

: +5 to +35 : 90% R.H.

Power consumption (values are indicative) - Normal operation (W) : ≈248 - Standby (W) : < 0.40

Sound Sound systems

Miscellaneous

: : : : : : : :

Slideshow.alb files MPEG1 MPEG2 MP3 JPEG USB1.1 (12 Mbps) USB2.0 (480 Mbps) DLNA PC Network link

Hub dimensions (W × H × D in mm) Hub weight (kg)

: 320 × 84 × 320 : 4.7

Screen dimensions (W × H × D in mm)

: 982 × 662.5 × 49.8

Screen weight (kg)

: 16.5

Technical Specifications, Connections, and Chassis Overview 1.2

Q529.1E LC

1.

EN 3

Connections

Back connector HUB 1

2

3a

4

10

5

9 8

Back connector TV

1

3b

6

7

Side connector HUB

11

12

13

14

15 16

17

18 I_18020_086.eps 190908

Figure 1-1 Connection overview Note: The following connector colour abbreviations are used (acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow. 1.2.1

Connections 1 - Single cable connectors Dedicated for Essence

16 - Status/FBL 17 18 19 20 21

0 - 0.4 V: INT 1 - 3 V: EXT / 75 ohm Gnd Gnd 1 VPP / 75 ohm 1 VPP / 75 ohm Gnd

- Ground Video - Ground FBL - Video CVBS - Video CVBS/Y - Shield

j H H k j H

3a - EXT 3 VGA: Video RGB - In 2 - EXT1, EXT2: Video YPbPr - In, CVBS - In/Out, Audio - In/ Out

1

5 10

6

15

11

20

2

E_06532_002.eps 171108

Figure 1-3 VGA Connector

21

1

E_06532_001.eps 050404

Figure 1-2 SCART connector 1 2 3 4 5 6 7 8

- Audio R - Audio R - Audio L - Ground Audio - Ground Blue - Audio L - Video Pb - Function Select

9 10 11 12 13 14 15

- Ground - n.c. - Video Y - n.c. - Ground - Ground - Video Pr

0.5 VRMS / 1 kohm 0.5 VRMS / 10 kohm 0.5 VRMS / 1 kohm Gnd Gnd 0.5 VRMS / 10 kohm 0.7 VPP / 75 ohm 0 - 2 V: INT 4.5 - 7 V: EXT 16:9 9.5 - 12 V: EXT 4:3 Gnd

k j k H H j j

1 VPP / 75 ohm

j

Gnd Gnd 0.7 VPP / 75 ohm

H H j

j H

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

- Video Red - Video Green - Video Blue - n.c. - Ground - Ground Red - Ground Green - Ground Blue - +5VDC - Ground Sync - n.c. - DDC_SDA - H-sync - V-sync - DDC_SCL

0.7 VPP / 75 Ω 0.7 VPP / 75 Ω 0.7 VPP / 75 Ω

j j j

Gnd Gnd Gnd Gnd +5 V Gnd

H H H H j H

DDC data 0-5V 0-5V DDC clock

j j j j

3b - Cinch: Audio - In Rd - Audio R 0.5 VRMS / 10 kΩ Wh - Audio L 0.5 VRMS / 10 kΩ

jq jq

4 - Cinch: Audio - Out Rd - Audio - R 0.5 VRMS / 10 kΩ Wh - Audio - L 0.5 VRMS / 10 kΩ

kq kq

EN 4

1.

Q529.1E LC

Technical Specifications, Connections, and Chassis Overview

5 - Cinch: Video YPbPr - In Gn - Video Y 1 VPP / 75 Ω Bu - Video Pb 0.7 VPP / 75 Ω Rd - Video Pr 0.7 VPP / 75 Ω

17 - RJ45: Ethernet jq jq jq

12345678

7, 11 - HDMI 1, 2, 3 Digital Video, Digital Audio - In 19 18

E_06532_025.eps 210905

1 2

Figure 1-6 Ethernet connector

E_06532_017.eps 250505

Figure 1-4 HDMI (type A) connector 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

- D2+ - Shield - D2- D1+ - Shield - D1- D0+ - Shield - D0- CLK+ - Shield - CLK- Easylink - n.c. - DDC_SCL - DDC_SDA - Ground - +5V - HPD - Ground

Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Control channel

j H j j H j j H j j H j jk

DDC clock DDC data Gnd

j jk H j j H

Hot Plug Detect Gnd

8 - Cinch: S/PDIF - Out Bk - Coaxial 0.4 - 0.6VPP / 75 Ω 9 - Aerial - In - - IEC-type (EU)

Coax, 75 Ω

10 - Service Connector (UART) 1 - Ground Gnd 2 - UART_TX Transmit 3 - UART_RX Receive

kq

D

H k j

12 - Cinch: Audio - In Rd - Audio - R 0.5 VRMS / 10 kΩ Wh - Audio - L 0.5 VRMS / 10 kΩ

jq jq

13 - Headphone (Output) Bk - Headphone 32 - 600 Ω / 10 mW

ot

14 - Cinch: Audio - In Rd - Audio - R 0.5 VRMS / 10 kΩ Wh - Audio - L 0.5 VRMS / 10 kΩ

jq jq

15 - Cinch: Video CVBS - In, Audio - In Ye - Video CVBS 1 VPP / 75 Ω

jq

16 - USB2.0

1

2

3

4

E_06532_022.eps 300904

Figure 1-5 USB (type A) 1 2 3 4

- +5V - Data (-) - Data (+) - Ground

Gnd

k jk jk H

1 2 3 4 5 6 7 8

- TD+ - TD- RD+ - n.c. - n.c. - RD- n.c. - n.c.

Transmit signal Transmit signal Receive signal

k k j

Receive signal

j

18 - Common Interface 68p - See diagram B03H

jk

Technical Specifications, Connections, and Chassis Overview 1.3

E

Q529.1E LC

1.

EN 5

Chassis Overview

KEYBOARD CONTROL PANEL

SMALL SIGNAL BOARD

B

I_18020_087.eps 110908

Figure 1-7 PWB/CBA locations Hub -1-

A

MAIN SUPPLY PANEL

LVDS2DP BOARD

G

LD

I/O PANEL I_18020_088.eps 110908

Figure 1-8 PWB/CBA locations Hub -2-

EN 6

1.

Q529.1E LC

M

MONITOR BOARD

J

IR & LED PANEL

Technical Specifications, Connections, and Chassis Overview

I_18020_089.eps 110908

Figure 1-9 PWB/CBA locations Monitor

Safety Instructions, Warnings, and Notes

Q529.1E LC

2.

EN 7

2. Safety Instructions, Warnings, and Notes •

Index of this chapter: 2.1 Safety Instructions 2.2 Warnings 2.3 Notes

2.1

Safety regulations require the following during a repair: • Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA). • Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: • Route the wire trees correctly and fix them with the mounted cable clamps. • Check the insulation of the Mains/AC Power lead for external damage. • Check the strain relief of the Mains/AC Power cord for proper function. • Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the “on” position (keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ. 4. Switch “off” the set, and remove the wire between the two pins of the Mains/AC Power plug. • Check the cabinet for defects, to prevent touching of any inner parts by the customer.

2.2

•

Safety Instructions

2.3.2

• • • • •

• • •

All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential. Be careful during measurements in the high voltage section. Never replace modules or other components while the unit is switched “on”. When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

2.3

Notes

2.3.1

General •

Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode (see chapter 5) with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ). Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω). All capacitor values are given in micro-farads (μ = × 10-6), nano-farads (n = × 10-9), or pico-farads (p = × 10-12). Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF). An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values. The correct component values are listed in the Spare Parts List. Therefore, always check this list when there is any doubt.

BGA (Ball Grid Array) ICs Introduction For more information on how to handle BGA devices, visit this URL: www.atyourservice.ce.philips.com (needs subscription, not available for all regions). After login, select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs. BGA Temperature Profiles For BGA-ICs, you must use the correct temperature-profile, which is coupled to the 12NC. For an overview of these profiles, visit the website www.atyourservice.ce.philips.com (needs subscription, but is not available for all regions) You will find this and more technical information within the “Magazine”, chapter “Repair downloads”. For additional questions please contact your local repair help desk.

Warnings •

Schematic Notes •

2.3.3

Where necessary, measure the waveforms and voltages with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols. Manufactured under license from Dolby Laboratories. “Dolby”, “Pro Logic” and the “double-D symbol”, are trademarks of Dolby Laboratories.

2.3.4

Lead-free Soldering Due to lead-free technology some rules have to be respected by the workshop during a repair: • Use only lead-free soldering tin Philips SAC305 with order code 0622 149 00106. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle. • Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications. • Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat. • Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to

EN 8

3.

Q529.1E LC

Directions for Use example below it is 2006 week 17). The 6 last digits contain the serial number.

avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin. 2.3.5

Alternative BOM identification

MODEL

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.

PROD.NO: AG 1A0617 000001

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number. Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production center (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in

3. Directions for Use Directions for use can be downloaded from the following websites: http://www.philips.com/support http://www.p4c.philips.com

: 32PF9968/10

MADE IN BELGIUM 220-240V ~ 50/60Hz 128W VHF+S+H+UHF

S

BJ3.0E LA E_06532_024.eps 260308

Figure 2-1 Serial number (example) 2.3.6

Board Level Repair (BLR) or Component Level Repair (CLR) If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

2.3.7

Practical Service Precautions •

•

It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard. Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

Mechanical Instructions

Q529.1E LC

4.

4. Mechanical Instructions Index of this chapter: 4.1 Cable Dressing 4.2 Service Positions 4.3 Assy/Panel Removal Hub 4.4 Assy/Panel Removal Monitor 4.5 Set Re-assembly. Notes: • Figures below can deviate slightly from the actual situation, due to the different set executions.

4.1

Cable Dressing

I_18020_090.eps 110908

Figure 4-1 Cable dressing hub; bottom view

EN 9

EN 10

4.

Q529.1E LC

Mechanical Instructions

I_18020_091.eps 110908

Figure 4-2 Cable dressing hub; bottom view (SSB removed)

Mechanical Instructions

Q529.1E LC

4.

EN 11

I_18020_092.eps 110908

Figure 4-3 Cable dressing monitor

4.2

4.2.1

Service Positions

4.3

Assy/Panel Removal Hub

For easy servicing of the monitor of the set, there are a few possibilities created: • The buffers from the packaging. • Foam bars (created for Service).

4.3.1

Bottom Cover and -Shield

Foam Bars

1

Warning: Disconnect the mains power cord before removing the rear cover. Refer to next figures for details. 1. Place the hub upside-down and remove the bottom cover by removing the screws [1]. 2. Remove the bottom shield by removing the screws [2] indicated with an arrow.

1

1 1 1

1

Required for sets 42"

1

1

E_06532_018.eps 171106

Figure 4-4 Foam bars The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See figure “Foam bars” for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, the screen can be monitored.

1

1

1

1 I_18020_143.eps 081008

Figure 4-5 Bottom Cover and -Shield -1-

EN 12

4.

Mechanical Instructions

Q529.1E LC

2 2 2

2

2

2

2

2

2

2 1 2 I_18020_095.eps 190908

I_18020_093.eps 081008

Figure 4-8 Fan

Figure 4-6 Bottom Cover and -Shield -24.3.2

4.3.4

Key Board Refer to next figure for details. 1. Unplug the key board connector [1] from the IR & LED board. 2. Remove the screws [2]. 3. Lift the unit and take it out of the set. When defective, replace the whole unit.

2

2

Small Signal Board (SSB) Refer to next figures or details. 1. Remove fan. 2. Unplug keyboard cable [1] on SSB. 3. Unplug flat cable [2] on SSB. 4. Unplug two LVDS connectors [3] on SSB. These are very fragile connectors! 5. Lift the flatcable gently with a screwdriver [4] that leads to the underlaying I/O Panel. 6. Remove three screws near side I/O Panel. 7. Remove four screws near back I/O Panel (including the two screws of the VGA connector). 8. Remove all remaining screws that secure the SSB. 9. Slide the SSB sidewards out of the hub.

1

1 I_18020_094.eps 190908

2

Figure 4-7 Keyboard Control Panel 4.3.3

Fan Refer to next figure for details. 1. Unplug connector [1]. 2. Lift the fan from the set. During replacement, ensure you replace it at its original position. When defective, replace the unit.

3 (2x)

I_18020_096.eps 110908

Figure 4-9 Small Signal Board -1-

Mechanical Instructions

Q529.1E LC

4.

EN 13

5 5

4

5

I_18020_097.eps 110908

Figure 4-10 Small Signal Board -24.3.5

5

5

5

5

Subframe underneath SSB Refer to next figures for details. 1. Remove keyboard, fan and SSB. 2. Remove two screws [1] on Additional I/O Panel (near cinch plugs). 3. Remove two screw [2] on Additional I/O Panel (near SCART plug). 4. Remove screw [3]. 5. Unclamp flat cable coming from Power Supply Unit [4]. 6. Take the board out. 7. Remove screws on the subframe indicated with an arrow [5]. 8. Lift the subframe on the right side, then lift the subframe forwards, then take the subframe out of the hub.

I_18020_144.eps 151008

Figure 4-12 Subframe -24.3.6

Additional I/O Panel Refer to section “Subframe underneath SSB”. When defective, replace the whole unit.

4.3.7

Display Port Panel Hub Refer to next figure for details. 1. Remove screws [1]. 2. Unplug the other connectors. 3. Remove all fixation screws. 4. Take the board out.

4

1

1

1

2

3

2 I_18020_119.eps 151008

Figure 4-11 Subframe -1-

1 I_18020_098.eps 151008

Figure 4-13 Display Port Panel Hub

EN 14 4.3.8

4.

Mechanical Instructions

Q529.1E LC

Power Supply Unit Refer to next figure for details. 1. Remove the fixation screws [1]. 2. Lift the board. 3. Unplug the connector to the mains inlet. 4. Unplug the connector from the supply connector to the screen. 5. Take the supply out. When defective, replace the whole unit.

1 1

1

1 1

1

1

2

1 I_18020_102.eps 110908

1

1

1 1

Figure 4-16 IR & LED Panel -1-

1

1

3 4

4

1 1

I_18020_103.eps 110908 I_18020_100.eps 110908

Figure 4-14 Power Supply Unit

4.4

Assy/Panel Removal Monitor

4.4.1

Sound Interface

Figure 4-17 IR & LED Panel -24.4.3

Refer to next figure for details. 1. Remove stand (four screws). 2. Lift set from stand. 3. Remove soundbar. 4. Remove sound interface by removing the screws [1]. When defective, replace the whole module.

Display Port Panel Refer to next figure for details. 1. Unplug connectors [1]. 2. Unplug LVDS connectors [2]. Be careful, as these are very fragile connectors. 3. Remove screws [3] and subframe [4]. 4. Remove screws [5]. When defective, replace the whole unit.

5

5

2

5

2

1 (2x)

1 (2x)

1

1

I_18020_101.eps 110908

3

4

3

Figure 4-15 Sound Interface 4.4.2

I_18020_104.eps 110908

IR & LED Board Refer to next figures for details. 1. Remove lower part of VESA stand [1]. 2. Remove flare [2] (six screws). 3. Unplug connector [3]. 4. Remove screws [4]. When defective, replace the whole unit.

Figure 4-18 Display Port Panel Monitor

Mechanical Instructions 4.4.4

Q529.1E LC

4.

EN 15

Step G. to J. describe which additional actions have to be taken in the event the original LCD Panel has to be replaced.

LCD Panel SPECIAL NOTICE

Additional Spare Parts are needed when remounting the (new) LCD Panel in the cabinet. These spare parts can be ordered as one Service Kit using ordering code 3122 785 91150. The kit contains the following items: • 5 x Foam L × W × T = 20 × 43 × 0.5 mm. • 6 x Foam L × W × T = 70 × 50 × 0.5 mm. • 4 x Foam L × W × T = 30 × 43 × 0.5 mm. • 1 x Foam L × W × T = 55 × 20 × 0.8 mm. • 5 x Cable clamp (wire saddle) 11.2 mm.

The dis-assembly, re-assembly and/or exchange of the LCD Panel is an elaborate process. Reason for this is the mounting method of the Panel in the cabinet. Due to physical restraints, no screws could be used, but instead adhesive foams and -tapes are used. Use gloves where indicated to avoid personal injury and pollution of the LCD Panel (dust and/or fingerprints).

LCD Panel Removal A. Refer to next figure for details. 1. Remove stand. 2. Remove soundbar. 3. Remove backcover. 4. Remove sound interface. 5. Remove flare. 6. Remove stand bracket. 7. Remove leading edge.

Exactly follow the instructions to avoid warranty issues, especially when a defective LCD Panel has to be returned to the supplier. Step A. to F. describe the removal of the LCD Panel of the cabinet. Step K. to N. describe the mounting of the LCD Panel back into the cabinet.

Flare Stand Bracket

Back Cover

Leading Edge Stand

Soundbar

Sound Interface I_18020_105.eps 151008

Figure 4-19 LCD Panel -1-

EN 16

4.

Q529.1E LC

Mechanical Instructions

B. Bend metal lips in each corner of Front open.

I_18020_106.eps 110908

Figure 4-20 LCD Panel -2C. Remove thermal foams (3x) between LCD-panel and upper wall of metal Front. 1. Pull the upper bend open. 2. Move out the thermal foam with e.g. a screwdriver. 3. Pull out the thermal foam.

1

2

3

I_18020_107.eps 180908

Figure 4-21 LCD Panel -3-

Mechanical Instructions

Q529.1E LC

4.

D. Release two side walls of metal Front (use gloves). 1. Place thumb against each upper corner of the metal Front. 2. Place fingers against LCD Panel. 3. Push out LCD Panel in each corner until tape in middle of side wall releases.

2

1

3

I_18020_108.eps 110908

Figure 4-22 LCD Panel -4E. Release bottom wall of metal Front (use gloves). 1. Place hands in top/middle of metal Front and LCD Panel. 2. Pull metal Front and LCD Panel further apart until 2 tapes in bottom wall release. 3. Take out LCD Panel.

1

2

3

I_18020_109.eps 180908

Figure 4-23 LCD Panel -5-

EN 17

EN 18

4.

Q529.1E LC

Mechanical Instructions

F. Removing tapes/foams from LCD Panel (use “Label Off 50”; “Intronics L50/200”). 1. Remove remains of thermal foam on top of LCD Panel. 2. Remove remains of double-sided tapes (4x) on front of LCD Panel. 3. Remove protective foam on bottom of LCD Panel.

1

2

3

I_18020_110.eps 110908

Figure 4-24 LCD Panel -6For re-assembly instructions, proceed with step K.

Mechanical Instructions

Q529.1E LC

4.

LCD Panel Replacement Instructions G to J apply if you have to replace the LCD Panel. G. Remove VESA brackets, PCB connector plate, wiring, and isolator plates.

Vesa Brackets

PCB

Connector Plate Isolator Plates I_18020_111.eps 151008

Figure 4-25 LCD Panel -7H. Remove all remaining tapes/foams/cable clamps. 1. Remove remaining tapes for wiring. 2. Remove cable clamps (five times). 3. Remove all backlight blocking foams. 4. Remove all glue remains with “Label Off 50”.

1

2

3

I_18020_112.eps 120908

Figure 4-26 LCD Panel -8-

EN 19

EN 20

4.

Mechanical Instructions

Q529.1E LC

I. Prepare new LCD Panel. 1. Take new LCD Panel and place two isolator plates. 2. Glue new foams on LCD Panel with the following specifications: - four times foam L × W × T = 20 × 43 × 0.5 mm [A]. - six times foam L × W × T = 70 × 50 × 0.5 mm [B]. - four times foam L × W × T = 30 × 43 × 0.5 mm [C]. 3. Figure [3] show the upper- and lower foams.

1

2 C

C

B

B

B

A

A

A

B

C

B

A

B

C

Isolator Plates 3

C

A

B

B

10±5

10±5 10±5 A B

C

I_18020_113.eps 171008

Figure 4-27 LCD Panel -9J. Assemble VESA brackets, PCB, connector plate, and wiring. 1. Assemble VESA brackets, PCB and connector plate. 2. Assemble cable clamps: - five times cable clamp 11.2 mm. 3. Assemble wiring.

1

Vesa Brackets

2

Connector Plate

PCB

3

I_18020_114.eps 180908

Figure 4-28 LCD Panel -10-

Mechanical Instructions

Q529.1E LC

4.

K. Assemble metal Front and LCD Panel (use gloves). 1. Take a new metal Front and remove liners of double-sided tapes (four times). 2. Insert LCD Panel as shown in picture: first top side, then cantilever down. 3. Bend down metal lips in each corner (4 times).

22

1

1 2

33

I_18020_115.eps 171008

Figure 4-29 LCD Panel -11L. Assemble Leading Edge. 1. Assemble Leading Edge on Front. 2. Glue protective foam across edge of metal Front and LCD Panel with the following specifications: 1 time foam L × W × T = 55 × 20 × 0.8 mm [A]. 3. Glue light-blocking foam upon LED-PCB with the following specifications: 1 time foam L × W × T = 20 × 43 × 0.5 mm [B].

2

1

A 3

B I_18020_116.eps 180908

Figure 4-30 LCD Panel -12-

EN 21

EN 22

4.

Mechanical Instructions

Q529.1E LC

M. Assemble Flare. 1. Place flare upon LCD Panel as shown in picture: first on top side. 2. Cantilever flare down while pulling it slightly open (to avoid scratches from metal Front). 3. Fix flare on Panel (six screws).

2

1 1 1

33

I_18020_117.eps 171008

Figure 4-31 LCD Panel -13N. Assemble Stand Bracket, Sound Interface, Back Cover, Soundbar and Stand. 1. Remove protective foils on both sides of Flare.

Back Cover

Stand

Stand Bracket

Soundbar Sound Interface I_18020_118.eps 180908

Figure 4-32 LCD Panel -14-

Mechanical Instructions 4.5

Set Re-assembly To re-assemble the whole set, execute all processes in reverse order, except for the Monitor. To re-assembly the Monitor, follow the instructions in the applicable section of this Manual. Notes: • While re-assembling, make sure that all cables are placed and connected in their original position. See figure “Cable dressing”. • Pay special attention not to damage the EMC foams on the SSB shields. Ensure that EMC foams are mounted correctly.

Q529.1E LC

4.

EN 23

EN 24

5.

Q529.1E LC

Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding –

Index of this chapter: 5.1 Test Points 5.2 Service Modes 5.3 Stepwise Start-up 5.4 Service Tools 5.5 Error Codes 5.6 The Blinking LED Procedure 5.7 Protections 5.8 Fault Finding and Repair Tips 5.9 Software Upgrading

5.1

Skip/blank of non-favourite pre-sets.

How to Activate SDM For this chassis there are two kinds of SDM: an analog SDM and a digital SDM. Tuning will happen according table “SDM Default Settings”. • Analog SDM: use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” button again. • Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” button again. • Analog SDM can also be activated by connecting for a moment the solder pad (see figure “Service mode pads”) on the SSB with the indication “SDM” [1], to GND.

Test Points As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective. Perform measurements under the following conditions: • Service Default Mode. • Video: Colour bar signal. • Audio: 3 kHz left, 1 kHz right.

5.2

Service Modes

1 2 SDM SPI-P

Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.

SDM

1

This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section “5.4.1 ComPair”). 5.2.1

Service Default Mode (SDM)

I_18020_146.eps 190908

Purpose • To create a pre-defined setting, to get the same measurement results as given in this manual. • To override SW protections detected by stand-by processor and make the TV start up to the step just before protection (a sort of automatic stepwise start up). See section “5.3 Stepwise Start-up”. • To start the blinking LED procedure where only layer 2 errors are displayed. (see also section “5.5 Error Codes”)

Figure 5-1 Service mode pads After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available). How to Navigate When the “MENU” button is pressed on the RC transmitter, the set will toggle between the SDM and the normal user menu (with the SDM mode still active in the background).

Specifications How to Exit SDM Use one of the following methods: • Switch the set to STAND-BY via the RC-transmitter. • Via a standard customer RC-transmitter: key in “00”sequence.

Table 5-1 SDM default settings

Freq. (MHz)

Default system

Europe, AP(PAL/Multi)

475.25

PAL B/G

Europe, AP DVB-T

DVB-T 546.00 PID Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07

Region

• • •

All picture settings at 50% (brightness, colour, contrast). All sound settings at 50%, except volume at 25%. All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer. – Child/parental lock. – Picture mute (blue mute or black mute). – Automatic volume levelling (AVL).

5.2.2

Service Alignment Mode (SAM) Purpose • To perform (software) alignments. • To change option settings. • To easily identify the used software version. • To view operation hours. • To display (or clear) the error code buffer. How to Activate SAM Via a standard RC transmitter: key in the code “062596” directly followed by the “INFO” button. After activating SAM

Service Modes, Error Codes, and Fault Finding

Q529.1E LC

5.

EN 25

with this method a service warning will appear on the screen, continue by pressing the red button on the RC.

Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to chapter 8 “Alignments” for details. To adapt this option, it’s advised to use ComPair (the correct HEX values for the options can be found in chapter 8 “Alignments”) or a method via a standard RC (described below). Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” button and “XXX” (where XXX is the 3 digit decimal display code as mentioned in table “Option code overview” in chapter 8 “Alignments”. Remark : there is only one display option code here “168” used for this chassis). If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

Display Option Code

39mm

PHILIPS 27mm

Contents of SAM: • Hardware Info. – A. SW Version. Displays the software version of the main software (example: Q591E-1.2.3.4 = AAAAB_X.Y.W.Z). • AAAA= the chassis name. • B= the region: A= AP, E= EU, L= Latam, U = US. For AP sets it is possible that the Europe software version is used. • X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number). – B. SBY PROC Version. Displays the software version of the stand-by processor. – C. Production Code. Displays the production code of the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this. • Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number. • Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section “5.5 Error Codes”). • Reset Error Buffer. When “cursor right” (or the “OK button) is pressed followed by another “OK” button touch, the error buffer is reset. • Alignments. This will activate the “ALIGNMENTS” submenu. • Dealer Options. Extra features for the dealers. • Options. Extra features for Service. For more info regarding option codes, see chapter 8 “Alignments”. Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored. Otherwise changes will be lost. • Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this). – Initialize the NVM.

040

MODEL: 32PF9968/10 PROD.SERIAL NO: AG 1A0620 000001

(CTN Sticker)

E_06532_038.eps 240108

Figure 5-2 Location of Display Option Code sticker •

•

• •

•

•

Store - go right. All options and alignments are stored when pressing “cursor right” (or the “OK” button) and then the “OK”-button. SW Maintenance. – SW Events. Not useful for Service purposes. In case of specific software problems, the development department can ask for this info. – HW Events. Not useful for Service purposes. In case of specific software problems, the development department can ask for this info. Test settings. For development purposes only. Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Display-related alignments” and “History list”. First a directory “repair\” has to be created in the root of the USB stick. To upload the settings select each item separately, press “cursor right” (or the “OK” button), confirm with “OK” and wait until “Done” appears. In case the download to the USB stick was not successful “Failure” will appear. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download onto another TV or other SSB. Uploading is of course only possible if the software is running and if a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB. Download to USB. To download several settings from the USB stick to the TV. Same way of working as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary. Note: The “History list item” can not be downloaded from USB to the TV. This is a “read-only” item. In case of specific problems, the development department can ask for this info. Development file versions. Not useful for Service purposes, this information is only used by the development department.

How to Navigate • In SAM, the menu items can be selected with the “CURSOR UP/DOWN” key (or the scroll wheel) on the RCtransmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/ DOWN” key to display the next/previous menu items. • With the “CURSOR LEFT/RIGHT” keys (or the scroll wheel), it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu. • With the “OK” key, it is possible to activate the selected action. How to Exit SAM Use one of the following methods: • Press the “MENU” button on the RC-transmitter.

EN 26 • 5.2.3

5.

Q529.1E LC

Service Modes, Error Codes, and Fault Finding

Switch the set to STAND-BY via the RC-transmitter.

Customer Service Mode (CSM) Purpose When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible. When in this chassis CSM is activated, a test pattern will be displayed during 5 seconds (1 second Blue, 1 second Green and 1 second Red, then again 1 second Blue and 1 second Green). This test pattern is generated by the PNX5100. So if this test pattern is shown, it could be determined that the back end video chain (PNX5100, LVDS, and display) of the SSB is working. New in this chassis are two test patterns with fixed colours: • When the Green key is pushed while in CSM (toggle function) : a fixed testpattern by the “FPGA transmitter” device located on the LVDS panel will be generated. The selftest of this device is confirmed positive with a fully Green picture displayed on the screen. • When the Yellow key is pushed while in CSM (toggle function) : a fixed testpattern by the “FPGA receiver” device located on the monitor will be generated. The selftest of this device is confirmed positive with a fully Yellow picture displayed on the screen. When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (CSM.txt) will be saved in the root of the USB stick. This info can be handy if no information is displayed. Also when CSM is activated, the layer 1 error is displayed via blinking LED on the HUB. Only the latest error is displayed. (see also section “5.5 Error Codes”). How to Activate CSM Key in the code “123654” via the standard RC transmitter. Note: Activation of the CSM is only possible if there is no (user) menu on the screen! How to Navigate By means of the “CURSOR-DOWN/UP” knob (or the scroll wheel) on the RC-transmitter, can be navigated through the menus. Contents of CSM The contents are reduced to 4 pages: General, Software versions/General, Quality items and Addtitional Info. The group names itself are not shown anywhere in the CSM menu. General • Set Type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this. • Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this. • Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.

• • •

• • • •

Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode). Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode). 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB. Remark: the content here can also be a part of the 12NC SSB in combination with the serial number. 12NC display. Shows the 12NC of the display 12NC supply. Shows the 12NC of the supply. 12NC “bolt-on”. Shows the 12NC of the “BOLT-ON”module. 12NC LED dimming panel. Shows the 12NC of the LED dimming panel.

Software versions/General • Current main SW. Displays the built-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: Q591E_1.2.3.4 • Standby SW. Displays the built-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see chapter Software upgrade). Example: STDBY_3.0.1.2. • MOP ambient light SW. Displays the MOP ambient light EPLD SW. • MPEG4 software. Displays the MPEG4 software (optional for sets with MPEG4). • PNX5100 boot NVM. Displays the SW-version that is used in the PNX5100 boot NVM. • LED dimming SW. Displays the SW-version for the LED dimming panel. • MPEG4 (blue to toggle). Displays the activation of MPEG4 reception functionality (on/off). Quality items • Signal quality. Bad / average /good • Child lock. Not active / active. This is a combined item for locks. If any lock (Preset lock, child lock, lock after or parental lock) is active, the item shall show “active”. • Table channel changed. This item is for development purpose. • Key missing. This is a combined item for keys. The keys have a separate bit and the sum is displayed in decimal value. – HDMI key valid = 001 – MAC key valid = 010 Important remark here : due to a software bug, the MAC key is missing and not valid when “2” is displayed in CSM.So, if for instance the HDMI and MAC keys are both valid, the decimal value in CSM “1” is displayed and not “3”. – BDS key valid = 100 If 3 keys are valid the value: “5” is displayed (should be “7” but due to the software bug it is not). For value: “0” in CSM: MAC stored, HDCP invalid. “1” in CSM: MAC stored, HDCP valid. “2” in CSM: no MAC, HDCP invalid. “3” in CSM: no MAC, HDCP valid. • CI slot present. If the common interface module is detected the result will be “YES”, else “NO”. • HDMI input format. The detected input format of the HDMI. • HDMI audio input stream. The HDMI audio input stream is displayed: present / not present. • HDMI video input stream. The HDMI video input stream is displayed: present / not present.

Service Modes, Error Codes, and Fault Finding Additional Info • 12NC LVDS2DP board. Displays the 12NC of the built-in LVDS-to-DisplayPort software. • 12NC monitor board. Displays the 12NC of the monitor board. • SW version DPTX. Displays the built-in DisplayPort TX software version. • SW version DPRX. Displays the built-in DisplayPort RX software version. • SW version FPGA e-box. Displays the built-in FPGA ebox (HUB) software version. • SW version FPGA monitor. Displays the built-in FPGA monitor software version. • SW version microP monitor. Displays the built-in monitor microprocessor software version. • SW version NVM monitor. Displays the built-in monitor NVM software version.

5.3

Q529.1E LC

5.

EN 27

Stepwise Start-up When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via shortcutting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic stepwise start-up. In combination with the start-up diagrams below, you can see which supplies are present at a certain moment. Important to know is, that if e.g. the 3V3 detection fails and thus error layer 2 = 18 is blinking while the TV is restarted via SDM, the Stand-by Processor will enable the 3V3, but the TV set will not go to protection now. The TV will stay in this situation until it is reset (Mains/AC Power supply interrupted). Caution: in case the start up in this mode with a faulty FET 7U08 is done, you can destroy all IC’s supplied by the +3V3, due to overvoltage (12V on 3V3-line). It is recommended to measure first the FET 7U08 or other FET’s on shortcircuit before activating SDM via the service pads.

How to Exit CSM Press “MENU” on the RC-transmitter. The abbreviations “SP” and “MP” in the figures stand for: • SP: protection or error detected by the Stand-by Processor. • MP: protection or error detected by the MIPS Main Processor.

Mains off

Mains on

WakeUp requested

- WakeUp requested - Acquisition needed

St by - Tact switch Pushed - last status is hibernate after mains ON

- No data Acquisition required - tact SW pushed - last status is hibernate after mains ON

Semi St by

Active - St by requested - tact SW pushed

Tact switch pushed

WakeUp requested (SDM) GoToProtection

Hibernate GoToProtection

Protection

I_17660_124.eps 140308

Figure 5-3 Transition diagram

EN 28

5.

Service Modes, Error Codes, and Fault Finding

Q529.1E LC

Off Stand by or Protection

Mains is applied

Standby Supply starts running. All standby supply voltages become available .

st-by µP resets

Initialise I/O pins of the st-by µP: - Switch reset-AVC LOW (reset state) - Switch WP-NandFlash LOW (protected) - Switch reset-system LOW (reset state) - Switch reset-5100 LOW (reset state) - Switch reset-Ethernet LOW (reset state) - Switch reset-ST7100 LOW (reset state) - keep reset-NVM high, Audio-reset and Audio-Mute-Up HIGH

If the protection state was left by short circuiting the SDM pins, detection of a protection condition during startup will stall the startup. Protection conditions in a playing set will be ignored. The protection mode will not be entered.

- Switch Audio-Reset high. It is low in the standby mode if the standby mode lasted longer than 10s.

start keyboard scanning, RC detection. Wake up reasons are off. Important remark; the appearance of the +12V will start the +1V2 DCDC converter automatically

Switch ON Platform and display supply by switching LOW the Standby line.

+12V, +/-12Vs, AL and Bolt-on power is switched on, followed by the +1V2 DCDC converter

Detect2 should be polled on the standard 40ms interval and startup should be continued when detect2 becomes high.

Detect2 high received within 1 second?

Enter protection

Yes

Supply-fault I/O High?

Power-OK error: Layer1: 3 Layer2: 16

No

The supply-fault line is a combination of the DCDC converters and the audio protection line.

1V2 DCDC or class D error: Layer1: 2 Layer2: 19

No

Enter protection

Yes

This enables the +3V3 and +5V converter. As a result, also +5V-tuner, +2V5, +1V8PNX8541 and +1V8-PNX5100 become available.

Enable the DCDC converter for +3V3 and +5V. (ENABLE-3V3)

Delay of 50ms needed because of the latency of the detect-1 circuit. This delay is also needed for the PNX5100. The reset of the PNX5100 should only be released 10ms after powering the IC.

Wait 50ms

Supply-fault I/O High?

Enter protection

yes

Detect-1 I/O line High?

3V3 / 5V DCDC or class D error: Layer1: 2 Layer2: 11

No

Detect-2 I/O line High?

No

Yes

Yes

Voltage output error: Layer1: 2 Layer2: 18

Enable the supply fault detection algorithm

Set I²C slave address of Standby µP to (A0h)

No

Disable 3V3, switch standby line high and wait 4 seconds

Added to make the system more robust to power dips during startup. At this point the regular supply fault detection algorithm which normally detects power dips is not up and running yet.

Enter protection This will allow access to NVM and NAND FLASH and can not be done earlier because the FLASH needs to be in Write Protect as long as the supplies are not available.

Switch LOW the RESET-NVM line to allow access to NVM. (Add a 2ms delay before trying to address the NVM to allow correct NVM initialization , this is not issue in this setup , the delay is automatically covered by the architectural setup)

Switch HIGH the WP-NandFlash to allow access to NAND Flash

No

Release Reset-PNX5100. PNX5100 will start booting. Before PNX8541 boots, the PNX5100 should have set its PCI arbiter (bootscript command). To allow this, approx. 1ms is needed. This 1ms is extended to 10ms to also give some relaxation to the supplies .

Wait 10ms (minimum) to allow the bootscript of the PNX5100 to configure the PCI arbiter

Detect EJTAG debug probe (pulling pin of the probe interface to ground by inserting EJTAG probe)

EJTAG probe connected ?

An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes. Yes

No

No

Cold boot? Yes

Release AVC system reset Feed warm boot script

To I_17660_125b.eps

Release AVC system reset Feed cold boot script

Release AVC system reset Feed initializing boot script disable alive mechanism

To I_17660_125b.eps

Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 1)

I_17660_125a.eps 140308

Service Modes, Error Codes, and Fault Finding

From I_17660_125a.eps

Q529.1E LC

5.

EN 29

From I_17660_125a.eps

Reset-system is switched HIGH by the AVC at the end of the bootscript

Reset-system is switched HIGH by the AVC at the end of the bootscript

Release reset MPEG4 module: BOLT-ON-IO: High

AVC releases Reset-Ethernet when the end of the AVC boot-script is detected

AVC releases Reset-Ethernet when the end of the AVC boot-script is detected

MPEG4 module will start booting autonomously.

Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the startup process

Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the startup process

Wait 3000 ms

Reset-system is connected to USB -reset, 4to1HDMI Mux and channel decoder.

This cannot be done through the bootscript, the I/O is on the standby µP

Timing need to be updated if more mature info is available.

POR polling positive ?

Bootscript ready in 1250 ms?

No

No

Log SW event: STi7100PorFailure

No Yes

Wait 200 ms yes

Set I²C slave address of Standby µP to (60h) Alive polling RPC start (comm. protocol) Timing needs to be updated if more mature info is available.

Flash to Ram image transfer succeeded within 30s?

No Code = Layer1: 2 Layer2: 15

Start alive IIC polling mechanism

yes

POR polling positive ?

NOK Log SW event STi7100AliveFailedError and generate fast cold reboot eventually followed by a cold reboot.

No bootSTi7100PorFailure: Log HW error Layer1: 2 Layer2: 38 and generate cold boot

Yes

Switch AVC PNX8541 in reset (active low)

Code = Layer1: 2 Layer2: 53

No

Wait 10ms

SW initialization succeeded within 20s?

Timing needs to be updated if more mature info is available .

Yes

Enable Alive check mechanism Switch the NVM reset line HIGH. MIPS reads the wake up reason from standby µP.

Disable all supply related protections and switch off the +3V3 +5V DC/DC converter.

Wait until AVC starts to communicate

Initialize audio Wait 5ms

Switch on the display in case of a LED backlight display by sending the TurnOnDisplay(1) (I²C) command to the PNX5100

switch off the remaining DC/DC converters

3-th try?

In case of a LED backlight display , a LED DIM panel is present which is fed by the Vdisplay. To power the LED DIM Panel, the Vdisplay switch driven by the PNX 5100 must be closed. The display startup sequence is taken care of by the LED DIM panel.

Switch Standby I/O line high.

Yes

Download firmware into the channel decoder

No Blink Code as error code

Enter protection

Third try?

No

Downloaded successfully ?

Yes

Yes

Log channel decoder error: Layer1: 2 Layer2: 37

initialize tuner , Master IF and channel decoder

Initialize source selection

Initialize video processing IC 's

initialize AutoTV by triggering CHS AutoTV Init interface

Initialize Ambilight with Lights off .

Semi-Standby Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 2)

I_17660_125b.eps 140308

EN 30

5.

Service Modes, Error Codes, and Fault Finding

Q529.1E LC

Constraints taken into account: - Display may only be started when valid LVDS output clock can be delivered by the AVC . - Between 5 and 50 ms after power is supplied, display should receive valid lvds clock . - minimum wait time to switch on the lamp after power up is 200ms.

action holder: AVC action holder: St-by autonomous action

Semi Standby The assumption here is that a fast toggle ( SEMI -> ON. In these states, the AVC is still active and can provide the 2s delay. If the transition ON-> SEMI>STBY -> SEMI -> ON can be made in less than 2s, the semi -> stby transition has to be delayed until the requirement is met.

CPipe already generates a valid output clock in the semi -standby state: display startup can start immediately when leaving the semi-standby state.

The timings to be used in combination with the PanelON command for this specific display

Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)

Assert RGB video blanking and audio mute

Switch on the display by sending the TurnOnDisplay(1) (I²C) command to the PNX5100

wait 250ms (min. = 200ms) Initialize audio and video processing IC's and functions according needed use case.

Switch on LCD backlight (Lamp-ON)

Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC. The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or at the same time as the unblanking of the video.

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

unblank the video.

The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the set contains a CE IPB inverter supply.

Switch on the Ambilight functionality according the last status settings.

Active Figure 5-6 “Semi Stand-by” to “Active” flowchart

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Service Modes, Error Codes, and Fault Finding

Q529.1E LC

Constraints taken into account: - Display may only be started when valid LVDS output clock can be delivered by the AVC . - Between 5 and 50 ms after power is supplied, display should receive valid lvds clock . - minimum wait time to switch on the lamp after power up is 200ms. - To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100% during the first second. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the picture should only be unblanked after these first seconds.

action holder: AVC action holder: St-by autonomous action

Semi Standby The assumption here is that a fast toggle (SEMI ->ON. In these states, the AVC is still active and can provide the 2s delay. If the transition ON -> SEMI->STBY -> SEMI -> ON can be made in less than 2s, the semi -> stby transition has to be delayed until the requirement is met.

Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)

Assert RGB video blanking and audio mute

CPipe already generates a valid output clock in the semi -standby state: display startup can start immediately when leaving the semi-standby state.

Switch on the display by sending the TurnOnDisplay(1) (I²C) command to the PNX5100

wait 250ms (min. = 200ms) Initialize audio and video processing IC's and functions according needed use case. Switch off the dimming backlight feature, set the BOOST control to nominal and make sure PWM output is set to 100%

Switch on LCD backlight (Lamp-ON)

Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC AND [the backlight PWM has been on for 1s (internal inverter LPL displays OR the backlight PWM has been on for 2s (external inverter LPL displays)] . The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or at the same time as the unblanking of the video.

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

Restore dimming backlight feature, PWM and BOOST output and unblank the video. The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the set contains a CE IPB inverter supply.

Switch on the Ambilight functionality according the last status settings.

Active Figure 5-7 “Semi Stand-by” to “Active” flowchart LCD with preheat

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5.

EN 31

EN 32

5.

Q529.1E LC

Service Modes, Error Codes, and Fault Finding

action holder: AVC

Constraints taken into account: - Display may only be started when valid LVDS output clock can be delivered by the AVC . - Between 5 and 50 ms after power is supplied, display should receive valid lvds clock . - minimum wait time to switch on the lamp after power up is 200ms.

action holder : St-by autonomous action

Semi Standby The assumption here is that a fast toggle ( SEMI -> ON. In these states, the AVC is still active and can provide the 2s delay. If the transition ON -> SEMI>STBY->SEMI->ON can be made in less than 2s, the semi -> stby transition has to be delayed until the requirement is met.

Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)

Assert RGB video blanking and audio mute

CPipe already generates a valid output clock in the semi -standby state: display startup can start immediately when leaving the semi-standby state.

Switch on the display by sending the OUTPUTENABLE (I²C) command to the LED DIM panel

wait 250ms (min. = 200ms) TBC in def. spec

Initialize audio and video processing IC's and functions according needed use case.

Switch on LCD backlight (Lamp-ON)

Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC. The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or at the same time as the unblanking of the video.

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

unblank the video. The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the set contains a CE IPB inverter supply.

Switch on the Ambilight functionality according the last status settings.

Active Figure 5-8 “Semi Stand-by” to “Active” flowchart (LED backlight)

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Service Modes, Error Codes, and Fault Finding

Active

Q529.1E LC

action holder: AVC action holder: St-by autonomous action

Mute all sound outputs via softmute

Wait 100ms

Set main amplifier mute (I/O: audio-mute)

Force ext audio outputs to ground (I/O: audio reset) And wait 5ms

switch off Ambilight

Wait until Ambilight has faded out (fixed wait time of x s)

The higher level requirement is that the backlight may not be switched off before the ambilight functionality is turned off in case the set contains a CE IPB inverter supply.

switch off LCD backlight

Mute all video outputs

Wait 250ms (min. = 200ms)

Switch off the display by sending the TurnOnDisplay(0) (I²C) command to the PNX5100

Semi Standby

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Figure 5-9 “Active” to “Semi Stand-by” flowchart (LCD non DFI)

5.

EN 33

EN 34

5.

Q529.1E LC

Service Modes, Error Codes, and Fault Finding

Semi Stand by

action holder: MIPS action holder: St-by autonomous action

If ambientlight functionality was used in semi -standby (lampadaire mode), switch off ambient light

Delay transition until ramping down of ambient light is finished. *)

*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing , the lights will switch off abruptly when the supply is cut.

transfer Wake up reasons to the Stand by µP.

Switch Memories to self-refresh (this creates a more stable condition when switching off the power).

Switch AVC system in reset state Switch reset-PNX5100 LOW Switch reset-ST7100 LOW Switch Reset-Ethernet LOW

Wait 10ms

Switch the NVM reset line HIGH Switch het WP-Nandflash LOW

Disable all supply related protections and switch off the DC/DC converters (ENABLE-3V3)

Wait 5ms

Switch OFF all supplies by switching HIGH the Standby I/O line

Important remark: release reset audio 10 sec after entering standby to save power

Stand by Figure 5-10 “Semi Stand-by” to “Stand-by” flowchart

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Service Modes, Error Codes, and Fault Finding

Q529.1E LC

MP

action holder: MIPS

5.

EN 35

SP

action holder: St-by autonomous action

Log the appropriate error and set stand-by flag in NVM

Redefine wake up reasons for protection state and transfer to stand-by µP.

Switch off LCD lamp supply

If needed to speed up this transition, this block could be omitted . This is depending on the outcome of the safety investigations .

Wait 250ms (min. = 200ms)

Switch off LVDS signal

Switch off 12V LCD supply within a time frame of min. 0.5ms to max. 50ms after LVDS switch off.

Ask stand-by µP to enter protection state

Switch AVC in reset state

Wait 10ms

Switch the NVM reset line HIGH.

Disable all supply related protections and switch off the +1V8 and the +3V3 DC/DC converter.

Wait 5ms

Switch OFF all supplies by switching HIGH the Standby I/O line.

Flash the Protection-LED in order to indicate protection state*

(*): This can be the standby LED or the ON LED depending on the availability in the set

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Protection Figure 5-11 “To Protection State” flowchart

5.4

Service Tools

5.4.1

ComPair Introduction ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following: 1. ComPair helps to quickly get an understanding on how to repair the chassis in a short and effective way. 2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. No knowledge on I2C or UART commands is necessary, because ComPair takes care of this.

3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available. 4. ComPair features TV software up possibilities. Specifications ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.

EN 36

5.

Q529.1E LC

Service Modes, Error Codes, and Fault Finding This command generates hear test tones of 200, 400, 1000, 2000, 3000, 5000, 8000 and 12500Hz.

How to Connect This is described in the chassis fault finding database in ComPair. 5.4.3

TO TV TO UART SERVICE CONNECTOR

ComPair II RC in

RC out

TO I2C SERVICE CONNECTOR

TO UART SERVICE CONNECTOR

Support of this LVDS Tool has been discontinued.

Multi function

Optional Power Link/ Mode Switch Activity

I2C

RS232 /UART

PC

ComPair II Developed by Philips Brugge

HDMI I2C only

LVDS Tool

Optional power 5V DC

E_06532_036.eps 150208

Figure 5-12 ComPair II interface connection Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!

5.5

Error Codes

5.5.1

Introduction The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them. Below the way errors will be displayed on the HUB: •

How to Order ComPair II order codes: • ComPair II interface: 3122 785 91020. • Software is available via internet: http://www.atyourservice.ce.philips.com • ComPair UART interface cable for Q52x.x. (using 3.5 mm Mini Jack connector): 3104 311 12742. Note: While encounting problems, contact the local support desk. 5.4.2

•

•

Memory and Audio Test With this tool you can test the memory of the PNX8541, as well if the PNX5100 is enabled and audio-testing. What is needed? – An USB-stick. – “TESTSCRIPT Q529” (3104 337 05021). Downloadable from the Philips Service website from the section “Software for Service only”. – A ComPair/service cable (3104 311 12742) Procedure Create a directory “JETTFILES” under the root of the USB-stick – Place “MemoryTestPNX8635.bin” and “autojett.bin” (available in “TESTSCRIPT Q529”) under the directory “JETTFILES” – Install the computer program “BOARDTESTLOGGER” (available in “TESTSCRIPT Q529”) on the PC – Connect a “ComPair/service”-cable from the serviceconnector in the set to the COM1-port of the PC – Start-up the program “BOARDTESTLOGGER” and select “COM1” – Put the USB stick into the TV and startup the TV while pressing the “i+”-button on a Philips DVD RC6 remote control (it’s also possible to use a TV remote in “DVD”mode) – On the PC the memory test is shown now. This is also visible on the TV screen. – In “BOARDTESTLOGGER” an option “Send extra UART command” can be found where you can select “AUD1”.

•

•

•

•

There is a simple blinking LED procedure for board level repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors.(see table 5-2 error code overview). – LAYER 1 errors are one digit errors. – LAYER 2 errors are 2 digit errors. In protection mode. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2. Fatal errors, if I2C bus is blocked and the set reboots, CSM and SAM are not selectable. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2. Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER error 1 blinking), one should short the solder paths at startup from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins. In CSM mode – When entering CSM: error LAYER 1 will be displayed by blinking LED. Only the latest error is shown. In SDM mode – When SDM is entered via Remote Control code or the hardware pins, LAYER 2 is displayed via blinking LED on the HUB. In the ON state – In “Display error mode”, set with the RC commands “mute_06250X _OK” LAYER 2 errors are displayed via blinking LED on the HUB. Error display on screen. – In CSM no error codes are displayed on screen. – In SAM the complete error list from the HUB only is shown!

Basically there are three kinds of errors: • Errors detected by the Stand-by software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED (HUB) LAYER error 1.(see section “5.6 The Blinking LED Procedure”). • Errors detected by the Stand-by software which not lead to protection. In this case the LED from the HUB should blink the involved error. See also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra Info”. Note that it can take

Service Modes, Error Codes, and Fault Finding

•

up several minutes before the TV starts blinking the error (e.g. LAYER error 1 = 2, LAYER error 2 = 15 or 53). Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER error 12, or in case picture is visible, via SAM.

Important remark : Errors on the monitor are displayed by blinking LED only during the start up.They will be displayed only once or twice. 5.5.2

How to Read the Error Buffer Use one of the following methods: • On screen via the SAM (only when a picture is visible). E.g.: – 00 00 00 00 00: No errors detected – 23 00 00 00 00: Error code 23 is the last and only detected error. – 37 23 00 00 00: Error code 23 was first detected and error code 37 is the last detected error. – Note that no protection errors can be logged in the error buffer. • Via the blinking LED procedure. See section 5.5.3 How to Clear the Error Buffer. • Via ComPair.

5.5.3

How to Clear the Error Buffer Use one of the following methods: • By activation of the “RESET ERROR BUFFER” command in the SAM menu. • With a normal RC, key in sequence “MUTE” followed by “062599” and “OK”. • If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.5.4

Error Buffer In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection). There are several mechanisms of error detection: • Via error bits in the status registers of ICs. • Via polling on I/O pins going to the stand-by processor. • Via sensing of analog values on the stand-by processor or the PNX8541. • Via a “not acknowledge” of an I2C communication. Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

Q529.1E LC

5.

EN 37

EN 38

5.

Service Modes, Error Codes, and Fault Finding

Q529.1E LC

Table 5-2 Error code overview

Description

Monitored Error/ Error Buffer/ Layer 1 Layer 2 by Prot Blinking LED Device

Defective Board

I2C3

2

13

MIPS

E

BL / EB

SCL/D-SSB

SSB

I2C4

5

14

MIPS

E

BL / EB

SCL/D-DISP

Display (LED back light only)

PNX doesn’t boot (HW cause) 2

15

Stby µP

E

BL

PNX8541 I2C blocked SSB

12V

3

16

Stby µP

P

BL

/

Supply

1V2, 3V3, 5V to low

2

18

Stby µP

P

BL

/

SSB

1V2 or Class D

2

19

Stby µP

P

BL

/

SSB

3V3/5V DCDC to high

2

11

Stby µP

P

BL

/

SSB

Temp protection

3

12

MIPS

P

BL/EB

/

SSB

PNX 5100

2

21

MIPS

E

EB

PNX5100

SSB

HDMI mux

2

23

MIPS

E

EB

AD8197A

SSB

I2C switch

2

24

MIPS

E

EB

PCA9540

SSB SSB

Master IF

2

26

MIPS

E

EB

TDA9898

FPGA Ambilight

2

28

MIPS

E

EB

/

SSB

Tuner

2

34

MIPS

E

EB

UV1783S/TD1716

SSB

Channel Decoder DVB-T

2

37

MIPS

E

EB

TDA10048

SSB

ST7100

2

38

MIPS

E

EB

ST7100

SSB

FAN I2C expander

7

41

MIPS

E

EB

PCA 9533

SSB

T° sensor

7

42

MIPS

E

EB

LM 75

SSB

FAN

7

43/44

MIPS

E

EB

/

FAN

main NVM

2

/

MIPS

E

X

STM24C128

SSB

Channel decoder DVB-C

2

48

MIPS

E

EB

TDA 10023

SSB

PNX doesn’t boot (SW cause) 2

53

Stby µP

E

BL

PNX8541

SSB

DP Tx

6

54

MIPS

E

EB

GM60028

LVDS2DP

FPGA LVDS Rx

6

55

MIPS

E

EB

DP port not connected

5

56

MIPS

E

EB

DP cable/monitor

/

Extra Info • Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging). It’s shown that the loggings which are generated by the main software keep continuing. In this case diagnose has to be done via ComPair. • Error 11 (3V3/5V too high). This protection can occur during start up (LAYER error 1 = 2). Be careful to overrule this protection via SDM for the reason supply related devices can be possibly destroyed here. • Error 12 (Temp protection). Current situation: when temperature rises above limit inside the HUB, the protection is triggered and the TV set is switched “OFF”. No indication will be displayed on the LED of the HUB, yet error layer = 12 is logged and will be displayed when SDM is active. • Error 13 (I2C bus 3 blocked). At the time of release of this manual, this error was not working as expected. Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair. • Error 15 (PNX8541 doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the PNX8541 (supplies not OK, PNX 8541 completely dead, I2C link between PNX and Stand-by Processor broken, etc...). When error 15 occurs it is also possible that I2C2 bus is blocked (NVM). I2C2 can be indicated in the schematics as follows: SCL-UP-MIPS, SDA-UP-MIPS, SCL-2 or SDA-2. Other root causes for this error can be due to hardware problems with : NVM PNX5100, PNX5100 itself, DDR’s. • Error 16 (12V). This voltage is made in the power supply of the HUB and results in protection (LAYER error 1 = 3) in case of absence. When SDM is activated we see blinking LED LAYER error 2 = 16.

•

•

•

•

•

•

•

•

•

Error 18 (1V2-3V3-5V too low). All these supplies are generated by the DC/DC supply on the SSB. If one of these supplies is too low, protection occurs and blinking LED LAYER error 1 = 2 will be displayed automatically. In SDM this gives LAYER error 2 = 18. Error 19 (1V2 or class D). If one of the 1V2 supplies is too high or too low in the start up procedure the supply fault becomes low. Error 21 (PNX 5100). At the time of release of this manual, this error was not working as expected. Current situation: when there is no I2C communication towards the PNX5100 after startup (power off by disconnection of the mains cord), LAYER error 2 will blink continuously via the blinking LED procedure in SDM. (startup the TV with the solder paths short to activate SDM). Error 23 (HDMI). When there is no I2C communication towards the HDMI mux after start up, LAYER error 2 = 23 will be logged and displayed via the blinking LED procedure if SDM is switched on. Error 26 (Master IF). When there is no I2C communication towards the Master IF after start up, LAYER error 2 = 26 will be logged and displayed via the blinking LED procedure when SDM is switched on. Error 28 (FPGA ambilight). When there is no I2C communication towards the FPGA ambilight after start up, LAYER error 2 = 28 will be logged and displayed via the blinking LED procedure if SDM is switched on. Note that it can take up several minutes before the TV starts blinking LAYER error 1 = 2 in CSM or in SDM, LAYER error 2 = 28. Error 34 (Tuner). When there is no I2C communication towards the tuner after start up, LAYER error 2 = 34 will be logged and displayed via the blinking LED procedure when SDM is switched on. Error 37 (Channel decoder DVBT). When there is no I2C communication towards the DVBT channel decoder after start up, LAYER error 2 = 37 will be logged and displayed via the blinking LED procedure if SDM is switched on. Error 38 (STI7100). When there is no I2C communication towards the STI7100 after startup (power off by

Service Modes, Error Codes, and Fault Finding

•

•

•

•

disconnection of the mains cord), LAYER error 2 = 38 will be logged and displayed via the blinking LED procedure in SDM (startup the TV with the solder paths short to activate SDM). Remark : if the error occurs during the ON state, the TV will constantly reboot and no LED blinking will be displayed. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging”). It is shown that the loggings which are generated by the main software keep continuing. Check in the logging for keywords like e.g. “Device error 38”. Main NVM HUB. When there is no I2C communication towards the main NVM, LAYER error 1 = 2 will be displayed via the blinking LED procedure. In SDM, LAYER error 2 can be 19 here. Check the logging for keywords like “I2C bus blocked”. Error 42 (Temperature sensor). At the time of release of this manual, this error was not working as expected. Current situation: when this error occurs, the TV will endlessly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair or check the logging. Error 48 (Channel decoder DVBC). When there is no I2C communication towards the DVBC channel decoder after start up, LAYER error 2 = 48 will be logged and displayed via the blinking LED procedure while SDM is active. Error 53. This error will indicate that the PNX8541 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash, ...) or software

•

5.5.5

Q529.1E LC

EN 39

initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take up to 2 minutes before the TV starts blinking LAYER error 1 = 2 or in SDM, LAYER error 2 = 53. Error 55 (FPGA LVDS Rx). At the time of release of this manual, this error was not working as expected. Current situation: When there is no I2C communication towards the LVDS2DP panel, the TV set will start rebooting and no blinking on the hub will be displayed. The reset-start spacer is displayed on the monitor LED once in a while as start of the error blinking but none are logged. Because no picture is available, the only way to detect failure on the FPGA device is to check in the logging from the hub (via service connector hub) prints as: “setting lvdsrx output enable to 1, was 0”. This betrays the failure of the FPGA LVDS Rx.

Monitor Errors for Essence When an error of the monitor appears, it is displayed by a blinking LED on the monitor triggered via the acknowledge of the failing device. This is only once or twice. When the error dissappears or when the I2C command is not repeated, the blinking LED stops. Resetting the errors of the monitor is not possible via the item “clear errors” in SAM and can not be read out either in the error buffer, they only will be displayed via blinking LED during start-up.

Table 5-3 Start-up errors Essence Defect

Action

Error on E-box

Supply cable and DP cable unplugged

Start up with mains cord or tact switch (HUB)

Blinking LED error 5 No LED Logging error 56 (layer 2)

Supply cable and DP cable unplugged

Start up from Standby with RC6 (monitor)

No reaction

Supply cable unplugged

Start up with mains cord or tact switch (HUB)

Blinking LED error 5 Standby Logging error 56 (layer 2)

Supply cable unplugged

Start up from Standby with RC6 (monitor)

Blinking LED error 5 RC6 blinking, Standby Logging error 56 (layer 2) LED, no error

DP cable unplugged

Start up with mains cord or tact switch (HUB)

Blinking LED error 5 No picture, no error Logging error 56 (layer 2)

DP cable unplugged

Start up from Standby with RC6 (monitor)

No RC 6 blinking Standby

No picture, no error

E-box defect

Supply fault

Blinking LED error 3 Logging error layer 2 if possible

if no 24V : Standby 24V=OK : no picture, no error

E-box defect

SSB defect, DP initialized Blinking LED error 2 Logging error layer 2

No error

E-box defect

SSB defect, DP not initialized

Blinking LED error 2 Logging error layer 2

No picture, no error

E-box defect

DP boar defect

Blinking LED error 6 Logging error layer 2

No picture, no error

Monitor defect

FPGA

No error

Blinking LED error 2 Logging error 2

Monitor defect

3V3 monitor

Blinking LED error 5 Blinking LED error 3 Logging error 56 (layer 2) Logging error 3

Monitor defect

12V monitor

Blinking LED error 4 Blinking LED error 5 Logging error 56 (layer 2) Logging error 4

Monitor defect

DP port defect

Blinking LED error 5 No picture, no error Logging error 56 (layer 2)

Monitor defect

DP RX

Blinking LED error 5 Blinking LED error 6 Logging error 56 (layer 2) Logging error 6

Monitor defect

NVM

No error

Extra Info • At the time of release of this manual, errors as mentioned above in table 5-3 can possibly not fully work as expected due to unresolved software bugs.

5.

Error on monitor

No LED and no RC6 blinking

Blinking LED error 7, No logging possible

EN 40

5.

Q529.1E LC

5.6

The Blinking LED Procedure

5.6.1

Introduction

Service Modes, Error Codes, and Fault Finding

The blinking LED procedure can be split up into two situations: • Blinking LED procedure LAYER error 1. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table “Table 5-2 Error code overview”) which causes the failure of the TV. This approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance. • Blinking LED procedure LAYER error 2. Via this procedure, the content of the error buffer can be made visible via the front LED of the HUB. In this case the error contains 2 digits (see table “Table 5-2 Error code overview”) and will be displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board.

•

•

5.7

Protections

5.7.1

Software Protections Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions: • Protections related to supplies: check of the 12V, +5V, +3V3 and 1V2. • Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.

Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER error 1 blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins. When one of the blinking LED procedures is activated, the front LED of the HUB will show (blink) the content of the error buffer. Error codes greater then 10 are shown as follows: 1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit 2. A pause of 1.5 s 3. “n” short blinks (where “n”= 1 to 9) 4. A pause of approximately 3 s, 5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s 6. The sequence starts again. Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show: 1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s 2. Two short blinks of 250 ms followed by a pause of 3 s 3. Eight short blinks followed by a pause of 3 s 4. Six short blinks followed by a pause of 3 s 5. One long blink of 3 s to finish the sequence 6. The sequence starts again. 5.6.2

Remark on the Supply Errors The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection. Protections during Start-up During TV start-up, some voltages and IC observers are actively monitored to be able to optimize the start up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start up, they are described in the start up flow in detail (see section “5.3 Stepwise Start-up”). 5.7.2

Hardware Protections The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. The DC check circuit pulls the “A-STBY” line low and will paralize the Class-D audio.

How to Activate Use one of the following methods: • Activate the CSM. The blinking front LED of the HUB will show only the latest layer error 1, this works in “normal operation” mode or automatically when the error/protection is monitored by the standby processor. At the time of this release, this layer error 1 blinking was not working as expected. In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging”). • Activate the SDM. The blinking front LED of the HUB will show the entire contents of the layer error 2 buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection. Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER error 1 blinking), one should short the solder paths at start up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.

Transmit the commands “MUTE” - “062500” - “OK” with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts. Transmit the commands “MUTE” - “06250x” - “OK” with a normal RC (where “x” is a number between 1 and 5). When x = 1 the last detected error is shown, x = 2 the second last error, etc.... Take notice that it takes some seconds before the blinking LED starts.

5.7.3

Important remark regarding the blinking LED indication As for the blinking LED indication, the blinking of error layer 1 can be switched off by pushing the power button on the keyboard. This condition is not valid after the set was unpowered (via mains interruption). The blinking LED starts again and can only be switched off by unplugging the mains connection. This can be explained by the fact that the MIPS can not load the keyboard functionality from software during the start up and doesn’t recognizes the keyboard commands at this time.

Service Modes, Error Codes, and Fault Finding 5.8

Fault Finding and Repair Tips

Audio Amplifier

CSM When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (CSM.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.3

DC/DC Converter Introduction

5.8.4

The onboard supply consists of 5 DC/DC converters and 7 linear stabilizers. The DC/DC converters have all +12V input voltage and deliver: 1. +1V2-PNX8541 supply voltage, stabilised close to PNX8541 chip. 2. +1V2-PNX5100 supply voltage, stabilised close to PNX5100 chip. 3. +3V3 (overall 3.3 V for onboard IC’s). 4. +5V for USB and Conditional Access Interface and +5V5TUN tuner stabilizer. 5. +33VTUN for analogue only tuners (AP diversity).

+3V3-STANDY and +1V2-STANDBY are permanent voltages. Supply voltages +1V2-PNX8541, +1V2-PNX5100 and +1V are started immediately when +12V incoming voltage is available (+12V is enabled by STANDBY signal, active low). Supply voltages +3V3, 2V5, +1V8-PNX5100, +1V8-PNX8541, +5V and +5V-TUN are switched-on directly by signal ENABLE-3V3 (active low) when +12V and previous mentioned voltages are all available. Debugging The best way to find a failure in the DC/DC converters is to check their starting-up sequence at power-on via the mains cord, presuming that the standby microprocessor and the external supply are operational. Take STANDBY signal highto-low transition as reference. When +12V rises above 10V then +1V2-PNX8541, +1V2PNX5100 and +1V are started immediately. Then, after ENABLE-3V3 goes low, all the other supply voltages should rise within 10 ms. Boost voltages should be OK when +1V2PNX8541, +1V2-PNX5100 are available (FU07 and FU8A, around 19V).

Exit “Factory Mode” When an “F” is displayed in the screen's right corner, this means that the set is in “Factory” mode, and it normally happens after a new SSB has been mounted. To exit this mode, push the “VOLUME minus” button on the TV's local keyboard control for 10 seconds (this disables the continuous mode). Now push the “MENU” button for 10 seconds untill the “F” disappears from the screen.

5.8.5

FAN selftest A FAN-selftest can be done by pushing the red coloured button on the remote control while the TV set is in CSM. Fore further details, exit CSM and check the status of the FAN in the error buffer via SAM (062596 + info button on the remote control). In case of failure, the corresponding errors are displayed in the error buffer (error 41,42,43, 44).

The linear stabilizers are providing: 1. +1V supply voltage (out of +1V2-PNX8541), stabilized close to ST7101 chip (MPEG4 diversity). 2. +1V8-PNX5100. 3. +1V8-PNX8541 (reserved because +1V8-PNX5100 used also for DDR2 interface of PNX8541 via 5FB0). 4. +2V5 (MPEG4 diversity). 5. +1V2-STANDBY (out of +3V3-STANDBY). 6. +5V-TUN (out of +5V5-TUN). 7. +3V3-STANDBY (out of +12V, reserved).

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Tips • Usually, when supply voltage is short-circuited to GND, the corresponding DC/DC converter is making audible noise. • The drop voltage across resistors 3U70 and 3U3T is 100 mV to 2000 mV. • Defective (in short-circuit) power MOS-FET’s lead usually to their controller IC broken; if one or more high-side MOSFET’s (7U05, 7U08, 7U0D-1 or 7U0H-1) is broken then the platform can be heavily damaged if started in SDM-mode (SUPPLY-FAULT signal is then ignored, while higher than normal supplies will be generated). • The +33VTUN generator circuit (7U0P + 7U0Q + surrounding components) has low output current capability. In case of too low or no output voltage check transistor 7U0P (gate voltage pulses of about 10 V amplitude and drain voltage pulses of about 35 V amplitude) and the load (not more than 4.5 mA). • High output ripple voltage of DC/DC converters can be caused by defective (cracked or bad soldered) ceramic capacitors in the feedback (DC or AC) input or output filtering.

The Class D-IC 7D10 has a powerpad for cooling. When the IC is replaced it must be ensured that the powerpad is very well pushed to the PCB while the solder is still liquid. This is needed to insure that the cooling is guaranteed, otherwise the Class DIC could break down in short time. 5.8.2

5.

SUPPLY-FAULT signal should be high when all supply voltages are started-up.

Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra Info”. 5.8.1

Q529.1E LC

5.8.6

Logging When something is wrong with the TV set (f.i.the set is rebooting) you can check for more information via the logging in Hyperterminal. The Hyperterminal is available in every Windows application via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”cable (3104 311 12742) from the service connector in the TV set to the “COM1”-port of the PC. After start-up of the Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings: 1. COM1 2. Bits per second = 38400 3. Data bits = 8 4. Parity = none 5. Stop bits = 1 6. Flow control = none During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “DisplayRawNumber” in the beginning of the logging. Tip: when there is no picture available during rebooting you are able to check for “error devices” in the logging (LAYER 2 error) which can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

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5.

Q529.1E LC

Service Modes, Error Codes, and Fault Finding

Loudspeakers Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set! Sometimes the set can go into protection, but that is not always the case.

5.8.8

Tuner Attention: In case the tuner is replaced, always check the tuner options!

5.8.9

UI over PCI bus The UI is not integrated in the RGB signal but is sent from PNX8541 to PNX5100 via the PCI bus. TXT and MHEG are integrated in the RGB signal. So when TXT signal is available but no UI, check the PCI bus.

5.8.10 Display option code Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions. 5.8.11 Upgrade EDID NVM To upgrade the EDID NVM pin 7 of the EDID NVM has to be short circuited to ground. Therefore some test points are foreseen (figure “EDID-NVM pins”). See ComPair for further instructions.

EDID3 X530

EDID2 X530 EDID1 X530

I_18020_145.eps 190908

Figure 5-13 EDID-NVM pins 5.8.12 SSB Replacement Follow the instructions in the flowchart in case a SSB has to be exchanged. See figure “SSB replacement flowchart”.

Service Modes, Error Codes, and Fault Finding

Q529.1E LC

5.

EN 43

START

Set is still operating?

No Create “repair” directory on USB stick and connect USB stick to TV-set Go to SAM mode and save the TV settings via “Upload to USB”.

- Replace SSB board by a Service SSB. - Make the SSB fit mechanically to the set.

Start-up set. Set behaviour?

Set is starting up but no display .

Set is starting up & display is OK .

Set is starting up in “Factory” mode .

Noisy picture with bands/lines is visible and the red LED is continuous “on” (sometimes also the letter “F” is visible ).

Update main software in this step, by using “autorun.upg” file.

Press 5 s. the “Volume minus” button on the local cntrl until the red LED switches “off”, and then press 5 s. the MENU button of the local cntrl.

Program “Display Option” code via 062598 MENU, followed by 3 digits code (this code can be found on a sticker inside the set).

The picture noise is replaced by blue mute! After entering “Display Option” code, set is going to Standby (= validation of code).

Unplug the mainscord to verify the correct disabling of the factory-mode.

Restart the set.

Program “Display Option” code via 062598 MENU, followed by 3 digits code (this code can be found on a sticker inside the set ).

No

Saved settings on USB stick?

After entering “Display Option” code, set is going to Standby (= validation of code).

Connect PC via ComPair interface to Service connector.

Restart the set. Yes

Start TV in Jett mode (DVD i+ (OSD)) Open ComPair browser Q52x. Go to SAM mode, and reload settings via “Download from USB”.

In case of settings reloaded from USB , the set type , serial number , Display 12NC, are automatically stored when entering display options .

Program “set type number”, “serial number”, and “display 12NC”. If not already done; Check latest software on Service website. Update Main and Standby software via USB.

Check and perform alignments in SAM according to the Service Manual. E.g. option codes, colour temperature... Final check of all menus in CSM. Special attention for HDMI Keys.

END

Figure 5-14 SSB replacement flowchart

- Check if correct “Display Option” code is programmed . - Verify “Option Codes” according sticker inside the set . - Default settings for White drive ...see Service Manual

Q52xE SSB Board swap – v3 VDS/JA Updated 17-10-2008

H_16771_007.eps 171008

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5.

Q529.1E LC

5.9

Software Upgrading

5.9.1

Introduction

Service Modes, Error Codes, and Fault Finding 4. Insert USB stick into the TV. 5. The renamed “upg” file will be visible and selectable in the upgrade application. Back-up Software Upgrade Application If the default software upgrade application does not start (could be due to a corrupted boot 2 sector) via the above described method, try activating the “back-up software upgrade application”. How to start the “back-up software upgrade application” manually: 1. Disconnect the TV from the Mains/AC Power. 2. Press the “INFO”-button on a Philips remote control or “CURSOR DOWN” button on a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “INFO”-button (or “cursor down” button) pressed while reconnecting the TV to the Mains/AC Power. 3. The software upgrade application will start.

The set software and security keys are stored in a NANDFlash, which is connected to the PNX8541 via the PCI bus. It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the DFU. Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (copy protection keys, MAC address, ...). It is however also possible to replace the NAND-Flash with a good one from a scrap-board. Perform the following actions after SSB replacement: 1. Set the correct option codes (see sticker inside the TV). 2. Update the TV software (see the DFU for instructions). 3. Perform the alignments as described in chapter 8 (section “Reset of Repaired SSB”). 4. Check in CSM if the HDMI keys are valid. For the correct order number of a new SSB, always refer to the Spare Parts list! 5.9.2

5.9.3

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB. Use the following steps: 1. Create a directory “UPGRADES” on the USB stick. 2. Copy the Stand-by software (part of the one-zip file, e.g. StandbySW_CFT55_35.0.0.0.upg) into this directory. 3. Insert the USB stick into the TV. 4. Start the download application manually (see section “ Manual Software Upgrade”. 5. Select the appropriate file and press the “red” button to upgrade.

Main Software Upgrade • •

The “UpgradeAll.upg” file is only used in the factory. The “FlashUtils.upg” file is only used by service centra which are allowed to do component level repair on the SSB. 5.9.4

Automatic Software Upgrade In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. 3104 337 04731 _FUS _Q591E_ 1.25.5.0_commercial.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see DFU). The “autorun.upg” file must be placed in the root of the USB stick. How to upgrade: 1. Copy “AUTORUN.UPG” to the root of the USB stick. 2. Insert USB stick in the set while the set is in ON MODE. The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set. Manual Software Upgrade In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually: 1. Disconnect the TV from the Mains/AC Power. 2. Press the “OK” button on a Philips TV remote control or a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power. 3. The software upgrade application will start. Attention! In case the download application has been started manually, the “autorun.upg” will maybe not be recognized. What to do in this case: 1. Create a directory “UPGRADES” on the USB stick. 2. Rename the “autorun.upg” to something else, e.g. to “software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick. 3. Copy the renamed “upg” file into this directory.

Stand-by Software Upgrade via USB

Content and Usage of the One-Zip Software File Below the content of the One-Zip file is explained, and instructions on how and when to use it. • •

• • • • •

•

•

• • •

•

1.1 Ambilight_PRFAM_x.x.x.x.zip. Not to be used for Q529.1E LC sets. 1.2 bootProm_PNX5100_Q591X_x.x.x.x.zip. A programmed device can be ordered via the regional Service organization. 1.3 Cabinet_ACOUS_x.x.x.x.zip. Not to be used by Service technicians. 1.4 Ceisp2padll_P2PAD_x.x.x.x.zip. Not to be used by Service technicians. For ComPair development only. 1.5 DDC_Q591X_x.x.x.x.zip. Contains the content of the VGA NVM. See ComPair for further instruction. 1.6 Display_DISPT_x.x.x.x.zip. Not to be used by Service technicians. 1.7 EDID_Q591X_x.x.x.x.zip. Contains the EDID content of the different EDID NVM’s. See ComPair for further instructions. For sets with four HDMI connectors. – For HDMI 1 NVM, use “*port 1*.bin” – For HDMI 2 NVM, use “*port 2*.bin” – For HDMI 3 NVM, use “*port 3*.bin” 1.8 EJTAGDownload_Q591X_x.x.x.x.zip. Only used by service centra which are allowed to do component level repair. 1.9 Factory_Q591X_x.x.x.x_commercial.zip. Only for production purposes, not to be used by Service technicians. 2.0 FlashUtils_Q591X_x.x.x.x_commercial.zip. Not to be used by Service technicians. 2.1 LightGuide_TV522_x.x.x.x_.zip. Not to be used by Service Technicians. 2.2 FUS_Q591X_x.x.x.x_commercial.zip. Contains the “autorun.upg” which is needed to upgrade the TV main software and the software download application. 2.3 MOP_RXSXX_x.x.x.x.zip. Not to be used for Q529.1E LC sets.

Service Modes, Error Codes, and Fault Finding • • • • • •

•

•

•

5.9.5

2.4 OAD_Q591X_x.x.x.x.zip. Not to be used by Service Technicians. 2.5OpenSourceFile_Q591X_x.x.x.x.zip. Not to be used by Service technicians. 2.6 PQPrivate_U5228_x.x.x.x.zip. Not to be used by Service technicians. 2.7 PQPublic_U5228_x.x.x.x.zip. Not to be used by Service technicians. 2.8 ProcessNVM_Q591X_x.x.x.x.zip. Default NVM content. Must be programmed via ComPair. 2.9 StandbySW_CFTxx_x.x.x.x_commercial.zip. Contains the Stand-by software in “upg” and “hex” format. – The “StandbySW_xxxxx_prod.upg” file can be used to upgrade the Stand-by software via USB. – The “StandbySW_xxxxx.hex” file can be used to upgrade the Stand-by software via ComPair. – The files “StandbySW_xxxxx_exhex.hex” and “StandbySW_xxxxx_dev.upg” may not be used by Service technicians (only for development purposes). 3.0 stmp4_xxxx.xxxx.xxxx.zip. This is a separate MPEG4 SW (is also part of the FUS autorun.upg). Not to be used by Service Technicians. 3.1 UpgradeAll_Q591X_x.x.x.x_commercial.zip. Only for production purposes, not to be used by Service technicians. Caution: Never try to use this file, because it will overwrite the HDCP keys ! ! ! 3.2 UpgradeExe_Q591X_x.x.x.x.zip. Not to be used by Service Technicians.

Explanation UART log How to log and change settings: see section 5.8.5 Logging. What's inside the flash of a TV set

B F F S p a rtitio n #3 - P N X5 1 0 0 im a g e

JF F S2 p a rtitio n # 1

A p p lica tio n R/W d a ta A p p lica tio n 'd a ta ' p a rtitio n

A p p lica tio n R/O o n ce d a ta JF F S2 p a rtitio n #0 (sp lit in 2 virtu a l p a rtitio n s o n ce in fra le ve l, b a se d o n p a th ) A p p lica tio n R/O u p g ra d a b le d a ta A p p lica tio n 'B o o t' p a rtitio n R o o t F ile S yste m S Q U A S H F S p a rtitio n - m in im a l R F S - M IP S u se r- sp a ce T V a p p - A p p lica tio n R/O rrfs d a ta - b o o t b a tch file # 3 - T M a p p lica tio n - L in u x K e rn e l in clu d in g B F F S p a rtitio n #2 R a m d isk im a g e w ith - m in im a l R F S - S W d o w n lo a d a p p # 2 B a cku p - b o o t b a tch file # 2 - L in u x K e rn e l in clu d in g B F F S p a rtitio n #1 R a m d isk im a g e w ith - m in im a l R F S - S W d o w n lo a d a p p # 1 - JE T T - JB L B F F S p a rtitio n #0 - ve rsio n.txt - b o o t b a tch file # 1 B lo ck 0

µB T M p a rtitio n ta b le I_17662_001.eps 110608

Figure 5-15 Sections in a flash device

Q529.1E LC

5.

EN 45

Explanation of the sections The flash of TV520 sets consists of a boot-block (block 0), a number of BFFS (Boot Flash File System) partitions, one SquashFS (compressed read-only filesystem for Linux. SquashFS is intended for general read-only filesystem use, for archival use) partition and a number of JFFS (Journaling Flash File System) partitions. The BFFS partitions contain the program code and compile-time data. The SquashFS partition contains the Linux rootfs including the standard RFS (Root File System) directory structures (dev,lib, modules, … ) and MIPS executables (elf). For the purpose of SWUPG (SoftWare UPGrade application) the following points are important: • The boot-block (block 0) contains also the partition table. This table indicates which partitions there are on this system and where they are located on the flash. All programs that want to access the flash contents should use this table. • At system start-up the BTM (Boot Manager) loads the JBL (Jaguar Boot Loader) from /bffs0. The JBL then starts interpreting the boot.bat file from the highest available BFFS partition. If no boot.bat is found there, the next lower partition is tried. • /bffs1 partition contains: 1. kernel image. 2. ramdisk image of RFS holding bare minimum (no debug tooling), including mod/libs , the SW backup upgrade executable, the Jett executable and the helper executable (init + MTD utils used to flash). 3. boot batch file. • The backup SWUPG is stored in the /boot1 BFFS partition in the factory, together with a boot.bat that by defaults loads this SWUPG. This way the set will always load this SWUPG if nothing is in /bffs2. • /bffs2 partition contains: 1. kernel image. 2. ramdisk image of RFS holding bare minimum (no debug tooling), including mod/libs , the SW backup upgrade executable and the helper executable (init + MTD utils used to flash). 3. TM image. 4. boot batch file. • In /boot2 an additional SWUPG shall always be written, either in the factory or by the end-user through an upgrade, which will overrule the one in /boot1. Here also the TM image is stored and a boot.bat which by default loads the main TV application, but falls back on the /boot2/SWUPG if that fails. • /bffs3 partition contains PNX5100 images. • In SquashFS, the TV application RFS flashed as a partition image. Content identical to the RAMDISK RFS at the exception that it includes the TV application in stead of SWUPG. • JFFS2 partition0 contains the R/O once data, which can only written be written in the factory. • JFFS2 partition1 contains the R/W data. Startup sequence TV The UART doesn't show the standby output.

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Q529.1E LC

Service Modes, Error Codes, and Fault Finding

UªUretail Jan 16 2008 12:03:04 _____> µBTM startup Boot deviceST NAND512W3A BFFS init OK Searching BootLoader.tdfLoad /bffs0/BootLoader.tdf- Done _____> Bootloader startup Start /bffs0/BootLoader.tdf JBL (boottime improvement BootLoader OS_R0.7.2assert Feb 25 2008 12:49:28Searching boot.bat Execute /bffs2/boot.bat from label [4] _____> Application selection startup (SWUPG on bffs2) * SR4->USB SW DL boot2 * On error goto 6 * Load /bffs2/Kernel.tdf - ok * Load /bffs2/RFSBoot2.tdf - ok * MemFill 0x87fff000 0x1000 0xff * Signal 30 * Cmd Line CMD_LINE arguments passed by JBL : console=ttyS0,38400n8 mem=60M kgdb=ttyS1 l oglevel=3 init=/init ip=none jffs2_gc_delay=0 root=/dev/ram lpj=1196032 rd_sta rt=0x80500000 rd_size=1568768* Start /bffs2/Kernel.tdf"htv520EU/92 startup script ..." "Mounting file systems" Total usertime mount for /proc: 0,000000 [Sec] Total systemtime mount for /proc: 0,000000 [Sec] Total usertime mount for /sys: 0,000000 [Sec] Total systemtime mount for /sys: 0,010000 [Sec] Total usertime mount for /dev/shm: 0,000000 [Sec] Total systemtime mount for /dev/shm: 0,000000 [Sec] Total usertime mount for /dev/pts: 0,000000 [Sec] Total systemtime mount for /dev/pts: 0,000000 [Sec] "Loading PNX5100 Image" "Launching SW Download Application From Boot2" ______> extra information telling which application is started up checking hotboot: NO Standby version 40.x.0.0 start_Init clearing m_InitDoneBlunk Using errlib version 0.9 Errlib 0.9 registered from process 147 3533 - ReferenRW partition: 4 mounting partition 4 to jffs2 file system passed RW partition: 5 mounting partition 5 to jffs2 file system passed mounted: Mount check passes, 0 iterations mounted: Mount check passes, 0 iterations pffsN_OnMounted sets m_InitDoneBlunk to true InitCehtvData done ReadCehtvData ConfigVersion: [0.01] OK ReadCehtvData ProductID: [Q591E] OK ReadCehtvData OUI: [0000903E] OK ReadCehtvData HardwareModel: [0203] OK ReadCehtvData HardwareVersion: [0100] OK ConvertAscii2Bin started ConvertAscii2Bin done ConvertAscii2Bin started ConvertAscii2Bin done ReadCehtvData PublicKey: OK ReadCehtvData done, ConfigOK: TRUE Could allocate 36701184. _____>The amount of memory free to load the upg into. If upg size > free memory, upg will not be programmed redirecting 1 to 20 00 005.151 Startup m_InitDoneBlunk: 1, m_InitDoneMain: 1 00 005.151 /mnt/jffs0/rupg/tvplf/cetv/display found - Layoutcheck OK 00 005.151 Display flash file : Layout version = 8 ; Content version = 17 00 005.151 Display flash file : Project Id = 1 ; Branch Id = 0 00 005.151 version string: DISPT_001.000.008.017 00 005.151 Using screen option 142, name LCD LGD WUF SAA1 42" 00 005.151 MMIO address obtained from pnx5xxx drv = 0x28000000 00 005.151 redirecting 2 to 23 00 005.164 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnk nownAttachedError, -1 )" notification given 00 005.165 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnk nownAttachedError, -1 )" notification given 00 005.167 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnk nownAttachedError, -1 )" notification given 00 005.169 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnk nownAttachedError, -1 )" notification given 00 005.171 ***GVC: T2 - ceisusb_m.c (817): "usbdevspN_OnPhysicalDeviceConnecte d( 0 )" notification given... 00 005.310 startr_init 00 005.310 Startup m_InitDoneBlunk: 1, m_InitDoneMain: 1 00 005.413 gfxptr: 2dea0000 00 005.413 malloc 776605704 00 005.413 Starting STi710x device with i2c protocol version v0.5 ! 00 005.413 ST TurnOn first attemptS18,0,Q591E_0.39.0.0 00 005.751 Go!!!!!!! 00 005.850 Por: 1 00 005.860 ST start up OKST SW Version: MPEG4.001.000.000.029 00 005.870 ST HW Version: MP4HW.000.000.012.002 00 005.872 Amount of upgs on usb 0 00 005.874 No upg files found! 00 009.182 ***GVC: T2 - ceisusb_m.c (1199): "usbdevspN_OnNewDevice( 0 )" notification given. 00 009.271 ***GVC: T2 - ceisusb_m.c (1408): "usbdevspN_OnDriveMounted( 0 )" notification given 00 009.273 OnDriveMounted : 0 00 009.559 ceapps OnUpgradesChanged : 0 00 009.567 Amount of upgs on usb 20 --------------------------------- Here Application is started up -----------------------------------------------00 009.772 20 upgs found on USB. Press right to enter the list.

_____>Amount of upgs found. I_17662_002.eps 110608

Figure 5-16 Example UART log during SWUPG startup (DVD OK).

Service Modes, Error Codes, and Fault Finding

Q529.1E LC

5.

EN 47

UªUretail Jan 16 2008 12:03:04 Boot deviceST NAND512W3A BFFS init OK Searching BootLoader.tdfLoad /bffs0/BootLoader.tdf- Done Start /bffs0/BootLoader.tdf JBL (boottime improvement BootLoader OS_R0.7.2assert Feb 25 2008 12:49:28Searching boot.bat Execute /bffs2/boot.bat from label [6] unknown command, line 302 Execute /bffs1/boot.bat from label [6] * boot1: SR6->USB SW DL boot1 * On error goto 70 * Load /bffs1/Kernel.tdf - ok * Load /bffs1/RFSBoot1.tdf - ok * MemFill 0x87fff000 0x1000 0xff * Signal 30 * Cmd Line CMD_LINE arguments passed by JBL : console=ttyS0,38400n8 mem=60M kgdb=ttyS1 loglevel=3 init=/init ip=none root=/dev/ram lpj=1196032 rd_start=0x80500000 rd_ size=1818624* Start /bffs1/Kernel.tdf"htv520EU/92 startup script ..." "Mounting file systems" Total usertime mount for /proc: 0,000000 [Sec] Total systemtime mount for /proc: 0,000000 [Sec] Total usertime mount for /sys: 0,000000 [Sec] Total systemtime mount for /sys: 0,000000 [Sec] Total usertime mount for /dev/shm: 0,000000 [Sec] Total systemtime mount for /dev/shm: 0,000000 [Sec] Total usertime mount for /dev/pts: 0,000000 [Sec] Total systemtime mount for /dev/pts: 0,000000 [Sec] "Loading PNX5100 Image" "Launching SW Download Application From Boot1" checking hotboot: NO Standby version 40.x.0.0 start_Init clearing m_InitDoneBlunk Using errlib version 0.9 Errlib 0.9 registered from process 147 3562 - ReferenRW partition: 4 mounting partition 4 to jffs2 file system passed RW partition: 5 mounting partition 5 to jffs2 file system passed mounted: Mount check passes, 0 iterations mounted: Mount check passes, 0 iterations pffsN_OnMounted sets m_InitDoneBlunk to true InitCehtvData done ReadCehtvData ConfigVersion: [0.01] OK ReadCehtvData ProductID: [Q591E] OK ReadCehtvData OUI: [0000903E] OK ReadCehtvData HardwareModel: [0203] OK ReadCehtvData HardwareVersion: [0100] OK ConvertAscii2Bin started ConvertAscii2Bin done ConvertAscii2Bin started ConvertAscii2Bin done ReadCehtvData PublicKey: OK ReadCehtvData done, ConfigOK: TRUE Could allocate 36701184. Startup m_InitDoneBlunk: 1, m_InitDoneMain: 1 /mnt/jffs0/rupg/tvplf/cetv/display found - Layoutcheck OK Display flash file : Layout version = 8 ; Contentversion = 17 Display flash file : Project Id = 1 ; Branch Id = 0 version string: DISPT_001.000.008.017 Using screen option 142, name LCD LGD WUF SAA1 42" MMIO address obtained from pnx5xxx drv = 0x28000000 redirecting 1 to 22 00 005.181 redirecting 2 to 23 00 005.185 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnknownAttachedError, -1 )" notification given 00 005.187 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnknownAttachedError, -1 )" notification given 00 005.188 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnknownAttachedError, -1 )" notification given 00 005.190 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnknownAttachedError, -1 )" notification given 00 005.192 ***GVC: T2 - ceisusb_m.c (817): "usbdevspN_OnPhysicalDeviceConnected( 0 )" notification given... 00 005.364 startr_init 00 005.364 Startup m_InitDoneBlunk: 1, m_InitDoneMain: 1 00 005.465 gfxptr: 2dea0000 00 005.465 malloc 776605704 00 005.465 Starting STi710x device with i2c protocol version v0.5 ! 00 005.471 ST TurnOn first attemptS18,0,Q591E_0.39.0.0 00 005.806 Go!!!!!!! 00 005.910 Por: 1 00 005.920 ST start up OKST SW Version: MPEG4.001.000.000.029 00 005.930 ST HW Version: MP4HW.000.000.012.002 00 005.932 Amount of upgs on usb 0 00 005.934 No upg files found! 00 009.212 ***GVC: T2 - ceisusb_m.c (1199): "usbdevspN_OnNewDevice( 0 )" notification given. 00 009.297 ***GVC: T2 - ceisusb_m.c (1408): "usbdevspN_OnDriveMounted( 0 )" notification given 00 009.299 OnDriveMounted : 0 00 009.586 ceapps OnUpgradesChanged : 0 00 009.594 Amount of upgs on usb 20 00 009.854 20 upgs found on USB. Press right to enter the list. I_17662_003.eps 110608

Figure 5-17 Example UART log during SWUPG startup (DVD down).

EN 48

5.

Q529.1E LC

Service Modes, Error Codes, and Fault Finding

UªUretail Jan 16 2008 12:03:04 Boot deviceST NAND512W3A BFFS init OK Searching BootLoader.tdfLoad /bffs0/BootLoader.tdf- Done Start /bffs0/BootLoader.tdf JBL (boottime improvement BootLoader OS_R0.7.2assert Feb 25 2008 12:49:28Searching boot.bat Execute /bffs2/boot.bat from label [1] * SR1->Coldboot * On error goto 60 * Load /bffs2/atvTm0App.tdf - ok * Load /bffs3/tmpvbPnx51xxApp.tdf - ok * Load /bffs2/cdDownloadTM0.tdf - ok * Starting earlyStartTM* Load /bffs3/tmvprPnx51xxCoApp_tm2.tdf - ok * Load /bffs3/tmvprPnx51xxCoApp_tm3.tdf - ok * Load /bffs2/Kernel.tdf - ok * MemFill 0x87fff000 0x1000 0xff * Signal 30 * Cmd Line CMD_LINE arguments passed by JBL : console=ttyS0,38400n8 mem=48M kgdb=ttyS1 l oglevel=3 root=/dev/mtdblock5 lpj=1196032 init=/init ip=none jffs2_gc_delay=30 * Start /bffs2/Kernel.tdf"htv520EU/92 startup script ..." "Mounting file systems" Total usertime mount for /proc: 0,000000 [Sec] Total systemtime mount for /proc: 0,000000 [Sec] Total usertime mount for /sys: 0,000000 [Sec] Total systemtime mount for /sys: 0,000000 [Sec] Total usertime mount for /dev/shm: 0,000000 [Sec] Total systemtime mount for /dev/shm: 0,000000 [Sec] Total usertime mount for /dev/pts: 0,000000 [Sec] Total systemtime mount for /dev/pts: 0,010000 [Sec] "Mounting the flash file systems" Total usertime mount for /mnt/jffs0: 0,000000 [Sec] _______> Mount time for JFFS partitions Total systemtime mount for /mnt/jffs0: 0,080000 [Sec] "Loading PNX5100 Image" "Launching TV application" ------------------------------------------ Here TV Application is starting up ---------------------Using errlib version 0.9 Errlib communication with plfapp failed, will retry later redirecting 1 to 14 00 002.414 128MB memory on board 00 002.414 128MB memory MAP 00 002.414 checking hotboot: NO 00 002.414 Standby version 40.x.0.0 00 002.414 start_Init clearing m_InitDoneBlunk 00 002.414 Using errlib version 0.9 00 002.414 Errlib 0.9 registered from process 118 00 002.414 2343 - Reference timestamp 00 002.414 mounted: 00 002.414 Mount check passes, 0 iterations -1 002.517 (*) FusionDale/Config: Parsing config file '/etc/fusiondalerc'. -1 002.517 *--------------) FusionDale v0.1.1 (--------------* -1 002.517 (c) 2006-2007 directfb.org -1 002.517 -----------------------------------------------1 002.517 (*) Fusion/SHM: NOT using MADV_REMOVE (2.6.18.0 < 2.6.19.2)! [0x02061200] -1 002.517 (*) Direct/Thread: Running 'Fusion Dispatch' (MESSAGING, 119)... -1 002.527 redirecting 2 to 12 -1 002.527 starting : /philips/apps/ceplfapp -1 002.527 amApp : InitFusionDale -1 002.527 Errlib communication with plfapp failed, will retry later 00 002.639 /mnt/jffs0/rupg/tvplf/cetv/display found - Layoutcheck OK 00 002.639 Display flash file : Layout version = 8 ; Content version = 17 00 002.639 Display flash file : Project Id = 1 ; Branch Id = 0 00 002.639 version string: DISPT_001.000.008.017 00 002.639 Using screen option 142, name LCD LGD WUF SAA1 42"Errlib 0.9 registered from process 116 00 002.695 *--------------) FusionDale v0.1.1 (--------------* 00 002.695 (c) 2006-2007 directfb.org 00 002.695 ----------------------------------------------00 002.802 Diversity: BoardType=/92, BoardVersion=3, Detected pnx8535 version=M2 00 002.802 AmbientLightGenerator : Epld 00 002.802 AmbientLightMode : LeftRight 00 002.802 AmbientLightTechnology : Led 00 002.802 CabinetNumber :3 00 002.802 ChannelDecoderType : Tda10048 00 002.802 ChannelDecoder2Type : Tda10023 00 002.802 ClearLcdSupported : False 00 002.802 DimmingBacklightSupported : True 00 002.802 DisplayDelayCompensation : 36 - 190 00 002.802 DisplayRawNumber : 142 00 002.802 DvbHdSupported : False 00 002.802 EpldPresent : True 00 002.802 HDMIMuxPresent : Mux4 00 002.802 IfDemVersion : V2 00 002.802 LightSensor : Present 00 002.802 LightSensorType : Aura 00 002.802 Sti7100Present : True 00 002.802 PacificPresent : False 00 002.802 Region : Europe 00 002.802 Pnx5050Present : False 00 002.802 Pnx5100Present : True 00 002.802 SawVersion : New 00 002.802 IF Mode (DVB-C) : Direct IF 00 002.802 TunerI2cConfig : ViaChannelDecoder 00 002.802 TunerType : 26 (Phil4MkTd1716F) -1 002.916 amApp: Platform returned wakeup reason [src: 0, sys: 0, cmd: 0] -1 002.919 starting : /philips/apps/tveu 4 0 0 00 003.082 RU Flash file not found in /mnt/jffs0/rupg/tvplf/tv520avi/cabinet3 I_17662_004a.eps 110608

Figure 5-18 Example UART log during SWUPG startup (Normal startup) part 1.

Service Modes, Error Codes, and Fault Finding

Q529.1E LC

00 003.082 RO Flash file not found in /mnt/jffs0/ro/tvplf/tv520avi/cabinet3 00 003.082 Local flash file not found in file/cabinet3 00 003.082 RU Flash file found in /mnt/jffs0/rupg/tvplf/tv520avi/cabinet 00 003.082 Cabinet flash file : Layout version = 4 ; Content version = 16 00 003.082 Cabinet flash file : Project Id = 0 ; Branch Id = 39 00 003.082 version string: ACSTS_000.039.004.016 -1 003.182 amApp : InitDirectFB -1 003.182 Grabbing keyboard -1 003.182 amApp : InitSaWMan -1 003.182 AppMan: Process added (118) [1]! -1 003.182 AppMan: Process added (116) [2]! -1 003.182 AppMan: Window added (0,0-1x1) [1] - 1! 00 003.304 Using cabinet option 3, name MS7_speaker_B 2K7 00 003.304 /mnt/jffs0/rupg/tvplf/cetv/pqprivate found 00 003.304 PQ private flash file : Layout version = 8 ; Content version = 0 00 003.304 PQ private flash file : Project Id = 1 ; Branch Id = 0 00 003.304 version string: PRFPV_001.000.008.000 00 003.304 /mnt/jffs0/rupg/tvplf/cetv/ambientlight found 00 003.304 Ambientlight flash file : Layout version = 3 ; Content version = 9 00 003.304 Ambientlight flash file : Project Id = 1 ; Branch Id = 0 00 003.349 version string: PRFAM_001.000.003.009i5100pow_Init 00 003.382 00 003.382 /mnt/jffs0/rupg/tvplf/cetv/pqpublic found 00 003.382 PQ public flash file : Layout version = 4 ; Content version = 2 00 003.382 PQ public flash file : Project Id = 0 ; Branch Id = 0 00 003.406 version string: PRFPB_000.000.004.002plfdmx_mdmx: DEBUG_ERROR_PRINT enabled 00 003.431 Platform Application from Apr 13 2008 22:31:30, 00 003.431 built on PC: BEQBRGBRG1TSS15 by user: beq00908 00 003.431 CCM_build_id: 00 003.431 Startup m_InitDoneBlunk: 0, m_InitDoneMain: 1 00 003.782 Check TM download idrv_DspReady_Ready 01 003.879 tvApp : entered main.... 01 003.885 amApp is passing 4 arguments 01 003.890 tvApp : Param 1 = 4 Param 2 = 0 01 003.892 Tvmain: start_Init called 00 003.974 Create Thread with priority 70 (=45) 00 003.974 Create Thread with priority 70 (=45) 00 003.974 Create Thread with priority 70 (=45) 00 003.974 Create Thread with priority 70 (=45) 00 003.974 Create Thread with priority 70 (=45) 00 003.974 Create Thread with priority 70 (=45) 01 003.985 Using errlib version 0.9 00 003.988 Starting STi710x device with i2c protocol version v0.5 ! 00 003.995 ST TurnOn first attemptCreate Thread with priority 70 (=45) 00 003.995 Create Thread with priority 70 (=45) 00 003.995 Create Thread with priority 70 (=45) 00 003.995 Create Thread with priority 70 (=45) 00 004.004 PNX5100: Using PCI communication for all i2c write messsages!! 00 004.007 PNX5100: Input Wdw: 1944 1104 Output Freq: 100 00 004.009 PNX5100: Input Wdw: 1944 1104 Output Freq: 120 00 004.013 Create Thread with priority 70 (=45) 00 004.015 PNX5100: Hardware Id [5100hwid] 00 004.017 Software Id [20080408] 00 004.019 BootNvm Id [ 8] 00 004.023 5100 Drv GetBootstatus via PCI : 0 00 004.038 Errlib 0.9 registered from process 164 00 004.064 TM download OK 01 004.067 (*) FusionDale/Config: Parsing config file '/etc/fusiondalerc'. 01 004.072 *--------------) FusionDale v0.1.1 (--------------* 01 004.072 (c) 2006-2007 directfb.org 01 004.072 ----------------------------------------------01 004.078 (*) Fusion/SHM: NOT using MADV_REMOVE (2.6.18.0 < 2.6.19.2)! [0x02061200] 01 004.089 (*) Direct/Thread: Running 'Fusion Dispatch' (MESSAGING, 184)... 00 004.099 Por: 1 00 004.102 ST start up OKST SW Version: MPEG4.001.000.000.029 00 004.105 ST HW Version: MP4HW.000.000.012.002 00 004.107 5100 Drv GetBootstatus via PCI : 0 00 004.112 Firmware version 3.10 for TDA10048 succesfully downloaded 00 004.263 5100 Drv GetBootstatus via PCI : 2 00 004.265 PNX5100&&&&&& Bootstatus on 2 after 2 retries -1 004.333 AppMan: Process added (164) [3]! 00 004.445 i5100pow_TurnOn 00 004.451 phatvEngine5100Proxy__pow_TurnOn using udma driver for autotv !!gOemRegTbl:0x3292D0 00 004.508 cetvbend_mpowon: iambl_SetState onoff = 0 -1 004.517 icplfapisetup_powN_OnTvPowerChanged for state 2 01 004.702 svspow_m.c:2922::Start Init of svspow called.MsecSinceInit: 1791999581 01 004.707 svspow_m.c:2251::Wakeup Reason is coldboot 01 004.730 svspow_m.c:2954::Quick Turn On Initiated 01 004.730 svspow_m.c:1380::Double call in InitialiseSoftware -1 004.804 AppMan: Window added (100,100-480x300) [2] - 0! -1 004.804 Border window attached -1 004.804 AppMan: Switch focus to 0x5132da00 [2] -1 004.804 AppMan: Window added (100,100-480x300) [3] - 1! -1 004.804 Audio node attached -1 004.813 amApp: dst setup called for 2 -1 004.820 amApp: Enabling keyboard -1 004.823 amApp: dst setup called for 3 01 004.975 FUNCTION:hsveuins__impow_Init, LINE:216, InsStatus.Medium:255 01 004.987 MAINVIDEOWINDOW=2,sizeof(NoClearData):8,retval:0,retval1:0 00 005.060 UNBLOCK CARD 01 005.203 svspow_m.c:1526::All Subsystems inited 01 005.236 mlock patch inited -1 005.262 HK_REQUEST_PS received for 5 -1 005.262 Ungrabbing keyboard 01 005.267 svspow_m.c:2854::REQUEST_PS for cmd: 5 00 005.270 cetvbend_mpowon: powon_TurnOn 01 005.289 5278 ZAP_END - UnBlank GCK****************Hot key received by tvApp 01 005.289 svspow_m.c:4705::HK_PREPARE_PS received for cmd = 5 01 005.289 GCK******************Hot key prepare PS received by psc 01 005.289 svspow_m.c:4049::powctl_SetPowerMode to PscPowOn -1 005.296 Called icplfapisetup_pow_SetTvPower( 3 )

Figure 5-19 Example UART log during SWUPG startup (Normal startup) part 2.

5.

EN 49

I_17662_004b.eps 110608

EN 50

5.

Q529.1E LC

Service Modes, Error Codes, and Fault Finding

-1 005.296 Sending HK_PREPARE_PS to application index 1, window 0x5132da00 01 005.315 svspow_m.c:1575::Reached SW Turn On 1 -1 005.327 icplfapisetup_powN_OnTvPowerChanged for state 3 01 005.338 svspow_m.c:1634::Reached HandleTurnOn1Event with Event = 16 01 005.342 svspow_m.c:1634::Reached HandleTurnOn1Event with Event = 1 01 005.432 RB Analog file name /mnt/jffs0/boot/tv/hysvc/HsvAntennaAnalogTable 01 005.435 RB Digts file name /mnt/jffs0/boot/tv/hysvc/HsvAntennaDigPtcTable 01 005.437 RB digsrvc file name /mnt/jffs0/boot/tv/hysvc/HsvAntennaDigSrvcTable 01 005.439 FrequecnyMap file name /mnt/jffs0/boot/tv/hysvc/HsvAntennaFreqMapTable 01 005.443 Analog file::IsImmediateFlashUpdateReqd set to:0 01 005.444 RB Analog file open Sucessfull 01 005.446 Proceed1:1 01 005.448 generating dig tables 01 005.452 digts_Open ::DigTsfp:18157056,tempval2:2 01 005.454 digts::IsImmediateFlashUpdateReqd set to:0 01 005.464 digsrvc_Open::DigSrvcfp:18157424,tempval:2 01 005.466 DigSrvcfp::IsImmediateFlashUpdateReqd set to:0 01 005.469 freqmap_Open::freqMapfp:18157792,tempval:2 01 005.471 freqMapfp::IsImmediateFlashUpdateReqd set to:0 01 005.475 ANTENNA_FLASH_ANALOG_TABLE: records:21 01 005.478 NoOfRecordsInFlash::ANTENNA_FLASH_DIG_PTC_TABLE:12 01 005.512 NoOfRecordsInFlash::ANTENNA_FLASH_DIG_SRVC_TABLE:117 01 005.514 NoOfRecordsInFlash::ANTENNA_FLASH_FREQMAP_TABLE:0 01 005.516 RB Analog file closed 00 005.519 cetvbend_mpowon: cetvambi_ambilight_Disable 01 005.526 CurrentONID = 9018 01 005.528 euins_m:Medium from NVM = 0 01 005.544 svspow_m.c:3586::cesvc powntf received for Ssby 01 005.546 svspow_m.c:1634::Reached HandleTurnOn1Event with Event = 2 01 005.573 svspow_m.c:750::Set has reached Semisby state 00 005.577 cetvbend_mpowon: iambl_SetState onoff = 0 01 005.582 cbmhgoad_mcallisto: mDownloadErrorOccured = FALSE 01 005.584 cbmhgoad_mswupdt: mScanningRequired = FALSE - mMsgArrived = 0, MsgType = 65535 01 005.586 cbmhgpow_mpow: sbyoad_IsPending = FALSE 01 005.590 svspow_m.c:1718::Reached SW Turn On 2 00 005.704 cetvbend_mpowon: iambl_SetState onoff = 0 01 005.784 cbmhgpow_mpow: selrqd_IsProgSelReqd = TRUE 01 005.792 5792 ZAP_BEGIN - SelectProgram 01 005.794 svspow_m.c:953::First Preset Seln made at 1792000672 01 005.827 svbas pgselN_OnProgramChangeRequested 00 005.844 DVB-T decoder selected 00 005.846 avptda10023_menable.c: ena_Disable() 01 005.896 svspow_m.c:1803::Reached HandleTurnOn2Event with Event = 1 00 006.059 ***Restoring Ad Routing and enable direct control 01 006.162 svspow_m.c:1803::Reached HandleTurnOn2Event with Event = 16 01 006.195 svspow_m.c:3634::cesvc powntf received for ON 01 006.197 svspow_m.c:1803::Reached HandleTurnOn2Event with Event = 2 00 006.211 ***Writing the Ad Routing parameters... 00 006.464 tmtv520avinst__vipN_OnImageFormatChanged 01 006.752 hsvprins: hsvprins__feapiN_OnStationFound 01 006.936 hsveuins_mdig.c: 2178: hsveuins__ictrlN_OnEvent: 01 006.936 sigstr_SetSigStrengthMeasured called with val = 1 00 007.131 ceplfresgate__vid_StopDemux 00 007.131 ceplfresgate__aud_StopDemux 00 007.146 ceplfresgate__pcr_StopDemux 01 007.148 Mohanan: ConvertToSTVideoType : 2 01 007.153 hsvdvbmpl : dmxmed_SetVideoPid pid 600 type 2 00 007.163 ceplfresgate__vid_StartDemux 01 007.172 Mohanan: ConvertToSTAudioType : 0x2000000 01 007.174 hsvdvbmpl : dmxmed_SetAudioPid pid 601 type 5 00 007.182 ceplfresgate__aud_StartDemux 01 007.185 hsvdvbmpl : dmxmed_SetPcrPid pid 600 00 007.191 ceplfresgate__pcr_StartDemux 00 007.191 usecase = 4 00 007.484 tmtv520avinst__vipN_OnVideoPresentChanged 00 007.486 direct ceplfresgate_vipN_OnVideoPresentChanged to 2 00 007.491 m_FieldFreq = 50tmtv520avinst__vipN_OnNumberOfVisibleLinesChanged 00 007.494 direct ceplfresgate_vipN_OnNumberOfVisibleLinesChanged 00 007.507 tmtv520avinst__vipN_OnImageFormatChanged 01 007.571 svspow_m.c:4589::First pgsel completed at 1792002449 00 007.575 cetvbend_mpowon: cetvdisplay_preheatN_OnEvent 00 007.577 cetvbend_mpowon: UpdateAmbientLight => cetvambi_ambl_SetState 01 007.587 7583 ZAP_END - UnBlank 01 007.589 svbas pgselN_OnProgramChangeCompleted 01 007.960 svspow_m.c:4753::Detected Mute = FALSE in vmtN 01 007.964 7959 ZAP_END - UnBlank 01 007.966 svspow_m.c:1803::Reached HandleTurnOn2Event with Event = 2048 01 007.968 RFS not found in environment 01 007.977 RFS not found in environment 01 007.979 FLASH system, mount request for partition 2 accepted 00 008.331 Timeout on mountcheck 01 008.692 svspow_m.c:4760::flashopN_OnPartitionMounted::partitionid:2 00 008.769 cetvbend_mpowon: cetvambi_ambilight_Disable 00 009.002 argv[0] is /philips/bin/networkhelper 00 009.002 udhcpc gave me deconfig 00 009.002 HandleUdhcpcNotif : msgq is 32769 01 009.155 svspow_m.c:4772::Sent flashopN_OnPartitionMounted::MOUNT_ON_EVENT 01 009.158 svspow_m.c:1872::gfx setpower ON 01 009.162 svspow_m.c:1875::gfx powntf for ON 01 009.164 cbmhgpow_mpow: SetPower to ON 01 009.166 cbmhgpow_mpow: OnPowerChanged 01 009.168 svspow_m.c:3428::cbmhg powntf received for ON 01 009.171 svspow_m.c:1913::cbmhg setpower On 01 009.267 svspow_m.c:1926::JUICE setpower On 01 009.279 svspow_m.c:1803::Reached HandleTurnOn2Event with Event = 16 01 009.282 svspow_m.c:1803::Reached HandleTurnOn2Event with Event = 256 -1 009.292 AppMan: Window added (0,0-852x480) [4] - 2! 01 009.298 Surface 0, PlaneId 2 in AttachSurface 00 009.989 argv[0] is /philips/bin/networkhelper 00 009.989 udhcpc gave me bound 00 009.989 udhcpc gave me bound

Figure 5-20 Example UART log during SWUPG startup (Normal startup) part 3.

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Q529.1E LC

00 009.989 IP address is 192.168.1.22 00 009.989 subnet mask is 255.255.255.0 00 009.989 $router is 192.168.1.1 00 009.989 First Gateway is 192.168.1.1 00 009.989 $dns is 192.168.1.1 00 009.989 DNS1 is 192.168.1.1 00 009.989 Interface is eth0 00 009.989 HandleUdhcpcNotif : msgq is 32769 00 010.083 route: SIOC[ADD|DEL]RT: No such process 01 010.623 svspow_m.c:3497::juice powntf received for ON 01 010.626 svspow_m.c:1803::Reached HandleTurnOn2Event with Event = 512 01 010.641 svspow_m.c:1943::ceapps setpower On -1 010.649 AppMan: Window config - unhiding window -1 010.649 Relayout of window 4 -1 010.657 AppMan: Switch focus to 0x5132d600 [4] 00 010.702 (!!!) *** WARNING [color keying does not work on UPPER layer] *** [Philips/DirectFB/systems/cetvfb/primary.c:202 in get_color_minmax()] 01 010.868 svspow_m.c:3479::apps powntf received for ON -1 010.881 AppMan: Window added (0,0-720x576) [5] - 0! 01 010.897 Surface 1, PlaneId 0 in AttachSurface 01 011.083 svspow_m.c:1803::Reached HandleTurnOn2Event with Event = 1024 01 011.086 svspow_m.c:693::Set Reached on state at 1792005965 01 011.088 svspow_m.c:755::Set has reached ON state 01 011.091 InitCehtvData done 01 011.312 ReadCehtvData ConfigVersion: [0.01] OK 01 011.312 ReadCehtvData ProductID: [Q591E] OK 01 011.312 ReadCehtvData OUI: [0000903E] OK 01 011.312 ReadCehtvData HardwareModel: [0203] OK 01 011.312 ReadCehtvData HardwareVersion: [0100] OK 01 011.312 ConvertAscii2Bin started 01 011.312 ConvertAscii2Bin done 01 011.312 ConvertAscii2Bin started 01 011.312 ConvertAscii2Bin done 01 011.312 ReadCehtvData PublicKey: OK 01 011.339 ReadCehtvData done, ConfigOK: TRUE 00 011.666 cetvbend_mpowon: iambl_SetState onoff = 1 00 011.668 cetvbend_mpowon: iambl_SetState onoff => cetvambi_ambl_SetState 00 011.672 cetvbend_mpowon: cetvambi_ambilight_Enable -1 011.884 HK_PREPARE_PS_DONE received for cmd: 5, src: 1 -1 011.884 Remaining PowerChangeBitmap: 0 -1 011.884 starting : /philips/apps/spettApp -1 011.884 starting : /philips/apps/media 01 011.905 svspow_m.c:2871::PREPARE_PS_DONE for cmd: 5 01 011.994 cbmhgpow_mpow: mRegisterAlarm - ClockSet 02 012.518 *--------------) FusionDale v0.1.1 (--------------* 02 012.518 (c) 2006-2007 directfb.org 02 012.518 ----------------------------------------------02 012.524 Using errlib version 0.9 02 012.524 ***SPETT*** FusionDale Init done 02 012.524 ***SPETT*** Windows created 00 012.530 Errlib 0.9 registered from process 226 00 012.530 *** DirectFB Surface allocation FALLBACK! Acquiring id 7 with size 376320 -1 012.533 AppMan: Process added (226) [4]! -1 012.533 AppMan: Window added (0,0-800x600) [6] - 0! -1 012.533 Border window attached -1 012.533 AppMan: Window added (100,100-672x280) [7] - 2! -1 012.533 AppMan: Window config - unhiding window -1 012.533 AppMan: Switch focus to 0x51334000 [7] 02 012.581 Event class: DFEC_WINDOW 01 012.791 NITParser: Else of sec_SctArrived 01 012.791 cbmhgoad_m: strapi notification on completed 01 012.852 cbmhgoad_m :TARGETNIT = 0, TARGETNID = 513, spid = -1 01 012.854 cbmhgoad:mBarkerOadPumpHandler : mPrefFreqDirFound = 0 01 012.857 cbmhgoad: noofrecords = 0 03 013.196 MediaApp: Initalized and running 03 013.312 (*) FusionDale/Config: Parsing config file '/etc/fusiondalerc'. 03 013.312 *--------------) FusionDale v0.1.1 (--------------* 03 013.312 (c) 2006-2007 directfb.org 03 013.312 ----------------------------------------------03 013.312 (*) Fusion/SHM: NOT using MADV_REMOVE (2.6.18.0 < 2.6.19.2)! [0x020 61200] 03 013.312 (*) Direct/Thread: Running 'Fusion Dispatch' (MESSAGING, 244)... 03 013.334 Using errlib version 0.9 03 013.334 MediaApp: Call back Init from gplib 00 013.338 Errlib 0.9 registered from process 227 03 013.482 arunkp: mplfabsav2_m.c: 209: mplfabsav2__pow_Init: -1 013.583 AppMan: Process added (227) [5]! 03 013.619 MediaApp: Gfx Init done 03 013.891 mediaApp: fusiondale Init, register called 03 013.891 mlock patch inited -1 013.895 AppMan: Window added (100,100-480x300) [8] - 0! -1 013.895 Border window attached -1 013.895 AppMan: Switch focus to 0x51334e00 [8] -1 013.895 AppMan: Window added (100,100-480x300) [9] - 1! -1 013.895 Audio node attached -1 013.907 AppMan: Switch focus to 0x51334e00 [8] 03 013.955 Network enabled and available - enabling allegro 03 013.958 allegroenb_Enable 02 014.072 ***SPETT*** All inits done 02 014.075 ***SPETT*** gpilib.startr.Init done 01 014.105 ReadCehtvData done, ConfigOK: TRUE 01 014.107 cbmhgoad_mswupdt: chil_test_oui_only OUI = 0xd060, ret = 0 01 014.375 CEAPPS : TARGETNIT = 0, TARGETNID = 8, spid = -1 03 014.555 The address is: 192.168.1.22 03 014.559 arunkp: mplfabsav2_m.c: 219: mplfabsav2__pow_TurnOn: -1 014.957 AppMan: Window added (0,0-852x480) [10] - 2! 00 015.002 *** DirectFB Surface allocation FALLBACK! Acquiring id 0 with size 410880 03 015.005 Surface 0, PlaneId 2 in AttachSurface 00 015.027 (!!!) *** WARNING [color keying does not work on UPPER layer] *** [Philips/DirectFB/systems/cetvfb/primary.c:202 in get_color_minmax()] 03 015.224 Infrastructure Resource Gained by mediaApp 03 015.226 (resourcechanged && !(ResourceOwned & FULL_STATE) : Setting mappstate_mediaIdle -1 015.276 AppMan: Window config - unhiding window 00 015.671 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnknownAttachedError, -1 )" notification given

Figure 5-21 Example UART log during SWUPG startup (Normal startup) part 4.

5.

EN 51

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Service Modes, Error Codes, and Fault Finding

03 015.788 Census Found device uuid: c7a4be7e-547d-11dc-8034-cc1538aeec30 03 015.792 DeviceType: schemas-upnp-org:device:MediaServer:1 -1 016.098 AppMan: Window config - unhiding window -1 016.098 Relayout of window 5 00 017.948 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnknownAttachedError, -1 )" notification given 00 018.154 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnknownAttachedError, -1 )" notification given 00 018.727 ***GVC: T2 - ceisusb_m.c (951): "usbdevspN_OnDeviceError( DeviceUnknownAttachedError, -1 )" notification given 00 024.079 --- pass 0 --00 024.082 freeMem : 26620 00 024.084 pgmajfault : 0 00 024.086 sectorsread: 11440 01 035.636 Merging eit data 01 035.650 Merging eit data 01 035.656 1419 records after eliminating duplicates 01 035.663 1419 records after eliminating duplicates

Figure 5-22 Example UART log during SWUPG startup (Normal startup) part 5.

•

•

The “Application selection startup” part in the logs shows which application is being started up: backup SWUPG, normal SWUPG, TV application, … In the TV application (Normal startup) case, there is no print on the UART which shows the software has started up completely. When startup issues arise, the best way to tackle them is by comparing the bad UART print with a correct print of the same release.

Upgrade of a TV set. Following cannot be seen during industrial mode! • When the Industrial Mode is enabled with command 203, no prints can be seen anymore on the UART. This is to not interfere with the P2P protocol. • When in normal mode, the UART will show what the actions are during the upgrade. • At certain periods in time during programming, the total size currently flashed (Totalsize flashed) and the size which should be finally flashed (TotalProgramSize) will be printed.

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13:51:07 Tv520_Eu_0.61_prod Format 2 (bffs2 partition) succesfull

____________> Format 3 (Squash partition) succesfull

________> Writing to JFFS

________> Writing to JFFS I_17662_005a.eps 110608

Figure 5-23 Example UART log during normal user upgrade part 1.

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13:51:58 P: 31% 13:51:59 P: 31% 13:51:59 mounting partition 5 to jffs2 file system passed 13:51:59 13:51:59 Totalsize flashed: 8016293, TotalProgramSize: 24080366 13:51:59 m_JffsMounted = 2 13:51:59 Sync called 13:51:59 Sync DONE 13:51:59 CheckUnMount: /mnt/jffs1 13:51:59 /mnt/jffs1 is mounted 13:51:59 Unmount /mnt/jffs1 13:51:59 /mnt/jffs1 is not mounted 13:51:59 umounting /mnt/jffs1 ok 13:51:59 umounting partition 5 from jffs2 file system passed 13:51:59 13:51:59 P: 31% 13:51:59 WRITE /squashFS/ ________> Writing to Squash 13:51:59 Totalsize flashed: 8016309, TotalProgramSize: 24080366 13:51:59 m_JffsMounted = 0 13:51:59 v1 squash 13:51:59 13:51:59 Totalsize flashed: 8016309, TotalProgramSize: 24080366 13:51:59 spawning nandwrite 13:51:59 param: nandwrite 13:51:59 param: -z 13:51:59 param: 7180288 13:51:59 param: /dev/mtd5 13:51:59 param: /philips/pipe 13:51:59 execute nandwrite OK 13:51:59 Writing data to block 0 13:51:59 P: 31% 13:51:59 Writing data to block 4000 13:52:09 /philips/pipe could is closed ________> Finished writing to Squash 13:52:09 m_JffsMounted = 0 13:52:10 P: 63% 13:52:10 WRITE /bffs2/ ________> Writing to bffs2 13:52:10 Totalsize flashed: 15196597, TotalProgramSize: 24080366 13:52:10 m_JffsMounted = 0 13:52:10 Totalsize flashed: 15196597, TotalProgramSize: 24080366 13:52:32 Totalsize flashed: 24080366, TotalProgramSize: 24080366 13:52:32 Completed !! ________> Programming succesfull 13:52:32 Operation Successful! Remove all inserted media and restart the TV set. I_17662_005b.eps 110608

Figure 5-24 Example UART log during normal user upgrade part 2. Problem analysis of a TV set. During programming: • The amount of Bad Blocks is bigger then promised by the flash manufacture. This is checked on virgin boards. • Bad blocks have been created during programming and there is not enough good block anymore in the partition to write data into. This can happen on boards which are being reprogrammed. • Mounting of the JFFS partitions take to long. • When the flashutil UPG is being programmed on a boards which already contains a different Partition Table, the writing of the bootblock (μBTM and partitionTable ) will fail. This can only happen on non virgin boards. • When the power drops the programming will be stop. Depending on when the power drop is the result will be different. 1. FUS UPG. The SWUPG will try to reprogram the UPG once the power is back. 2. Flashutil UPG. Cannot recover anymore, because nothing is in flash anymore. Has to be reprogrammed on the line again. 3. Upgrade All. Depending when the power drop happens. When it happens in the beginning, the board will only be reprogrammable on the line. • If a development UPG is used on a production SWUPG or visa versa. Validation will fail. • If loading fails (cannot read file error), it is mostly due to a long USB cable or a bad USB stick. • If the UPG size is bigger then the memory allocated by the software upgrade application, then the UPG will not be programmed. See the prints fo the SWUPG at startup.

During startup: • Compare the UART logging on the problem board/set with a normal startup behaviour. Identify till which point the logging reaches. • If a crash happens, it will be outputted on the UART. In the background the information of the dump will be written into JFFS0. The UPG to copy the dump content out of flash should be available for everybody.

Service Modes, Error Codes, and Fault Finding

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13:47:58 Debug dump 000000: Fatal error: time = N/A, millis = 127020, error = test reboot, SW version = Q581E 13:47:58 -0.61.0.0 Release 13:47:59 Unmounting jffs2 filesystems 13:47:59 Unmounting 13:47:59 UnmountinBUG: scheduling with irqs disabled: htv520eu/0x00000000/147 13:47:59 g 13:47:59 ehci_hcd 0000:00:0b.2: dma_pool_destroy ehci_qtd, a12b4000 busy 13:47:59 ehci_hcd 0000:00:0b.2: dma_pool_destroy ehci_qh, a188e000 busy 13:48:05 13:48:05 13:48:06 uBTM NDK R5.2b retail Feb 7 2007 11:56:37 13:48:06 Boot device - ST NAND512W3A 13:48:06 BootFFS initialization - OK 13:48:06 uBTM has been enabled with ECC 13:48:06 Searching BootLoader.tdf 13:48:06 File System ID is BFFS_ID 13:48:06 Loading /bffs0/BootLoader.tdf-Done 13:48:06 13:48:06 Starting /bffs0/BootLoader.tdf 13:48:06 JBL enabled with ECC check 13:48:06 13:48:06 Initialize I2C module I_17662_006.eps 110608

Figure 5-25 Example UART log during problem. Problem solution. When programming fails: • Check in the NVM at address 0x1D02 (BadBlocksAmount). This items is 2 bytes. 1. If, after programming the flashutil UPG, this value is still the same as the one of the process NVM, then the amount of bad blocks was bigger then described by the flash manufacturer. 2. If the value is filled in, it has to be checked if it's not to close the maximum amount possible. 3. If the value is low, no problem. • If mounting fails, it will be shown on the UART. This can only be seen when industrial mode is disabled. • As the UART logs are disabled when in industrial mode, it is always good to have a set (or minimal setup) where the problem board can be tested in. In this way the problem can be reproduced in the normal mode of the SWUPG and the prints will be visible! When startup fails: • When a crash happens (only in the TV application!) and is followed by debug dump UART output, then a copy of the dump can put on a USB stick 1. This can only be done in the TV application, so if the TV application keeps on crashing there is no way to copy the dump of the flash to a USB stick. 2. When the TV application has started up completely, CSM can be entered by pressing 1, 2, 3, 6, 5, 4. 3. Then put the remote in DVD mode and press 2, 6, 7, 9. 4. The file Dump_seetypeplate_seetypeplate.bin can be found now on the USB storage device. The seetypeplate_seetypeplate will be filled in depending on the type of set. 5. This .bin file can only be interpreted in a Philips development centre. Please give this input to your Philips Service contact person. • Compare the UART logging on the problem board/set with a normal startup behaviour. Identify till which point the logging reaches.

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Personal Notes:

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6. Block Diagrams, Test Point Overview, and Waveforms Wiring Diagram Essence WIRING E SSENCE

LC D DISPLAY (1004)

8152

8120

8150

1F52 41P

1F51 51P

13DP 8P

DISPLAY SOCKET

POWER SOCKET

1M01

1E06 3P UA RT

IP I

1M20

J

R

1316

(1032)

1316 12P

1FDP 20P

8735

MONITOR

M

1319 14P

8319

IP I

1M20 9P

1735 4P

8316

1319

1M71 7P

IR LED PANEL (1132)

L

(1132)

PSU

A

8395

(1050)

X416 11P

LVDS2DP

LD

(1030)

8405 8151

DISPLAY LINK CABLE

8408

X419 8P

E

8101

1F42 41P

8000 8150

1M20 9P

DISPLAY SOCKET 1FDP 20P

G

I/O 1E99 30P (1026)

8199

1M95 11P

1F01 3P

1T99

1M71 4P 1G5 0 51P

(1010)

1M01 9P

POWER SOCET

1F41 51P

KEYBOARD CONTROL

B

SSB

Side IO

(1011)

1G5 0 41P

1E99 30P

Back IO

I_18020_125.eps 101008

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Block Diagram Video VIDEO B02B MAIN TUNER

B04 PNX8541

7T57 TDA9898HL 1

IF-OUT2 IF-OUT1

2 5T61

MAIN HYBRID TUNER

1T55

11

1

10

1T70

IF-FILTP1

6

IF-FILTN1

7 IF1-B

IF-FILTP2

9 IF2-A

37MHZ67 4

2 1

4 5

5 1T65

CVBS

4

IF-FILTN3

IF3-B

3

IF-FILTP3

5

IF3-A

OUT1-A

TAGC

OUT1-B

36MHZ125 RF-AGC

+5V XTAL_OUT 9

3

47

TUN-AGC

8

46

4-MHz TDA-IF-AGC

7A00 ST-7101BWC

B02A

FLASH EPROM

7

4-MHz

XIN

29

DIF-N

30

DIF-P 3T86

26

3T87

27

VIDEO LAYER

IF-N

M1

IF-P

M2

GFX LAYER STILL MPEG/PC

7T18

C8

7TA4 TDA10023HT/C1

39

7300 GM60028H-BF

RX1

A

RX2

PNX5100

+VDISP2

B05A SDRAM

TX3

32

10

38

4

39 40

3 2

41

1

B

FPGA CYCLONE II N.C.

GENESIS TRANSMITTER H19

TXBLCLK+

H20 F19 F20

TXBLCLKTXBLDAT+ TXBLDAT-

139 140

DPRX-3N DPRX-3P

1 3

142

DPRX-2N

4

143

DPRX-2P

6

145 146 148

DPRX-1N DPRX-1P DPRX-0N

7 9 10

DPRX-0P

12

BACKLIGHT

13

RC

17

137

DPRX-AUXP

15

136

DPRX-AUXN

17

149

LD5

DDR2

TX4

MEMORY CONTROLLER

1

50

2

49

3

40

12

11

41

5

47

4

48

3

49

2

50

1

51

AUDIO + I²C I2C

130

DPRX-HPD

18

RX3

PNX5100-DDR2-A(0-12) +VDISP1

20

+3V3-STANDBY

RX4

7C02 HYB18TC512160B2F

DDR SDRAM

1F41

51

(0-12)

PNX5100-DDR2-D(0-15)

MSP VMPG MPEG DEMUX AND DECODING

3

7205 EP2C5F256C7N N.C.

TX2

I2C

16Mx16

FE-DATA(0-7)

40

1G51

7C01 HYB18TC512160B2F

B04N VIDEO STREAMS

DATA

1F42 41

2

LD1

DDR SDRAM

ONLY FOR DVB-T CHANNNEL DECODER DVB-C

ONLY FOR MPEG4

B03C STI7101: SDRAM B02C

D8

DV-VS

LD3 GENESIS

1F52

TX1

B05A PNX5100: SDRAM

AGC-COMP

41

RESET-SYSEM

B04E

DV-HS

AH15 GFX OSD LAYER

MBVP-TV SNR/TNR EDDI HV SCALER

IF-P

1G50 1 I2C

DV-UV(0-9)

AG15

LD2 FPGA: I/O BANKS

SUPPLY

LVDS_TX

LVDS_RX

VIDEO OUTPUT TTL

TUN-AGC-MON

16

B05B VIDEO

LD1 LVDS CONN. +

LVDS

B05E LVDS

DV-Y(0-9)

IF-N

VI-M

CLR

STI7101

B04O DIGITAL VIDEO OUT LVDS

VIDEO ANALOGUE SWITCH/ ADC/MUX/SRC

DTV VI-P 3 RECEIVER 2

10-bit YUV

B04K ANALOGUE AV

MAIN VIDEO OUT

AGC-DIN

43 AGC_TUN AGCT_CTL 32

8Mx8 4Mx16

EMI-A(1-22)

J3

CVBS-TER-OUT

7T17 TDA10048HN 42

B03B FLASH EMI

CVBS4

CHANNNEL DECODER

7A50 M29W640FT70N6

EMI-D(0-15)

MPP-2

FREF

36

+VTUN

B03A STI7101: CONTROL B03B STI7101: FLASH

7C00 PNX5100EH/M1A

10 IF2-B

36MHZ18

2

33

IF PROCESSING

IF-FILTN2

4

7T56 EF

IF1-A

B05E PNX5100:

B05 PNX5100: 7H00 PNX8541E/M1

CPIPE-TV

1T04 TD1716F/BHXP

7302 M25P20-VMN6P

2M FLASH +12V-SSB

16Mx16 (16-31)

7AA1 EDD2516AETA

3TB4

9 AGCTUN

58 DTV VIP RECEIVER 57

DDR SDRAM

B03C SDRAM

VIM

16Mx16

LMI-D(0-31)

B04E

16

RESET-SYSEM

CLRB

VIDEC, 3D COMB AND VBI CAPTURING

DIF-P

B03F USB + ETHERNET CONNECTOR

1TA1 16M

3

PNX8541

ONLY FOR DVB-C

B03H CI: PCMCIA CONNECTOR

LMI-A(0-12)

DIF-N

2

7AA2 EDD2516AETA

LMI

FE-DATA(0-7)

DO

DDR SDRAM

7A70-7A71 74LVC245

1P00

16Mx16 MDO(0-7)

BUFFER

CA-MDO(0-7)

68P

PCMCIA

DISPLAY LINK CABLE

CA-MDI(0-7) CONDITIONAL ACCESS

TSI1-ST-D(0-7) TSI0-ST-D(0-7)

MPEG-TX2+

74

MPEG-TX2MPEG-TX1+

73 71

MPEG-TX1MPEG-TX0+

70 68

MPEG-TX0-

67

U33

MPEG-TXC+

65

U34

MPEG-TXC-

64

ONLY FOR MPEG4 HDMI

RXC+ RXC-

34 OP0 33 ON0 37 OP1 36 ON1 40 OP2 ON2 39 43 OP3 42 ON3

HDMI SWITCH

RESET-SYSTEM

44

A10 A9

RX0+

B7

RX0RX1+

B6 A8

RX1-

A7

RX2+

B9

RX2-

B8

B09A USB 2.0 7N00 ISP1564HL

PCI XIO

PCI-AD(0-31)

PCI HOST CONTROLLER

19 18

1E01

CVBS-TER-OUT

1

Y_CVBS-MON-OUT-SC

19 18

EXT 2

1 2

16 20

A3

B04A CONTROL

AV3-PR

7

AV3-BP

R1

11

11

AV3-Y

G1

15

20

AV2-Y_CVBS

J1

21

8

AV2-STATUS 7E14

16

1E00

1E99

19 7 8

1E99

CVBS-OU-SC1

8

8

AV2_BLK

PCI-ADNAND-AD

NAND FLASH 128Mx8

AV1-PB

2

2

11

AV1-STATUS

13

13

AV1-Y

4

4

B04A CONTROL

B04G PNX 8541: SDRAM

15

AV1-PR

1

1

7HG0 EDE5116AJBG

B04G DDR2

B04A CONTROL

16

AV1-BLK

3

20

AV1-Y_CVBS

6

3 6

AV1_BLK

B04A CONTROL

P5

AV1-Y

F2

AV1-PR

K2

AV1-Y_CVBS

7F00 EP2C5F256C7N

1F52 N.C

1FDP

B04A CONTROL

AV1-PB

M03C DP-RX

M03A DP-RX

7F0A GM68020H-BE

7E05

AV1_STATUS

MONITOR

M03B DP RECEIVER & POWER SUPPLY

(0-12)

H2

SDRAM

1 3

DPRX-3N DPRX-3P

66 65

4

DPRX-2N

63

6

DPRX-2P

62

7 9 10

DPRX-1N DPRX-1P DPRX-0N

60 59 57

12

DPRX-0P

56

13

DDR2-D(0-15)

14 DDR

7HG1 EDE5116AJBG

7100 21

SW UPLOAD JPEG MP3

7HA0 NAND512W3A2CN6E

K3

CVBS-OU-SC1

7

SCART1

4

REGIMBEAU_CVBS-SWITCH

15

SCART2

19 18

Y-CVBS-MON-OUT

I/O ESSENCE

20

2 3

7E22/7E16

7

1P03 HDMI 2 CONNECTOR

15

USB20-2-DM USB20-2-DP

B04Q PNX8541: FLASH

5

9,10,11

1 2

1

CRX

16

USB-OC 1P07 1

92

7E04

19

1P02 HDMI 3 CONNECTOR

11

USB20-OC2

7E02

BRX

EXT 1

USB20-OC1

87

USB 2.0 CONNECTOR SIDE

14

1P05 HDMI SIDE CONNECTOR

1

78

90

B04E CONTROL

ARX

G

HOT-PLUG D10

B04F CONTROL PCI

B08A ANALOGUE EXTERNALS A

1 2

B08F

P33 B03D AV-INTER P34 R33 FACE R34 AV T33 INTER FACE T34

B07D CONTROL

HDMI-DVI RX/RX2DTL RECEIVER DETECTION MATRICING

1

7E13 AD8197AASTZ

3 2

B04H DIGITAL VIDEO IN

B08G HDMI SWITCH

4

ONLY FOR MPEG4

DDR2-A(0-12)

BACKLIGHT-IN

TXPAN1

A

TXPAN2

B

GENESIS

1

FPGA CYCLONE II

RECEIVER

1F51 51 50

M3B

RC-OUT

I2C

LD1

TXPAN3

15

DPRX-AUXP

52

17

DPRX-AUXN

51

SDRAM

PR

17

17

G-VGA

21

21

G-VGA

B-VGA

19

19

B-VGA

49 40

18

DPRX-HPD

9 49

5 4

R-VGA

3 1E03

20

1E04

+3V3-STANDBY 7F0B M25P20-VMN6P

Y

7F02 M25P10-AVMN6P

+12V

2 1

B08B ANALOGUE EXTERNALS B

PB

10

1

R-VGA

2

G-VGA B-VGA H-SYNC-VGA

5

15

1E05

3 13 14

1

6

EXT 3 11

EXT 3

(16-31) R-VGA

QUAD LVDS 1920×1080 100HZ

TXPAN4 AUDIO + I²C

1E05

41 32

K4 G2 R2

V-SYNC-VGA

F3 T4

FRONT-Y_CVBS

J2

2M FLASH

1M FLASH

VGA CONNECTOR CVBS VIDEO SIDE

1E11 I_18020_126.eps 101008

Block Diagrams, Test Point Overview, and Waveforms

Q529.1E LC

6.

59

Block Diagram Audio AUDIO

MAIN HYBRID TUNER

5T61

2 11

IF-OUT2

1

10

IF-OUT1

1T70

IF-FILTP1

6

IF-FILTN1

7 IF1-B

IF-FILTP2

9 IF2-A

4 5

1T65

CVBS

4

5

IF-FILTP3

3 47 46

4-MHz TDA-IF-AGC

B03A STI7101: CONTROL B02A

7A00 ST-7101BWC

36

IF3-A

OUT1-A

TAGC

OUT1-B

FREF

MPP-2

7

XIN

8Mx8 4Mx16

EMI-A(1-22)

B03C

3T87

27

IF-N

M1

IF-P

M2

VI-M

TUN-AGC-MON

16

B04Q PNX8541: FLASH 7HA0 NAND512W3A2CN6E

PCI XIO

7T18

B04N VIDEO STREAMS

IF-N IF-P

PCI-AD NAND-AD

FE-DATA(0-7)

DATA

PNX8541

B09A USB 2.0

3TB4

9 AGCTUN

58 DTV VIP RECEIVER 57

DDR SDRAM

B03C SDRAM

VIM

16Mx16

LMI-D(0-31)

B04E

LMI-A(0-12)

PCI-AD(0-31)

DIF-N DIF-P

PCI HOST CONTROLLER

CLRB

78

USB20-OC1

87

USB20-OC2

USB20-2-DM USB20-2-DP

92 1TA1 16M

USB-OC

1P07 1 90

2

16

RESET-SYSEM

3

7AA2 EDD2516AETA

LMI

FE-DATA(0-7)

DO

B03F USB + ETHERNET CONNECTOR

7N00 ISP1564HL

7TA4 TDA10023HT/C1 7AA1 EDD2516AETA

NAND FLASH 128Mx8

AGC-COMP

ONLY FOR DVB-T CHANNNEL DECODER DVB-C

B02C

SDRAM

(16-31)

41

RESET-SYSEM

B04E

ONLY FOR MPEG4 STI7101: SDRAM

DDR2-A(0-12)

B04F CONTROL PCI

DTV VI-P 3 RECEIVER 2

CLR

STI7101

26

AGC-DIN

43 AGC_TUN AGCT_CTL 32

42 4-MHz

7HG1 EDE5116AJBG

DDR DIF-P 3T86

7T17 TDA10048HN

FLASH EPROM

SDRAM

DIF-N

30

IF3-B

CHANNNEL DECODER

7A50 M29W640FT70N6

EMI-D(0-15)

B04G SDRAM (0-12)

29 IF-FILTN3

+VTUN

B03B STI7101: FLASH

J3

10 IF2-B

IF-FILTN2

4

TUN-AGC

8

+5V XTAL_OUT 9

7HG0 EDE5116AJBG

B04K ANALOGUE AV CVBS4

DDR2-D(0-15)

36MHZ125 3

RF-AGC

33

IF PROCESSING

36MHZ18

2

7T56 EF

IF1-A

37MHZ67

2 1

4 5

B04G PNX 8541: SDRAM 7H00 PNX8541E/M1

1

1T55

ONLY FOR DVB-C

7A70-7A71 74LVC245

1P00

16Mx16 MDO(0-7)

BUFFER

SW UPLOAD JPEG MP3

B05E PNX 5100: LVDS

B04L AUDIO

CA-MDO(0-7)

AUDIO

68P

PCMCIA

4

USB 2.0 CONNECTOR SIDE

B03H CI: PCMCIA CONNECTOR

DDR SDRAM

2 3

3 2

1

B03B FLASH EMI

B04 PNX8541

7T57 TDA9898HL

1T04 TD1716F/BHXP

4

B02B MAIN TUNER

LD1 LVDS CONNECTOR LD5 FPGA: CONTROL LD2 FPGA: I/O BANKS LD5 FPGA: CONTROL

LD3 GENESIS

+ SUPPLY CA-MDI(0-7)

CONDITIONAL ACCESS

7205 EP2C5F256C7N 1G50

TSI1-ST-D(0-7) TSI0-ST-D(0-7)

B08G

ONLY FOR MPEG4 HDMI SWITCH 7E13 AD8197AASTZ

P33 B03D AV-INTER P34 R33 FACE R34 AV T33 INTER FACE T34

MPEG-TX2+

74

MPEG-TX2MPEG-TX1+

73 71

MPEG-TX1MPEG-TX0+

70 68

MPEG-TX0-

67

U33

MPEG-TXC+

65

U34

MPEG-TXC-

64

ONLY FOR MPEG4 B08F HDMI

HDMI SWITCH

B07D (CONTROL)

RXC+ RXC-

34 OP0 33 ON0 37 OP1 36 ON1 40 OP2 ON2 39 43 OP3 42 ON3

1 2

AUDIO-MCK

34

8

AUDIO-MCK

9503

AUDIO-IN-MCK

M11

AJ14

AUDIO-CLK

35

7

AUDIO-BCK

9500

AUDIO-IN-BCK

L11

AK14

AUDIO-WS

36

6

AUDIO-WS

9501

AUDIO-IN-WS

AH14

AUDIO-SDO

37

5

AUDIO-DAO

9502

AUDIO-IN-DAO

RX0RX1+ RX1-

A7

RX2+

B9

RX2-

B8

B04E (CONTROL)

19 18

AUDIO-IN5-R

AK4

M03B DP RECEIVER & POWER SUPPLY

AIN5

1 2 19 18 1 2

1

7

19 18

20

AUDIO-IN2-L

AF5

2

AUDIO-IN2-R

AG5

AIN2

20

A-PLOP

15

DPRX-AUXP

52

17

DPRX-AUXN

51

GENESIS RECEIVER

21

AUDIO-MCK

6

19

AUDIO-BCK

1

20

AUDIO-WS

2

15

AUDIO-DAO

AUDIO-IN1-L

AJ6

11

AUDIO-IN1-R

AK6

7HM1 3

AP-SCART-OUT-L

14

14

AP-SCART-OUT-L

3EA7

AUDIO-CL-L

1

3

ADAC(7)

AK8

1

AP-SCART-OUT-R

15

15

AP-SCART-OUT-R

3EA8

AUDIO-CL-R

7

5

ADAC(8)

AJ8

AP-AUDIO-OUT-L

27

27

AUDIO-OUT-L

8

10

ADAC(5)

AJ10

AP-AUDIO-OUT-R

28

28

AUDIO-OUT-R

14

12

ADAC(6)

AK9

A-PLOP

1E04

ADC

DEMDEC

I²C Main

6

OUT-L

22

CLASS D POWER AMPLIFIER 16

3

IN-L

-AUDIO-R

5

MUTE

4

A-STBY

2

LEFT-SPEAKER

1735 1 2 Speaker L

GND-AUDIO

3

IN-R

MUTE

15

RIGHT-SPEAKER

4 Speaker R

SD

CONTROL

MEMORY CONTROL

Main Delayed

A-PLOP

B04M PNX 8541: AUDIO

SPDIF DECODING, MULTICHANNEL, DOWNMIX AND SRC

B04M

AUDIO-IN3-L

23

23

AUDIO-IN3-L

AH5

AUDIO-IN3-R

24

24

AUDIO-IN3-R

AJ5

SPI-OUT

30

30

7E03 EF

SPDIF-OUT

B08C ANALOGUE EXTERNALS C 7HVA

B08A

DAC

RESET-AUDIO

A-PLOP

B04A (CONTROL) 7HV0 TPA6111A2DGN

AIN3

AJ15

SPDIF OUT DELAYED

5

1E03 DIGITAL AUDIO OUT

17

DAC

7E06/7E07

1E05

+AUDIO-L

AUDIO-MUTE B03D (CONTROL)

21

AUDIO IN L+R

15

136 DPRX-AUXN

AIN1

1E02

EXT 3

14

D/A CONVERTER

B04M

1E99 10

B04I AUDIO

AUDIO OUT L+R

6

1FDP

GENESIS TRANSMITTER 137 DPRX-AUXP

7D10 TPA3123D2PWP

7E01

15

SCART1

GEN-DAO

OUT-R

11

16

35C3

7D53 UDA1334BTS/N2

7

EXT 1

11

M02A GENESIS

1

A-PLOP

11

AUDIO-OUT-DAO

21

I/O ESSENCE

AUDIO-IN1-R

F7

10

GEN-WS

35C2

3

15

SCART2

2

K11

N.C.

GEN-BCK

3D08

16

1P03 HDMI 2 CONNECTOR

6

1FDP

11

EXT 2

1E99 10

AUDIO-OUT-WS

M02B FPGA: CONTROL

7F0A GM68020H-BE

1E01

1P02 HDMI 3 CONNECTOR

AUDIO-IN1-L

F8

GEN-MCK

35C1

MONITOR

AJ4

EPICS

6

K10

35C4

DISPLAY LINK CABLE

B08A ANALOGUE EXTERNALS A

1E00

AUDIO-OUT-BCK

B04L AUDIO

AUDIO-IN5-L AUDIO OUT L+R

1P05 HDMI SIDE CONNECTOR

1

AUDIO-OUT-MCK

G6

RESET-SYSTEM

44

1E11

CRX

G7

CYCLONE II

A10 A9 HDMI-DVI RX/RX2DTL RECEIVER B7 DETECTION B6 MATRICING A8

RX0+

ARX

G

AF14

B04H DIGITAL VIDEO HOT-PLUG D10 IN

B08B ANALOGUE EXTERNALS B/C

BRX

7300 GM60028H-B

1F42

B08E AUDIO IN HDMI 1P0B AUDIO-IN4-L AUDIO IN L+R HDMI

AK5

1P0A

AH11

ADAC(3)

2

AH10

ADAC(4)

6

DAC

HEADPHONE AMPLIFIER

1

AUDIO-HDPH-L-AP

7

AUDIO-HDPH-R-AP

1E15 2 3 4 1

Headphone Out 3.5mm

AIN4 AUDIO-IN4-R

AH4 I_18020_127.eps 101008

Block Diagrams, Test Point Overview, and Waveforms

Q529.1E LC

6.

60

Block Diagram Control & Clock Signals CONTROL + CLOCK SIGNALS LD3 GENESIS

LD2 FPGA: I/O BANKS

LD5 FPGA: CONTROL

27M

1300

153 59

A-CLK

L4

101

B-CLK

E14

75

75A3 M25P10-AVMN6P H4

DCLK

6

F4 C3 F1

nCSO ASDO DATA0

1 5 2

B04E

PCI-CLK-PNX5100

B04E

7C01 HYB18TC512160B2F

B23

BACKLIGHT-CTRL LCD-PWR-ON

COMMON INTERFACE

PCMCIA

CONDITIONAL ACCESS

B04H DIGITAL VIDEO IN

B22

PCI-AD(0-14)

35 36 34

K8

HOT-PLUG

CA-MDO(0-7)

B04E CONTROL

7HA0 NAND512W3A2CN6E

A11

XIO-ACK

7

XIO-SEL-NAND

0

WP-NANDFLASH

19

PCI-CLK-PNX8535

NAND FLASH (512Mx8)

B04E PNX 8541: CONTROL AK26

PCI-CLK-OUT

TSIO-ST-CCLK

3HF2

PCI-CLK-PNX8535

3HFH

PCI-CLK-PNX5100

B05G

3HF4 PCI-CLK-USB20_ETH

B09A B09B

TSI1-ST-D(0-7)

STI7101

B04E

B08F

B11 A21

B22

68

7A00 ST-7101BWC B03C SDRAM

LMI-D(0-31)

RESET-SYSTEM

PCI-AD(24-31) --> NAND-AD(0-7)

B03A STI7101: CONTROL

AK6

16

B04F PNX 8541: CONTROL_PCI

B04E

MDO(0-7)

DV-CLK

D6

DDR2-CLK_N

CHANNEL DECODER DVB-C

B04Q PNX 8541: FLASH

AK17 B04O DIGITAL VIDEO OUT / LVDS

7AA2 EDD2516AETA

FE-DATA(0-7)

CA-MDI(0-7) 7A70-7A71

IRA-CS

CA-MICLK

7AA1 EDD2516AETA

7TA4 TDA10023HT/C1

SDRAM

J8

D10

B04F CONTROL

AF13 B05B VIDEO

B03C STI7101: SDRAM

DDR2-CLK_P

B04E

B02C CHANNEL DECODER DVB-C

A22

CA-ADDEN

PCMCIA-A(0-14)

27M

AB11

RESET-PNX5100

B04A

7N11 7N12

AE13

1CD0

B05F CONTROL

N29

D22

RESET-SYSTEM

PCI-AD(24-31)

PCMCIA-D(0-7)

PNX5100-DDR2-A(0-12)

PNX5100-DDR2-CLK_P P26

CA-DATADIR CA-DATAEN

B05H

PNX5100

J8

DDR2-D(0-31)

DDR2-A(0-12)

7N13

1P00 1

B05H

PNX5100-DDR2-D(0-31)

PNX5100-DDR2-CLK_N P25

61

7HG0 EDE5116AJBG 7HG1 EDE5116AJBG

PCI-AD(0-31)

B05B DDR2

K8

41

B04G PNX 8541: SDRAM

N28

B26

SDRAM

62

IRQ-PCI

CHANNEL DECODER DVB-T

74

B09C BUFFERING

B03H CI: PCMCIA CONNECTOR

B05H DISPLAY INTERFAC.

7C02 HYB18TC512160B2F

RESET-ETHERNET

19 18 17

FE-VALID FE-SOP

B04G SDRAM

B04A

7C00 PNX5100EH/M1A L3 B05G PCI

PNX8541

FE-CLK

C5 D5 C4

60

PCI-CLK-USB20_ETH

B04E B09A

B05A PNX5100: SDRAM

MAC PHYTER II

ETHERNET CONNECTOR

1M FLASH

25M

A14

1N02

FPGA CYCLONE II

7300 GM60028H

GENESIS

7T17 TDA10048HN

FE-DATA(0-7) CLK-FPGA

11

152

B02A CHANNEL DECODER

PNX8541 7H00 PNX8541E B04N VIDEO STREAMS

7N04 DP83816AVNGNOPB4HL

1N00 CLOCK SYNTHESIZER

27M

1301

1

14

B04

B03F ETHERNET B09B ETHERNET CONNECTOR

7205 EP2C5F256C7N

7304 CDCE913R01PW

TSI0-ST-D(0-7)

B03B STI7101: FLASH

7A50 M29W640FT70N6

B03B FLASH EMI-D(0-15)

Only for MPEG4

EMI-A(1-22)

7A10-3 CPU-27MHZ

8Mx8 4Mx16

C1

1P07 1 3 2

7A12

2 3

4

1

AH30 WP-FLASH-ST

4

B03D AV E27

27MHZ-3V3

MPEG

MPEG OUT SEE VIDEO

B04E

USB 2.0 CONNECTOR SIDE

27M

87

PCI HOST CONTROLLER

PCI-CLK-USB20_ETH

7

USB20-2-DM USB20-2-DP

90

9

92

8

RESET-USB20

5

RESET-ETHERNET

B08D ANALOGUE EXTERNALS D 7E17 ST3232C

B03H

74

B09B B09B

PCI-REQ-PNX85XX

D21

PCI-GNT-PNX85XX PCI-REQ-USB20 PCI-GNT-USB20

E21 E22 E20

E27

RXD-MIPS

D28

TXD-MIPS

RS232 INTERFACE 9 R1-OUT

10

RXD-UP

12

AC5

TXD-UP

11

2H07

SDM

B04E

AE2

2H06

SPI-PROG

7

2

R1-OUT T1-IN

UART SERVICE CONNECTOR

UART LEVEL ADAPTER

SDM B04A STANDBY CONTROLLER

1E06 3

R2-IN 8 T2-OUT

AB1

AB2

B04A PNX 8541: STANDBY CONTROLLER

T1-IN

WP-NANDFLASH (P0.5)

V5

B04C PNX 8541: NVM

1

LIGHT-SENSOR

32

3

RC-IN

45

7F8J LED2 30

5

RESET

28

LVDS-ENABLE LCD-PWR-ON

36

UP-WC

41

ENABLE+3V3

46

BACKLIGHT-PWM-ANA-DISP

+3V3-STANDBY

6

23

MICRO CONTROLLER 35

7F8H LED1 29

1

BACKLIGHT-BOOST

2

LAMP-ON

3

BACKLIGHT-OUT

11 +5V N.C.

16M9

8

1F8A

N.C.

12

B01A OUTP 1 RESET-STBY

M03A 2 M01A M03A M03B

3

M03B

AB3 AA3

DETECT2

W1

DETECT1

W2

B04A B04A

B01D LED PANEL CONTROL

B04E M03B

1M20 9

VOLTAGE DETECT

B08A N.C.

AC3 AC1

AD1

AV2-BLK

AC2

AV1-STATUS

AF2

AV2-STATUS

AF1

KEYBOARD

AF4

B08A KEYBOARD

7

7U91

M03B DP RECEIVER & POWER SUPPPLY M03A DP-RX 7F0K CDCE913R01PW

6 75A3 M25P10-AVMN6P

7F00 EP2C5F256C7N

1 CLOCK SYNTHESIZER 11

14

GCLK

J16

7F0A GM68020H-BE 127 GENESIS

FPGA CYCLONE II

H4

DCLK

6

F4 C3 F1

nCSO ASDO DATA0

1 5 2

E14

CLK0-PLL

H2

13

A-CLK

H16

101

B-CLK

H15

1M FLASH

TO 1M01 E KEYB.CONT

LED1

4

9U91

8 1

AD3

LED2

RC

3 5

8

EEPROM (8Kx8)

AD2

RC

AG2 SPI-CLK

6

AE4

SPI-WP

3

AE3 AD4 AE1

SPI-CSB SPI-SDO SPI-SDI

1 5 2

AA1

REGIMBEAU_CVBS-SWITCH

7E13 AD8197AASTZ

512K FLASH

U3

RESET-PNX5100

U2

RESET-ETHERNET

V4

RESET-AUDIO

W3

+5V LIGHT-SENSOR

B08G HDMI SWITCH 7H02 M25P05-AVMN6P

B04E

STANDBY

Y3

ENABLE-3V3

Y4

ENABLE-1V2

RESET-SYSTEM

44

HDMI SWITCH

B08A

B01B DC / DC

B05F B09B B09A B04M AUDIO

AA2

+3V3-STANDBY

LIGHT-SENSOR

B01A

AG1

AV1-BLK

B08A

SENSE+1V2-PNX8541

V25

RESET-SYSTEM

B08A

M03B M03D

RESET-NVM

U4

B04P POWER GND

M03B

MONITOR+AUDIO-POWER MONITOR+24V MONITOR+3V3 MONITOR+12V

SUPPLY-FAULT RESET-STBY-J

INP

M01A

UP-RESET

6 33 34 38 39

M03B

7HC3 M24C64-WDW6P

7HC4

+3V3-STANDBY 7HD0 NCP303LSN

27M

7F8G LPC2103FBD48

4

27M

IRQ-CA

SPI-PROG

1M20

1F0E

G27

B05F I2C B09B

PCI-AD(0-31) 75

B04D PNX 8541: MISCELLANEOUS

MONITOR M03D DP-RX

9

78

USB20-OC2

IRQ-PCI

ONLY FOR MPEG4

ONLY FOR MPEG4

7

USB20-OC1

T3

1HF0

1

USB-OC

FLASH EPROM

B02A B02C B04A B08G

WC-EEPROM-PNX5100

T2

B04F CONTROL

7N00 ISP1564HL

1N01

U1 LMI-CLK LMI-CLKnot U2 LMI-CLKEN Y5

B04F PNX8541: CONTROL

B03F USB B09A USB 2.0 CONN.

12M

LMI-A(0-12)

16Mx16

TO 1M20 J IR/LED

RESET-SYSTEM

AJ26

DDR SDRAM

TO POWER SUPPLY

1M95 2

STANDBY

B04A

B01B B01A B01C B01A B01C

AF3

I_18020_128.eps 251108

Block Diagrams, Test Point Overview, and Waveforms

Q529.1E LC

6.

61

SSB: Test Points (Overview Top Side) I215 I550 I551 I552 I553 I554 I556 I557 I558 I559 I561 IAC0 IAC0 IE31 IE31 IE33 IE34 IE34 IE40 IE40 IH06 IH06 IH93 IH94 IH95 IH95 IHPF IHPF IHR0 IHR3 IHR3 IHR4 IHR4 IHR5 IHR5 IHR6 IHR6 IHRC IHRD IHRF IHRT IHRU IN0K IN0K IN0N IN0N IN0T IN0V IN0V

Part 2 I_18020_061b.eps Part 1 I_18020_061a.eps

Part 3 I_18020_061c.eps

Part 4 I_18020_061d.eps

3104 313 6304.3

I_18020_061.eps 200808

E4 F5 C5 C5 C5 C5 C5 C5 C5 D5 A8 F5 F5 A8 A8 A8 A7 A7 A8 A8 C5 C5 C5 C5 C5 C5 D5 D5 C5 C5 C5 D5 D5 D5 D5 C5 C5 D5 C5 C5 C5 C5 E4 E4 F5 F5 F4 E4 F4

Block Diagrams, Test Point Overview, and Waveforms

Q529.1E LC

6.

62

SSB: Test Points (Overview Bottom Side) A1 A2 A3 A4 A5 F1 F2 F3 F4 F5 F6 F7 F8 F9

D3 D3 D2 D2 C4 B5 A5 B6 A3 A6 A3 B5 A5 B6

I1 I2 I3 I4 I5 I6 I7 I8 I9 F10 F11 F12 F13 F14

A4 A4 C1 B1 B1 C1 A4 A4 A5 B5 A5 A6 A1 A2

F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28

B1 A3 A5 B3 A2 A3 B3 A1 A2 A2 A4 A4 A4 A4

F29 F30 F31 F32 F33 F34 F35 F36 F37 F38 F39 F40 F41 F42

B3 A1 A1 A1 A1 B1 B1 A5 A5 B3 A5 A5 A3 A5

F43 F44 F45 F46 F47 F48 F49 F50 F51 F52 F53 F54 F55 F56

A5 A6 A6 A2 A4 B3 A3 A1 A1 A3 A1 B5 B5 B5

F57 F58 F59 F60 F61 F62 F63 F64 F65 F66 F67 F68 F69 F70

B5 B5 B5 B5 B5 B5 B5 A1 A1 A1 A2 A2 A2 A2

F71 F72 F73 F74 F75 F76 F77 F78 F79 F80 F81 F82 F83 F84

A1 A1 A1 B6 A1 B1 C1 C1 C1 B1 B6 B1 C1 B6

F85 F86 F87 F88 F89 F90 F91 F92 F93 F94 F95 F96 F97 F98

A3 B3 A3 A3 B3 B3 A3 B3 B3 B3 B3 B3 B3 A4

F99 I10 I11 I12 I13 I14 I15 I16 I17 I18 I19 I20 I21 I22

B3 A5 A4 A5 A4 A5 A6 A5 A5 A1 A4 A4 A6 B6

I23 I24 I25 I26 I27 I28 I29 I30 I31 I32 I33 I34 I35 I36

B6 B6 A6 A6 A5 A4 B5 B4 B6 A6 A4 B1 A3 B1

I37 I38 I39 I40 I41 I42 I43 I44 I45 I46 I47 I48 I49 I50

A4 A3 A2 B2 A3 A3 A4 A4 A4 A4 A1 A1 A2 A2

I51 I52 I53 I54 I55 I56 I57 I58 I59 I60 I61 I62 I63 I64

A2 A3 A3 A1 A5 B5 B4 A5 A5 A5 A1 A1 A1 A2

I65 I66 I67 I68 I69 I70 I71 I72 I73 I74 I75 I76 I77 I78

A2 A2 A2 A2 A3 B1 B1 A5 A1 B4 B4 F7 F7 F7

I79 I80 I81 I82 I83 I84 I85 I86 I87 I88 I89 I90 I91 I92

F7 E7 E7 E7 E7 E7 F7 F7 E7 F7 F7 F7 F7 F7

I93 I94 I95 I96 I97 I98 I99 AHF0 AT50 AT51 AT62 AT63 F100 F101

E7 E7 E7 F7 F7 F7 E7 C4 D2 D2 D3 D3 B3 B3

F102 F103 F104 F105 F106 F107 F108 F109 F110 F111 F112 F113 F114 F115

B3 B3 G8 G8 G8 G8 G8 G8 G8 G8 G8 G7 G7 G8

F116 F117 F118 F119 F120 F121 F122 F123 F124 F125 F126 F127 F128 F129

G7 G7 G7 G7 G7 G7 G8 G7 G7 G7 G7 F8 F8 E7

F130 F131 F132 F133 F134 F135 F136 F137 F138 F139 F140 F141 F142 F143

F7 F7 G8 G8 G8 G8 G8 F8 F7 E7 G8 G8 G8 G8

F144 F145 F146 F147 F148 F149 F150 F151 F152 F153 F154 F155 F156 F157

F8 G8 G8 F6 E7 F7 F7 F7 F7 F7 F7 F7 G8 F7

F158 F159 F160 F161 F162 F163 F164 F165 F166 F167 F168 F169 F170 F171

E7 F7 F7 F7 C2 C2 C2 C2 C2 C2 C2 C2 D1 C2

F172 F173 F174 F175 F176 F177 F178 F179 F180 F181 F182 F183 F184 F185

D2 D2 C2 D2 C2 E2 D1 D1 D3 D1 D1 D1 D1 C1

F186 F187 F188 F189 F190 F191 F192 F193 F194 F195 F196 F197 F198 F199

D2 C2 D1 D1 D1 C1 D3 D3 D3 D3 C3 C3 C3 C3

F200 F201 F202 F203 F204 F205 F206 F207 F208 F209 F210 F211 F212 F213

D1 D1 D1 D2 D1 E4 E5 E5 E6 B5 D4 D4 D4 D4

F214 F215 F216 F217 F218 F219 F220 F221 F222 F223 F224 F225 F226 F227

D4 D4 C4 B5 C5 C4 B4 C7 B5 B5 C6 C6 C6 C6

F228 F229 F230 F231 F232 F233 F234 F235 F236 F237 F238 F239 F240 F241

C6 D4 C5 C6 B4 C4 D3 C4 C4 C4 B8 B8 A8 C8

F242 F243 F244 F245 F246 F247 F248 F249 F250 F251 F252 F253 F254 F255

A8 A8 A8 B8 A8 C8 B8 B7 B7 B7 B7 C7 B7 B7

F256 F257 F258 F259 F260 F261 F262 F263 F264 F265 F266 F267 F268 F269

B7 B7 B7 A8 A8 C8 B8 B8 B8 B8 B8 B8 B8 B8

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Part 3 I_18020_062c.eps

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F270 F271 F272 F273 F274 F275 F276 F277 F278 F279 F280 F281 F282 F283

B8 B8 B8 B8 B8 B8 C8 C8 C8 C8 C8 C8 C8 C8

F284 F285 F286 F287 F288 F289 F290 F291 F292 F293 F294 F295 F296 F297 F298 F299 F300 F301 F302 F303 F304 F305 F306 F307 F308 F309 F310 F311 F312 F313 F314 F315 F316 F317 F318 F319 F320 F321 F322 F323 F324 F325 F326 F327 F328 F329 F330 F331 F332 F333 F334 F335 F336 F337 F338 F339 F340 F341 F342 F343 F344 F345 F346 F347 F348 F349 F350 F351 F352 F353 F354 F355 F356 F357 F358 F359 F360 F361 FA10 FA11 FA12 FA50 FA51 FA52 FA53 FA54 FA55 FA60 FA61 FA62 FA63 FA64 FA65 FA66 FA69 FA70 FA71 FA72 FA73 FAA0 FAA1 FAA2 FAA3 FAA4 FAC0 FAM0 FAM1 FAM2 FAM3 FAM4 FAM5 FAM6 FAM7 FAM8 FAM9 FAMA FAMB FAME FAMJ FC05 FC06 FC10 FC11 FC12 FC13 FC14 FC15 FCA0 FCA1 FCA2 FCA3 FCA4 FCA5 FCA6 FCA7 FCA8 FCA9 FCAA FCAB FCAC FCAD FCAE FCAF FCAG FCAH FCAJ FCAK

C8 C8 C8 C8 C8 A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 B8 A8 A8 A8 A8 A8 A8 A8 B8 B8 B8 A8 D8 C8 C8 C8 C8 C8 B7 A7 F3 F3 G4 G4 F4 F4 F4 F4 F4 F4 F4 G4 G4 G4 F4 F5 F5 F5 G6 G6 G2 F2 D1 D1 D1 E1 E1 E1 E1 E1 E1 E1 G4 G4 G5 G4 G4 G4 F4 F5 F5 F5 F5 F4 G4 G4 G4 G5 G4 G4 E1 E1 E1 E1 E1 E1 E1 D1 D1 D1 F2 G2 G6 G6 F5 F5 F5 F4 G4 G4 G4 F4 F4 F4 F4 F4 F4 F4 G4 G4 F3 F3 A7 B7 C8 C8 C8 C8 C8 D8 A8 B8 B8 A8 A8 A8 A8 A8 A8 A8 A8 B8 A8 A8 A8 A8 A8 A8 A8 A8

FCAM A8 FCAN A8 FCAP A8 FCAR A8 FCAS C8 FCAT C8 FCAV C8 FCAW C8 FCAY C8 FCAZ C8 FCB0 C8 FCB1 C8 FCB2 C8 FCB3 C8 FCB4 C8 FCB5 C8 FCB6 B8 FCB7 B8 FCB8 B8 FCB9 B8 FCBA B8 FCBB B8 FCBC B8 FCBD B8 FCBE B8 FCBF B8 FCBG B8 FCBH B8 FCBJ B8 FCBK B8 FCBM B8 FCBN C8 FCBP A8 FCBR A8 FCD0 B7 FCD1 B7 FCD2 B7 FCD3 B7 FCD4 B7 FCD5 C7 FCD6 B7 FCD7 B7 FCD8 B7 FCD9 B7 FCG0 B8 FCG1 C8 FCG2 A8 FCG3 B8 FCG4 A8 FCG5 A8 FCG6 A8 FCG7 C8 FCJ0 A8 FCJ1 B8 FCJ2 B8 FE01 B3 FE02 B3 FE03 B3 FE04 B3 FE05 B3 FE06 A4 FE07 B3 FE08 B3 FE09 B3 FE10 B3 FE11 B3 FE12 B3 FE13 A3 FE14 B3 FE15 B3 FE16 A3 FE17 C1 FE18 B1 FE19 A3 FE20 B3 FE21 B1 FE22 C1 FE23 C1 FE24 C1 FE25 B1 FE26 A3 FE27 B6 FE28 B6 FE29 B6 FE30 A1 FE31 A1 FE32 A1 FE33 A1 FE34 A2 FE35 A2 FE36 A2 FE37 A2 FE38 B5 FE39 A5 FE40 B5 FE41 B5 FE42 B5 FE43 B5 FE44 B5 FE45 B5 FE46 B5 FE47 B5 FE48 A1 FE49 A1 FE50 A1 FE51 A1 FE52 A3 FE53 A1 FE54 A1 FE55 A3 FE56 B3 FE57 A6 FE58 A4 FE59 A2 FE60 A6 FE61 A5 FE62 A5 FE63 B3 FE64 A5 FE65 A5 FE66 B3 FE67 A5 FE68 A5 FE69 B1 FE70 B1 FE71 A1 FE72 A1 FE73 B1 FE74 A1 FE75 B3 FE76 A4 FE77 A4 FE78 A4 FE79 A4 FE80 A2 FE81 A2 FE82 A1 FE83 B3 FE84 A3 FE85 A2 FE86 B3 FE87 A5 FE88 A3 FE89 B1 FE90 A2 FE91 A1 FE92 B5

FE93 FE95 FE96 FE97 FE99 FEA0 FEA1 FEB2 FEB3 FEB9 FEC0 FH00 FH01 FH02 FH03 FH04 FH05 FH06 FH07 FH08 FH09 FHC1 FHC2 FHC6 FHC7 FHD0 FHD1 FHG0 FHM0 FHM1 FHM2 FHM3 FHPE FHR1 FHR2 FHR3 FHR4 FHR5 FHR6 FHV3 FN00 FN0A FN0B FN0C FT11 FT12 FT13 FT15 FT17 FT18 FT19 FT20 FT21 FT22 FT23 FT24 FT25 FT36 FT37 FT38 FT39 FT40 FT41 FT42 FT43 FT52 FT56 FT57 FT58 FT59 FT76 FT77 FTA1 FTA2 FTA3 FTA4 FTA5 FTA7 FTA8 FTA9 FTB0 FTB1 FTB2 FTB3 FTB4 FTB5 FTB6 FU00 FU01 FU02 FU03 FU04 FU05 FU06 FU07 FU08 FU09 FU0A FU0B FU0C FU0D FU0E FU10 FU11 FU12 FU1A FU1B FU1C FU1D FU1F FU1G FU20 FU21 FU22 FU23 FU24 FU27 FU28 FU29 FU40 FU75 FU76 FU80 FU81 FU82 FU83 FU84 FU85 FU86 FU87 FU88 FU89 FU8A FU8B FU8C FU8D FU90 FU91 FU92 FU93 FU94 FU95 FU96 FU97 FU98 I100 I101

B6 B5 A6 A6 B6 A5 A5 A3 A3 A5 B5 C4 C4 C4 D3 B4 B4 C6 C5 D4 C6 C6 C6 C6 C6 B5 B5 C7 B4 C4 C5 B5 C4 D4 D4 D4 D5 D4 D4 B5 E6 E5 E5 E4 D1 D2 D1 D1 D1 C3 C3 C3 C3 D3 D3 D3 D3 C1 C1 D1 C1 C2 D2 C1 D1 D1 D1 D1 D3 D1 D1 E2 C2 D1 C2 D2 D2 C2 D1 C2 C2 C2 C2 C2 C2 C2 C2 F7 F7 F7 F7 F7 G8 F7 F7 F7 F7 F7 F7 F7 E7 F6 G8 G8 F8 G8 G8 G8 G8 E7 F7 G8 G8 G8 G8 G8 F8 F7 F7 E7 F8 F8 G7 G7 G7 G7 G8 G7 G7 G7 G7 G7 G7 G8 G7 G7 G8 G8 G8 G8 G8 G8 G8 G8 G8 F7 F7

I102 I103 I104 I105 I106 I107 I108 I109 I110 I111 I112 I113 I114 I115 I116 I117 I118 I119 I120 I121 I122 I123 I124 I125 I126 I127 I128 I129 I130 I131 I132 I133 I134 I135 I136 I137 I138 I139 I140 I141 I142 I143 I144 I145 I146 I147 I148 I149 I150 I151 I152 I153 I154 I155 I156 I157 I158 I159 I160 I161 I162 I163 I164 I165 I166 I167 I168 I169 I170 I171 I172 I173 I174 I175 I176 I177 I178 I179 I180 I181 I182 I183 I184 I185 I186 I187 I188 I189 I190 I191 I192 I193 I194 I195 I196 I197 I198 I199 I200 I201 I202 I203 I204 I205 I206 I207 I208 I209 I210 I211 I212 I213 I214 I215 I216 I217 I218 I219 I220 I221 I222 I223 I224 I225 I226 I227 I228 I229 I230 I231 I232 I233 I234 I235 I236 I237 I238 I239 I240 I241 I242 I243 I244 I245 I246 I247 I248

F7 F7 F7 F7 F7 F7 F7 F7 E7 E7 F7 F7 E7 F7 E7 E7 E7 F7 F7 E7 G8 G8 G8 G8 G8 G8 E7 C5 G8 G8 G8 G8 E7 F7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G8 G7 G7 G7 G7 E7 E7 E7 E7 E7 E7 E7 E7 E8 E8 E8 E7 E7 E7 E7 F7 E7 F7 E7 E7 E7 F8 F8 F7 F7 F7 E7 E7 G8 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 E7 E7 E7 D1 C2 E2 D1 D1 C2 D2 D2 D2 D2 E5 D2 D2 C2 C2 D2 D2 D3 E3 D2 D2 D2 D2 D2 D2 D2 D1 C2 C2 C3 D2 D2 C1 C1 D2 D1 D2 D1 D2 D2 D2 D2 C1 D2

I249 I250 I251 I252 I253 I254 I255 I256 I257 I258 I259 I260 I261 I262 I263 I264 I265 I266 I267 I268 I269 I270 I271 I272 I273 I274 I275 I276 I277 I278 I279 I280 I281 I282 I283 I284 I285 I286 I287 I288 I289 I290 I291 I292 I293 I294 I295 I296 I297 I298 I299 I300 I301 I302 I303 I304 I305 I306 I307 I308 I309 I310 I311 I312 I313 I314 I315 I316 I317 I318 I319 I320 I321 I322 I323 I324 I325 I326 I327 I328 I329 I330 I331 I332 I333 I334 I335 I336 I337 I338 I339 I340 I341 I342 I343 I344 I345 I346 I347 I348 I349 I350 I351 I352 I353 I354 I355 I356 I357 I358 I359 I360 I361 I362 I363 I364 I365 I366 I367 I368 I369 I370 I371 I372 I373 I374 I375 I376 I377 I378 I379 I380 I381 I382 I383 I384 I385 I386 I387 I388 I389 I390 I391 I392 I393 I394 I395

D1 C2 D1 D1 D1 D2 C2 C2 D1 E5 E5 E5 E5 E4 E4 E5 E5 E4 E6 E6 E5 E5 E6 E6 E6 E5 E6 E5 E6 E5 D5 C5 C5 C5 D4 D6 C5 C5 C5 B5 B5 B5 B5 B5 D5 C4 B5 B5 D4 C4 C4 D4 B5 B5 C4 C5 C5 C5 D5 D5 D6 D5 D5 D5 D5 D5 C4 D4 D5 D4 C4 D4 D4 D4 D5 C5 D4 D4 D4 D4 D4 C4 C4 C4 C4 C4 C4 D5 D4 C5 C4 C4 D4 C4 D4 D4 D4 C5 C5 C5 C5 C5 C5 B5 B5 C5 C5 C4 C4 C5 C4 B4 B4 C6 C6 C7 C6 C6 C6 C6 D5 D5 D5 D5 D6 B6 C5 D5 C6 D5 D5 D5 C6 B5 C5 C6 B4 B4 B5 B4 B4 B4 D3 D5 B5 D5 B5

I396 I397 I398 I399 I400 I401 I402 I403 I404 I405 I406 I407 I408 I409 I410 I411 I412 I413 I414 I415 I416 I417 I418 I419 I420 I421 I422 I423 I424 I425 I426 I427 I428 I429 I430 I431 I432 I433 I434 I435 I436 I437 I438 I439 I440 I441 I442 I443 I444 I445 I446 I447 I448 I449 I450 I451 I452 I453 I454 I455 I456 I457 I458 I459 I460 I461 I462 I463 I464 I465 I466 I467 I468 I469 I470 I471 I472 I473 I474 I475 I476 I477 I478 I479 I480 I481 I482 I483 I484 I485 I486 I487 I488 I489 I490 I491 I492 I493 I494 I495 I496 I497 I498 I499 I500 I501 I502 I503 I504 I505 I506 I507 I508 I509 I510 I511 I512 I513 I514 I515 I516 I517 I518 I519 I520 I521 I522 I523 I524 I525 I526 I527 I528 I529 I530 I531 I532 I533 I534 I535 I536 I537 I538 I539 I540 I541 I542

B4 C5 B5 C4 C6 B4 B4 B4 B4 B4 B4 C4 D3 B6 B6 B4 B4 C5 B6 B4 C4 C4 C4 C4 A8 A8 C8 C8 C8 C8 C8 B7 A8 B8 B8 B8 B8 A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 B8 B8 B8 B8 B8 B8 C8 B7 B6 C8 C8 B8 C8 C8 C8 B8 B7 C8 C8 B8 B8 B8 B8 B8 A7 B7 B7 B7 B8 B7 B7 B7 B7 B7 C7 C7 B7 B7 B7 C8 A7 C8 C7 C7 A6 A6 A6 A7 C8 C8 C8 C8 C8 C8 C7 C8 B7 F5 F5 F5 G5 F5 F4 F4 F4 F4 F4 F4 F4 F5 F5 F5 G3 F2 F3 G3 G2 F3 G2 F3 F3 E1 E1 E1 E1 E1 G4 G4 G4 G4 F6 F6 F4 F4 G4 G4 G4 G4 F4 G4

I543 I544 I545 I546 I547 I548 I549 I555 I560 I562 I563 I564 I565 I566 I567 IA10 IA11 IA12 IA16 IA17 IA18 IA19 IA20 IA21 IA22 IA23 IA24 IA25 IA26 IA27 IA28 IA29 IA30 IA31 IA33 IA50 IA51 IA52 IA53 IA60 IA61 IA62 IA63 IA64 IA70 IA71 IA72 IA73 IA74 IA75 IA76 IA77 IA78 IA79 IAA0 IAA1 IAA2 IAC2 IAC3 IAC4 IAC5 IAE1 IAE2 IAE3 IAE4 IAE5 IAE6 IAE8 IAE9 IC02 IC03 IC04 IC05 IC06 IC07 IC08 IC09 IC10 IC11 IC12 IC13 IC14 IC15 IC16 IC17 IC18 IC20 IC50 IC51 IC54 IC61 IC63 IC80 IC81 IC82 IC83 IC84 IC85 IC86 IC87 IC88 IC89 IC90 ICA2 ICA3 ICA4 ICA5 ICA7 ICA8 ICA9 ICAA ICAB ICAC ICAD ICAE ICAF ICAG ICD7 ICD8 ICG0 ICG1 ICG2 ICG3 ICG4 ICG5 ICG6 ICG7 ICG8 ICG9 ICGA ICGH ICGK ICGM ICGN ICGP ICGR ICGV ICGW ICGY ICGZ ICH3 ICH4 ICH5 ICH6 ICH7 ICH8 ICH9

F5 F5 F5 E5 E5 F5 F5 F4 G5 F5 E4 E4 E4 E5 G2 F5 G5 F4 F5 F5 E5 E5 F5 F5 F5 G4 F4 G4 G4 G4 G4 F4 F4 F6 F6 G4 G4 G4 G4 E1 E1 E1 E1 E1 F3 F3 F2 G2 F3 G2 G3 F3 F2 G3 F5 F5 F5 F4 F4 F4 F4 G4 F4 F4 F5 G5 F5 F5 F5 B7 C8 C7 C8 C8 C8 C8 C8 C8 A7 A6 A6 A6 C7 C7 C8 A7 C8 B7 B7 B7 C7 C7 B7 B7 B7 B7 B7 B8 B7 B7 B7 A7 B8 B8 B8 B8 B8 C8 C8 B7 B8 C8 C8 C8 B8 C8 C8 B6 B7 B8 B8 B8 B8 A8 B8 B8 A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 B8 B8 A8 A8 B7 C8 C8 C8 C8 C8

ICHB ICKA IE01 IE02 IE03 IE04 IE05 IE06 IE07 IE08 IE09 IE10 IE11 IE12 IE13 IE14 IE15 IE16 IE17 IE18 IE19 IE20 IE21 IE22 IE23 IE24 IE25 IE28 IE29 IE30 IE32 IE36 IE38 IE41 IE44 IE45 IE46 IE47 IE51 IE58 IE59 IE60 IE61 IE62 IE63 IE64 IE65 IE66 IE67 IE68 IE70 IE72 IE75 IE76 IE78 IE79 IE80 IE81 IE82 IE83 IE84 IE85 IE86 IE87 IE88 IE89 IE90 IE91 IE93 IE94 IE95 IE96 IE98 IEC0 IEC1 IEC2 IEC3 IH00 IH01 IH02 IH03 IH04 IH05 IH07 IH08 IH09 IH10 IH11 IH12 IH13 IH14 IH16 IH17 IH18 IH19 IH20 IH21 IH22 IH24 IH25 IH26 IH27 IH28 IH29 IH30 IH32 IH33 IH34 IH35 IH80 IH91 IH92 IHC1 IHC2 IHD0 IHF0 IHF1 IHF2 IHF3 IHF5 IHF7 IHG0 IHG1 IHG2 IHK1 IHK2 IHK3 IHK4 IHM2 IHM3 IHM4 IHM5 IHM6 IHM7 IHM8 IHMV IHMW IHMY IHMZ IHN3 IHN6 IHNA IHNB IHND IHNE IHPA IHPB

A8 A8 B4 B4 A1 A4 A5 A5 A4 B1 B1 A3 A2 A2 A2 A2 A2 A1 A1 A1 A5 A5 A5 A5 A5 B4 B5 A5 A1 A3 A3 A4 A4 A2 A2 A2 A1 A1 A4 C1 A4 A4 A4 B3 A3 B2 A2 B1 B1 B3 A4 C1 A6 B6 B1 A5 A3 B5 A6 B1 A6 B6 B6 B6 B6 B4 A4 A4 A4 A4 A1 A4 A4 A5 A5 A6 A5 C4 C4 C4 C4 B4 B6 C5 B4 B4 B6 B6 D3 C4 B4 B4 B4 B4 B4 B4 C6 C4 B5 B5 B4 B5 D5 B5 D5 D3 B4 B4 B4 B5 B4 B4 C6 C5 B5 C6 D5 D5 D5 C6 D5 C5 B6 D6 D5 D5 D5 D5 C6 C6 C6 C6 C7 C6 C6 B4 B5 C4 C5 C5 C4 C5 C5 B5 B5 C5 C5

IHPD IHPG IHPH IHPK IHR1 IHR8 IHRA IHRB IHRE IHRH IHRJ IHRK IHRL IHRM IHRV IHRW IHRY IHRZ IHS0 IHS1 IHS2 IHS3 IHS4 IHS5 IHS6 IHS7 IHS8 IHSA IHSB IHSC IHSD IHSE IHSF IHSG IHSH IHSK IHSL IHSM IHSN IHSP IHSR IHSS IHST IHSU IHSV IHSW IHSY IHV1 IHV2 IHV3 IHV4 IHV5 IHV6 IHVA IHVB IHVE IHW0 IHW7 IHW8 IHWE IHWJ IHWL IHY0 IHY1 IHY2 IHY3 IHY4 IHY5 IHY6 IHY7 IHY8 IHYA IN00 IN01 IN03 IN04 IN05 IN06 IN07 IN08 IN09 IN0A IN0B IN0C IN0D IN0E IN0H IN0L IN0M IN0U IN0W IN0Y IN0Z IN10 IN30 IN32 IN34 IN35 IT03 IT04 IT05 IT07 IT10 IT11 IT15 IT18 IT19 IT21 IT22 IT23 IT24 IT25 IT26 IT27 IT28 IT29 IT30 IT31 IT32 IT33 IT34 IT35 IT36 IT37 IT41 IT71 IT73 IT74 IT75 IT76 IT77 IT78 IT79 IT81 IT86 IT89 IT90 IT91 IT92 IT93 IT94 IT95 IT96 IT97 ITA2 ITA3 ITA4

C5 C5 C5 C5 D4 D4 D4 C4 D4 C4 C4 C5 D4 D5 C4 C4 C4 C4 C4 C4 D4 D4 D4 D4 D4 C5 D5 D4 D4 D4 C5 D4 D5 D4 C4 D5 D5 D5 D5 D5 D6 D6 D5 C5 C5 C5 C4 B5 B5 D4 C4 C4 D4 B5 B5 C5 D5 B5 B5 B5 B5 B5 C5 C5 C5 D6 D5 C5 C5 C5 C5 D6 E5 E5 E6 E5 E6 E5 E6 E6 E6 E5 E5 E6 E6 E4 E5 E5 E4 E4 E5 E5 E5 E5 E5 E4 E4 E4 D1 C2 C2 D2 D1 D1 D1 C2 D1 D2 C1 D2 D2 D2 D2 D1 D2 D1 D2 C1 C1 D2 D2 C3 C2 C2 D1 D1 D2 D2 D2 D2 D2 D2 E3 D3 D2 D2 C2 C2 D2 D2 D2 D2 D2 D2 C2 D1 D1

ITA5 ITA6 ITA8 IU00 IU01 IU02 IU03 IU04 IU05 IU06 IU07 IU08 IU09 IU0A IU0B IU0C IU0D IU0E IU0F IU0G IU0H IU0K IU0N IU0P IU0S IU0T IU0U IU0V IU0W IU0Y IU0Z IU10 IU11 IU12 IU13 IU14 IU15 IU16 IU19 IU1B IU1D IU1E IU1F IU1G IU1H IU1K IU1M IU1N IU1P IU1R IU1S IU1T IU20 IU21 IU22 IU23 IU24 IU25 IU26 IU28 IU29 IU2A IU2C IU2D IU2E IU2F IU2G IU2H IU2J IU2M IU2P IU2R IU2T IU2V IU2Y IU2Z IU34 IU35 IU36 IU37 IU38 IU39 IU3B IU3C IU3D IU3E IU3F IU3G IU3H IU3K IU3M IU3N IU3P IU3R IU3S IU3T IU40 IU41 IU42 IU43 IU44 IU45 IU46 IU47 IU80 IU81 IU82 IU83 IU84 IU85 IU86 IU87 IU88 IU89 IU8A IU8B IU8C IU8D IU8E IU8F IU8G IU8K IU90 IU92 IU93 IU94 IU95 IU96 IU97 IU98 IU99

E2 C2 D1 E7 F7 F7 E7 E7 E7 F7 E7 F7 F7 E7 F7 F7 F7 F7 F7 F7 F7 F7 F7 F7 F7 E7 F7 F7 F7 E7 E7 F7 F7 F7 F7 F7 F7 F7 F7 F7 E7 E7 E7 E7 E7 F7 F7 F7 F7 E7 E7 E7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G8 E7 E7 G7 F7 F7 F8 G8 E7 E7 E7 F7 E7 F7 E7 E7 E7 E7 E8 E8 E8 E7 E7 E7 E7 E7 E7 E7 E7 E7 G7 G7 G7 G7 G8 G7 G7 G7 G7 G7 G7 G7 G7 G7 F7 E7 G8 G8 G8 G8 G8 G8 G8 G8 G8 G8

Block Diagrams, Test Point Overview, and Waveforms

Q529.1E LC

6.

63

SSB: Test Points (Part 1 Bottom Side)

Part 1

I_18020_062a.eps 210808

Block Diagrams, Test Point Overview, and Waveforms

Q529.1E LC

6.

64

SSB: Test Points (Part 2 Bottom Side)

Part 2

I_18020_062b.eps 210808

Block Diagrams, Test Point Overview, and Waveforms

Q529.1E LC

6.

65

SSB: Test Points (Part 3 Bottom Side)

Part 3

I_18020_062c.eps 210808

Block Diagrams, Test Point Overview, and Waveforms

Q529.1E LC

6.

66

SSB: Test Points (Part 4 Bottom Side)

Part 4

I_18020_062d.eps 210808

Block Diagrams, Test Point Overview, and Waveforms

Q529.1E LC

6.

67

I2C IC Overview I²C PNX8541: CONTROL

HDMI

B08F

CHANNEL DECODER

B02A

B02B

B02C

MAIN TUNER

CHANNEL DECODER DVB-C

PNX8541: FLASH

94

PBRX-DDC-SCL

9E19

CBX-DDC-SCL

15

EEPROM

EEPROM

B04C

B05A

I2C uP-SCL AG4

3H50

K1

3H65

SCL-UP-MIPS

7C01 HYB18TC512160B2F

512K FLASH

6

7C02 HYB18TC512160B2F

MM_DATA

PNX5100

5

2

7C20 PCA9540BDP

EEPROM

IC2 MULIPLEXER

4

ERR 24

7

B04E

3T33

3T32

3CA5

49

B03A

R1-OUT 1E06 3

7

UART SERVICE CONNECTOR

2

12 15

DATA-SDA

3E71

CLK-SCL

3E65

11

T2-OUT

1E05 10

R2-IN 8

7E18 M24C02

3E47

T1-IN

3E70

+5VDCOUT

15

11

5

12

TXD-UP

TXD

D28

TXD-MIPS

9 R1-OUT 10

STI7101: SDRAM

AJ31

7AA1 EDD2516A

1

RXD-UP

AC5

5

EEPROM

6

256x8

3TB7

3TB8

TEMP SENSOR

LED DIMMER

ERR 12

M03D

LMI-D

DDR SDRAM 16Mx16

LMI-A

M01A

DP-RX

DIGITAL INTERFACE ERR 38

RXD-UP

9

1

TXD-UP

10

3

RXD-GPROBE

13

STI7101: FLASH

1

TXD-GPROBE

14

7A50 M29W640FT70N6

FLASH EPROM 8Mx8 4Mx16

T2-IN RS232 INTERFACE R1-IN R2-IN T1-OUT

EMI-D(0-15)

UA-RX UATX-BS-4

EMI-A(1-22)

8

1E06 3

RXD

7

UART SERVICE CONNECTOR

2

TXD

12 R1-OUT 11

T1-IN

UART LEVEL ADAPTER

LD3

GENESIS

3315

SDRAM 1F41

DP-RX

M03B

+3V3

SDA-UP

3F8N

7205 EP2C5F256C7N

7304 CDCE913R01PW

7300 GM60028H-BF

7F8G LPC2103FBD48

FPGA CYCLONE II

CLOCK SYNTHESIZER

GENESSIS TRANSMITTER

MICRO CONTROLLER

ERR 54

3F8M

1M71 3

TEMP SENSOR 1 (EXTERNAL)

1

68020 1 I2C BUS

7F8D LM75ADP

48

SDA-AUX SCL-AUX

1302 DEBUG

1

RXD

3337

TXD

3336

13 14

RS232 INTERFACE 12

11

UA-RX UA-TX-BS-4

137

DPRX-AUXP

1FDP 15

136

DPRX-AUXN

17

20

13 28

+3V3

DP-RX

3F84 3F83

29

UATX-BS-4

42

3F0U MSDA-I2C

41

3F0T MSCL-I2C

150 149 51

12

5

6

G10

G11

UA-RX

GENESSIS RECEIVER

52 7306 ST3232C

31

7F0A GM68020H-BE

TEMP SENSOR

47

30

3F1B

1F0A 3

2

3F1E

3F1D

3F8H

3F8G 18

+3V3

3F0V

21

3F0W

23

3F9E

3F9M

3340 22

12

3F0S

13

G11

3F0R

G10

3

M03A

DP RECEIVER & POWER SUPPLY

SCL-UP

3330

SCL-DISP

3329

SDA-DISP

3

3201

2

M03D

+3V3

3FD4

FPGA: I/O BANKS

3FD5

LD2

3317

LVDS CONNECTOR + SUPPLY

3341

LD1

3202

DDR2-A

7HG1 EDE5116AJBG

DC / DC

MONITOR

DDR DDR2-D

TO SUPPLY

R2-OUT

T2-OUT

PNX8541: SDRAM 7HG0 EDE5116AJBG

9

7F8K ST3232C

3

ONLY FOR MPEG4

B04G

3U35

1

AJ30

7A00 ST-7101BWC

7AA2 EDD2516A

B03B

T1-IN

1M95 11

3U36

TO FAN

2

1F9A

UART LEVEL ADAPTER

B04G

3C45

1F8B

VGA CONNECTOR

1M71 3

SCL-ST

B03C

6

AB1

6

7CJ2 PCA9533DP

3A44

ANALOGUE EXTERNALS B

7

7C06 LM75ADP

SDA-ST

3A45

B08B

RS232 INTERFACE

RXD-MIPS

DC / DC

1

STI7101: CONTROL

8

ANALOGUE EXTERNAL D

2

3C46

WC-EEPROM-PNX5100

7E17 ST3232C

E27

3T56

1

1G51 50

8

B08D

RXD

B01B

SDA-DISP

7

TXD

PNX5100: PCI

SCL-DISP

5

3CA4

EEPROM (MAIN NVM)

RESET-NVM

U4

1

7CD0 M24C08

DDR SDRAM 16Mx16

MM_A

ERR 21

6

7HC3 M24C64

7HC4

RXD

3T57

3T28

B05G

+3V3

5

7C00 PNX5100EH

SDA-UP-MIPS

PNX5100: SDRAM

K2

7H02 M25P05

STANDBY CONTROL

PNX5100: LVDS

SCL-SSB

+3V3-PER

3H66

B05E

SDA-SSB

PNX8541: STANDBY CONTROLLER

I2C uP-SDA AH3

ERR 34

6

7E08 M24C02

PNX5100: CONTROL

B05F

PNX8541: NVM

MAIN TUNER

3F02

SCL-UP-MIPS

3x HDMI CONNECTOR

3F03

3HPF

ERR 48

3F2N

SCL2

ERR 26

1T04 TD1716F/PHXP

3F2P

SDA-UP-MIPS

AK29

ERR 37

3F1C

3HPG

CHANNEL RECEIVER

3C43

SDA2

IF PROCESSING 6

3C44

SCL-UP-MIPS

AK28

7

3C42

3HPD

B04A

EEPROM

17

7TA4 TDA10023HT

3C41

SCL1

HDMI 2 BACK

18

SCL-TUNER

3C60

AK27

B04A

5 6 7E12 M24C02

5

7E21 M24C02

6

HDMI 1 BACK

24

7T57 TDA9898HL

SDA-TUNER

16

CHANNEL RECEIVER

3C62

I2C2-SCL

SDA-UP-MIPS

3T26 1P03 16

HDMI 3 SIDE

3CDC

I2C2-SDA

3HPE

3E96

BRX-DDC-SDA

5

SDA1

3E97

15

9E20

NAND FLASH (128x8)

AH27

3E59

ARX-DDC-SCL

PBRX-DDC-SDA

3CD7

I2C1-SCL

3E60

PARX-DDC-SCL

93

3CD8

I2C1SDA

3E44

99

9E17

PCI XIO PCI-ADNAND-AD

ARX-DDC-SDA

9E18

3E48

7HA0 NAND512W3A2CN6E

B04F

15 1P02 16

7T17 15 TDA10048HN

3T36

90

CRX-DDC-SCL

PARX-DDC-SDA

98

ERR 23

B04Q

9E07

3CDD

DDC-SCL

PCRX-DDC-SCL

23

35

3T37

DDC-SCL

86

CRX-DDC-SDA

1 2

C9

DDC-SDA

HDMI MUX

89

9E11

19 18

DDC-SDA

PCRX-DDC-SDA

+3V3DVB

34 1P05 16

3EB4

PNX8541: DIGITAL VIDEO IN

E10

85

3E88

7E13 AD8197AASTZ

BIN-5V-EDID

AIN-5V-EDID

3E68

B04H

CIN-5V-EDID 49

3E67

B04H

50

3EC2

ERR 13

ERR 53

HDMI

SDA-SSB SCL-SSB

3E45

PNX8541

SDA-SSB SCL-SSB

3E28

3HPJ 3HPH

3HPK

SDA3 SCL3

3E29

I2C3-SCL

AJ27 AJ28

3HPM

+3V3-PER

I2C3-SDA

ERR 15

HDMI SWITCH

B08G

7H00 PNX8541E

3H49

B04E

7F0C 5 M24C04-WDW6P 6

7F0K CDCE913R01PW

7F0H M24C04-WDW6P

7F00 EP2C5F256C7N

CLOCK SYNTHESIZER

EEPROM

CYCLONE II

HDCP EEPROM (DP)

1FDP

DISPLAY LINK CABLE

15

DPRX-AUXP

17

DPRX-AUXN

21

I_18020_129.eps 101008

Block Diagrams, Test Point Overview, and Waveforms

Q529.1E LC

6.

68

Supply Lines Overview SUPPLY LINES OVERVIEW

B05e

7U73

+1V2-STANDBY

GND

MAIN POWER SUPPLY

2

3

3

4

4

5

5

6

6

7

7

8

8

B04A CONTROL

7U0L NCP5422

7U0H-1

12V 12V

B01d, B03f,B04a,l, B08a,b,d,g.f

+5V

5U05

+5V5-TUN

B02a,b, B04c

12V

7U0R +2V5-REF VOLT. REG.

B01c

GND I2C

9

9

10

10

11

11

+5V

LED PANEL CONTROL +3V3-STANDBY

+3V3

+3V3

+5V

+5V

B01a

+1V2-PNX8541

+1V2-PNX8541

+1V2-PNX5100

+1V2-PNX5100

B01a

B02A +3V3

5T08 +1V2-PNX8541

(RESERVED) B01a +3V3F

5T09

B01a +2V5

7U71

+5V STAB.

B03e

5T52

5T53

+5V-TUN

B04c

B02C

+5V-TUN

B03b B01a

+1V2-PNX8541

B04P

+3V3-PER

+3V3-STANDBY

B08d

+1V2-PNX8541

B04F

+12VF

5U02

7U08 14]0 1

Dual 7U02 Out-of-Phase Synchronous 2 Buck Controller

B01b,c

12V/3V3 COVERSION

B01c

5U01

PNX8541: CONTROL +3V3-PER

B04G +3V3F

B01a

7TA3 +1V8DVBC

5U03

+3V3F

B01b,B04g,

B03A

+12V

STI701: CONTROL

+2V5

7U05 16 7U06

+2V5

B01b 12V/1V2 COVERSION 5U00 +1V2-PNX8541

5A10

7H80 VOLT. REG.

B05E

B01a

+3V3

STI701: FLASH

1V2-STANDBY

3HJ1

DDR2-VREF-CTRL

3HJ3

DDR2-VREF-DDR +12V

GND +AUDIO-POWER

+3V3

B01a

+1V2-PNX5100-TRI-PLL3

5C64

+1V2-PNX5100-DDR-PLL1

5C65

+1V2-PNX5100-LVDS-PLL

5C66

+1V2-PNX5100-DLL

B09B

T1.0A

1G50

B09C

38

B04I

40

+2V5-LMI

PNX8541: AUDIO +12V

+12V

TO 1M20 B01D SSB

B01b B03h

3H38

3AAA

LMI-VREF-ST

3AAR

LMI-VREF2-ST

+3V3

J

+1V8-STANDBY +5V

M03c,d

M02b,M03a,b,d

+2V5-STAB41

M03d

7U03 M03d

DC / DC +24VF

1

5U51

12 7U51

+5V

M03d

+3V3-RS232

M03d

IN OUT COM

ETHERNET +3V3 5N06

+3V3-ET-DIG

5N07

+3V3-ET-ANA

M02A

AUDIO AUDIO-POWER-S

AUDIO-POWER-S

M02b

BUFFERING +3V3

AVCC

+3V3-STANDBY

+3V3-STANDBY

MAINS LED

5

+3V3-STBY

8

+5V2

M02B

AUDIO

+AUDIO-POWER

M01a

LD1

BUFFERING

+3V3

M01a

+AUDIIO-POWER

1D50

+AUDIO-POWER-S

T3.0A

+3V3

M02a

+3V3

+12V

+12V

AUDIO-VDD

PNX5100: DISPLAY-INTERFACING

B01b

+5V

VDDA-AUDIO IN OUT COM

+1VTMDS

+2V5

+3V3

B01a

+2V5

B04M

VDDE-2V5 +2V5-CLKGENA

B01b

+3V3

B01a

5AE0

+3V3TMDS

+12V

+3V3

+3V3

+3V3

VDDE-3V3

B01a

B04N

PNX8541: VIDEO STREAMS

+3V3-PER

B03c

B08A

LD2

FPGA” I/O BANKS

+1V2-FPGA

+1V2-FPGA

+3V3-FPGA

+3V3-FPGA

M01a

+2V5-L51

+2V5-L51

LD5

+1V2-PLL

+1V2-PLL

+2V5-L41

+2V5-L41

ANALOGUE EXTERNALS A

+5V

+12V

+12V

+5V

B04O

+3V3-ET-ANA 5A61

+3V3-ET-LED +5V

M01a

5300

+3V3-DVDD

5303

+3V3-SLA

+5V

5305

ANALOGUE EXTERNALS B

B01c +12V B01b

+12V

DP RECEIVER & POWER SUPPLY +3V3-STANDBY

+3V3

+3V3 5F0A

+3V3-DVDD

5F0A

+3V3-DPA

7F0Q IN OUT COM

1V8-DVDD

LD1

5F0B

+1V8-DVDD

5F0D

+1V8-DPA

1FDP

+1V8-SLA

20 +5V

+2V5-L41

+1V8

+3V3-STANDBY VDDA-LVDS

+2V5-L51 +2V5-STAB41

+3V3-STANDBY

+1V8

+1V8

B08B

PNX8541: DIGITAL VIDEO OUT / LVDS

VDDA-LVDS B04P

M03d

LD1

USB + ETHERNET CONNECTOR

+3V3-ET-ANA

+2V5-STAB51

5F04

+3V3

5302

B03F

+2V5-L41

+2V5-STAB41

LD1

B01b

B04P

+2V5-L51

55A7

5F04 M01a

GENESIS

+3V3

+5V

+1V2-PLL +1V2-FPGA

55AB

+2V5-STAB51

M03B LD3

+3V3

5F06

+2V5-STAB

B01c +3V3-PER

+1V2 5F01 5F02

B05e

LD5 +3V3

+3V3

B03d

2V5-LMI

2V5-LMI

LD3 LD4

+12V

51

+3V3-FPGA

7F04 IN OUT COM

+3V3-STANDBY

PNX8541: AUDIO

+12V

+3V3 5F03

LD4,LD5 LD3

LD5

5AE7

5AE2

+3V3

PNX5100: DEBUG

B01a

5AE4

+3V3

1F41 6

TO 1G51 BO5E SSB

LD5

B05I

+3V3

M01a

+3V3

LD5

B01a B04p

DP-RX

LD3

7010

+VDISP1

7CG2 LCD-PWR-ON

+5V

7HP0

SENCE+1V

M03A

+1V8 +5V-SSB

+12V 5CG2

7CG1

PNX8541: AUDIO

+1V 5AE8

2 1

+3V3

+12V +3V3-PER

B04P

B01c

STI701: POWER

7011 IN OUT COM

TO FAN

+VDISP2

+1V

3

PNX8541: ANALOGUE AV

+3V3-PER +3V3TMDS

TO 1G50 BO5E SSB 1F01 1

B01b 7H06

+3V3-SSB

4

PNX5100: PCI

+3V3

B05H

STI701: AV-INTERFACE

+3V3TMDS

B03E

B01c

+12V

5U04

DC/DC CONVERTER

+3V3

1M20

+3V3

+12V

M

B01a

USB 2.0

IN OUT COM

B04L

B01b

5U03

12

+24VF

M01a

TO 1F41 LD1 LVDSDP

PNX5100: CONTROL

LMI-VREF

B04K

B01b

M01B

+5V

M03d TO 1F42 LD1 LVDSDP

41

T1.0A +4V-STANDBY 1G51 46

+3V3

B01a

+2V5 5AA0

B03D

MONITOR

3

IN OUT COM

+5V-MUX

+3V3

B01a

39 +5V

+3V3-RS232

7F8C IN OUT COM

M01b

+2V5-STAB51

PNX5100: LVDS +3V3

+3V3-STANDBY

+5V-CON

+3V3

B01a

7F8B IN OUT COM

+3V3-RS232

1

+1V2-PNX5100-TRI-PLL2

5C63

+3V3-DP-STANDBY

B01a

1

7 8

B09A

+3V3

B03e

+3V3-ANA

+AUDIO-POWER MONITOR+AUDIO-POWER

M01b

+24VF

7U50 TPS54283PWP

+1V2-PNX5100-CLOCK

+4V-STANDBY

B05h

X419

5 6

5E006

3E43

+1V2-PNX5100-TRI-PLL1

3F9A +3V3-DP-STANDBY

M02b,M03d 1U01

7U02

+3V3-DIG

+5V

B01c

LD2

+5V +AUDIO-POWER

8

IN OUT COM

5E03

+3V3

LD2

B08g TO X419 A SUPPLY

MONITOR+3V3

1F42

3AAN

GND-24V GND-24V GND-24V

BIN-5V-EDID

3FB5

+12V

+AUDIO-POWER M01a

M03b,d

+3V3

B08f

5C61

1C51

B05G

B01b

DISPLAY LINK CABLE (POWER) TO 13DP

+5V-CON

MONITOR+12V

+24V

+3V3-STANDBY

+5V-CON

5C60

B05h

RREF-PNX8541

B04P

STI701: SDRAM

+2V5

3 4

+3V3-PNX5100-LVDS-PLL

+5V

B05F

B01a

B03C

2

+3V3-PNX5100-DDR-PLL0

5C70

1C50 B08d

PNX8541: DIGITAL VIDEO IN

RREF-PNX8541 +3V3

+3V3

+24V

5C69

B01a

+12V

B01b

B04H B03B

+24V +24V

+3V3-PNX5100-CLOCK

B01b,B02a, B04a,e,p

15

1V2-STANDBY

+3V3-PNX5100-LVDS-IN

5C68

+3V3

V_LVC04

+3V3

13DP

7D11

+3V3F

7H01 6HD2

DC / DC

HDMI SWITCH

PNX8541: SDRAM

+1V8-PNX8541

B01b

5C67

+1V2-PNX5100

B04P

3V3DVBC

7TA2

AIN-5V-EDID

BIN-5V

+3V3

+3V3

+1V2-PNX5100

IN OUT COM

B01d,B02a,b,c B03a,b,h,e,f,g,h, B04a,l,m,p,q, B05b,c,e,f,g,h,i, B08a,b,d,g B09a,b,c

+3V3

1P03 18

+3V3-STANDBY

B01a

+1V8-PNX5100

+3V3-PER

+3V3-PER +1V8DVBC

M01A

DC/DC CONVERTER

+1V8-PNX5100

+3V3

7TA1

+2V5-L41

3FB3 +3V3

LD2

TO 1316 DISPLAY 1 M01b

+3V3

PNX5100: POWER

LD2

M03b

PNX5100: VIDEO

B08G B05C

PNX8541: MISCELANEOUS

PNX8541: CONTROL

+2V5-L51

55A7

AIN-5V

PNX5100-DDR2-VREF-DDR

+3V3

CHANNEL DECODER DVB-C

B01a

7U0A NCP5422

V1

+3V3

+12V

HDMI 2 CONNECTOR

PNX5100-DDR2-VREF-CTRL

5C62

DC / DC

+12V

B01b

B04E

+3V3

5T53

B01A

B05B

B01a

7U70-2 +2V5-REF

+1V8-PNX5100

+VTUN

+3V3

55AB

MONITOR+24V

+12V

M01a

+2V5-STAB

IN OUT COM

T1.5A 7U00 TPS54383PWP

+12V

+3V3-STANDBY

+1V2-PLL +1V2-FPGA

75E3

+5V-EDID

LD2

+24V 3FB7

M01a

CIN-5V-EDID

1P02 18

PNX5100: SDRAM

+3V3

B01b 3T67

55A2

CIN-5V

+33VTUN 3T66

+1V

HDMI 1 CONNECTOR

B01a

+12V

MAIN TUNER

+33VTUN

B01b

+3V3-NAND

3C20

+5V-TUN

B01a

7U72

7H05

B04D B02B

+1V2-PNX8541

B05A B08d

B01a

7U70-1 +2V5-REF +1V2-PNX8541

+3V3DVB

B03a,c,e

1P05 18

55A9

1

+5V-TUN

+1V2-PNX8541

+3V3-FPGA

55AA

+5V

+3V3 5HA0

B02b

+1V2DVB

+5V-TUN

B01c

HDMI

HDMI 3 SIDE CONNECTOR

PNX8541: FLASH

+3V3

+5V5-TUN

7H04

B01b

+3V3F

B04Q

TO DISPLAY

DP-RX

M01a

+1V2-STAB

IN OUT COM

+5V

B01c

+3V3-PER

+5V5-TUN

+3V3

LD1

+12V

PNX8541: NVM

+3V3

VSW

B08F

AUDIO-ADC

3C22

B04C

M03D +24V

+12V

+1V8-PNX8541

+12V 1F51 20

FPGA: CONTROL

+3V3 55A6

B01b

B04P B01c

CHANNEL DECODER

B02b B01a

5HY7

DP-RX

+12V M01a

AUDIO IN HDMI

+3V3-PER +5V

+12V

VDDA-DAC

+1V8-PNX8541

+3V3

+3V3-PER +33VTUN

B04o

+12V

LD5 B08E

+3V3-STANDBY

+5V

TO 1M20 J IR/LED

8 +12VF 6U0B

B04h

+3V3

VDDA-AUDIO

+1V8-PNX5100

B04p B01c

LD1

M03C

FAN CONTROL

+3V3

7012

PNX8541: STANDBY CONTROLLER

+3V3-PER 1M20 5

7U0P

VDDA-LVDS

B04g

+3V3

B01a

5U08

+3V3-PER RREF-PNX8541

5HY1

5HY4

PCMCIA-VCC-VPP

+3V3-STANDBY

B01b

B01b

B04A

+3V3

B04a,c,e, B04f,k,n

5HK3

VDDA-AUDIO B04l

B01a

B01c

+3V3-STANDBY

3U42

B01b

+1V2-PNX5100

5U04

LD1

+3V3-STANDBY

3ED8

B01a

B01D

+12VF

+3V3

3P09

B04a,B05d,c

B01c

+3V3 +5V

+T

+VCC-LM

I2C

+3V3-STANDBY

B01b

12V/1V2 CONVERSION

15

I2C

+3V3

+3V3 5HYA

+1V8-PNX8541 +1V8-PNX5100

B05c

CI: PCMCIA CONNECTOR

7U0D-1 16 7U0D-2

3U60

B03H

+1V8-PNX8541

B01a +3V3

B01a

T3A

+1V2-STANDBY

12V/5V CONVERSION

15

B01a,B04c,g,i,m B05g,h, B08a,b,e

+1V2-STANDBY

B01a

1

+12V

+3V3-STANDBY

B01b

GND 1U01

+3V3-STANDBY

ANALOGUE EXTERNALS D

LD4

+1V2-PNX8541 B04g

B01b

Dual 7U0H-2 Out-of-Phase Synchronous 2 Buck Controller

B08D

PNX8541: POWER

+1V2-PNX8541 B01a

+12VFF

5U06

7U0N VOLT. REG.

STANDBY

+3V3

5U09

B01d,B04a,d,p, B08d,f,B10a B01a,B04p

2

B04P

STI701: DEBUG

+3V3

B01a

+3V3-STANDBY 7U0M

GND

B03G B01a

+12VF

3D04

+4V-STANDBY

IN OUT COM

STANDBY

DC / DC

+12VF

6E23

B01C

6E26

DC / DC

1M95 1

6E06

X416 1 +4V-STANDBY

6E29

B01B

A

3U3T

SUPPLY

3U70

A

+3V3-DP-STANDBY

M03d

+3V3-STANDBY 1FDP 20

M01a

+24V

+24V

1319 1

TO DISPLAY I_18020_130.eps 101008

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

69

7. Circuit Diagrams and PWB Layouts SSB: DC / DC 2U00 D7 2U01 E8 2U02 F7 2U03 C9 2U04 D7 2U05 C10 2U06 C10

2U07 D10 2U08 E9 2U09 E10 2U0A D5 2U0B G2 2U0C D2 2U0D H2

2U0E H2 2U0F B6 2U0G B5 2U0H C9 2U0J E9 2U0K F9 2U0L E8

2U0M C8 2U0N B4 2U0P G9 2U0R E10 2U0S D4 2U0T D10 2U0U D10

1

2U0V D10 2U0W B6 2U0Y B12 2U0Z C10 2U10 E13 2U11 E14 2U12 C9

2

2U21 B14 3U00 E7 3U01 D7 3U02 F8 3U03 C9 3U04 C9 3U05 D7

2U13 B7 2U14 B12 2U15 C14 2U16 D13 2U17 D14 2U1A D14 2U1B D14

3

3U06 D7 3U07 E9 3U08 F9 3U09 F9 3U0A F10 3U0B D4 3U0C D4

3U0M C7 3U0N B6 3U0P C6 3U0S B4 3U0T B4 3U0U B4 3U0V B3

3U0D D2 3U0E D2 3U0F H1 3U0G H2 3U0H D5 3U0J C9 3U0K E9

4

3U0W C3 3U0Y E11 3U0Z E12 3U10 F12 3U11 E12 3U12 E12 3U13 E12

5

3U14 D7 3U15 D8 3U16 D8 3U17 D7 3U18 E2 3U19 F5 3U1A E6

3U1B E6 3U1C G9 3U1D F12 3U1E E8 3U1F E8 3U1G C4 3U1H C5

6

5U00 E10 5U01 B10 5U02 A13 5U03 E13 6U00 E7 6U01 E8 6U02 B4

3U1V D4 3U70 B6 3U72 C7 3U73 C7 3U74 E9 3U75 E10 3U76 D11

3U1J G14 3U1K E8 3U1M C9 3U1N B6 3U1P C7 3U1T C7 3U1U E5

7

6U03 F9 6U04 E6 7U00-1 C4 7U00-2 B3 7U01-1 E4 7U01-2 E5 7U02 B7

8

7U03 F8 7U04-1 D5 7U04-2 D2 7U05 C8 7U06 C8 7U07-1 E12 7U07-2 E12

7U08 B7 7U09 D4 7U0A C6 CU26 D6 FU00 B9 FU01 D12 FU02 G12

9

FU03 E6 FU04 D8 FU05 B9 FU06 E12 FU07 C5 FU08 B4 FU09 D7

10

IU02 C9 IU03 F8 IU04 E9 IU05 E9 IU06 B6 IU07 E9 IU08 C9

FU0A D8 FU0B D10 FU0C E12 FU0D F9 FU0E E14 IU00 E8 IU01 C9

11

IU0G C6 IU0H C6 IU0K C8 IU0N C7 IU0P B7 IU0S C5 IU0T C5

IU09 B4 IU0A E13 IU0B G9 IU0C E3 IU0D E6 IU0E D7 IU0F D7

12

IU0U D5 IU0V D5 IU0W D5 IU0Y D4 IU0Z E6 IU10 D2 IU11 B3

IU12 B3 IU13 B5 IU14 B4 IU15 E12 IU16 E5 IU19 H3 IU1B C9

13

IU1D E10 IU1E E9 IU1F D12 IU1G F14 IU1H E5 IU1K C7 IU1M C7

14

15

DC / DC

B01A

IU1N D7 IU1P B6 IU1R D3 IU1S E8 IU1T A13

B01A A

A +12VF IU1T

5U02

+12V

2U21

220u 25V

RES 220u 4V

RES 220u 4V 2U1B

2U1A

2U17

2U16 100R

RES 330u 6.3V

+3V3F

2U11

100u 4V

10u 2U10

3U12

FU0E

5U03

IU0A 1K0

3U76

22u

3U13

2U0V

2U0U

10R

2

7U07-1 BC847BS 1

1u0

2U09

3n3 2U0R

6K8

22R

6

10K

E

1% 120R

3U75

3U0Y FU063 10K

IU15

5

1K0

3U11 3K9

3U10

7U07-2 BC847BS 4

FU0D

F 1% 1K0

3U0A

4K7 RES

3U09

PDZ18-B

6U03

1

BOOSTER 12V UNDER-VOLTAGE DETECTION

2U0K

470R

3U0Z FU0C

IU1D

470R 3U02

3

IU05

IU1E 3U08

6U01 1u0

3U1K

IU03

7U03 BC817-25W 2

F

BAS316

IU00

1n0

2U0J

+12VF

1K0 RES

3

*

IU04 100n

IU07

3U07

47n

2U08

47n 2U0L

68R

22R 3U74

68R 3U1F

3U0K

2U01

1n0

IU0Z

2U02

3V3-ST

IU16

5 FU03

6U00

3U1E

3U1B

6U04

IU0C

BAS316

100K RES

6

10K

3U19

3U18

2

7U01-2 4 BC857BS RES

10u IU1S

RES 22u

5U00

RES 22u

FU0A

6K8

2U0T

1K0

3K3

BZX384-C18 RES

330R RES 7U01-1 1 BC857BS RES

+1V2-PNX8541 IU1F

1K0 RES

E

D

FU01

FU0B

3U16

330u 6.3V

FU09

3U01

IU0E

GND-SIG

3U1A

+1V2-STANDBY

2U15

12V/1V2 CONVERSION

3U05 3K3

220u 25V

100n

2U03

1K0

3U04

6K8

IU0D GND-SIG GND-SIG GND-SIG 3U1U IU1H

22u

22u 2U0Z

3n3 2U06

2U05

6K8

22R 3U03

22R

3U0J

3U1M

1n0

2U12 3U15

100u 4V

IU0F

1n0

2U0H

FU04

1K0

12 11

3

7U04-1 BC847BS 1

GND-SIG

GND-SIG

22u

2U14 3U1T

4R7

3U72

4R7

22R

5 6 78 4 1 2 3 SI4800BDY

3U00 GND-SIG

RES 22u 2U0Y

22u

IU1N

IU0K

2K2

GND

39K

100n

2U0A

5 6

4R7 3U06

2U07

2

IU1M

C

IU02

IU1B

22u

10K RES

IU0Y

+2 -2

3U0M

3n3

3K3

3U0C

ROSC

7U06

4R7

2U00

33K

3U0D

4

6

+1 -1 IS

2U0M 3U1P

IU1K

15

CU26

3U1V

7U04-2 BC847BS

COMP 2

13

16

22K

100n RES 3K3 RES

33K

3

IU0W +1V2-PNX8541

2

2U0S GND-SIG 3U0E IU10 5

1

9

RES

GATE L2

IU0U IU0V

3

3U0H

1

3U0B

100n

2U0C

7U09 BC847BW IU1R

H2

2

8

IU0H

3U14

VFB

10

IU0T

IU0G

3U17

IU0S

2

100n

L1

IU01

IU08

3U73

H1 GATE

1

5 6 7 8 SI4800BDY

4

1 2 3

22R

BST

7

1

2U04

C

Φ

+3V3 10u

7U05

IU0N

14

100n

4

4

5U01

FU00 5 6 7 8 SI4800BDY 1 2 3

3K3

7U0A NCP5422ADR2G

3U0P

10K

IU0P

GND-SIG

FU07

B

VSW

7U02

22R

SUPPLY-FAULT

3U1G

7U00-1 BC847BPN 1

3U1N

3V3

RES

3n3 22R 3U0N

FU08

100R

12V/3V3 CONVERSION

2U13

VCC

3U0S

22K

IU14

10K 3U1H

10K

3U0V

6

5 6 7 8 SI4800BDY 1 2 3

4

1u0

IU13

IU11 0V 2 3U0W

10R 2U0F

3U70

22K 22K 6U02

3

BAS316

D

IU1P

IU06 IU09

IU12

10u

7U08

3U0U 5

2U0G

B

RES 22u 2U0W

4 BC847BPN 7U00-2

100n 3U0T

2U0N

FU05

3U1D 1%

+1V2-PNX8541 GND-SIG

1K0

GND-SIG

3U1J

IU1G

120R 1%

SENSE+1V2-PNX8541 ENABLE-3V3 PROT-DC

G

G

3U1C

470n RES

2U0P

100p

2U0B

IU0B

ENABLE-1V2 FU02

22K RES

2U0D IU19 100n

2U0E

4K7

3U0G

3U0F

1% 470R

100p

H

H GND-SIG

GND-SIG

GND-SIG

I_18020_011.eps 190808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

70

SSB: DC / DC

2

3

4

IU3F 100n

3U6A

330p IU3H

22R

7U71 PHD38N02LT

IU8F

FU28

2U65

3U51

150R

150R

1u0

3U52

IU3S 7U51 BC847BW

2K2

+3V3-STANDBY

+VCC-LM

A

4

FU29

22R

3

+1V

2U67

4K7

1u0

330p IU3P

2U70

3U68

1u0 2U71

2U66 3

1K0 1u0

7U72 PHD38N02LT

IU8G

B

3U53

2U50

3U6B

3K3

R

6

2

3U54

K

IU3M 2

IU3R R

7U70-2 IU3N LM833 7

5

A

8

IU3K

7U50 TS2431

FU27

K

1

+1V2-PNX8541

+2V5-REF

1n0 3U69

C

SENSE+1V

C

1K0 +4V-STANDBY

OUT

INH

BP

3

3U46 22n

IU35

REF

4

D

1K0 3U3V

NC

A STANDBY

+1V2-STANDBY

FU1F

1

K

2u2

2U74

10n

2U73

2

1u0

2U72

FU1A FU1B

7U0M BC847BW 2

7U0N TS431AILT

1u0

1M95 1 2 3 4 5 6 7 8 9 10 11

4K7

1K0

COM 2U32 RES

3U3W

+3V3-STANDBY IU8K

4

1

2U25

1u0

D

IN

IU3C

3U4A

3

2U26

3

IU34 FU24

5

NC

1

1u0

2U24

7U73 LD2985BM33R

68K RES

+3V3-STANDBY RES 9U01

2

5

FU20 FU23

IU45

IU47

1 IU36

6 2

3U45

RES 33K

RES 33K

RES 220n 3U44

2U2B

BZX384-C27

220n 6U0C

2U29

100K

1u0 3U43

2U2A

68R

3U47

68R

7U0Q BC847BW

F

IU37 220p

7U41-1 BC847BPN 1

7U0P BSH112

33p 2U28

22K

2K2

2

3U89

10K

220u

+12VF

2U27

3U88 +1V2-STANDBY

E

3U42

IU38 3U40

10K

3U85

IU44

IU3B

DETECT-12V

3U3Y

2U40

1

VSW

3

FU40

3V3-ST 3

1K0

6

6K8

IU43

2

F

5U08

220K 3U82

1K0

3U84

7U40-1 BC847BPN

100p

10n 2U36 RES

100p 2U35

100p

2U34 RES

2U33 RES

IU42

IU40

10K

100R

B11B-PH-K

IU46 5

3U87

4

3U3Z

SDA-DISP

10K RES

FU76

+33VTUN BAS316

3K3

3U36

3

FU1G

6U0B

7U41-2 BC847BPN

5

3U83

100R

4

IU41

3U86

SCL-DISP

7U40-2 BC847BPN

10K

FU75

6U40

3U35

PDZ8.2-B

T 4A 125V

3U81

+12V

FU22 FU21 FU10 FU1D FU11 FU12

10K

3U80

1U01

FU1C

1u0 RES

E

A

IU3T

1n0

22K

3U67

100n

2U63

6K8

3U64

3U50 +12V

+2V5

4K7 3U66

2K2

3U49

2K2

3U48

RESERVED

1u0 2U69

2U62 68K

3U63

10K

3U62

3U65

2U64

1K0

7U0R TS2431

B01B

1u0

+12V

B

9

4

100n

2U60

10R

1

8

2U18

2

IU3D +VCC-LM

7U70-1 IU3G LM833 1

3

1K0

3U60

7 +3V3F

8

IU3E

3U61 +2V5-REF

A

6

+VCC-LM

DC / DC

B01B

5

2U68

1

IU39

* IN CASE OF ONLY-ANALOG TUNER I_18020_012.eps 190808

3104 313 6304.3

1

2

3

4

5

6

7

8

9

1M95 D1 1U01 E2 2U18 A6 2U24 C6 2U25 D7 2U26 D8 2U27 F7 2U28 F7 2U29 E7 2U2A F7 2U2B E8 2U32 D1 2U33 F1 2U34 F1 2U35 F1 2U36 F2 2U40 F3 2U50 B9 2U60 A2 2U62 A4 2U63 B3 2U64 A5 2U65 A5 2U66 C5 2U67 C5 2U68 A6 2U69 A7 2U70 C6 2U71 C6 2U72 D2 2U73 D3 2U74 D3 3U35 E2 3U36 E2 3U3V D7 3U3W C7 3U3Y F6 3U3Z F6 3U40 F7 3U42 F8 3U43 F8 3U44 E8 3U45 E8 3U46 C7 3U47 F7 3U48 B1 3U49 B2 3U4A D7 3U50 A8 3U51 A9 3U52 B8 3U53 B9 3U54 B9 3U60 A2 3U61 A4 3U62 A3 3U63 A3 3U64 B3 3U65 A5 3U66 A5 3U67 B4 3U68 C5 3U69 C5 3U6A A6 3U6B B6 3U80 E4 3U81 E4 3U82 E4 3U83 E5 3U84 E3 3U85 F4 3U86 F5 3U87 E5 3U88 F3 3U89 F4 5U08 E7 6U0B E7

6U0C E7 6U40 E3 7U0M D8 7U0N D6 7U0P F6 7U0Q F8 7U0R B1 7U40-1 E4 7U40-2 E4 7U41-1 F4 7U41-2 E5 7U50 B8 7U51 B9 7U70-1 A5 7U70-2 B5 7U71 A6 7U72 B6 7U73 D3 9U01 C3 FU10 E1 FU11 E1 FU12 E1 FU1A D1 FU1B E1 FU1C E1 FU1D E1 FU1F D8 FU1G E8 FU20 E1 FU21 E1 FU22 E1 FU23 E1 FU24 D3 FU27 B2 FU28 A7 FU29 B7 FU40 F5 FU75 E2 FU76 E2 IU34 D7 IU35 D7 IU36 F6 IU37 F7 IU38 F7 IU39 F8 IU3B F7 IU3C D7 IU3D A2 IU3E A4 IU3F A4 IU3G A5 IU3H A5 IU3K B4 IU3M B4 IU3N B5 IU3P C5 IU3R B9 IU3S A8 IU3T A9 IU40 E3 IU41 E4 IU42 E4 IU43 E4 IU44 F4 IU45 F5 IU46 E5 IU47 F4 IU8F A6 IU8G B6 IU8K D3

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

71

SSB: DC / DC 2U8G D10 2U8H D10 2U8K D10 2U8L E8 2U8M D10 2U8N G9

2U8A A6 2U8B B9 2U8C B9 2U8D B10 2U8E A10 2U8F B14

1

2U8P E9 2U8Q E8 2U8R E8 2U8S C7 2U8T G2 2U8U C8

2

2U8V C8 2U8W C9 2U8Y E9 2U8Z D9 3U1W D6 3U1Y D7

3U1Z E8 3U20 B9 3U21 C9 3U22 D6 3U23 C7 3U24 D9

3

3U25 E9 3U26 F9 3U27 F10 3U28 D4 3U29 D4 3U2A D2

4

3U2U E11 3U2V D11 3U2W E12 3U2Y E12 3U2Z E12 3U30 D12

3U2H D9 3U2J C7 3U2K B6 3U2M C6 3U2N B6 3U2R B4

3U2B D2 3U2C G1 3U2D G2 3U2E D5 3U2F E10 3U2G B8

5

3U31 C7 3U32 C8 3U33 D8 3U34 D7 3U39 G9 3U3A F12

3U3H E8 3U3J B9 3U3K B6 3U3M B6 3U3N D9 3U3P C7

3U3B E7 3U3C E7 3U3D B4 3U3E B4 3U3F D11 3U3G F13

6

6U05 E7 6U06 E8 6U07 B4 6U08 F8 6U09 B11 7U0D-1 B8

3U3Q C7 3U3T A5 5U04 D9 5U05 B9 5U06 A11 5U09 A11

7

7U0D-2 C7 7U0E F8 7U0G-1 D3 7U0G-2 D4 7U0H-1 A6 7U0H-2 B7

8

7U0K-1 D12 7U0K-2 E12 7U0L B5 9U04 B11 9U05 B11 CU25 D6

FU80 C13 FU81 D12 FU82 E12 FU83 F12 FU84 G12 FU85 D10

9

FU86 E8 FU87 D8 FU88 D7 FU89 C7 FU8A C5 FU8B A8

10

IU24 C7 IU25 C7 IU26 C7 IU28 B7 IU29 B6 IU2A A6

11

IU2J D2 IU2M B4 IU2P E12 IU2R E7 IU2T G3 IU2V C9

IU2C C5 IU2D C5 IU2E C5 IU2F C5 IU2G C5 IU2H D4

12

IU2Y E9 IU2Z E9 IU80 B4 IU81 B5 IU82 B9 IU83 B9

13

IU84 C9 IU85 E9 IU86 E9 IU87 E9 IU88 E8 IU89 F14

IU8A D12 IU8B G9 IU8C E8 IU8D D6 IU8E D6

14

15

5U09

DC / DC

B01C

FU8C B8 FU8D B13 IU20 C6 IU21 C6 IU22 C6 IU23 C6

B01C

+12VF 220R

A

FU8B

5U06

2U20

2U84 G2 2U85 E6 2U86 D6 2U87 E8 2U88 C7 2U89 B6

220u 25V

2U19 A7 2U20 A13 2U80 C2 2U81 B5 2U82 D5 2U83 G2

A

1

FU8C

7U0H-2

100n

2U8W

220u 25V

2U8F

1K0

3U21

3

3U32

3K3

3U31

6K8

12V/1V2 CONVERSION FU85

1K0

IU8A

3U3F

10K

FU82

3 5

7U0K-2 BC847BS 4

IU2P

E

3U2Y 3K3

1K0

1K0 10K

220R

3U30 2

3U2Z

3U25

2U8R

3U26

470R

470R

6

7U0K-1 BC847BS 1

3U2W

3U2F

3U2U

IU87

IU2Z 3U1Z

FU81

IU2Y 1% 120R

3U3H

IU88

10K

1u0

6K8 100n

1n0

2U8P

IU85

47n

3U2V

IU86

1n0

1u0

2U85

6U06

E

IU8C

2U8Q

68R

BAS316

IU2R

6U05

3n3 2U8Y

47n 2U8L

+12VFF

2U8Z

68R 3U3C

22R

2U87

3U24

3U3B

3U2H

BAS316

22R 3U3N

10u 3K3

GND-SIG1

D

10R RES

5U04

2U8M

+1V2-PNX5100

RES 22u

FU87

2U8K

6K8

RES 22u

3U33

2U8H

FU88

1K0

22u

3U1Y

22u

3K3 IU8E

3U1W GND-SIG1 GND-SIG1 GND-SIG1

C

FU80

SI4936BDY

FU89

IU8D GND-SIG1

B

3U22

GND-SIG1

GND-SIG1

22u

22u 2U8D

3n3 2U8C

2U8B

6K8

22R 3U20

22R

2U8U

22R

1n0

2U8V

1

4R7

3U3Q 22R

IU20

9U04

9U05 RES

2U8G

7U0G-2 BC847BS 4

IU25

4R7

1K0

12 11

6U09

IU84

IU2V

5 6

3K3

39K

+2 -2

10u

RES

4

3U23

3U34

5

IS ROSC

IU26

2U86

3U2A

33K

1

IU2H

2

1n0 7U0D-2

3U2J IU24

5 6

+1 -1

CU25

10K RES

13

L2 COMP

SS36

IU83

IU82

2U88

4R7

15

1

7 8 SI4936BDY

2

3U3P

IU23

22K

3U29

3U28

7U0G-1 BC847BS

2

33K

100n

3

3U2E

6

2U82

IU2G

GND-SIG1 3U2B IU2J

D

9

100n

2U80

IU2F

GATE

16

IU22

100n

8 IU2E

2

IU21

100n

IU2D

H2

VFB

GND

C

10

1

3

7

2

L1

3U2M

1

H1 GATE

2U8S

BST

4R7 3U3M

3U2N

VCC 4

Φ

3U3J

3U2G

3

7U0D-1

IU28

14

22K

10K 3U3E

3U3D

7U0L NCP5422ADR2G

5U05

+5V

5 6 SI4936BDY

4

1n0

IU29

GND-SIG1

IU2C

FU8D +5V5-TUN

22R

B

FU8A

22u

12V/5V CONVERSION

1n0 3U3K

BAS316

+12VFF

RES

2U89

22R 3U2K

IU2M

1u0

2U81

22K 6U07

2U19

7 8 SI4936BDY

2

IU81

220u 25V

7U0H-1 IU2A

3U2R IU80

2U8E

22u

2U8A

10R

3U3T

220R

3U27

6U08

PDZ18-B

BOOSTER

F

1% 1K0

FU86 7U0E BC817-25W

3U3A +1V2-PNX5100 GND-SIG1

1K0

GND-SIG1

F

1% 3U3G

IU89

120R 1%

SENSE+1V2-PNX5100 ENABLE-3V3

FU83 PROT-DC

3U39

470n RES

2U8N

G

100p

2U83

IU8B

ENABLE-1V2 FU84

22K RES

G

2U8T IU2T

GND-SIG1

100n

2U84

2K2

3U2D

3U2C

1% 270R

100p

GND-SIG1

GND-SIG1

H

H I_18020_013.eps 190808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

72

SSB: LED Panel Control 1M20 B4 2U90 A2 2U91 A2 2U92 B2

2U93 B2 2U94 C2 2U95 E2 3U4B D1

3U90 A2 3U91 B2 3U92 B2 3U93 B1

3U94 B1 3U95 B2 3U96 D1 3U97 D1

3U98 E2 3U99 C1 5U90 E1 7U90 C2

1

7U91 D2 9U90 B2 9U91 C1 9U92 D1

FU90 A3 FU91 B3 FU92 B3 FU93 B3

FU94 B3 FU95 B3 FU96 C4 FU97 E3

2

FU98 B2 IU90 A2 IU92 B2 IU93 B2

IU94 C1 IU95 D1 IU96 E2 IU97 E1

3

IU98 C1 IU99 D1

4

LED PANEL CONTROL

B01D

Personal Notes:

B01D

A

A 2U90 IU90

3U90

LIGHT-SENSOR

RES

100R 3U91

FU98

RC

IU92

B

10K RES

3U94

10K RES

3U93 IU94

RES

100p

100R

2U92

3U92

100p

IU93

9U91

FU90

2U91

100R +3V3-STANDBY

+3V3-STANDBY +3V3

100p

FU91 1M20 FU92 FU93

9U90 2U93

FU94

3U95

100p

FU95

100R

2U94

+5V FU96

11 10

1 2 3 4 5 6 7 8 9

TO

B

LED PANEL

100p 3 1

7U90 BC847BW RES 2

10K RES

C

+3V3

10K

10K RES

3U96

+3V3-STANDBY

3U97

C

IU98

3U99

LED2

IU95 9U92 RES

D

D 3

LED1

3U4B

IU99 1

7U91 BC847BW 2

10K

5U90

KEYBOARD

E

IU97

3u3

IU96

3U98 10R

FU97

E

2U95 100p

I_18020_014.eps 190808

3104 313 6304.3

1

2

3

4

E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

73

SSB: Channel Decoder 1

3

5

4

7

6

8

9

10

11

12

13

CHANNEL DECODER

B02A IT41

5T09

FT15 2T32 100n

2T01 IT24

3

IN

OUT

INH

100K

BP

B

5 IT25

4

2T27

1u0

COM 2

2T25

1 3T20

FT59

7T25 LD3985M122

RESERVED

B

A

+1V2DVB

120R

100n

A

+1V2-PNX8541

22u 6.3V

B02A

2

IT03

5T08

FT11

+3V3DVB

+3V3

+1V2DVB

C

+1V2DVB

+3V3DVB

+1V2DVB

+1V2DVB

+3V3DVB

+1V2DVB

+3V3DVB

+3V3DVB

9T20 RES

+1V2DVB

IT11

22u 6.3V

2T04

C

100n 2T05

120R

+3V3DVB

3

D

100n

100n 2T15

100n 2T14

100n 2T13

100n 2T12

2T16

100n

RES 100n 2T36

100K

100n 2T09

5

100n 2T08

4 BC847BPN 7T18-2

IT15

100n 2T35

3T13

2T07

D

FT42

10K

100K RES TUN-AGC-MON

100n 3T14

TUN-AGC

2T26

3T19

IT22 6 3T16

IT27 2

7T18-1 BC847BPN 1

+5V-TUN

RES

56K

3T10

100n

1K0

E

IT10

18K

TDA-IF-AGC

1K8

AGC-COMP RESET-SYSTEM

IT07 2T18

3T21

+5V-TUN

3T08

E

100n

2T31

1K0

3T09

IT26

3T11

IT29

FT17

JTAG-TDO-TDA10048 10K

H

390R

IF-N

3T02 390R

2T29

FT36 FT37

JTAG-TDI-TDA10048

10n

10n

2 3

RES

JTAG-TCK-TDA10048

2T28

3T61

IF-P

3T18

10K RES

3T29

+3V3DVB

39 38 40 37 36

JTAG-TMS-TDA10048

FT38

JTAG-TRST-TDA10048

FT39

12 31 45 VDDI12

28 VDDE33 46

11 VDDA12_PLL

9 VDDA12_OSC

1 VDDA33_ADC

48

I2C ADDRESS 10

TCK TDI TDO TMS TRST

0 1 2 3 4 5 6 7

42

RES 10K

43

3T23

FE-ERR

18

FE-VALID

32

AGC-COMP

20 21 22 23 24 25 26 27

FE-DATA0 FE-DATA1 FE-DATA2 FE-DATA3 FE-DATA4 FE-DATA5 FE-DATA6 FE-DATA7

F

G

GPIO OCLK PSYNC

M VI P

TUN

SCL SDA

19

FE-CLK

17

FE-SOP

16 15

13 30 VSSIS 44

100R 100R

DO

SCL SDA

GND_HS

3T28

SCL-SSB

SADDR

49

G

35 34 IT31

CLR

14 29 VSSE

IT32 3T26

SDA-SSB

DEN

MAIN

VSSA_PLL

33

AGC_IF

AGC_TUN

XOUT

10

41

XIN

VSSA_OSC

8

VSSA_ADC

FT40

100n

6

7

4

IT18

VSA_ANA

2T24

FT41

4-MHz

47

F

VDD33_ADC

7T17-1 TDA10048HN

VDA_12_ANA

5

47n

100n 2T21

2T20

10K

H

IT33

3T32

4K7

3T33 4K7

10K

3T31

10K

3T30

10K 3T07

+3V3DVB

SCL-TUNER

I

FT43 SDA-TUNER

I_18020_015.eps 190808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

I

2T01 A8 2T04 C8 2T05 C8 2T07 D8 2T08 D9 2T09 D9 2T12 D11 2T13 D11 2T14 D11 2T15 D12 2T16 D11 2T18 E8 2T20 F6 2T21 F6 2T24 F6 2T25 B7 2T26 D3 2T27 B8 2T28 H5 2T29 H5 2T31 E2 2T32 A8 2T35 D8 2T36 D9 3T02 H4 3T07 I8 3T08 E7 3T09 E7 3T10 E7 3T11 E7 3T13 D2 3T14 D4 3T16 D3 3T18 G8 3T19 D2 3T20 B7 3T21 E3 3T23 F13 3T26 G5 3T28 G5 3T29 H8 3T30 I7 3T31 I8 3T32 I13 3T33 I13 3T61 H4 5T08 C8 5T09 A8 7T17-1 F9 7T18-1 D4 7T18-2 D3 7T25 B8 9T20 C2 FT11 C8 FT15 A8 FT17 G9 FT36 H8 FT37 H8 FT38 H8 FT39 H8 FT40 F9 FT41 F4 FT42 D2 FT43 I8 FT59 A8 IT03 C7 IT07 E9 IT10 E7 IT11 C3 IT15 D2 IT18 F7 IT22 D4 IT24 B7 IT25 B8 IT26 D3 IT27 D3 IT29 E8 IT31 G6 IT32 G6 IT33 H9 IT41 A7

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

74

SSB: Main Tuner 1T04 D2 1T06 A2 1T08 C2 1T55 C5 1T65 E5

1T70 D5 1T71 E14 1T85 G14 2T02 B9 2T03 E8

2T37 I9 2T46 F11 2T47 F10 2T48 A9 2T49 A9

2T51 F13 2T53 E3 2T59 E2 2T60 F14 2T61 G2

1

2T62 F5 2T63 H11 2T64 E13 2T65 H11 2T66 G13

2T67 F1 2T68 G2 2T69 G3 2T71 F1 2T72 G2

2

2T73 G13 2T74 F14 2T75 G14 2T77 H11 2T78 F14

2T79 E12 2T80 G11 2T81 G11 2T82 G11 2T83 H11

3

2T84 E13 2T86 G9 2T91 E3 2T92 H13 2T93 F5

2T96 F13 2T97 G11 2T99 E13 3T12 B9 3T15 B10

3T17 F8 3T22 F8 3T24 E8 3T25 E10 3T35 F2

3T36 F2 3T37 F3 3T38 G2 3T39 G14 3T40 G11

3T41 G15 3T42 E10 3T54 G10 3T55 G10 3T56 F13

5

4

3T57 F14 3T65 A8 3T66 A8 3T67 A9 3T70 I10

6

3T71 I9 3T74 G11 3T75 H10 3T76 E14 3T85 I9

3T86 F11 3T87 F11 5T52 A10 5T53 E12 5T54 E5

7T20 E9 7T56 I10 7T57 E12 9T21 E3 9T53 F1

5T61 E4 6T55 A9 6T56 A8 6T57 A8 7T19 B8

7

9T59 D8 9T60 D8 9T61 F3 9T64 F3 9T70 G9

9T54 F2 9T55 D4 9T56 G2 9T57 G9 9T58 G2

8

9T77 E3 AT50 F12 AT51 G12 AT62 F4 AT63 F4

9

FT52 I9 FT56 I8 FT57 D2 FT58 A10 FT76 H8

FT21 E2 FT22 E2 FT23 E2 FT24 E3 FT25 E3

FT12 E12 FT13 I9 FT18 E2 FT19 E2 FT20 E2

IT04 C8 IT05 C8 IT19 I10 IT21 E9 IT23 G13

10

IT78 E14 IT79 A8 IT81 A9 IT86 H12 IT89 F5

IT73 G11 IT74 G11 IT75 H11 IT76 H13 IT77 H11

IT28 E15 IT30 E9 IT34 E8 IT35 G8 IT71 E13

11

IT95 G11 IT96 H11 IT97 H12

IT90 F4 IT91 G4 IT92 F13 IT93 G11 IT94 G11

12

13

14

15

MAIN TUNER

B02B

100R 3T66

5T52

A

FT58 +VTUN

100R 220n

2T49

220n 2T48

120R

BZG05C33

IT79 6T57

100R

B

IT81

3T67

PDZ33-B 6T55

+33VTUN

PDZ33-B 6T56

A

B02B

*

3T65 RES

B

VCC 1 2 3

* 1T55 I1 I2

O1 O2

4 5

SDA-SSB

IF-FILTP1 IF-FILTN1

GND

C

SCL-SSB

IT04

3

IT05

X6768D 37M67

SDA0

SDA1

2

SCL0

SCL1

5

EN

6

SDA-TUNER

7

SCL-TUNER

C

1

4

GND

NC

4K7

7T19 PCA9515A

3T15 4K7

3T12

100n

8

2T02

+3V3

* 1T70 1 2

* I…C ADRESS C0

13

+5V-TUN

12

3T42 330R

4n7

2T69

4n7

2T68

*

IT35

TUN-AGC

100n

9T70

3T55 IT95

RES

TUN-AGC-MON

5K6 3T75

15 13 IT93

2T83

100n 4n7

IT77

2T77

IT96

8 5 IT97 20

2T65

1T06

44

FREF

SDA SCL BVS ADRSEL

NC

A OUT1 B

IF1

A OUT2 B

IF2

TAGC AUD CVBS

IF3

A B A B A B

FILI

1 MPP 2

EXT FMI

EXTFILO AGCDIN

FM LF SYN1 SYN2

TOP2

CTAGC CIFAGC

CAF1 CAF2 GND

GNDD

GNDA

4M0 3T76 3K3

2T96

39

*

IT92 100p

46

2T78

4-MHz

100p

3T57

23 24 32 25

3T56

SDA-SSB SCL-SSB

100R 100R

2T60

6 7

2T51

10n

IF-FILTP1 IF-FILTN1

10n

IF-FILTP2 IF-FILTN2

2T74 2T73 10n

3 4

2T66

17

IT23

2T75

*

*

1T85 RES 3

21 36

IF-FILTP3 IF-FILTN3

10n

10n O

I GND

V1

2

RES 3T41 150R

G

SFSKA 4M5

11

TDA-IF-AGC

28 34 IT76

H

* I…C ADRESS 86

X6768 2T37

(video not M)

100n

1T55

3

M1973D

7T56 3T70

1

1T70

1T65

X6874 (dig cable)

K9362M

7T57

TDA9898

TDA9897

68R

(aidio not M)

IT19

3T71

2 FT52

100R

I

BC847BW 220R

I

CVBS4

3T85

FT56

(video + audio M)

FT13

I_18020_016.eps 190808

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1

100n

CVBS-TER-OUT

(ana + dig ter )

2

3

4

5

6

7

8

9

F

10n 9 10

VIF

CDEEM

*

E

*

FT76

X3451 K

1T75

19 38 IT86 1

2T97

2T63

H

AP / CH TD1716

EUR TD1716

IT74

2n2 IT94

3T74 470R

47 31 33

47p

2T82

1K8 IT75

1T04

220n

2T81

29 30

12 16

IT73 2T80

3T54 330R

9T57

TUN-AGC

* *

4K7

IF-P

470n

3p3

SCL-TUNER

47R

AT51

3T40 V1

IT91

*

G 9T58

AT50

*

IF-N 3T38

26 27

22p

*

2T47

SDA-TUNER

IF PROCESSING

22

330R

1K0

4n7

IT90

OPTXTAL

3T87

DIF-N DIF-P

TUN-AGC 4-MHz

*

1K0

330R

22u

*

2 18 35 37 42

3T86

Φ

1T71

IT78

RES

VP

IC

150R

100n 2T93

2T86

9T56

*

2T72

2T61

4n7

* *

10n

3T17

9T61

14 45

2T46

41 40

30R 2T62

43

*

3T22

47R

*

*

IT71

7T57 TDA9898HL/V2/S1

+5V-TUN

48

560n

*

9T77

5T54

IT89

9T64

4n7

2T71

4n7

2T67

*

2T99 22p

*

AT63

3T37

*

9T53

IT28

+VTUN 5T61

100p 2T91

* **

47R 3T36

3T35 47R

9T54

F

*

*

FT12

V1

AT62

*

RES 2T64

7T20 BC847BW

22u

OFWK9362M 38M9

470R

IT30

100n

GND

3T24

2T84

IT34

5T53

*

IT21

IF-FILTP3 IF-FILTN3

X6874 100p

2T59

5 4

2T79

FT23

*

FT22

9T21 2T53 220n

E

3 FT25 FT24

O1 O2

10K

FT21

* 1T65 I IGND

3T25

1 2

1n0

FT19

FT20

2T03

FT18

120R

1 2 3 4 5 6 7 8 9 10 11

MT

D

*

RES 3T39

9T55

2T92

MT

15

9T59 RES 9T60 RES

100u 16V

14

FT57

IF-FILTP2 IF-FILTN2

M1973D 38M

DC_PWR NC1 RF_AGC NC2 AS SCL SDA XTAL_OUT +5V IF_OUT1 IF_OUT2

RF-IN

4 5

GND

TUNER

D

O1 O2

1n5

1T04 TD1716F/PHXP-3

3

I IGND

10

11

12

13

14

15

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

75

SSB: Channel Decoder DVB-C 1

B02C

2

3

4

5

6

7

8

9

10

11

12

CHANNEL DECODER DVB-C

13

B02C

A

A

+3V3

B

B 22K

1u0

ITA5 3

SI2301BDS 7TA2

IN

2

OUT

FT77

10u

2TA2

5TA1 +1V8DVBC

100n

100n 2TA7

100n 2TA6

100n 2TA4

2TA3 5TA2

100n 2TA5

ITA6

D

C

100n

2TAL

100n

1

2TA1

COM

FTA8

2 RES

2TAN

6TA1

C

BAS316

100R

3TB1

5K6 7TA3 PDTC114EU

1

100n

ITA4

3TB2

+1V8DVBC 7TA1 LD1117DT18

ITA3

10u 10V

+1V8DVBC

+3V3

2TAM

ITA8 3

3TB0

2TAK

+3V3DVBC

2TA8

2TAA

2TA9

100n

100n

100n

FTA1

120R

D

+3V3DVBC

+1V8DVBC

FTB6

2TAG 2TAJ

10n FTA4 10n FTA5

58 57

FTA7 FTA3

10 12 17 18 20 19

9T62 9T63 100R 100R 100R RES 100R RES

IT36 IT37

13 51 52 53 54 56 62 63 64

2K7

3T43

SCL-TUNER SDA-TUNER

3TB7 3TB8 3TB9 3TBA

2K7

SCL-SSB SDA-SSB

3T44

DIF-N DIF-P

F

390R 390R

0 1 2 3 4 5 6 7

DEN OCLK PSYNC UNCOR

NC

59

VSSI

VSSE

10K

10K

3TBG

10K 3TBF

10K

3TBE

10K RES

3TBD

50 DO

4

+3V3DVBC

60

IICDIV SADDR SCL SDA SCLT SDAT

VSSA GNDA OSC ADC

G

VDDD33 ADC VDD18 ADCPLL

7 24 41 14 30 43

AGCTUN AGCIF SACLK

VIP VIM

GND ADCPLL

GPIO CTRL

FTA9

FTB2

E

JTAG-TMS-TDA10023 JTAG-TDO-TDA10023

FTB3

9 ITA2 11 5

FTA2 3TB4

4K7

48 47 46 45 40 39 38 37 36 35 34 33

JTAG-TCK-TDA10023 JTAG-TDI-TDA10023 JTAG-TRST-TDA10023

FTB0 FTB1

TDA-IF-AGC

47n

3TB5 3TB6

IF-P IF-N

ENSERI TEST CLRB

22 23 26 27 28

2TAS

21 6 16

RESET-SYSTEM

XOUT

TCK TDI TRST TMS TDO

FE-DATA0 FE-DATA1 FE-DATA2 FE-DATA3 FE-DATA4 FE-DATA5 FE-DATA6 FE-DATA7

F FE-VALID FE-CLK FE-SOP

FTB5

29 32

G

49

2TAF 33p FTB4

3

Φ VDDI VDDE CHANNEL RECEIVER

15 31 44

1TA1 16M

XIN

8 25 42

2

10K

3TBB

E

33p

VDDA18

OSC PLL 2TAE

VDDA33 ADC

1

61

7TA4 TDA10023HT

55

3TBC

100n

100n 2TAC

2TAB

100n 2TAD

120R

H

H

I_18020_017.eps 190808

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2

3

4

5

6

7

8

9

10

11

12

13

1TA1 E6 2TA1 C8 2TA2 C9 2TA3 D5 2TA4 D6 2TA5 D6 2TA6 D6 2TA7 D6 2TA8 D8 2TA9 D9 2TAA D8 2TAB D5 2TAC D6 2TAD D6 2TAE E6 2TAF E6 2TAG F5 2TAJ F5 2TAK B5 2TAL C6 2TAM C7 2TAN C6 2TAS F10 3T43 F5 3T44 F6 3TB0 B5 3TB1 C5 3TB2 C4 3TB4 E9 3TB5 F5 3TB6 F5 3TB7 F5 3TB8 F5 3TB9 F5 3TBA F5 3TBB E5 3TBC D9 3TBD D9 3TBE D10 3TBF D10 3TBG D10 5TA1 D9 5TA2 D5 6TA1 C4 7TA1 B8 7TA2 C6 7TA3 C4 7TA4 E6 9T62 F5 9T63 F5 FT77 C8 FTA1 D5 FTA2 E9 FTA3 F6 FTA4 F6 FTA5 F6 FTA7 F6 FTA8 C6 FTA9 E9 FTB0 E9 FTB1 E9 FTB2 E9 FTB3 E9 FTB4 E6 FTB5 G9 FTB6 D10 IT36 F6 IT37 F6 ITA2 E8 ITA3 C5 ITA4 C4 ITA5 C8 ITA6 D8 ITA8 C5

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

76

SSB: STi7100: Control 1

2

B03A

3

4

5

6

7

8

9

10

11

12

STI7100: CONTROL

13

B03A

A

A

7 10K

JTAG-TDI-ST JTAG-TMS-ST JTAG-TCK-ST

3A46-1

8 10K

JTAG-TRSTn-ST

3A16

JTAG-TDO-ST

3A18

V_LVC04

10K

3A14

27MHZ-3V3

4

IA17

9A21 RES

14

14

1

1

6

68R 2A21

+3V3

TMUCLK CPU-27MHZ

FA10 3A13-2 2 7

TRIG-IN

3A28

7A12 2560TK 1

27M

2

18p RES

2A23

18p RES

2A22

14

27M RES

27MHZ-3V3 CA-MICLK CA-MIVAL

3A37 3A49

1 1

2 390R 2 33R

TSI0-ST-CLK TSI0-ST-VAL

CA-MISTRT

3A54

1

2 33R

TSI0-ST-STRT

3A38-4 3A38-3 3A38-1 3A38-2 3A39-4 3A39-3 3A39-1 3A39-2

5 6 8 7 5 6 8 7

4 3 1 2 4 3 1 2

33R 33R 33R 33R 33R 33R 33R 33R

TSI0-ST-D0 TSI0-ST-D1 TSI0-ST-D2 TSI0-ST-D3 TSI0-ST-D4 TSI0-ST-D5 TSI0-ST-D6 TSI0-ST-D7

3A40 3A51

1 1

2 33R 2 33R

TSI1-ST-CLK TSI1-ST-VAL

3A55

1

2 33R

TSI1-ST-STRT

3A41-3 3A41-1 3A41-2 3A41-4 3A42-4 3A42-2 3A42-3 3A42-1

3 1 2 4 4 2 3 1

6 8 7 5 5 7 6 8

3A13-1 10K

D17 D18

8 3A25-2 2 6 10K 3A25-4 4 10K 3 3A13-3

AK25 AK26 AK27 AK28

7 5 6

IA10

10K

TSI0-ST-CLK TSI0-ST-VAL

E16 AK6 AJ5 AH4 AJ4

TSI0-ST-STRT

7

12

3A25-1 1 10K 3A25-3 3 10K

9A22

1

TRIG-IN TRIG-OUT

IA21 3

IA18

1

ASEBRKn +3V3

10K

4

1M0 RES

10

560R RES

1

FA11

TMUCLK RSETIN-ST7100

IA22

1A10

7A10-6 74LVCU04APW 13

4 3A13-4 5 10K

3A27 IA20

7

7A10-5 74LVCU04APW 11

14

C

+3V3

3A26

15p

2

IA16

7

7

8

1

7A10-3 74LVCU04APW 5

7

1

7A10-2 74LVCU04APW 3

7

14

7A10-1 74LVCU04APW 1

14

22R 7A10-4 74LVCU04APW 9

C1 AP27 AN27 E27 E17 D16 E18 D19 E19 E20

CPU-27MHZ

10K

V_LVC04

V_LVC04

Φ

D22 E21 D21 D20 E22

JTAG-TDI-ST JTAG-TMS-ST JTAG-TCK-ST JTAG-TRSTn-ST JTAG-TDO-ST

CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3 CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7

D

CA-MOCLK_VS2 CA-MOVAL

Mode pin

E

EMI-A2

2 3A29-2 7

EMI-A1

1 3A29-1 8

EMI-A4

4 3A29-4 5

EMI-A3

3

10K

MODE[1:0]

EMI pin

Purpose

EMIADDR[2:1]

CA-MOSTRT CA-MDO0 CA-MDO1 CA-MDO2 CA-MDO3 CA-MDO4 CA-MDO5 CA-MDO6 CA-MDO7

PLL0 startup configuration

10K

10K 3A29-3

MODE[3:2]

EMIADDR[4:3]

PLL1 startup configuration

33R 33R 33R 33R 33R 33R 33R 33R

TSI1-ST-D0 TSI1-ST-D1 TSI1-ST-D2 TSI1-ST-D3 TSI1-ST-D4 TSI1-ST-D5 TSI1-ST-D6 TSI1-ST-D7

IA11

TSI0-ST-D0 TSI0-ST-D1 TSI0-ST-D2 TSI0-ST-D3 TSI0-ST-D4 TSI0-ST-D5 TSI0-ST-D6 TSI0-ST-D7

TSI1-ST-STRT

AG5 AF5 AE4 AF4

TSI1-ST-D0 TSI1-ST-D1 TSI1-ST-D2 TSI1-ST-D3 TSI1-ST-D4 TSI1-ST-D5 TSI1-ST-D6 TSI1-ST-D7

AE5 AD4 AD5 AC4 AC5 AB4 AB5 AA4

TSI1-ST-CLK TSI1-ST-VAL

6

AM3 AN3 AP2 AP3

10K

10K 3A30-3

EMI-A7

3

EMI-A6

2 3A30-2 7

EMI-A5

10K 1 3A30-1 8

6 MODE[7:4]

Reserved

3A47

EMIADDR[8:5]

10K EMI-A10

FA12

10K

MODE[9:8]

PCMOUT4

EMI banks port size at boot

10K 3A21 MODE[10]

PCMOUT4

STx71000 master/slave mode

10K EMI-A13

1 3A32-1 8

EMI-A12

10K 4 3A31-4 5

MODE[12:11]

EMIADDR[13:12]

Reserved

IN RST GND

MODE[13]

EMIADDR[14]

Long resetout mode

MODE[14]

EMIADDR[15]

Reserved

MODE[15]

PCMOUT3

Reserved

MODE[16]

PCMOUT2

Reserved

IA29 5

CD

+3V3

EMI-A14

EMI-A14

EMI-A15

10K 3 3A32-3 6

PCMOUT3

2 3A36-2 7

PCMOUT2

1 3A36-1 8

10K

H

3A35

SYSA CLKIN SYSB SYSBCLKOSC SYSBCLKINALT SYSCLKOUT RTCCLKIN TMUCLK RSETIN WDOGRSTOUT ASEBRK

NC

1

C2A C1A

REF USB DM DP

PIO0

0 1 2 3 4 5 6 7

PIO1

0 1 2 3 4 5 6 7

PIO2

0 1 2 3 4 5 6 7

PIO3

0 1 2 3 4 5 6 7

PIO4

0 1 2 3 4 5 6 7

PIO5

0 1 2 3 4 5 6 7

IN TRIGGER OUT 0 1 SYSITRQ 2 3 NMI BYTECLK BYTECLKVALID TSIN0 ERROR PACKETCLK 0 1 2 3 TSIN0DATA 4 5 6 7 BYTECLK BYTECLKVALID TSIN1 ERROR PACKETCLK 0 1 2 3 TSIN1DATA 4 5 6 7 BYTECLK BYTECLKVALID TSIN2 ERROR PACKETCLK 0 1 2 3 TSIN2DATA 4 5 6 7

REF RXN ATA RXP TXN TXP

AP5 AN5

AM25 AP25 AN25

IA23

1K5

AM32 AP33 AN33 AP34 AN34 AM33 AM34 AL32

C

AL34 AL33 AK34 AK33 AJ34 AJ33 AH34 AH33 IA25 AJ30 AJ31 AH30 AH31 AG30 AG31 AE31 AE30

3A44

100R 3A45

100R

SCL-ST SDA-ST

+3V3

D

AE32 AE34 AE33 AD34 AD33 AC34 AC33 AB34

3A02

WP-FLASH-ST

100R

AD32 AD30 AD31 AC30 AC31 AB30 AB31 AA30

E

RXD-ASC2 TXD-ASC2

AB33 AA34 AA33 Y34 Y33 AA31 Y30 Y31

IA12 9A25

ST-DL-APP

F IA28

AM30 AP31 AN31 AP30 AN30

3A34 470R 2A24

IA26

IA27

RSETIN-ST7100

B

3A33

10n 2A25 10n

IA30

G

4

IA24

10K 3A19 RES

DAA

7A11 NCP303LSN10T1 2 3

2A26

G

EMIADDR[10:9]

2 3A31-2 7 1K2

EMI-A9

3A48

3A31-3 +3V3

RESERVED

+3V3

10K

AP1 AN2 AN1 AM2 AM1 AL2 AL1 AL3

100n

F

4 3A30-4 5

2K2

EMI-A8

AH5 AG4 AK1 AK2 AJ1 AJ2 AH1 AH2

DIGITAL INTERFACE

TDI TMS TCK TRST TDO

10K

V_LVC04

3A46-2

7A00-4 STI7100YWC

3A01

B

2

6 10K 5 10K

3A46-4

5 3A20-4 4 RES 10K

100n 2A20

2A19

100n

2A18

1n0

3A46-3

+3V3

8 3A20-1 1 RES 10K

3A20-2

V_LVC04 220R

6 3A20-3 3 RES 10K

+2V5

RES 10K

7 IA19

5A10

9A23

RESET-ST7100

9A24

BUF-RST-TARGETn

H

10K

10K

10K

I

I I_18020_018.eps 190808

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2

3

4

5

6

7

8

9

10

11

12

13

1A10 C4 2A18 A2 2A19 A2 2A20 A3 2A21 C6 2A22 D3 2A23 D4 2A24 F11 2A25 G11 2A26 G6 3A01 D12 3A02 D11 3A13-1 C9 3A13-2 C7 3A13-3 C9 3A13-4 B7 3A14 B9 3A16 B7 3A18 B9 3A19 H1 3A20-1 A9 3A20-2 A9 3A20-3 A9 3A20-4 A9 3A21 G2 3A25-1 C8 3A25-2 C9 3A25-3 C8 3A25-4 C9 3A26 C6 3A27 C4 3A28 C4 3A29-1 E2 3A29-2 E2 3A29-3 F2 3A29-4 E2 3A30-1 F2 3A30-2 F2 3A30-3 F2 3A30-4 F2 3A31-2 G2 3A31-3 G1 3A31-4 G2 3A32-1 G2 3A32-3 H2 3A33 B11 3A34 F11 3A35 H2 3A36-1 H2 3A36-2 H2 3A37 D6 3A38-1 D6 3A38-2 D6 3A38-3 D6 3A38-4 D6 3A39-1 D6 3A39-2 D6 3A39-3 D6 3A39-4 D6 3A40 E6 3A41-1 E6 3A41-2 E6 3A41-3 E6 3A41-4 E6 3A42-1 E6 3A42-2 E6 3A42-3 E6 3A42-4 E6 3A44 D11 3A45 D12 3A46-1 B7 3A46-2 B7 3A46-3 B6 3A46-4 B6 3A47 F5 3A48 G5 3A49 D6 3A51 E6 3A54 D6 3A55 E6 5A10 A2 7A00-4 A10 7A10-1 B3 7A10-2 B4 7A10-3 B6 7A10-4 B2 7A10-5 C2 7A10-6 D2 7A11 G6 7A12 C4 9A21 C5 9A22 C5 9A23 G7 9A24 H7 9A25 F12 FA10 C7 FA11 B9 FA12 G6 IA10 C9 IA11 D9 IA12 F12 IA16 C4 IA17 C5 IA18 C4 IA19 A2 IA20 C3 IA21 C5 IA22 C6 IA23 B11

IA24 G7 IA25 D11 IA26 G11 IA27 G11 IA28 F11 IA29 G6 IA30 G7

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

77

SSB: STi7100: Flash

1

2

3

4

5

6

7

8

STI7100: FLASH

B03B

B03B +3V3

A

A 2A50 100n

C +3V3

+3V3

2 3A23-2 7

1

10K 3A23-1

8

FA54

FA52

+3V3

6

10K 3A23-3

RESET-FLASH-STn

3

FA53

15 12 11 28 26 47

EMI-OEn

EMI-FLASH-CSn

+3V3

FA55

29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45

EPROM 8Mx8/4Mx16

0 1 2 3 4 5 6 7 D 8 9 10 11 12 13 14 15 A-1

0 64M-1

EMI-D0 EMI-D1 EMI-D2 EMI-D3 EMI-D4 EMI-D5 EMI-D6 EMI-D7 EMI-D8 EMI-D9 EMI-D10 EMI-D11 EMI-D12 EMI-D13 EMI-D14 EMI-D15

B

C

RB RP WE OE CE BYTE

14

VPP/WP_

WP-FLASH-ST

WP-FLASH-ST

FA50

3A50

FA51

10K

27

5 3A23-4 4

EMI-RB-WAIT RESET-FLASH-STn EMI-WRn EMI-OEn

0 1 2 3 4 5 6 7 8 9 10 11 A 12 13 14 15 16 17 18 19 20 21

EMI-RB-WAIT

10K +3V3

25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 10 13

46

B

EMI-A1 EMI-A2 EMI-A3 EMI-A4 EMI-A5 EMI-A6 EMI-A7 EMI-A8 EMI-A9 EMI-A10 EMI-A11 EMI-A12 EMI-A13 EMI-A14 EMI-A15 EMI-A16 EMI-A17 EMI-A18 EMI-A19 EMI-A20 EMI-A21 EMI-A22

37

7A50 M29W640FT70N6F

EMI-FLASH-CSn

10K

D

3A57 100R

D RESET-FLASH-STn RESET-ST7100

7A00-2 STI7100YWC AP9 AL6 AM5 G5 AK9 AL8 AM8 AP8 AK8

EMI-FLASH-CSn

E

AP11 AN11 EMI-OEn IA51 IA52

EMI-RB-WAIT EMI-WRn

F

9A51

3A53-4 IA53 4 5 10K

AK22 AN10 AP20 AP19 AP18 AP17 AP15 AP14 AP13 AP12 AN20 AN19 AN18 AN17 AN15 AN14 AN13 AN12

EMI-D0 EMI-D1 EMI-D2 EMI-D3 EMI-D4 EMI-D5 EMI-D6 EMI-D7 EMI-D8 EMI-D9 EMI-D10 EMI-D11 EMI-D12 EMI-D13 EMI-D14 EMI-D15

G

AP10 AP22 AP21

Φ

EMI NC

NC

CSA CSB CSC EMI CSD CSE

GNT EMIBUS REQ EMIDMAREQ

BE0 EMI BE1

EMIFLASHCLK

OE LBA EMI BAA READYORWAIT EMI RDNOTWR 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

0 1

EMIADDR

EMIDATA

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

AM31 L31 C30 A29 AN9 AM21 AM20

+3V3 IA50

8 3A53-1 1 10K

AN22 AL22

6 3A53-3 3 10K

E 7

2

3A53-2

10K

AN21

AL9 AK10 AL10 AK11 AL11 AK12 AL12 AK13 AL13 AK14 AL14 AK15 AL15 AK17 AL17 AK18 AL18 AK19 AL19 AK20 AL20 AK21 AL21

EMI-A1 EMI-A2 EMI-A3 EMI-A4 EMI-A5 EMI-A6 EMI-A7 EMI-A8 EMI-A9 EMI-A10 EMI-A11 EMI-A12 EMI-A13 EMI-A14 EMI-A15 EMI-A16 EMI-A17 EMI-A18 EMI-A19 EMI-A20 EMI-A21 EMI-A22

F

G

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5

6

7

8

2A50 A4 3A23-1 C1 3A23-2 C1 3A23-3 D1 3A23-4 D1 3A50 C7 3A53-1 E5 3A53-2 E6 3A53-3 E6 3A53-4 F3 3A57 D1 7A00-2 D4 7A50 A4 9A51 F3 FA50 C7 FA51 C7 FA52 C1 FA53 D1 FA54 C1 FA55 D1 IA50 E5 IA51 F3 IA52 F3 IA53 F3

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

78

SSB: STi7100: SDRAM 3

4

5

12

13 2AA2

2V5-LMI

12

6

66

48

20 47 49

LMI-VREF

3AAC 390R

RES

LMI-CLKnot LMI-CLK LMI-CLKEN LMI-CSnot LMI-RASnot LMI-CASnot LMI-WEnot

46 45 44 24 23 22 21

61

55

9

3

33

18

15

NC

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

D

L DM U VREF CK CK CKE CS RAS CAS WE

DQS

VSSQ

VSS 34

L U

LMI-DQS0 LMI-DQS2

LMI-DQM1 LMI-DQM3

DDR SDRAM 16Mx16

L U

A

2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65

LMI-D(8) LMI-D(9) LMI-D(10) LMI-D(11) LMI-D(12) LMI-D(13) LMI-D(14) LMI-D(15) LMI-D(24) LMI-D(25) LMI-D(26) LMI-D(27) LMI-D(28) LMI-D(29) LMI-D(30) LMI-D(31)

16 51

LMI-DQS1 LMI-DQS3

C

7A00-3 STI7100YWC

Φ

IAA0

3AAK 22R 3AAM 22R

A14 B14 A15 B15 A16 B16 A17 B17 A1 B2 A2 B3 A3 B4 A4 B5 A20 B20 A21 B21 A22 B22 A23 B23 A7 B8 A8 B9 A9 B10 A10 A11

G

H

I

A18 A5 B19 B7

LMIVIDBKSEL

0 1

LMISYSDATAMASK

0 1 2 3

LMISYS

0 1 LMISYSDATASTROBE 2 3

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

VREF CLKEN REF GNDBCOMP

CLK CLK CS0 LMIVID CS1 RAS CAS WE

LMIVIDADD LMIVIDDATA

0 1 2 3 4 5 6 7 8 9 10 11 12

LMIVIDBKSEL

0 1

0 1 LMIVIDDATAMASK 2 3

LMIVID

0 1 LMIVIDDATASTROBE 2 3

VREF CLKEN REF GNDBCOMP

LMI-A(0) LMI-A(1) LMI-A(2) LMI-A(3) LMI-A(4) LMI-A(5) LMI-A(6) LMI-A(7) LMI-A(8) LMI-A(9) LMI-A(10) LMI-A(11) LMI-A(12)

K4 L5

LMI-BA0 LMI-BA1

AB2 J1 AC1 K2

LMI-DQM0 LMI-DQM1 LMI-DQM2 LMI-DQM3

H5 Y5 R1 R2

LMI-CLKEN 22R

3AAH 120K

A13 B13 D11 E11 E14 D15 E15

FAA2

FAA3

D14 E13

RES

A6 A19 B6 B18 C11 D13 B12 B11

G

LMI-VREF-ST

2V5-LMI

E10 D10 E9 D9 D6 E6 D5 E5 D4 E7 D8 E8 D7

F

LMI-VREF-ST

3AAG IAA1

E

H

2V5-LMI

I

FAA4 IAA2

LMI-VREF2-ST 3AAT

LMI-VREF2-ST

120K RES

100n

AB1 J2 AC2 K1

LMISYSDATA

M4 N5 N4 P5 U4 V5 V4 W5 W4 U5 P4 T5 T4

LMI-CSnot

2ABB

7 8 22R 5 22R 6 22R 22R

LMISYSADD

LMI-RASnot LMI-CASnot LMI-WEnot

1K0 1%

2 1 4 3

4 3 22R 2 22R 1 22R 22R

D

LMI-CLKnot

LMI-CLKnot

1K0 1%

3AA9 22R 3AAL 22R

LMI-DQS0 IA33 LMI-DQS1 LMI-DQS2 LMI-DQS3

3AA8-2 3AA8-1 3AA8-4 3AA8-3

5 6 7 8

4 3 22R 2 22R 1 22R 22R

0 1 2 3 4 5 6 7 8 9 10 11 12

U1 U2 L4 M5 K5 J4 J5

3AAR

7 8 22R 5 22R 6 22R 22R

3AA6-4 3AA6-3 3AA6-2 3AA6-1

5 6 7 8

8 7 22R 6 22R 5 22R 22R

CLK CLK CS0 LMISYS CS1 RAS CAS WE

3AAS

2 1 4 3

4 3 22R 2 22R 1 22R 22R

3AA4-4 3AA4-3 3AA4-2 3AA4-1

1 2 3 4

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

100n

3AA7-2 3AA7-1 3AA7-4 3AA7-3

5 6 7 8

4 3 22R 2 22R 1 22R 22R

3AA2-1 3AA2-2 3AA2-3 3AA2-4

V1 V2 W1 W2 Y1 Y2 AA1 AA2 E2 E1 F2 F1 G2 G1 H2 H1 AD1 AD2 AE1 AE2 AF1 AF2 AG1 AG2 L2 L1 M2 M1 N2 N1 P2 P1

1n0 RES 2ABA

3AA5-4 3AA5-3 3AA5-2 3AA5-1

5 6 7 8

8 7 22R 6 22R 5 22R 22R

10u RES 2AB9

100n

5 100n 2AB6-4 4

6 3

7 100n 2AB6-2 2

100n 2AB6-3

8 2AB6-1 1

100n

100n 2AB5

100n 2AB4

100n 2AB3

100n 2AB2

100n 2AB1

100n 2AB0

2AAZ

F

3AA3-4 3AA3-3 3AA3-2 3AA3-1

1 2 3 4

1K0 1%

100n

100n 2AAU

100n 2AAT

100n 2AAS

100n 2AAR

100n 2AAP

100n

2AAN

100n

2AAM

100n 2AAL

100n 2AAK

100n 2AAJ

100n 2AAH

100n 2AAG

100n 2AAF

100n 2AAE

100n

2AAB

E

3AA1-1 3AA1-2 3AA1-3 3AA1-4

AT T-POINT

150R

3AAA

LMI-D(7) LMI-D(6) LMI-D(5) LMI-D(4) LMI-D(3) LMI-D(2) LMI-D(1) LMI-D(0) LMI-D(15) LMI-D(14) LMI-D(13) LMI-D(12) LMI-D(11) LMI-D(10) LMI-D(9) LMI-D(8) IA31 LMI-D(23) LMI-D(22) LMI-D(21) LMI-D(20) LMI-D(19) LMI-D(18) LMI-D(17) LMI-D(16) LMI-D(30) LMI-D(31) LMI-D(28) LMI-D(29) LMI-D(26) LMI-D(27) LMI-D(24) LMI-D(25)

220R 2AAA

3AAQ

LMI-CLK

LMI-CLK

LMI

2V5-LMI

1K0 1% 2AB8

5AA0 +2V5

3AAD

D

I_18020_020.eps 190808

3104 313 6304.3 1

B

VSSQ

VSS 12

C

DQS

16 51

26 27

14 17 19 25 43 50 53

VDDQ

64

CK CK CKE CS RAS CAS WE

LMI-BA0 LMI-BA1

Φ

RES

58

VREF

46 45 44 24 23 22 21

LMI-D(0) LMI-D(1) LMI-D(2) LMI-D(3) LMI-D(4) LMI-D(5) LMI-D(6) LMI-D(7) LMI-D(16) LMI-D(17) LMI-D(18) LMI-D(19) LMI-D(20) LMI-D(21) LMI-D(22) LMI-D(23)

VDD 0 1 2 3 4 5 A 6 7 8 9 10 11 12 AP 0 BA 1

52

D

2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65

29 30 31 32 35 36 37 38 39 40 28 41 42

1

55

15

9

3

33

18

1

61 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

L DM U

49 3AAB 390R

RES

NC

LMI-A(0) LMI-A(1) LMI-A(2) LMI-A(3) LMI-A(4) LMI-A(5) LMI-A(6) LMI-A(7) LMI-A(8) LMI-A(9) LMI-A(10) LMI-A(11) LMI-A(12)

6

20 47

DDR SDRAM 16Mx16

14 17 19 25 43 50 53

66

LMI-DQM0 LMI-DQM2

Φ

0 1 2 3 4 5 A 6 7 8 9 10 11 12 AP 0 BA 1

7AA2 EDD2516AETA-5B-E

VDDQ

48

26 27

VDD

14

B03C

2AA3 10u

10u

RES

34

LMI-BA0 LMI-BA1

10u

100n

29 30 31 32 35 36 37 38 39 40 28 41 42

LMI-CLKnot LMI-CLK LMI-CLKEN LMI-CSnot LMI-RASnot LMI-CASnot LMI-WEnot

100n

RES 1n0 2AA8

2AA7

10u RES

1K0 1% 2AA6

3AAP

11 LMI DDR SDRAM SYS

2AA9

LMI-A(0) LMI-A(1) LMI-A(2) LMI-A(3) LMI-A(4) LMI-A(5) LMI-A(6) LMI-A(7) LMI-A(8) LMI-A(9) LMI-A(10) LMI-A(11) LMI-A(12)

FAA0

FAA1

10

64

1K0 1%

3AAN

B

LMI-VREF

9

2V5-LMI

7AA1 EDD2516AETA-5B-E

2V5-LMI

8

2AA1

2AA0 10u

A

7

LMI DDR SDRAM SYS

STI7100: SDRAM

B03C

6

58

2

52

1

2

3

4

5

6

7

8

9

10

11

12

13

14

2AA0 A5 2AA1 A6 2AA2 A11 2AA3 A12 2AA6 C3 2AA7 C3 2AA8 C3 2AA9 C9 2AAA D1 2AAB D2 2AAE D2 2AAF D2 2AAG D2 2AAH D3 2AAJ D3 2AAK D3 2AAL D3 2AAM D3 2AAN D4 2AAP D4 2AAR D4 2AAS D4 2AAT D5 2AAU D5 2AAZ E3 2AB0 E3 2AB1 E3 2AB2 E3 2AB3 E3 2AB4 E4 2AB5 E4 2AB6-1 E4 2AB6-2 E4 2AB6-3 E5 2AB6-4 E5 2AB8 H11 2AB9 H11 2ABA H12 2ABB I12 3AA1-1 D7 3AA1-2 D7 3AA1-3 D7 3AA1-4 D7 3AA2-1 D8 3AA2-2 D8 3AA2-3 E8 3AA2-4 E8 3AA3-1 E7 3AA3-2 E7 3AA3-3 E7 3AA3-4 E7 3AA4-1 E8 3AA4-2 E8 3AA4-3 E8 3AA4-4 E8 3AA5-1 E7 3AA5-2 E7 3AA5-3 E7 3AA5-4 E7 3AA6-1 F8 3AA6-2 F8 3AA6-3 F8 3AA6-4 F8 3AA7-1 F7 3AA7-2 F7 3AA7-3 F7 3AA7-4 F7 3AA8-1 F8 3AA8-2 F8 3AA8-3 F8 3AA8-4 F8 3AA9 F7 3AAA G11 3AAB B4 3AAC B10 3AAD H11 3AAG F11 3AAH F10 3AAK G8 3AAL G7 3AAM G8 3AAN B3 3AAP C3 3AAQ D13 3AAR I12 3AAS I12 3AAT I10 5AA0 D1 7A00-3 D9 7AA1 A5 7AA2 A11 FAA0 B3 FAA1 C2 FAA2 H11 FAA3 H12 FAA4 I12 IA31 E6 IA33 F6 IAA0 D1 IAA1 F10 IAA2 I10

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

79

SSB: STi7100: AV-Interface

1

2

B03D

3

4

5

6

7

8

STI7100: AV-INTERFACE

9

B03D A

A 7A00-1 STI7100YWC

Φ

L34 L33 K34 K33 J34 J33 H34 H33 U30 T31 T30 R31 R30 P31 P30 N31

B

M34 M33

C

2AC0

IAC4 C28 C27

1u0

3AC1 510R 5%

IAC5

B28 A28 B27 A27 D24 E24 E26 D26

D

A25 B25 C25 D25 E25

PCMOUT2 PCMOUT3 PCMOUT4

AV INTERFACE

0 1 2 3 4 5 6 7 8 VIDDIGOUTYC 9 10 11 12 13 14 15

R0OUT VIDANA G0OUT B0OUT

IDUMPR0 VIDANA IDUMPG0 IDUMPB0 C1OUT VIDANA CV1OUT Y1OUT IDUMPC1 VIDANA IDUMPCV1 IDUMPY1 REXT0 VIDANA REXT1

VSYNC VIDDIGOUT HSYNC VBGFIL AUDANA IREF

VIDANA

MRIGHT PRIGHT AUDANAOUT MLEFT PLEFT SPDIF SCLK AUDOUT LRCLK PCMCLK 0 1 2 AUDPCMOUT 3 4

GNDAREXT0 GNDAREXT1

TXCP TXCN TX0P TX0N TMDS TX1P TX1N TX2P TX2N TMDSREF

D34 F34 E34

B

D33 F33 E33 A34 C34 B34 IAC0 IAC2

A33 C33 B33

3AC2 12K 3AC3

A31 A32

22K IAC3

B31 B32

C

12K 3AC5 22K

U33 U34 T33 T34 R33 R34 P33 P34 T32

3AC4

MPEG-TXC+ MPEG-TXCMPEG-TX0+ MPEG-TX0MPEG-TX1+ MPEG-TX1MPEG-TX2+ MPEG-TX2FAC0

3AC9

D

+3V3TMDS 49R9 1%

AUDDIG

DATAIN DSTRBIN DLRCLKIN

D29 D28 E28

3ACA RES 100R 1% COMPENSATION RESISTOR

E

E I_18020_021.eps 190808

3104 313 6304.3

1

2

3

4

5

6

7

8

9

2AC0 C2 3AC1 C2 3AC2 C5 3AC3 C5 3AC4 C5 3AC5 C5 3AC9 D5 3ACA D5 7A00-1 A4 FAC0 D5 IAC0 B5 IAC2 C5 IAC3 C5 IAC4 C3 IAC5 C3

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

80

SSB: STi7100: Power 1

2

3

4

5

6

7

8

10

9

11

12

13

14

STI7100: POWER

B03E

B03E

A

A 7A00-5 STI7100YWC

+1VTMDS

VDAC VDDE-2V5

D30 E30 H32

DA_HD_0_VCCA DA_SD_0_VCCA VDDE2V5_VID_ANA

DA_HD_0_GNDA DA_SD_0_GNDA GNDE_VID_ANA

C32 F30 J32

ADAC

D

B29 D31 IAE2

CLOCKGENA

+3V3TMDS +2V5-CLKGENA +1V

100n

B1 F3 C2 E4 C3

CKGA_PLL1_AVDDPLL2V5 CKGA_PLL1_DVDDPLL1V0 CKGA_PLL2_AVDDPLL2V5 CKGA_PLL2_DVDDPLL1V0 CKGA_PLL_VDDE2V5 CLOCKGENB

M30 J30 L30 H30 G32 N30 K30 E29

VDDE-2V5 IAE3

100n

100n 2AGN

100n 2AGB

1n0 2AGA

1n0 2AG9

1n0 2AG8

1n0 2AG7

1n0 2AG6

6 100n 2AG5

3

100n 2AG4-3

5 4

100n 2AG4-4

100n 2AG4-2 2

1

2AG4-1

8

7

VDDE-2V5 220R

CKGB_4FS0_GNDA CKGB_4FS0_GNDD CKGB_4FS1_GNDA CKGB_4FS1_GNDD GNDE_4FS_ANA AGNDPLL80v0 DGNDPLL80v0 GNDE_PLL80_ANA

D1 D3 D2 E3

VDDE-2V5

M31 J31 L32 H31 F31 D32 K31 K32

GND

CLOCKGENC C29 G30 E31

IAE4 +2V5-CLKGENA

FS0_GNDA FS0_GNDD GNDE_FS0_ANA

C31 G31 F32

LMI 100n

2V5-LMI

IAE8 2V5-LMI 1n0 IAE9

5AE5 +1V

LMISYSVDDE2V5

LMISYSDLL_VDD

GNDE 3V3

D

E IAE5

5AE0 +3V3

VDDE-3V3 220R

F

G

LMIVIDDLL_VDD ANALOG D27 M32

+1V 100n 2AEU

100n 2AEM

1n0 2AEA

1n0 2AEZ

H

4

100n 2AET

6

100n 2AE5-4

100n 2AE5-3 3

1

5

+1V 2AE5-1

GND_ANA1 GND_ANA2

H

I_18020_022.eps 190808

3104 313 6304.3 1

C

LMIVIDVDDE2V5

1n0

100n 2AGH

2AGG

30R

G3 C12

8

G

100n 2AGT

2AEH

30R

LMISYSDLL_VSS LMIVIDDLL_VSS

7

5AE9 +1V

T1 T2 U3 V3 W3 Y3 Y4 AA3 AA5 AB3 AC3 H4 C4 C5 C6 C7 C8 C9 C10 C13 D12 E12 A12

100n 2AE5-2

1n0 2AGD

2AGC

30R

F

FS0_VCCA FS0_VDDD VDDE2V5_FS0_ANA

2

5AE7 +2V5

GNDE

100n

+2V5

CKGB_4FS0_VCCA CKGB_4FS0_VDDD CKGB_4FS1_VCCA CKGB_4FS1_VDDD VDDE2V5_4FS_ANA AVDDPLL80v0 DVDDPLL80v0 VDDE2V5_PLL80_ANA

CKGA_PLL1_AGNDPLL2V5 CKGA_PLL1_DGNDPLL1V0 CKGA_PLL2_AGNDPLL2V5 CKGA_PLL2_DGNDPLL1V0

100n 2AFT

1n0 2AF5

2AF4

30R

5AE4

A30 B30 E32

100n 2AFS

+3V3

AUD_GNDA AUD_GNDAS GNDE_AUD_ANA

100n 2AER

5AE2

AUD_VCCA VDDE2V5_AUD_ANA

VDD

100n 2AGP

100n

100n 2AE7

1n0 2AE2

2AE8

1n0 2AEB

220R

E

N34 N33 V34 V32 P32 V33 U32 N32 R32

100n 2AFL

+1V

TMDSVSSC0 TMDSVSSC1 TMDSVSSC2 TMDSVSSCK TMDSVSSP TMDSVSSX TMDSVSSSL TMDSVSSD TMDSGNDE

B

100n

+3V3TMDS IAE1

5AE8

TMDSVDDC0 TMDSVDDC1 TMDSVDDC2 TMDSVDDCK TMDSVDDP TMDSVDDX TMDSVDDSL TMDSVDDD TMDSVDDE3V3 TMDSVDD

100n 2AFK

C

W31 Y32 W34 W32 AC32 W33 AA32 AB32 W30 V31

VDDE 3V3

A24 B24 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 D23 E23 J3 K3 L3 M3 N3 P3 R3 R4 R5 T3 AD3 AE3 AF3 AG3 AH3 AJ3 AM4 AM6 AN4 AN6 AP4 AP6 V30 U31 AH32 AK32 AJ32 AG34 AG33 AG32

100n 2AFJ

TMDS +1VTMDS

VDDE 2V5

100n 2AFH

AP28 AN28 AM27 AL27 AM28

POWER (2V5, 3V3)

1n0 2AFE

SATAVSST SATAVSSR SATAVSSREF SATAVSSOSC SATAVSSDLL

A26 B26 C26 G33 G34 AF31 AF32 AF33 AF34 AK23 AK24 AM9 AM10 AM11 AM12 AM13 AM14 AM15 AP7 AN8

1n0 2AFD

100n

2

SATAVDDT0 SATAVDDT1 SATAVDDR 0 SATAVDDR 1 SATAVDDREF SATAVDDOSC2V5 SATAVDDOSC SATAVDDDLL

VDDE-3V3

1n0 2AFC

7

8

100n 2AFR-2

100n 2AFR-1 1

6

5 4

3

100n 2AFR-4

5 4

100n 2AFN-4

100n 2AFR-3

7

6 100n 2AFN-3

2

3

100n 2AFN-2

7

8

5

8 1

100n 2AFN-1

100n 2AEN-2 2

1

100n 2AEN-1

100n 2AEN-4 4

6 100n 2AEN-3

7 2

1

3

8

100n 2AEJ-2

5 4

100n 2AEJ-1

100n 2AEJ-4

100n 2AEJ-3 3

4

3

100n 2AED-4

6

5

6

7

100n 2AED-3

100n 2AED-2 2

VDDE-2V5

AN29 AP29 AM29 AL28 AL30 AM26 AL26 AL29

VDDE-2V5

AK3 AK7

1n0 2AFB

IAE6

2AEE

USBVSSC2V5 USBVSSBS USBVSSP2V5 USBVSSP

SATA-I

+1V 330u 6.3V 2AED-1 1 8

USBVDDBC2V5 USBVDDBS USBVDDP2V5 USBVDDP

H3 N13 N14 N15 N20 N21 N22 P13 P14 P15 P16 P19 P20 P21 P22 R14 R15 R16 R19 R20 R21 T15 T16 T17 T18 T19 T20 U15 U16 U17 U18 U19 U20 V15 V16 V17 V18 V19 W15 W16 W17 W18 W19 W20 Y14 Y15 Y16 Y19 Y20 Y21 AA13 AA14 AA15 AA16 AA19 AA20 AA21 AA22 AB13 AB14 AB15 AB20 AB21 AB22 AK4 AK5 AK29 AK30 AK31 AL4 AL5 AL31 AM22 AN26 AN32 AP26 AP32 V20

100n 2AF8

B

SENSE+1V

Φ

POWER (1V0)

100n 2AF0

cA00

+1V

F4 F5 G4 N16 N17 N18 N19 P17 P18 R13 R17 R18 R22 T13 T14 T21 T22 U13 U14 U21 U22 V13 V14 V21 V22 W13 W14 W21 W22 Y13 Y17 Y18 Y22 AA17 AA18 AB17 AB18 AB19 AF30 AK16 AL7 AB16 AL16 AM7 AM16 AM17 AM18 AM19 AN7 AN16 AP16

+1V

AN23 AL23 AM23 AP23

2AEC

USB2 AL24 AM24 AL25 AN24 AP24

VDDE-3V3 VDDE-2V5

7A00-6 STI7100YWC

Φ

100n 2AFG

Φ

POWER (MISC)

1n0 2AFF

7A00-7 STI7100YWC

2

3

4

5

6

7

8

9

10

11

12

13

14

2AE2 D1 2AE5-1 H8 2AE5-2 H9 2AE5-3 H9 2AE5-4 H9 2AE7 D2 2AE8 D1 2AEA H10 2AEB D1 2AEC F12 2AED-1 B1 2AED-2 B1 2AED-3 B1 2AED-4 B1 2AEE B1 2AEH G4 2AEJ-1 B2 2AEJ-2 B2 2AEJ-3 B2 2AEJ-4 B2 2AEM H10 2AEN-1 B3 2AEN-2 B3 2AEN-3 B3 2AEN-4 B3 2AER H11 2AET H9 2AEU H10 2AEZ H9 2AF0 H10 2AF4 E1 2AF5 E1 2AF8 H11 2AFB F12 2AFC F12 2AFD F12 2AFE F13 2AFF F13 2AFG F13 2AFH F13 2AFJ F13 2AFK F14 2AFL H11 2AFN-1 B3 2AFN-2 B4 2AFN-3 B4 2AFN-4 B4 2AFR-1 B5 2AFR-2 B5 2AFR-3 B4 2AFR-4 B4 2AFS H11 2AFT H12 2AG4-1 E1 2AG4-2 E1 2AG4-3 E2 2AG4-4 E1 2AG5 E2 2AG6 E2 2AG7 E2 2AG8 E3 2AG9 E3 2AGA E3 2AGB E3 2AGC F1 2AGD F1 2AGG H4 2AGH H5 2AGN E3 2AGP H11 2AGT G5 5AE0 E12 5AE2 D1 5AE4 E1 5AE5 H4 5AE7 F1 5AE8 D1 5AE9 G4 7A00-5 A10 7A00-6 A13 7A00-7 A7 IAE1 C1 IAE2 D1 IAE3 E1 IAE4 F1 IAE5 E12 IAE6 B2 IAE8 G4 IAE9 G5 cA00 B2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

81

SSB: STi7100: USB & Ethernet Connector

1

2

3

4

5

6

7

8

USB + ETHERNET CONNECTOR

B03F

B03F ETHERNET CONNECTOR 5A61

IA63

3

33R

3A60-3

3A61-4

22R

1N00

33R

ETH-RDP

2

7

2

IA60

3A61-2

8

7

3A61-1

33R

1

8

3A60-1

33R

B

1

1

RDP

RJ-1

2

RDN

RJ-2

3

RCT

RJ-3

4

TCT

RJ-4

5

TDP

RJ-5

6

TDN

RJ-6

7

NC

RJ-7

8

C1

RJ-8

22R

100n

2A60

22R

A

5

FA62

3A60-2

12

4

22R

A

ETH-LINK

220R

6

D2

6

3A61-3

9

3

11

5

D1

3A60-4

SH1

4

+3V3-ET-LED

+3V3-ET-LED

+3V3-ET-ANA

ETH-RDM ETH-TDP

B 5-6605403-8

D4 14

C

ETH-ACT

100R

5

100n +3V3-ET-LED

4

3A62-4

10

IA64 2A62 100n

13

2 100R

FA64

7

3A62-2

100R

3

3A62-3

6

100n

C

FA65

2A61

100R

2A63

8

3A62-1

1

+3V3-ET-ANA

SH2

FA60

D3

FA63

ETH-TDM

FA61

+T 0R4

3A63

220u 25V

330u 10V 2A59

22u 2A58

D

2A57

+5V

IA61

D

5A60

2A64

56K 100K

IA62 USB-OC

47u 6.3V

3A64 3A65

220R

USB

E

E

CONNECTOR 1P07 FA66 FA70

USB20-2-DM USB20-2-DP

FA71 FA69 5

I_18020_023.eps 190808

292303-4

3104 313 6304.3

1

6

1 2 3 4

2

3

4

5

6

7

8

1N00 A5 1P07 E3 2A57 D1 2A58 D1 2A59 D1 2A60 B3 2A61 C3 2A62 C4 2A63 C2 2A64 E2 3A60-1 B3 3A60-2 B2 3A60-3 A2 3A60-4 A2 3A61-1 B3 3A61-2 B2 3A61-3 A3 3A61-4 A3 3A62-1 C3 3A62-2 C3 3A62-3 C3 3A62-4 C3 3A63 D1 3A64 D1 3A65 E1 5A60 D2 5A61 A5 FA60 B4 FA61 C4 FA62 A4 FA63 B4 FA64 C4 FA65 C5 FA66 E2 FA69 E2 FA70 E3 FA71 E2 IA60 B3 IA61 D1 IA62 E1 IA63 A5 IA64 C4

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

82

SSB: STi7100: Debug

1

B03G

2

3

5

4

6

7

STI7100: DEBUG

B03G

2AM1 100n

100n

TXD-ASC2

6

C1-

2

V+

4

2AM2 100n

C2+

2AM3 100n

C2-

11 10

100R

VCC

RS232 V-

5

3AM1

Φ

C1+

3

2AM4

B

1

A

16

7AM0 ST3232C

T1 IN T2

T1 OUT T2

R1 IN R2

OUT

14 7

100R

12 9

R1 R2

1AM0

3AM2

FAM0 3AM3

FAM1

FAM2 5

100R

4

1 2 3

B

UART2

B3B-PH-SM4-TBT(LF)

15

13 8

UART

GND

A

100n

2AM0

+3V3

C

C

RXD-ASC2

14

+3V3

2

D

ST40 DEBUG LINK

+3V3

10K

7

9AM1

7AM1-1 74LVC07APW 3AM7 1

TRIG-OUT

FAM3

TRIG-IN

FAM4 FAM5

ASEBRKn

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

9AM0 RES FAM6

JTAG-TMS-ST 3AM0

FAM7

JTAG-TCK-ST

33R JTAG-TDI-ST

FAM8

JTAG-TDO-ST

FAM9

RST-TARGETn

FAMA

JTAG-TRSTn-ST

FAMB FAME

14

+3V3

E

1AM2

FAMJ

4

5-147279-5 3AM8

E

+3V3

10K

7

BUF-RST-TARGETn

7AM1-2 74LVC07APW 3

D

9AM2

I_18020_024.eps 190808

3104 313 6304.3

1

2

3

4

5

6

7

1AM0 B6 1AM2 D6 2AM0 A4 2AM1 A3 2AM2 A5 2AM3 B5 2AM4 B3 3AM0 D5 3AM1 B3 3AM2 B5 3AM3 B5 3AM7 C4 3AM8 E4 7AM0 A4 7AM1-1 C4 7AM1-2 E4 9AM0 D5 9AM1 C3 9AM2 E4 FAM0 B5 FAM1 B5 FAM2 B6 FAM3 D5 FAM4 D5 FAM5 D5 FAM6 D5 FAM7 D5 FAM8 D5 FAM9 E5 FAMA E5 FAMB E5 FAME E6 FAMJ D5

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

83

3A77-4 E6 3A78-1 E6 3A78-2 E6

3A79-2 B8 3A79-3 B9 3A79-4 B8

SSB: CI: PCMCIA Connector

B

C

+3V3

5

22u

2A55

22u

7A70 A8 7A71 C8 FA72 A2

FA73 D6 IA70 A6 IA71 A6

8

IA72 A6 IA73 A6 IA74 A6

IA75 A6 IA76 C9 IA77 D2

9

PCMCIA-VCC-VPP

PCMCIA-VCC-VPP

IA78

B03H

CA-WAIT MOCLK_VS2

3A22

IA78 D2 IA79 A6

10

CA-INPACK

IRQ-CA

IA73

CA-CD1

IA74

CA-CD2

IA75

CA-VS1

+3V3

A

IA79

3EN1 3EN2 G3

CA-RST

ROW_B 100K 1P00-B GND3 35 CD1 CA-CD1 36 D11 MDO3 37 D12 MDO4 38 D13 MDO5 39 D14 MDO6 40 D15 MDO7 41 CE2 CA-CE2 42 VS1 CA-VS1 43 IORD CA-IORD 44 IOWR CA-IOWR 45 A17 CA-MISTRT 46 A18 CA-MDI0 47 A19 CA-MDI1 48 A20 CA-MDI2 49 A21 CA-MDI3 50 VCC2 51 PCMCIA-VCC-VPP VPP2 52 A22 CA-MDI4 53 A23 CA-MDI5 54 A24 CA-MDI6 55 A25 CA-MDI7 56 VS2 MOCLK_VS2 57 RESET CA-RST 58 WAIT CA-WAIT 59 INPACK CA-INPACK 60 REG CA-REG 61 BVD2|SPKR MOVAL 62 BVD1|STSCHG MOSTRT 63 D8 MDO0 64 D9 MDO1 65 D10 MDO2 66 CD2 CA-CD2 67 GND4 68 FA73

PCMCIA-D3 PCMCIA-D4 PCMCIA-D5 PCMCIA-D6 PCMCIA-D7 CA-CE1 PCMCIA-A10 CA-OE PCMCIA-A11 PCMCIA-A9 PCMCIA-A8 PCMCIA-A13 PCMCIA-A14 CA-WE IRQ-CA

10K

7

IA72

7

CABLE CARD INTERFACE

IA77

IA71

3A72-2 10K 2 10K 3A72-3 6 3 10K 3A72-1 8 1 10K

PCMCIA-VCC-VPP

CA-MIVAL CA-MICLK PCMCIA-A12 PCMCIA-A7 PCMCIA-A6 PCMCIA-A5 PCMCIA-A4 PCMCIA-A3 PCMCIA-A2 PCMCIA-A1 PCMCIA-A0 PCMCIA-D0 PCMCIA-D1 PCMCIA-D2 3A74

IA70

3A70-4

4 10K 3A70-1 8 1 10K 3A70-2 2 7 10K RES 3A71

+T 0R4

ROW_A 1P00-A GND1 1 D3 2 D4 3 D5 4 D6 5 D7 6 CE1 7 A10 8 OE 9 A11 10 A9 11 A8 12 A13 13 A14 14 WE|P 15 RDY|BSY 16 VCC1 17 VPP1 18 A16 19 A15 20 A12 21 A7 22 A6 23 A5 24 A4 25 A3 26 A2 27 A1 28 A0 29 D0 30 D1 31 D2 32 WP|IOIS16 33 GND2 34 71 72

3A85 E8 3A86 E8 3A87 E8

PCMCIA-VCC-VPP

FA72

+5V

6

3A84-2 E8 3A84-3 E8 3A84-4 E8

18

MDO3

2

17 16 15 14 13 12 11

MDO4 MDO6 MDO5 MDO7

7A70 74LVC245A 1 19 2

1

100n

3A73

5

3A83-3 E8 3A83-4 E8 3A84-1 E8

2A70

4

3A82-4 D8 3A83-1 E8 3A83-2 E8

3A81-3 D9 3A81-4 D8 3A82-3 D9

3A80 B8 3A81-1 D9 3A81-2 D8

3 4 5 6 7 8 9

3A79-4 47R 3 3A79-2 47R 1 3A80 47R

4

2

CA-MDO3 3A79-3 47R 3A79-1 47R

CA-MDO4 CA-MDO6 CA-MDO5 CA-MDO7

B

+3V3

3EN1 3EN2 G3 MOCLK_VS2

18

MDO0 MDO2 MDO1 MOVAL MOSTRT

17 16 15 14 13 12 11

19 IA76 2

1 2

C

7A71 74LVC245A 1

3 4 5 6 7 8 9

4

2 4

3A81-4 47R 3 3A81-2 47R 1 3A82-4 47R 3

CA-MOCLK_VS2 3A81-3 47R 3A81-1 47R 3A82-3 47R

CA-MDO0 CA-MDO2 CA-MDO1 CA-MOVAL CA-MOSTRT

D

10

D

3

3A78-3 E6 3A78-4 E6 3A79-1 B9

CI: PCMCIA CONNECTOR

2A56

A

2

3A77-1 E6 3A77-2 E6 3A77-3 E6

100n

B03H

3A74 D2 3A75 D6 3A76 E6

2A71

1

3A72-2 A5 3A72-3 A5 3A73 A2

20

3A70-4 A5 3A71 A5 3A72-1 A5

10

3A22 A6 3A70-1 A5 3A70-2 A5

2A56 A1 2A70 A8 2A71 C8

20

1P00-A B1 1P00-B B5 2A55 A2

3A75 3A76 3 2 1

E

4 4 3 2 1

MOVAL

3A77-310K

MDO0

10K 3A77-2

MDO1

10K 3A77-1

MDO2

10K 3A77-4

MDO3

10K 3A78-4

MDO4

10K 3A78-3

RESERVED 5

MDO3 MDO4 MDO5 MDO6 MDO7 MDO1 MDO2 MDO0 MOVAL MOSTRT

8

6 8

3A83-4 47R 6 3A83-1 47R 7 3A85 47R 7 3A84-3 47R 5 3A84-1 47R

MDO5

10K 3A78-2

MDO6

10K 3A78-1

CA-MDO3 CA-MDO4 CA-MDO5 CA-MDO6 CA-MDO7 CA-MDO1 CA-MDO2 CA-MDO0 CA-MOVAL CA-MOSTRT

3A83-3 47R 3A83-2 47R 3A84-2 47R 3A84-4 47R 3A86 47R

3A87 47R

MOCLK_VS2

E

CA-MOCLK_VS2

MDO7

I_18020_025.eps 190808

10K

3104 313 6304.3

1

MOSTRT 10K

2

3

4

5

6

7

8

9

10

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

84

SSB: PNX8541: Standby Controller 1

2

3

4

5

6

7

8

9

10

11

3H47

7H00-6 PNX8541

3H21

10K

3H23 +3V3-STANDBY

10K 3H26 10K RES RES 10K

3H28 3H31

10K +3V3-STANDBY

3H60 10K

RES 10K 3H24 10K 3H27 10K 3H30 10K

3H58

9H06

10K

BOLT-ON-IO RESET-ST7100

IH02

3H37 10K RES

3H64 RES

D

RESET-SYSTEM

10K

3H45 RES +3V3-PER 3H70

10K

100K

2H01

LIGHT-SENSOR KEYBOARD

100n

Y2

ALE

AA4

3H86-3

2

3

3H86-2

IH19

7

2

EA

10K

3H07

3H08

10K

SPI-PROG

IH93

FH00

10K

7H02 M25P05-AVMN6

IH03 6

SPI-CLK IH06

1

SPI-CSB IH07 SPI-WP

4 P6 MODE0 5 MODE1

3 7

RES

SDM VCC

5

SPI-SDO

10K

6HW2

BAS316

1

F

10K

EA

0 1 CADC 2 3

IH14

3H05

3H06

ALE

ALE

IH00

2H06 RES

TSTPOINT FOR DEBUG

100p

C

SPI-PROG IH94 GND TSTPOINT FOR DEBUG

D C

Φ

512K FLASH

FH01

IH01 Q

2

IH95

2H07 RES

TSTPOINT FOR DEBUG SDM

SPI-SDI

100p FH02

D

S W HOLD VSS

E IH92

IH20

DETECT1

DETECT2

7H14 PDTC114EU

1 2

7H16-1 BC847BS 1

10K

3H86-1

10K

10K

3H56

+3V3-STANDBY

8

6

100R

100R

10K

PSEN

+3V3-STANDBY

8 3H78-1 1 5

10K

3H54

4K7

3H04

LED2

PSEN

B

3H03 RES

4K7 RES

LED1

+3V3-STANDBY

10K

+3V3-STANDBY

3

3H86-4

LED1 LED2

3H69

SPI-PROG SPI-WP

6 4

100R

3H68

3H67 100R

3H01

10K 3H02 RES

SCL-UP-MIPS SDA-UP-MIPS

UA1_RX 0 UA1_TX 1 INT0 2 P3 INT1 3 T0 4 T1 5

AE2 AE4

E

+3V3

3H66

SCL-UP-MIPS SDA-UP-MIPS

Y1

PSEN

EA

100R

0 A8 1 A9 2 A10 3 A11 P2 4 A12 5 A13 A14 6 7 A15

AF4 AF3 AF2 AF1

RESET-SYSTEM AV2-BLK AV1-BLK KEYBOARD LIGHT-SENSOR AV1-STATUS AV2-STATUS

AD3 AD2

3H65 100R

100R

AB1 AC5 AC4 AC3 AC2 AC1

RXD-UP TXD-UP BOLT-ON-IO

RXD-UP TXD-UP

10K 3H36 RES

SCL SDA

0 PWM 1

CC0 0 1 CC1 2 P1 CC2 3 CC3 T2 7

V2 V1 W4 W3 W2 W1 Y4 Y3

P2.0 EJTAG-DETECT P2.2 STANDBY DETECT1 DETECT2 ENABLE-1V2 ENABLE-3V3

P2.0 EJTAG-DETECT P2.2 STANDBY DETECT1 DETECT2 ENABLE-1V2 ENABLE-3V3

I2C uP

AG4 AH3

1

10K 3H46 27K

3H51

AA2 AA1 AB4 AB3 AB2

SPI-PROG SPI-WP

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7

SKHU 1H11

RES 10K

RC REGIMBEAU_CVBS-SWITCH CEC-HDMI SUPPLY-FAULT SDM

10K 3H00

2

3H42 3H48 10K

2H00 RC 1n0 REGIMBEAU_CVBS-SWITCH CEC-HDMI SUPPLY-FAULT SDM

3H39

4K7 3H32

SPI-SDI

2H10

10K

0 1 2 3 P0 4 5 6 7

SPI-SDO SPI-SDI SPI-CLK SPI-CSB

4

3H20

ST-DL-APP RESET-NVM RESET-PNX5100 RESET-ETHERNET P0.4 WP-NANDFLASH RESET-AUDIO P0.7

AD4 AE1 AD1 AE3

10K

3H17

ST-DL-APP RESET-NVM RESET-PNX5100 RESET-ETHERNET P0.4 WP-NANDFLASH RESET-AUDIO P0.7

10K 3H14 10K 3H16 RES 10K 3H19 4K7

10K RES 10K RES 10K

3H15

RESET_IN

SDO SDI CLK CSB

7 3H78-2 2

3H13 +3V3-STANDBY

U5 U4 U3 U2 U1 V5 V4 V3

A

3

AA3

RESET-STBY 3H10

P6_0 P6_1 SPI P6_2 P6_3

XTAL

3H50

+3V3-PER

I O

10K

4K7

8

27p

2HF1

AG1 AG2

3H49

4

AHF0

STANDBY CONTROL

C

14

B04A

100n

27M

1HF0

27p

2HF0

A

+3V3-STANDBY

13

PNX 8541: STANDBY CONTROLLER

B04A

B

12

IH16

2H03

F

1u0 3 IH04 10K

7H16-2 BC847BS 4

RES

+3V3-STANDBY

IH17

6 +1V2-PNX5100

IH26

2

7H93-1 BC847BS 1

9H13

3H41

IH33

BAS316

IH09

DETECT-12V 10K

6H10

IH35

5

INP OUTP CD

3H87-3

10K

10K

10K

7 3H87-2 2

1 3H87-1 8

5 3H87-4 4

IH18

100n

2H11

3K3

100n

3H43

H

3

5 4

3H44

10K

6

7H93-2 BC847BS

10K

3

1

NC GND

10K

4 3H78-4 5 +5V

2H12

IH08

IH91

H

G

10K

3H73 7H11 NCP303LSN30 2

4

10K

3 3H78-3 6

4 3H92-4 5 10K

+3V3-STANDBY IH34

3H72

G

5

3

8 3H92-1 1

10K

10K

7 3H92-2 2

6 3H92-3 3

4K7

+1V2-PNX8541

I

I

I_18020_026.eps 190808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

1H11 C13 1HF0 A4 2H00 B3 2H01 D2 2H03 F6 2H06 C14 2H07 D14 2H10 C11 2H11 H7 2H12 H6 2HF0 A3 2HF1 A3 3H00 B11 3H01 B11 3H02 B11 3H03 B11 3H04 B11 3H05 B11 3H06 B11 3H07 C11 3H08 C11 3H10 B2 3H13 B1 3H14 B2 3H15 B1 3H16 B2 3H17 B1 3H19 B2 3H20 B1 3H21 C2 3H23 C1 3H24 C2 3H26 C1 3H27 C2 3H28 C1 3H30 C2 3H31 C1 3H32 A11 3H36 D2 3H37 D4 3H39 B2 3H41 G6 3H42 C1 3H43 H7 3H44 I4 3H45 D2 3H46 C2 3H47 A11 3H48 C1 3H49 A10 3H50 A11 3H51 C2 3H54 C7 3H56 C7 3H58 C2 3H60 D1 3H64 D2 3H65 B7 3H66 B7 3H67 B7 3H68 B7 3H69 B7 3H70 D2 3H72 G7 3H73 G9 3H78-1 E5 3H78-2 E6 3H78-3 H4 3H78-4 H4 3H86-1 F4 3H86-2 F4 3H86-3 F3 3H86-4 F2 3H87-1 H3 3H87-2 H3 3H87-3 H2 3H87-4 H4 3H92-1 G4 3H92-2 G4 3H92-3 F3 3H92-4 G3 6H10 G7 6HW2 F5 7H00-6 A5 7H02 D10 7H11 G8 7H14 E6 7H16-1 F5 7H16-2 F5 7H93-1 G5 7H93-2 H5 9H06 D3 9H13 G8 AHF0 A4 FH00 C13 FH01 D13 FH02 D14 IH00 D10 IH01 D11 IH02 D4 IH03 D10 IH04 F4 IH06 D10 IH07 D10 IH08 H5 IH09 G7 IH14 E5 IH16 F5 IH17 G5 IH18 H4 IH19 F4 IH20 E7 IH26 G4

IH33 G7 IH34 G8 IH35 G7 IH91 H4 IH92 E9 IH93 C14 IH94 C14 IH95 D14

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

85

SSB: PNX8541: NVM

1

2

3

4

PNX 8541: NVM

B04C

5

6

B04C

+3V3-PER

RESET-NVM

FHC6

8

3HC2-1

10K FH09

1

A

BC857BW 7HC4

10K

10K 1 2 3

0 1 2

WC SCL

ADR SDA

7 6 5

FHC1

SCL-UP-MIPS

FHC2

SDA-UP-MIPS

B

4

B

3HC2-4 4

8

100n

Φ (8Kx8) EEPROM

3

3HC2-3

6

7HC3 M24C64

IH21

5

2HC0 RES IHC1

+3V3-PER

10K

A

2

3HC2-2

7

IHC2

FHC7

MAIN NVM

C

C +5V5-TUN

IH12

9H07 RES 2

1u0

RES 2H16

1u0

2H15

2K2

3H09

+12V

7H04 PHD38N02LT

1

D

4n7

R

IH32

22u 16V

+5V-TUN 2H14

1K0 1u0

10K

RES 2H05

3H34

FH08 K

7H05 TS2431

3H33

1

22n

FH03

1u0

2H09

RES 2H04

10K

3H29

RES 2H13

3

D

2 A

3H40

E

10K RES 1K0

3H35

3

E

I_18020_027.eps 190808

3104 313 6304.3

1

2

3

4

5

6

2H04 E3 2H05 E3 2H09 D1 2H13 D2 2H14 E4 2H15 D2 2H16 D3 2HC0 A4 3H09 D1 3H29 D1 3H33 D2 3H34 D2 3H35 E2 3H40 E2 3HC2-1 A3 3HC2-2 A3 3HC2-3 B3 3HC2-4 A5 7H04 D3 7H05 E1 7HC3 A4 7HC4 A4 9H07 D3 FH03 D2 FH08 E3 FH09 A3 FHC1 B5 FHC2 B5 FHC6 A2 FHC7 B4 IH12 D2 IH21 B3 IH32 E2 IHC1 A4 IHC2 A4

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

86

SSB: PNX8541: Misc.

1

B04D

3

2

4

PNX 8541: MISCELLANEOUS

Personal Notes:

B04D

A

A

B

B

7HD0 NCP303LSN30 2

FHD1 1

IHD0

OUTP

C

1

NC GND

4

CD

RESET-STBY

100n

RES 9H15

2HD0

5

INP

FHD0

3

9H14

C

10K

+3V3-STANDBY

3HD4

+3V3-STANDBY

D

D

E

E

F

F I_18020_028.eps 190808

3104 313 6304.3

1

2HD0 D2 3HD4 C3 7HD0 C2 9H14 C2 9H15 D2 FHD0 C4 FHD1 C2 IHD0 C2

2

3

4

E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

87

SSB: PNX8541: Control

5

6

PNX8541: CONTROL

7

+3V3-PER

8

+3V3-PER

9

B04E

330R

4

3HF9

B04E

3

3HF3

2

10K

1

A

AK1 AJ2 AK3 AJ3 AK2

EJTAG-TDI EJTAG-TCK EJTAG-TMS EJTAG-TRSTN EJTAG-TDO

AK27 AH27 AK29 AK28 AJ28 AJ27

SCL1 SDA1 SCL2 SDA2 SCL3 SDA3 9HF8

100n

3HP8

AK26

RESET-SYSTEM IHS7

9HG3

IRQ-CA

A

PCI-CLK-OUT 7HF2 PDTC114EU

RESET-SYSTEM

3HFG

PCI-CLK-OUT

PCI-CLK-ETHERNET

22R

IHF5

10R

T1 T2 T3 G27 E27 D28

B

PCI-CLK-PNX5100

IHF0

VPP_ID 0 1 2 GPIO 3 4 5

3HF2

PCI-CLK-PNX8535

22R 3HF4

PCI-CLK-USB20_ETH

22R

9HG2 RES

+3V3-PER

IHF7 IHS8

27MHz_OUT

AJ26

3HFH

AE27

BOOTMODE WC-EEPROM-PNX5100 IRQ-PCI 9HG1 IRQ-CA RXD-MIPS TXD-MIPS

RESET_SYS

SCL I2C1 SDA SCL I2C2 SDA SCL I2C3 SDA

+1V2-PNX8541

2HF2

B

TDI TCK TMS EJTAG TRST TDO

6HF0

MIPS C0NTROL

SML-310

7H00-4 PNX8541

RESERVED

+3V3-PER

10K

2HF5

C

3HFY

BOOTMODE

C

10n 2HF6

+3V3-PER

10K

IRQ-PCI

10K

3HFR

PCI-CLK-OUT

Φ

VDD

ZERO DELAY BUFFER 1

REF

1 2

CLK

33R

3

D

4 CLKOUT

4

GND

3HPD

SCL1 SDA1

3HPE

100R

100R

3HPF

3HPG

100R

100R

3HPH

SCL2 SDA2

E

100n

6

7HF1 CY2305S

3H11

SCL3 3HPJ

SDA3

3 2

2HF7 10p

3HFK 3HFP 33R

5

33R

7

PCI-CLK-PNX8535 PCI-CLK-ETHERNET

2HF8

D

15p 8

3HFM 33R

PCI-CLK-PNX5100 3HFN

PCI-CLK-USB20_ETH

33R SCL-UP-MIPS SDA-UP-MIPS SCL-UP-MIPS SDA-UP-MIPS SCL-SSB

SCL-SSB

SDA-SSB

SDA-SSB

100R

FH04

E

3HPK +3V3-PER FH05

100R

1K5

3HPM 1K5

I_18020_029.eps 190808

3104 313 6304.3

1

2

3

4

5

6

7

8

9

2HF2 B1 2HF5 C7 2HF6 C7 2HF7 C8 2HF8 D8 3H11 C2 3HF2 B7 3HF3 A7 3HF4 B7 3HF9 A6 3HFG B7 3HFH B6 3HFK D8 3HFM D8 3HFN D8 3HFP D8 3HFR D6 3HFY C2 3HP8 C1 3HPD D1 3HPE E1 3HPF E1 3HPG E1 3HPH E1 3HPJ E1 3HPK E3 3HPM E3 6HF0 A7 7H00-4 A3 7HF1 C7 7HF2 A7 9HF8 B2 9HG1 B2 9HG2 C3 9HG3 A5 FH04 E3 FH05 E3 IHF0 B6 IHF5 B7 IHF7 B3 IHS7 A4 IHS8 B2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

88

SSB: PNX8541: Control

1

B04F

2

3

4

5

7

6

8

PNX 8541: CONTROL

B04F

A

A 7H00-5 PNX8541

PCI XIO A11 B10

XIO-ACK

B XIO-SEL-NAND

3HF5

IHF3 IHF2 IHF1

E11 D11 C11 B11

100R PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

C

D

A20 B20 C20 D20 A19 B19 C19 D19 E19 A18 B18 C18 D18 E18 A17 B17 E15 D15 C15 B15 A15 E14 D14 C14 B14 A14 E13 D13 C13 B13 A13 E12

ACK AD25

0 1 CBE 2 3

3 2 XIO SEL 1 0 0 1 2 3 4 5 6 7 8 9 10 PCI AD 11 12 13 14 15 16 17 18 19 20 PCI AD 21 22 23 24 25 26 27 28 29 30 31

PCI_CLK DEVSEL FRAME IRDY TRDY PCI CTRL STOP IDSEL PAR PERR SERR REQ GNT REQ_B GNT_B INTA_OU T

D12 C12 B12 A12

PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3

A21

PCI-CLK-PNX8535

A16 C17 D17 E17 B16 B21 E16 C16 D16

PCI-DEVSEL PCI-FRAME PCI-IRDY PCI-TRDY PCI-STOP PCI-AD24 PCI-PAR PCI-PERR PCI-SERR

3HEU 100R

3HFD-1 8 1 10K 3HFD-3 6 3 3HFD-4 5 4 10K 3HFD-2 7 2 10K 10K 6 33HFE-3 10K 8 13HFE-1 10K 7 2 3HFE-2 10K

PCI-DEVSEL PCI-FRAME PCI-IRDY PCI-TRDY PCI-STOP PCI-PERR PCI-SERR

9HF6 2 10K

7 3HES-2

PCI-REQ PCI-GNT PCI-REQ-B PCI-GNT-B

PCI-REQ PCI-GNT PCI-REQ-B

1 10K

8 3HES-1

PCI-GNT-B

4 10K

5 3HES-4

3 10K

6 3HES-3

PCI-REQ-PNX85XX

PCI-GNT-PNX85XX

+3V3-PER 9HF4

IH30

C21

B

+3V3-PER 9HF7

D21 E21 E22 E20

+3V3-PER

C

PCI-REQ-USB20

+3V3-PER 9HF5

PCI-GNT-USB20

+3V3-PER

D

E

E

I_18020_030.eps 190808

3104 313 6304.3

1

2

3

4

5

6

7

8

3HES-1 C7 3HES-2 C7 3HES-3 C7 3HES-4 C7 3HEU C5 3HF5 B2 3HFD-1 B7 3HFD-2 B8 3HFD-3 B7 3HFD-4 B7 3HFE-1 B7 3HFE-2 B7 3HFE-3 B7 7H00-5 A3 9HF4 C7 9HF5 C7 9HF6 C7 9HF7 C7 IH30 C6 IHF1 B2 IHF2 B2 IHF3 B2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

89

SSB: PNX8541: SDRAM

3HJ0

DDR2-ODT DDR2-CLK_P DDR2-CLK_N

22R 3HGE

DDR2-BA0 DDR2-BA1

3HGF

T27 R29

22R

C

P26 R30 N26 U28 M26 R27 M27 V26 M28 R26 T28 L26 U27 J27

3HGD

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

22R

3HGC 22R 3HGA 22R 3HG8 22R 3HG6 22R 3HG4 22R 3HG2 22R

3HGB 22R 3HG9 22R 3HG7 22R 3HG5 22R 3HG3 22R 3HG1 22R

0 1 2 3 4 5 6 7 A 8 9 10 11 12 13

1u0

1u0 RES 2H83

100u 4V 2H82

2H80

0 BA 1

22R

220R

A +1V8-PNX8541

3HG0 IHG1

+1V8-PNX8541

6HD2

IH05

1

2H87

K NC

5

A

3HJ3

1K0 1%

3HJ1

IH11 FH07

2

NC

100u 4V RES 2HHB

4K7

REF

IH80

B

FH06

DDR2-VREF-CTRL

DDR2-VREF-DDR

3H82 1K0 1%

3HJ4

3

1u0 2H86

3H80 7H80 TS431AILT

330u 6.3V

SS24 RES

IH10

1K0 1%

22R

1K0 1%

22R 3HGH

P CLK N ODT CKE WEB CSB RASB CASB

7H01 RES PHD38N02LT

1K0 1%

3HGK

3HGM 22R 3HGJ 22R 3HGG 22R

DQS3

DDR2-D0 DDR2-D1 DDR2-D3 DDR2-D2 DDR2-D6 DDR2-D5 DDR2-D4 DDR2-D7 DDR2-D8 DDR2-D9 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18 DDR2-D22 DDR2-D23 DDR2-D20 DDR2-D21 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D31 DDR2-D27 DDR2-D29

3HJ2

22R

DQS2

0 1 DQM 2 3

N28 N29 P27 U26 R28 P28 P29 P30

3HGN

DQS1

V30 AD28 AB28 AB30 AD29 V29 AD27 V28 W30 AC30 AA30 AC28 AD30 W28 AC29 Y30 E30 L28 J29 J28 L29 E29 L27 E28 F30 K30 H30 K28 L30 F29 J30 F28

1u0 RES 2H85

U29 U30 M30 M29

0 1 2 3 4 5 6 7 8 9 DQ 10 11 12 13 14 15 16 17 18 19 DQ 20 21 22 23 24 25 26 27 28 29 30 31

DQS0

RES 2H84

DDR2-DQM0 DDR2-DQM1 DDR2-DQM2 DDR2-DQM3

VREF IREF P N P N P N P N

1n0

AA28 AA29 Y28 Y29 H28 H29 G28 G29

1n0 2H88 RES

DDR2-DQS0_P DDR2-DQS0_N DDR2-DQS1_P DDR2-DQS1_N DDR2-DQS2_P DDR2-DQS2_N DDR2-DQS3_P DDR2-DQS3_N

100u 4V 2H81

T30 AE26

22K

3HJU 47R

100n

C

RESERVED +1V8-PNX8541 +1V8-PNX8541

7HG2 NCP5208DR2G VDDQ 4 SD POK 5

RES

B04G

1K0

3K3

2HH5

2K2 1% 3H84

RES

DDR2-VREF-CTRL

10K

RES

14

+3V3F

+12V

3HHL

B

5K6 3HJY 820R

DDR2-CLK_P DDR2-CLK_N DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS DDR2-RAS DDR2-CAS

13

DDR

3H81

RES

DDR2-BA0 DDR2-BA1 DDR2-CAS DDR2-RAS DDR2-CS DDR2-WE DDR2-CKE

12

IHG0

3H83

RES

11

1u0

RES

10

2HHR

RES RES

DDR2-A12 DDR2-A11 DDR2-A10 DDR2-A9 DDR2-A8 DDR2-A7 DDR2-A6 DDR2-A5 DDR2-A4 DDR2-A3 DDR2-A2 DDR2-A1 DDR2-A0

9

4

RES

3HJ6 47R RES 3HJ8 47R RES 3HJA 47R RES 3HJC 47R RES 3HJE 47R RES 3HJG 47R RES 3HJJ RES 47R 3HJK 47R RES 3HJM 3HJN 47R 47R RES 3HJP 3HJR 47R 47R RES 3HJS 3HJT 47R RES 3HJZ 47R 3HJ7 47R 3HJ9 47R 3HJB 47R 3HJD 47R 3HJF 47R 3HJH 47R

8

7H00-2 PNX8541

3HJ5

+1V8-PNX8541

7

100n

RES

6

2HHS

A

5

PNX 8541: SDRAM 100n

VTT-TERM-DDR

4

2HH4

B04G

3

4K7

2

3H85

1

IHG2

Φ

6

D

8

IN PV

GND

D

FHG0

3

VFB

VTT-TERM-DDR 100n

100n 2HHJ

100n 2HHH

100n 2HHG

2HHF

22u

2HHE

22u

2HHD

100n

2HHC

2

7

1

VTT

AV

E

E

3HH9 22R

DDR2-DQS1_P DDR2-DQS1_N

3HH7 22R

3HHA

LDQS

3HH8

B7 A8

UDQS

22R

3HGR 22R 3HGT 22R 3HGV 22R 3HGY 22R 3HH0 22R 3HH2 22R 3HH4 22R 3HH6

DDR2-D0 DDR2-D1 DDR2-D2 DDR2-D3 DDR2-D4 DDR2-D5 DDR2-D6 DDR2-D7 DDR2-D8 DDR2-D9 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15

22R 3HGS 22R 3HGU 22R 3HGW 22R 3HGZ 22R 3HH1 22R 3HH3 22R 3HH5 22R

22R

J2 2HHA 100n

DDR2-DQM1 DDR2-DQM0 DDR2-VREF-DDR

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 RES 220R

DDR2-CLK_P DDR2-CLK_N 3HHY 22R

DDR2-DQS2_P DDR2-DQS2_N

DQ

CK

LDQS

3HHW

B7 A8

UDQS

22R

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

UDM LDM VREF

VSS

22u

100n

2HH2

100n 2HH1

A2 E2 L1 R3 R7 R8 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3

G 3HHB 3HHC 22R 3HHE 22R 3HHG 22R 3HHJ 22R 3HHM 22R 3HHP 22R 3HHS 22R 3HHU

DDR2-D16 DDR2-D17 DDR2-D18 DDR2-D19 DDR2-D20 DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D25 DDR2-D26 DDR2-D27 DDR2-D28 DDR2-D29 DDR2-D30 DDR2-D31

22R 3HHD 22R 3HHF 22R 3HHH 22R 3HHK 22R 3HHN 22R 3HHR 22R 3HHT 22R

22R

J2 2HH3 100n

DDR2-VREF-DDR

I

I_18020_031.eps 190808

2

3

4

5

6

7

8

9

10

11

12

H

DDR2-DQM3 DDR2-DQM2

VSSQ

3104 313 6304.3 1

100n 2HH0

100n 2HGZ

100n 2HGY

100n 2HGW

100n 2HGV

2HGU A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 NC 7HG1 EDE5116AJBG-6E-E

0 1 2 3 4 5 6 A 7 8 9 10 11 12

E8

22R

VSSQ

SDRAM

0 BA 1

3HHZ

F

VDDQ

Φ

F7

3HHV 22R

DDR2-DQS3_P DDR2-DQS3_N

J8 K8

VDDL

L2 L3

3HKN

1u0

330u 6.3V

RES 2HHN B3 F3

3HGP

DDR2-BA0 DDR2-BA1

VDD ODT CKE WE CS RAS CAS

J1

100n

100n 2HGT

100n 2HGS

100n 2HGR

100n 2HGP

100n 2HGN

100n 2HGM

100n 2HGK

100n 2HGJ

2HGH

22u

100n 2HGG

100n 2HGF

100n 2HGE

100n 2HGD

100n 2HGC

A1 E1 J9 M9 R1

VREF

A3 E3 J3 N1 P9

100n 2HGB

100n 2HGA

1u0

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

J1

UDM LDM

VSS

I

VDDL

A1 E1 J9 M9 R1 CK

F7 E8

22R

DQ

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

2HHP

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

DDR2-DQS0_P DDR2-DQS0_N

J8 K8

0 1 2 3 4 5 6 A 7 8 9 10 11 12

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

K9 K2 K3 L8 K7 L7

VSSDL

DDR2-CLK_P DDR2-CLK_N

0 BA 1

DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS DDR2-RAS DDR2-CAS

J7

RES 220R

NC

A2 E2 L1 R3 R7 R8

A3 E3 J3 N1 P9

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 3HKM

330u 6.3V 2HHM

2HG9

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

SDRAM

VSSDL

L2 L3

VDDQ

Φ

J7

DDR2-BA0 DDR2-BA1

VDD ODT CKE WE CS RAS CAS

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

H

+1V8-PNX8541

100n

7HG0 EDE5116AJBG-6E-E K9 K2 K3 L8 K7 L7

DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS DDR2-RAS DDR2-CAS

G

100n 2HG8

100n 2HG7

100n 2HG6

100n 2HG5

100n 2HG4

100n 2HG3

100n 2HG2

2HG0

F

100n 2HG1

RES 2HHK

+1V8-PNX8541

13

14

2H80 A10 2H81 A10 2H82 A10 2H83 A10 2H84 A12 2H85 A12 2H86 A12 2H87 B10 2H88 B11 2HG0 F2 2HG1 F3 2HG2 F3 2HG3 F3 2HG4 F3 2HG5 F4 2HG6 F4 2HG7 F4 2HG8 F4 2HG9 F6 2HGA F7 2HGB F7 2HGC F7 2HGD F7 2HGE F7 2HGF F8 2HGG F8 2HGH F9 2HGJ F9 2HGK F9 2HGM F9 2HGN F10 2HGP F10 2HGR F10 2HGS F10 2HGT F10 2HGU F12 2HGV F12 2HGW F13 2HGY F13 2HGZ F13 2HH0 F13 2HH1 F14 2HH2 F14 2HH3 I13 2HH4 A3 2HH5 A5 2HHA I7 2HHB A12 2HHC D10 2HHD D10 2HHE D12 2HHF D12 2HHG D12 2HHH D12 2HHJ D13 2HHK F6 2HHM F6 2HHN F11 2HHP F12 2HHR C10 2HHS C10 3H80 B10 3H81 B10 3H82 B11 3H83 B10 3H84 B11 3H85 A9 3HG0 A9 3HG1 D4 3HG2 D5 3HG3 D4 3HG4 C5 3HG5 C4 3HG6 C5 3HG7 C4 3HG8 C5 3HG9 C4 3HGA C5 3HGB C4 3HGC C5 3HGD C4 3HGE C4 3HGF C4 3HGG B5 3HGH B4 3HGJ B5 3HGK B4 3HGM B5 3HGN B4 3HGP G7 3HGR G7 3HGS G8 3HGT G7 3HGU G8 3HGV H7 3HGW H8 3HGY H7 3HGZ H8 3HH0 H7 3HH1 H8 3HH2 H7 3HH3 H8 3HH4 H7 3HH5 H8 3HH6 H7 3HH7 I3 3HH8 I4 3HH9 I3 3HHA I4 3HHB G13 3HHC G13 3HHD G14 3HHE G13 3HHF G14 3HHG H13 3HHH H14

3HHJ H13 3HHK H14 3HHL D10 3HHM H13 3HHN H14 3HHP H13 3HHR H14 3HHS H13 3HHT H14 3HHU H13 3HHV I10 3HHW I10 3HHY I9 3HHZ I10 3HJ0 C1 3HJ1 A12 3HJ2 B12 3HJ3 A14 3HJ4 B14 3HJ5 A4 3HJ6 A1 3HJ7 A1 3HJ8 A1 3HJ9 A1 3HJA A1 3HJB A1 3HJC A1 3HJD A1 3HJE A1 3HJF A1 3HJG A1 3HJH B1 3HJJ B1 3HJK B1 3HJM B1 3HJN B1 3HJP B1 3HJR B1 3HJS B1 3HJT B1 3HJU C1 3HJY A4 3HJZ B1 3HKM H3 3HKN H10 6HD2 A10 7H00-2 A6 7H01 A9 7H80 B10 7HG0 G5 7HG1 G12 7HG2 D11 FH06 B14 FH07 B12 FHG0 D13 IH05 A10 IH10 A9 IH11 B10 IH80 B10 IHG0 A4 IHG1 A9 IHG2 D11

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

90

SSB: PNX8541: Digital Video In

1

B04H

2

3

PNX 8541: DIGITAL VIDEO IN

4

Personal Notes:

B04H A

A

B

3HK0 C2 7H00-3 B2 9HK0 C2 FHK1 B1 FHK2 B2 FHK3 B2 FHK4 C2 FHK5 C2 FHK6 C2 FHK7 C2 FHK8 C2 IHSM C2

B

7H00-3 PNX8541

HDMI RX2RX2+ RX1RX1+ RX0RX0+ RXCRXC+ CEC-HDMI DDC-SCL DDC-SDA

C RREF-PNX8541

FHK1 FHK2 FHK3 FHK4 FHK5 FHK6 FHK7 FHK8 RES 9HK0

3HK0

B8 B9 A7 A8 B6 B7 A9 A10 C10 C9 E10 C7

P N P N P N P N

RX_0

HOT_PLUG

D10

HOT-PLUG

RX_1 RX_2 RX_C

RESERVED SCL DDC SDA RREF

C

IHSM

12K

D

D

E

E

I_18020_032.eps 190808

3104 313 6304.3

1

2

3

4

E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

91

SSB: PNX8541: Audio 1

2

3

4

5

6

7

8

9

10

11

12

13

PNX 8541: AUDIO

B04I

B04I

AUDIO-VDD 2HMJ IHMY 100n

IHMW 9H17

A

3

ADAC(7) IHMV

3H38

A

AUDIO-CL-L

AUDIO-VDD

IHMZ

22K

2 3H53-27

2 3HME-2 7

1 3HME-1 8

10K

10K 2HMP

22K

IHM4

B

33p

1

3H53-1 8

6H11

B

BZX384-C6V8

2HMG

IHM6

FHM0

2 11

7H06 BC807-25W

IHM2

7HM1-1 LM324 1

4R7 1u0

+12V

4

IHM5 3 3H53-3 6

IHM3

IHM7 7H07 BC847BW

22K

C

22K

IHN3 5

ADAC(8)

4

IHN6

7HM1-2 LM324 7

FHM1

AUDIO-CL-R

6

4

3H53-4

5

C

10K

3H55

AUDIO-VDD IHM8

11

3 3HME-3 6

5 3HME-4 4

10K

10K 2HMT

D

D

33p

AUDIO-VDD

E

4

IHNB

E

7HM1-3 LM324 8

10

ADAC(5) IHNA

FHM2

AUDIO-OUT-L

3n3

2HN1

9 11

1

F

3HMM-1

2

8

3HMM-2

7

F

10K 2HMW

10K

33p

AUDIO-VDD

G

G IHND 12

ADAC(6)

4

7HM1-4 LM324 14

FHM3

AUDIO-OUT-R

13 3n3

2HMY

IHNE 11

H

33HMM-36

53HMM-44

10K

10K 2HMZ

H

33p

I_18020_033.eps 190808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

2HMG B2 2HMJ A10 2HMP B10 2HMT D10 2HMW F10 2HMY G9 2HMZ H10 2HN1 E9 3H38 A2 3H53-1 B5 3H53-2 B4 3H53-3 B4 3H53-4 C5 3H55 C3 3HME-1 B10 3HME-2 B9 3HME-3 D9 3HME-4 D10 3HMM-1 F9 3HMM-2 F10 3HMM-3 H9 3HMM-4 H10 6H11 B3 7H06 A5 7H07 B5 7HM1-1 A10 7HM1-2 C10 7HM1-3 E10 7HM1-4 G10 9H17 A5 FHM0 A11 FHM1 C11 FHM2 E11 FHM3 G11 IHM2 A2 IHM3 B3 IHM4 B5 IHM5 B5 IHM6 A2 IHM7 B4 IHM8 C5 IHMV A9 IHMW A9 IHMY A10 IHMZ A10 IHN3 C9 IHN6 C10 IHNA E10 IHNB E9 IHND G9 IHNE G10

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

92

SSB: PNX8541: Analogue AV 6

7

8

9

PNX 8541: ANALOGUE AV

2HS4 22n

47R 2HS2

3HRP

22n

100p

IHR0

2HS1

B

27R

IHR1

5HR2

3HRU

330n

27R

100p

5HR0

3HRR

330n

27R

IHRC

47R 2HTU

3HSN 100p

2HSM

100p

3HS2

47R 2HSK

100p

27R

2HSE

3HRW

330n 100p

47R 2HSD

3HRY

2HSF

IHRA

2HT3

IHR4

AV3-PB

3HRZ

22n IHRD

2HSB

22n

IHV3

AV2-C

27R

47R

3HSQ

22n

IHV4

3HSP

22n

IHS5

2HU8

2HUN 22n

2HTK

2HT8

2HUP

IHR6

3HS9

22n

IHV6 2HST

22n 2HSV 22n RES

IHVE 2HSW 22n

IHRB

2HS0 22n

IHRF

2HSP

F

75R 3HSW

FHR4 IHSG 4K7

5HR7

3HSR

2HTB

+3V3-PER

3HS5 3HT9

R-VGA

27R

120n

22n

30R

FHR2

5HR9

3HSB

120n

27R

4K7

G-VGA

2HTE

G FHR3

22n

5HR6 10u

22n 2HT1

100n 2HT0

2HSZ

+3V3-PER

IHR8

5HRA

3HSE

120n

27R

100p

A1

5HRL

IHRE

2HSN 22n

270p

F3 T4

2HTG

IHS3

47R 2HTF

270p

B-VGA

G

30R

IHS6

22n

3HT3

2HUB

3HT4

CVBS4

27R

47R

2HKL

100p

IHSE

2HTD

2HUK

3HS7 75R

47R

3HS6 75R

FRONT-C

27R

22n

IHSB

IHV5

3HST

22n 3HSV

2HSY IHSH

E

FRONT-Y_CVBS

27R

100p

22n

100p

2HT6 IHSD

D

AV2-Y_CVBS

27R

47R

22n

3HS0

22n

2HT5 22n IHSC 2HA5

A2 B2

L4 K5

5HR3

3HSD

VDDA_3V3_AOUT VDDA_3V3_UA

IHR3

22n

A3 B3

D4 C3

AV3-PR

AV3-Y

47R 2HTC

AGC 3V3_VIDEO_OUT VDAC_BIAS

27R

3HSA

HSYNC_IN VSYNC_IN

3HS1

330n

100p

P CVBS2_C N

2HA4

5HR5

2HU0

F

P N

22n

22n

100p

CVBS1_Y

IHR5

2HSJ 2HT7

22n N2 N3 N4 P1 P2 P3

27R

47R

AI60 AI61 AI62 AI63 AI64 REF6

22n

47R 2HTZ

E

M1 M2 M3 M4 M5 N1

22n

22n

3HSU

AI50 AI51 AI52 AI53 AI54 REF5

P4 P5 R1 R2 R3 R4

3HSM

330n

B

C 2HSC

IHS4

2HU5

2HTH 22n IHSA 2HA3

10u

AI40 AI41 AI42 AI43 AI44 REF4

A

22n

100n 2HT4

AI30 AI31 AI32 AI33 AI34 REF3

K1 K2 K3 K4 L1 L2

2HA2

3HS8

H1 H2 J1 J2 J3 J4

AI20 AI21 AI22 AI23 AI24 REF2

D

F1 F2 G1 G2 G3 G4

5HRG

100p

22n

AI10 AI11 AI12 AI13 AI14 REF1

B04K

AV1-Y_CVBS

27R

AV1-PB

2HSA

2HT2

C

3HRS

13

AV1-Y

VIDEO ANALOGUE VSYNC_OUT

12

AV1-PR

7H00-9 PNX8541

R5

11

100p

2HTR

3HSH

330n

2HS9

47R 2HS8

3HRV

22n

100p

FHR1

2HS7

5HRC

100p

47R 2HTP

3HSJ

22n

100p

IHPF

2HRZ

A

10

100p

5

2HTV

4

2HS3

B04K

3

47R

2

3HRT

1

H

H 2HSR

3HS3

100n

12p

2HSU

390R

IF-N

2HSS

3HS4 390R

IF-P

100n

IHS2

I

270p

2HTL

3HSF

I

75R

Y_CVBS-MON-OUT

FHR5

H-SYNC-VGA V-SYNC-VGA

FHR6

I_18020_034.eps 190808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

2HA2 C3 2HA3 C3 2HA4 D3 2HA5 D3 2HKL F3 2HRZ A7 2HS0 E4 2HS1 B7 2HS2 B7 2HS3 B8 2HS4 A9 2HS7 A7 2HS8 B7 2HS9 B8 2HSA B9 2HSB E7 2HSC C9 2HSD C9 2HSE C10 2HSF D9 2HSJ D7 2HSK D7 2HSM D8 2HSN F7 2HSP F8 2HSR H8 2HSS I8 2HST E3 2HSU H8 2HSV E3 2HSW E3 2HSY F2 2HSZ G3 2HT0 G3 2HT1 G4 2HT2 G3 2HT3 D4 2HT4 G4 2HT5 D2 2HT6 E2 2HT7 D3 2HT8 E7 2HTB F8 2HTC G9 2HTD G9 2HTE G10 2HTF G10 2HTG G10 2HTH C2 2HTK E3 2HTL I9 2HTP A7 2HTR A8 2HTU C9 2HTV C10 2HTZ F8 2HU0 F8 2HU5 C3 2HU8 E3 2HUB H10 2HUK F3 2HUN E3 2HUP E3 3HRP B7 3HRR B8 3HRS A10 3HRT A9 3HRU A8 3HRV B7 3HRW C10 3HRY C9 3HRZ D10 3HS0 D9 3HS1 D8 3HS2 D7 3HS3 H8 3HS4 I8 3HS5 G3 3HS6 F3 3HS7 F3 3HS8 E7 3HS9 E10 3HSA G8 3HSB G9 3HSD G10 3HSE G11 3HSF I8 3HSH A8 3HSJ A7 3HSM B10 3HSN C9 3HSP E8 3HSQ E7 3HSR F9 3HST F10 3HSU F7 3HSV F9 3HSW F4 3HT3 H10 3HT4 H11 3HT9 G3 5HR0 B7 5HR2 A7 5HR3 C9 5HR5 D7 5HR6 G4 5HR7 G4 5HR9 G9 5HRA G10 5HRC A7 5HRG B9 5HRL F8 7H00-9 B1 FHR1 A7 FHR2 F9 FHR3 G3 FHR4 G3 FHR5 I8

FHR6 I8 IHPF A7 IHR0 B7 IHR1 A9 IHR3 C9 IHR4 D9 IHR5 D7 IHR6 E7 IHR8 G10 IHRA D4 IHRB E5 IHRC B9 IHRD D7 IHRE F7 IHRF F9 IHS2 I8 IHS3 F4 IHS4 C3 IHS5 E3 IHS6 H10 IHSA C2 IHSB F2 IHSC D2 IHSD E2 IHSE F2 IHSG G2 IHSH F2 IHV3 E2 IHV4 D11 IHV5 F11 IHV6 E3 IHVE E3

Circuit Diagrams and PWB Layouts

SSB: PNX8541: Audio 1 2

B04L

3

Q529.1E LC

4

7.

93

5

6

7

8

9

11

10

PNX 8541: AUDIO

B04L

A

A

B

B

1 3HR0-1

AUDIO-IN1-R

3HR0-2 2

7

8 IHRJ

33K

2HR0 RES

2HR1

33p

1u0

33K

C

C 33K

1u0

2HRK 1u0 2HRH

33p

1u0

AG6 AF6 AH8 AH7

5HRZ

AJ7 AK7

VDDA-AUDIO

AH6 L5 L3 M6

10u

100n 2HRP

100n 2HRV

100n

2HRU

100n 2HRN

30R

2HRM

F

ADAC3

AIN4

ADAC4

AIN5

ADAC5 ADAC6

R AADC L VREF VSSA_AUDIO_DAC1 POS 3V3A_AUDIO_DAC1 NEG POS AADC1_VR NEG

VCOM_ADC1 AOUT1 RES_REF GND1 SPDIF_IN

DAC_CAP

R L

1 2 3 4 ADAC 5 6 7 8 SPDIF_OUT OSCLK SCK WS 1 SD 2

4K7

IHRL

4K7

75R

3HRM

IHRM

10u 3HRK

100n 2HRY

AIN3

3HRN

AK15

2HRW

AG12 AK13 AH12 AJ12 AK11 AJ11 AF10 AG10 AG9 AK10 AH9 AJ9

5HP2

IH13

FHPE

5

30R

4

OUT BP

IN INH

+5V

1 3

COM

10u

ADAC2

IHSU

IHSV

IHRK

AIN2

P N P N P N P N P N P N

3HAG +3V3

E

22K

AE10 AF11 AG7 AG8 AJ13 AK12 AH11 AH10 AJ10 AK9 AK8 AJ8

7 33R 3HT8-4 4 33R 3HP5-2 2 33R 3HP5-4 4 33R 3HP0 RES

AJ15 AF14 AJ14 3HR9-1 AK14 8 AH14 3HR9-3 6 AG14

3HT8-1 1 8 3HT8-2 33R 2 6 3 3HT8-3 33R 5 3HP5-1 8 33R 1 3HP5-3 7 3 33R 6 5 3HP1 RES 33R 33R IHPD 3HPN 68R 3HR6 1 47R 3HR9-2 7 3 47R

ADAC(8) ADAC(7)

ADAC(8) ADAC(7)

ADAC(1) ADAC(2) ADAC(3) ADAC(4) ADAC(5) ADAC(6) ADAC(7) ADAC(8)

ADAC(1) ADAC(2)

3n3

1u0

2HRJ 33p

ADAC1

2HPA

2HRF

AIN1

3n3 2HRT

2HRE 33p

R L R L R L R L R L

2HRS

AK6 AJ6 AG5 AF5 AJ5 AH5 AH4 AK5 AK4 AJ4

IHSY

IHSW

2HRD

33p

22K

RES

D 7HP0 LD2985BM33R

AUDIO 1u0

2HRG RES

2HRB

2HRC RES

5

RES

VDDA-AUDIO 7H00-1 PNX8541

3HAH

33K 3HRC-2 2 7 3HRC-1 IHRW 33K 8 3 33K 6 3HRC-3 33K IHRV

3HRJ-3 6 3 IHRT 33K 2 33K 5 3HRJ-2 7 1 3HRJ-1 33K IHRU 8 33K

AUDIO-IN5-L

E

33K

5

4 3HRJ-4

AUDIO-IN5-R

6 33K

3n3

3HRC-4 4

RES

2HRA 33p

1u0

3

2HRR

1

2HR9

33p

3n3

AUDIO-IN4-R

1u0

2HR8 RES

2

3HR8-4 4

2HR7

2HRQ

AUDIO-IN3-L

3HR8-3 IHRY

2HR6 33p

10n

33K 3HR8-2 2 7 3HR8-1 33K 8 IHRZ 33K

AUDIO-IN4-L

6 33K

10u 2HPB

D

RES

1u0

3 3HR3-3 IHS0

2HP4

1

5

2HR5

100n

AUDIO-IN3-R

4

33p

100n 2HP5

3HR3-4

1u0

RES

100n 2HP6

33K AUDIO-IN2-L

RES

2HR3

2HR4

2 3HR3-2 7 1 3HR3-1 8 IHS1 33K

AUDIO-IN2-R

2HR2 33p

100n 2HP7

AUDIO-IN1-L

3HR0-3 6 3 3HR0-4 5 IHRH 33K

2HP8

4

F

SPDIF-OUT AUDIO-MCK 47R AUDIO-CLK 2 AUDIO-WS 47R AUDIO-SDO

G

G

H

H I_18020_035.eps 200808

3104 313 6304.3

1

2

3

4

5

6

7

8

9

10

11

2HP4 E9 2HP5 E8 2HP6 E8 2HP7 E8 2HP8 E7 2HPA E10 2HPB E9 2HR0 C4 2HR1 C5 2HR2 C4 2HR3 C5 2HR4 C4 2HR5 C5 2HR6 D4 2HR7 D5 2HR8 D4 2HR9 D4 2HRA D4 2HRB D4 2HRC D4 2HRD D4 2HRE D4 2HRF E4 2HRG E3 2HRH E4 2HRJ E4 2HRK E4 2HRM F3 2HRN F3 2HRP F4 2HRQ F9 2HRR F10 2HRS F10 2HRT F10 2HRU F3 2HRV F3 2HRW G4 2HRY G4 3HAG E10 3HAH E10 3HP0 F7 3HP1 F8 3HP5-1 F8 3HP5-2 F7 3HP5-3 F8 3HP5-4 F7 3HPN F8 3HR0-1 C3 3HR0-2 C4 3HR0-3 C4 3HR0-4 C3 3HR3-1 C3 3HR3-2 C4 3HR3-3 D4 3HR3-4 D3 3HR6 F8 3HR8-1 D3 3HR8-2 D4 3HR8-3 D3 3HR8-4 D3 3HR9-1 G8 3HR9-2 G7 3HR9-3 G7 3HRC-1 D3 3HRC-2 D3 3HRC-3 D3 3HRC-4 E2 3HRJ-1 E3 3HRJ-2 E3 3HRJ-3 E3 3HRJ-4 E3 3HRK G4 3HRM G4 3HRN G5 3HT8-1 E8 3HT8-2 F8 3HT8-3 F8 3HT8-4 F7 5HP2 D8 5HRZ E3 7H00-1 D6 7HP0 D9 FHPE D9 IH13 D10 IHPD F8 IHRH C4 IHRJ C4 IHRK F4 IHRL F4 IHRM F4 IHRT E3 IHRU E3 IHRV E3 IHRW D3 IHRY D3 IHRZ D3

IHS0 D4 IHS1 C4 IHSU E5 IHSV E4 IHSW D8 IHSY E10

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

94

SSB: PNX8541: Audio

1

2

3

4

5

6

7

8

9

PNX 8541: AUDIO

B04M

A

B04M

A

2HVA

2

33p 3H18-2

7

3H18-4

+12V

+3V3

9H08

4

9H16

22K 5

22K 2HVB 33p

B

+3V3

B

8

1

7HV0 TPA6111A2DGN

22K

3HV4-1

8

1u0

2HVC

IHV2

1u0 2HVE

ADAC(4)

6

3H18-3

IHWL

3

IH25 22K 3H18-1 8 1

IHWE

22K

1u0

Φ

2 6 5

2H02

3

1

1

IHWJ

AUDIO-HDPH-L-AP IHW7

IN2 SHUTDOWN

2

BYPASS

VIA GND GND_HS

7

2 IHVA

5

4 BC847BPN 7HVA-2

C A-PLOP

AUDIO-HDPH-R-AP

3

10 11

IH29

6 IHW8

IHVB

2 1n0

22K 2HVG

3HV3

3HV4-3

6

RESET-AUDIO

FHV3 3HV4-4 4 5

7HVA-1 BC847BPN 1

3

IH22

3HV4-2 22K

IHV1

22K RESET-AUDIO

7

VO

4

1u0

IH27

1

VDD

AMPLIFIER

9

ADAC(3)

C

IH24

2HVD

10K

D

D

E

E

I_18020_036.eps 200808

3104 313 6304.3

1

2

3

4

5

6

7

8

9

2H02 C2 2HVA A3 2HVB B3 2HVC B3 2HVD C1 2HVE C1 2HVG D6 3H18-1 C2 3H18-2 A3 3H18-3 C2 3H18-4 B3 3HV3 D1 3HV4-1 C8 3HV4-2 C8 3HV4-3 D6 3HV4-4 D6 7HV0 C2 7HVA-1 D8 7HVA-2 C8 9H08 B8 9H16 B8 FHV3 D6 IH22 D1 IH24 C1 IH25 C1 IH27 C2 IH29 C8 IHV1 C3 IHV2 B8 IHVA C8 IHVB D6 IHW7 C7 IHW8 C7 IHWE C2 IHWJ C3 IHWL C2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

95

SSB: PNX8541: Video Streams

1

B04N

2

3

4

5

6

7

8

PNX 8541: VIDEO STREAMS

9

B04N

A

A

7H00-10 PNX8541

VIDEO STREAMS C25 D23 C23 C29 C30 D30 A28 A29

CA-MDO0 CA-MDO1 CA-MDO2 CA-MDO3 CA-MDO4 CA-MDO5 CA-MDO6 CA-MDO7

B

CA-MOVAL CA-MOSTRT CA-MOCLK_VS2

A24 D25

CA-CD1 CA-CD2

FE-DATA2 FE-DATA3 FE-DATA4 FE-DATA5 FE-DATA6 FE-DATA7

E5 A4 B4 C6 D6 E6 A5 B5

FE-VALID FE-SOP FE-CLK FE-ERR

D5 C4 C5 A6

FE-DATA0 FE-DATA1

IHW0

3HWK

FE-ERR

+3V3-PER 4K7

0 1 2 3 CA_MDI 4 5 6 7 CA_MIVAL CA_MISTRT CA_MICLK

2 47R 3HWV-1 1 47R 3HWR-4 4 47R 3HWR-2 2 47R 3HWN-2

B25 B30 3HWN-1 1 B28 47R

3HWV-4 4 7 2 8 1 5 3 7 47R

5 47R 73HWV-2 47R 8 3HWR-1 47R 6 3HWV-3

CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3 CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7

3

6 3HWR-3 47R 3HWP

CA-MIVAL CA-MISTRT CA-MICLK

8

B

22R

0 VSN 1 0 CDN 1 0 1 2 3 FEDATA TNR_TSDI 4 5 6 7

A26 C27 B27 A27 A25 D26 C26 B26

CA_RST DATA_DIR DATA_EN OOB_EN ADD_EN VCCEN VPPEN

B24 D22 A22 C22 B22 A23 D24

CA-RST CA-DATADIR CA-DATAEN

C

CA-ADDEN

MIVAL MISTRT MICLK ERROR

D

9HW0

D

CA_MOVAL CA_MOSTRT

A30 C24 D29 B23

CA-VS1

C

0 1 2 3 CA_MDO 4 5 6 7

E

E

I_18020_037.eps 200808

3104 313 6304.3

1

2

3

4

5

6

7

8

9

3HWK D2 3HWN-1 C6 3HWN-2 B6 3HWP C7 3HWR-1 B7 3HWR-2 B6 3HWR-3 B7 3HWR-4 B6 3HWV-1 B6 3HWV-2 B7 3HWV-3 B7 3HWV-4 B7 7H00-10 A5 9HW0 D2 IHW0 D2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

96

SSB: PNX8541: Digital Video Out / LVDS

1

B04O

2

3

4

5

6

7

8

9

PNX8541: DIGITAL VIDEO OUT / LVDS

B040

A

A 7H00-8 PNX8541

VID_OUT_TTL

B

0 1 2 3 R_OUT 4 5 6 7 0 1 2 G_OUT 3 PD_DATA 4 5 6 7

C

UA2_RX UA2_TX

0 1 2 3 B_OUT 4 5 6 7

CLK PD_CLK|VSYNC PD_PROBE|HSYNC PD_DM|FID

AJ19 AH19 AG19 AF19 AK20 AJ20 AH20 AG20

3HW0-1 3HW0-2 3HW1-1 3HW1-2 3HW0-3 3HW0-4 3HW1-3 3HW1-4

1 2 1 2 3 4 3 4

8 7 8 7 6 5 6 5

AG17 AF17 AK18 AJ18 AH18 AG18 AF18 AK19

3HW6-3 3HW5 3HW2-1 3HW2-2 3HW2-3 3HW2-4 3HW7-3 3HW7-4

3

6

AF15 AK16 AJ16 AH16 AG16 AF16 AJ17 AH17

1 2 3 4 6 5

8 7 6 5 3 4

3HW3-3 3 3HW3-4 4 3HW6-1 3HW6-2

AK17 AH15 3HW3-1 1 AG15 3HW4-1 1 AF20 3HW4-3 6

3HPA

10R 10R 10R 10R 10R 10R 10R 10R 10R 10R 10R 10R 10R 10R 10R 10R

6 5 10R 10R 10R 10R 8 22R 8 10R 3 10R 10R

DV-R0_Y2 DV-R1_Y3 DV-R2_Y4 DV-R3_Y5 DV-R4_Y6 DV-R5_Y7 DV-R6_Y8 DV-R7_Y9

B

7H00-7 PNX8541

LVDS

DV-G0_UV2 DV-G1_UV3 DV-G2_UV4 DV-G3_UV5 DV-G4_UV6 DV-G5_UV7 DV-G6_UV8 DV-G7_UV9

IHPG IREF CLK A B

IHPA IHPB IHPH IHPK DV-B4_UV0 DV-B5_UV1 DV-B6_Y0 DV-B7_Y1

C D E

P N P N P N P N P N P N

AG21 AK23 AJ23 AK21 AJ21 AK22 AJ22 AH22 AG22 AH23 AG23 AK24 AJ24

3HP9 VDDA-LVDS 12K

C

DV-CLK DV-VS DV-HS DV-FF_DE

D

D

E

E

F

F I_18020_038.eps 200808

3104 313 6304.3

1

2

3

4

5

6

7

8

9

3HP9 B5 3HPA D2 3HW0-1 B2 3HW0-2 B2 3HW0-3 B2 3HW0-4 B2 3HW1-1 B2 3HW1-2 B2 3HW1-3 B2 3HW1-4 B2 3HW2-1 B2 3HW2-2 C2 3HW2-3 C2 3HW2-4 C2 3HW3-1 D2 3HW3-3 C2 3HW3-4 C2 3HW4-1 D2 3HW4-4 D2 3HW5 B2 3HW6-1 C2 3HW6-2 B2 3HW6-3 C2 3HW7-3 C2 3HW7-4 C2 7H00-7 B4 7H00-8 A1 IHPA C3 IHPB C3 IHPG B5 IHPH C3 IHPK C3

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

97

SSB: PNX8541: Power 1

3

2

4

6

5

7

8

9

10

11

13

12

14

PNX 8541: POWER

B04P

B04P 7H00-11 PNX8541

E7 F7 E8 AG24 AH24 AF23

5HK1 IHK4

VDDA-LVDS

D

AE22

+3V3-PER

100n

5HY6

IHSP

P6 R6

2HYA

2HYB

30R 1u0

2HZA

+1V2-PNX8541

1V2A HDMI PLL PLLCCO 3V3A HDMI BIAS 3V3 HDMI

3V3A LVDS NC

1V2A CAB 3V3A 1.7 MCAB

100n

100n 2HZ1

100n 2HZ0

100n

1u0

2HZ3

2HZ2

100n 2HZ4

100n

100n 2HYR

100n 2HYP

100n 2HYN

100n 2HYM

100n 2HYK

100n 2HYJ

C

+3V3-STANDBY

AD25 AG11 AG13 AH1 AH13 E23 E24 K25 K26 Y5

3V3 LVDS

100n 2HYZ

100n 2HYY

1u0 2HYW

1u0 2HYV

1u0 2HYU

1u0 2HYT

2HYS 10u

V6 W5 W6

3V3 SB PER

3V3A LVDS PLL

+3V3 220R 100n 2HYH

EQ

+3V3-PER 5HYA

D

100n

2HK6

2HK2

100n

2HK4

AE21

30R

30R

30R

IHY8

5HY9

2HZJ

RREF-PNX8541

100n

IHK3

1u0

5HK3

2HZN

+3V3-PER

2HZT

IHK2

100n

5HK2 +3V3-PER

+1V2-PNX8541

1u0

30R

3V3 PER

IHY7

5HY8

100n

30R

3V3A DDR

B

IHYA

2HYG

100n

D7 C8

+3V3-PER

PLL DLL2

+1V2-STANDBY

AC26 AC27 AD26 AE17 AE18 AE19 F14 F15 F16 F17 F24 F25 F6 G25 G6

1V8 DDR

IH28

100n

1u0

2HY8

2HY9

W27 F27

1V2 SB CORE

100n

G26

1V2A DDR

SENSE+1V2-PNX8541

AA5 AA6 AB5 AB6

DLL0 DLL3

CHY1

10u 2HYF

100n

100n 2HY0

100n 2HY1

100n

2HH6 2HH7

100n 2HH8

100n

1u0

2HK7

2HK8

30R 5HG1

330u 6.3V

100n 2HKA

IHSN

30R

IHSL

+3V3-PER

P18 R18 T18 U18

+1V8-PNX8541

+3V3-PER

30R 2HKC

AB27 J26

IHK1

5HK4

1u0

2HY3

IHSK

30R

5HY5

+1V2-PNX8541

C

5HG0

1V2A VIDEO ADC

100n

100n

2HK1

+1V2-PNX8541

100n 2HH9

B

2HY2

30R 30R

1V2 CORE

DAC

2HZ9

5HK0

J5 J6 K6

10u 2HYE

+1V2-PNX8541

+1V2-PNX8541

IHY4

5HY0

REF 3V3A AUDIO

2HZ8

AF8

VDDA-DAC

ADC

10u 2HYD

AF7

+1V2-PNX8541

AE12 AE13 AE14 F10 F21 F22 F9 U25 V25 W25

1u0

100n

1u0

2HY6

2HY7

AE6

VDDA-ADC

1V2A AUDIO ADC

2HYC

AE7

30R

A

VDD

IHY6

5HY3

+1V2-PNX8541

2HZ7

A

5HY2

E

IHY5

E

+3V3-PER 100n

1u0

2HY4

2HY5

30R

VDDA-LVDS

IHY0

5HY1 +3V3-PER 1u0

2HZU

100n

100n 2HZS

2HZP

100n 2HZR

220R

F

F

IHY1

5HY4 VDDA-AUDIO

VDDA-DAC 100n

2HZH

7H00-12 PNX8541

G

VSSA AUDIO

VSS

VSSA VIDEO

VSSA VIDEO

AF9 AE9 AE16 AE15

N6 N5 H5 H4 H3 G5 F5 F4 E4 E3 E2 E1 D3 D2 D1 C2 C1 B1

J25 F26 W26 AB26 VSSA DDR DLL

VSS

VSS

VSST1

G

VSS

AJ25 AJ1 AH30 AH29 AH28 AH26 AH25 AH21 AH2 AG30 AG3 AG29 AG28 AG27 AG26 AG25 AF30 AF29 AF28 AF27 AF26 AF25 AF24 AF22 AF21 AF13 AF12 AE5 AE30 AE29 AE28 AE25 AE24 AD6 AD5 AB29 AB25 AA27 AA26 AA25

30R

IHY2

5HY7

VDDA-ADC

VDDA-AUDIO 100n

2HZV

VSS

VSS

VSS

VSS

H

Y27 Y26 W29 V27 V18 V17 V16 V15 V14 V13 U6 U17 U16 U15 U14 U13 T6 T5 T29 T26 T25 T17 T16 T15 T14 T13 R25 R17 R16 R15 R14 R13 P25 P17 P16 P15 P14 P13 N30 N27 N25 N18 N17 N16 N15 N14 N13 M25 K29 K27 H27 H26 G30 F19 F18 F13 F12 E9 E26 E25 D9 D8 D27 C28 B29 AK30 AK25 AJ30 AJ29

H

VSS

VSS

30R

1

100n

8

7

100n 2HZD-1

2

4

100n 2HZD-2

5

+1V8-PNX8541

100n 2HZD-4

2HZD-3 3

1u0

1u0 2HZC

2HZB

6

IHY3

I

I

I_18020_039.eps 200808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

2HH6 B5 2HH7 C5 2HH8 C5 2HH9 B5 2HK1 B3 2HK2 E3 2HK4 E2 2HK6 E4 2HK7 C3 2HK8 C3 2HKA C2 2HKC C2 2HY0 B7 2HY1 B7 2HY2 B7 2HY3 B7 2HY4 E8 2HY5 E8 2HY6 A8 2HY7 A8 2HY8 C7 2HY9 C6 2HYA E9 2HYB E8 2HYC C11 2HYD C11 2HYE C12 2HYF C12 2HYG C12 2HYH C12 2HYJ C12 2HYK C13 2HYM C13 2HYN C13 2HYP C13 2HYR C14 2HYS A12 2HYT A12 2HYU A12 2HYV A13 2HYW A13 2HYY A13 2HYZ A13 2HZ0 A14 2HZ1 A14 2HZ2 B12 2HZ3 B13 2HZ4 B13 2HZ7 D11 2HZ8 D12 2HZ9 D12 2HZA D8 2HZB I10 2HZC I10 2HZD-1 I11 2HZD-2 I11 2HZD-3 I10 2HZD-4 I11 2HZH G10 2HZJ D7 2HZN D6 2HZP F10 2HZR F10 2HZS F11 2HZT D6 2HZU F11 2HZV H10 5HG0 B5 5HG1 C5 5HK0 B2 5HK1 D4 5HK2 D1 5HK3 D2 5HK4 C2 5HY0 B6 5HY1 E11 5HY2 E8 5HY3 A8 5HY4 G11 5HY5 C6 5HY6 D8 5HY7 H11 5HY8 D6 5HY9 D7 5HYA C14 7H00-11 A9 7H00-12 G8 CHY1 B11 IH28 C8 IHK1 C2 IHK2 D2 IHK3 D3 IHK4 D4 IHSK B5 IHSL C5 IHSN C7 IHSP D9 IHY0 E11 IHY1 G11 IHY2 H11 IHY3 H10 IHY4 B9 IHY5 E9 IHY6 A9 IHY7 D9 IHY8 D9 IHYA B14

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

98

SSB: PNX8541: Flash

1

2

B04Q

3

4

5

6

7

8

PNX 8541: FLASH

9

B04Q A

A 5HA0 +3V3-NAND

+3V3

IHSR

+3V3-NAND

3HA0

B

+3V3-NAND

Φ

VCC

[FLASH] 512Mx8

XIO-SEL-NAND

10K 3HA4-1 3HA4-2 3HA4-3 3HA4-4 3HA8-1 3HA8-2 3HA8-3 3HA8-4

PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

1 2 3 4 1 2 3 4

8 7 100R 6 100R 5 100R 8 100R 7 100R 6 100R 5 100R

NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7)

29 30 31 32 41 42 43 44

NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7)

0 1 2 3 IO 4 5 6 7

NC

100R

C 10K

IHSF

3H61

2K2

+3V3-NAND

WP-NANDFLASH XIO-ACK

+3V3-NAND

NAND-CLE NAND-ALE XIO-SEL-NAND NAND-REn NAND-WEn WP-NANDFLASH XIO-ACK

IHSS

16 17 IHST 9 8 18 19 7

CLE ALE CE RE WE WP R B

3HA3

D 3HAC-2 3HAC-3 3HAC-4 3HAC-1

PCI-AD0 PCI-AD1 PCI-CBE1 PCI-CBE2

2 3 4 1

7 6 5 8

100n

100n

1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 25 26 27 28 33 34 35 38 39 40 45 46 47 48

B

C

36

13

VSS

2HA1

37

12

7HA0 NAND512W3A2CN6

2HA0

30R

D

NAND-CLE NAND-ALE NAND-WEn NAND-REn

100R 100R 100R

100R

E

E

I_18020_040.eps 200808

3104 313 6304.3

1

2

3

4

5

6

7

8

9

2HA0 B7 2HA1 B7 3H61 C3 3HA0 B2 3HA3 D4 3HA4-1 B3 3HA4-2 B3 3HA4-3 B3 3HA4-4 B3 3HA8-1 B3 3HA8-2 C3 3HA8-3 C3 3HA8-4 C3 3HAC-1 D3 3HAC-2 D3 3HAC-3 D3 3HAC-4 D3 5HA0 A2 7HA0 B5 IHSF C4 IHSR A6 IHSS C5 IHST C5

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

99

SSB: PNX5100: SDRAM 1

2

3

4

5

6

7

8

9

10

B05A

PNX5100-DDR2-RAS PNX5100-DDR2-CAS PNX5100-DDR2-WE PNX5100-DDR2-CS

K24 L24 U24 L23

PNX5100-DDR2-ODT PNX5100-DDR2-CKE +1V8-PNX5100

K23 U23 3C10 3K3 RES

IC02 5K6 1% PNX5100-DDR2-VREF-CTRL

RASB CASB WEB CSB ODT CKE

N23 P24

IREF VREF

2C01 P26 P25

100n

P N

CLK

3C02 DQM

0 1 2 3

DQS0

P N

DQS1

P N

DQS2

P N

DQS3

P N

220R

D

PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS0_N

Y24 Y23

PNX5100-DDR2-DQS1_P PNX5100-DDR2-DQS1_N

E25 E26

PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS2_N

E24 E23

PNX5100-DDR2-DQS3_P PNX5100-DDR2-DQS3_N

3C22

W26 W25

C

D 1C00 HOOK1

+1V8-PNX5100

3C13

33R

3C06-3

LDQS

33R

B7 A8

UDQS

UDM LDM VREF

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3 J2

8 3C07-3 3 3C07-2 2 3C06-1 8 3C06-2 7 3C09-3 3 3C09-2 2 3C08-1 8 3C08-2 7 5 3

6

6 33R 7 33R 1 33R 2 33R 6 33R 7 33R 1 33R 2 33R 3C05-4 4 33R

7 1 4 6

1 4

1 3C05-1 33R 2 3C05-2 33R 8 3C07-1 33R 5 3C07-4 33R 3 3C08-3 33R 3C11 33R 8 3C09-1 33R 5 3C09-4 33R

PNX5100-DDR2-D0 PNX5100-DDR2-D1 PNX5100-DDR2-D2 PNX5100-DDR2-D3 PNX5100-DDR2-D4 PNX5100-DDR2-D5 PNX5100-DDR2-D6 PNX5100-DDR2-D7 PNX5100-DDR2-D8 PNX5100-DDR2-D9 PNX5100-DDR2-D10 PNX5100-DDR2-D11 PNX5100-DDR2-D12 PNX5100-DDR2-D13 PNX5100-DDR2-D14 PNX5100-DDR2-D15 PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM0

33R 3C05-3 PNX5100-DDR2-VREF-DDR

A3 E3 J3 N1 P9

VSS

I

PNX5100-DDR2-BA0 PNX5100-DDR2-BA1

L2 L3

PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS2_N PNX5100-DDR2-DQS3_P PNX5100-DDR2-DQS3_N

100n

RES 220R

3 4

5

3C27-3

J8 K8 6 33R

3C27-4 33R 3C30-4 4 5 3 6 33R 3C30-3 33R

VSSQ

1u0

22u

100n

2C38

100n 2C36

100n 2C35

100n 2C34

100n 2C33

2C32

5 100n K9 K2 K3 L8 K7 L7

PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N

E

F

VDD ODT CKE WE CS RAS CAS

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

J1

A1 E1 J9 M9 R1

4

100n 2C44-4

6

2

3

100n 2C44-3

7

8

100n 2C44-2

5

100n 2C44-1 1

4

6 3

100n 2C43-4

7

100n 2C43-3

PNX5100-DDR2-ODT PNX5100-DDR2-CKE PNX5100-DDR2-WE PNX5100-DDR2-CS PNX5100-DDR2-RAS PNX5100-DDR2-CAS

3C04

330u 6.3V 2C30

RES 2C29 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

2C40

33R

2

8 DQ

CK

F7 E8

100n 2C43-2

2C43-1

22u

100n

2C19

100n 2C18

100n 2C17

100n 2C16

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

J1

A1 E1 J9 M9 R1 0 1 2 3 4 5 6 A 7 8 9 10 11 12

6 33R

3C12

NC

A2 E2 L1 R3 R7 R8

VDDQ

Φ

SDRAM NC

0 BA 1 0 1 2 3 4 5 6 A 7 8 9 10 11 12

DQ

CK

E8

LDQS

B7 A8

UDQS

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

A2 E2 L1 R3 R7 R8 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 B3 F3

UDM LDM

F7

VREF

8 3C26-3

3

3C26-2

2

3C27-1

8

3C27-2

7

3C28-2

7

3C28-3

6

3C30-1

8

3C30-2

7

3C25-3 6

6 33R 7 33R 1 33R 2 33R 2 33R 3 33R 1 33R 2 33R 3

7 1 4

5 8

1 3C25-1 33R 2 3C25-2 33R 8 3C26-1 33R 5 3C26-4 33R 3C31 33R 3C32 33R 4 3C28-4 33R 1 3C28-1 33R

5 3C25-4 4 33R

PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D30 PNX5100-DDR2-D31 PNX5100-DDR2-DQM3 PNX5100-DDR2-DQM2

J2

PNX5100-DDR2-VREF-DDR

VSS

100n VSSQ

I I_18020_041.eps 200808

2

3

4

5

6

7

8

9

H

33R

3104 313 6304.3 1

G

2C39

A3 E3 J3 N1 P9

3C06-4 4

PNX5100-DDR2-DQS1_P PNX5100-DDR2-DQS1_N

3

Φ

0 BA 1

J8 K8 RES 220R 5

100n 2C15

1 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

3C03

100n 2C14

2C13

H

PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12

VDDL

PNX5100-DDR2-BA0 PNX5100-DDR2-BA1

7C02 EDE5116AJBG-6E-E

VDDQ

SDRAM

VSSDL

G

L2 L3

ODT CKE WE CS RAS CAS

J7

K9 K2 K3 L8 K7 L7

VDD

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

PNX5100-DDR2-ODT PNX5100-DDR2-CKE PNX5100-DDR2-WE PNX5100-DDR2-CS PNX5100-DDR2-RAS PNX5100-DDR2-CAS

PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS0_N

1u0

330u 6.3V 2C02

5 100n

6

7C01 EDE5116AJBG-6E-E

PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N

+1V8-PNX5100

4

100n 2C42-4

100n 2C42-3 3

8

7 2

1

100n 2C42-1

4

100n 2C42-2

5

6

100n 2C41-4

7 100n 2C41-2

100n 2C41-3 3

1

F

2

2C41-1

8

RES 2C00

E

B

1K0 1%

PNX5100-DDR2-DQM0 PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM2 PNX5100-DDR2-DQM3

3C23

AA26 AA23 G26 G23

FC05 PNX5100-DDR2-VREF-DDR

VDDL

1%

D

FC06 PNX5100-DDR2-VREF-CTRL

VSSDL

820R

BA0 BA1 BA2

PNX5100-DDR2-D0 PNX5100-DDR2-D1 PNX5100-DDR2-D2 PNX5100-DDR2-D3 PNX5100-DDR2-D4 PNX5100-DDR2-D5 PNX5100-DDR2-D6 PNX5100-DDR2-D7 PNX5100-DDR2-D8 PNX5100-DDR2-D9 PNX5100-DDR2-D10 PNX5100-DDR2-D11 PNX5100-DDR2-D12 PNX5100-DDR2-D13 PNX5100-DDR2-D14 PNX5100-DDR2-D15 PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D30 PNX5100-DDR2-D31

J7

3C01 PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N

A

Y26 AB25 Y25 AC26 AC25 U26 AB26 V26 W24 AB23 AA24 AC24 AC23 V23 AB24 V24 F26 H26 G25 J26 K26 D25 H25 D26 F23 H24 F24 J23 J24 D23 G24 D24

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

3C00

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

1K0 1%

R26 T25 N24

DDR2

3C20

PNX5100-DDR2-BA0 PNX5100-DDR2-BA1

0 1 2 3 4 5 6 7 8 9 10 11 12

1K0 1%

N26 U25 N25 T23 M26 T24 L25 R24 L26 M23 T26 K25 M24

3C21

Φ

PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12

A

+1V8-PNX5100

+1V8-PNX5100

7C00-8 PNX5100E

1K0 1%

A

C

13

12

PNX5100: SDRAM

B05A

B

11

10

11

12

13

1C00 D9 2C00 E4 2C01 D4 2C02 E4 2C13 F5 2C14 F5 2C15 F5 2C16 F5 2C17 F5 2C18 F6 2C19 F6 2C29 E10 2C30 E10 2C32 F11 2C33 F11 2C34 F12 2C35 F12 2C36 F12 2C38 F12 2C39 I12 2C40 I6 2C41-1 F1 2C41-2 F1 2C41-3 F2 2C41-4 F2 2C42-1 F2 2C42-2 F2 2C42-3 F2 2C42-4 F3 2C43-1 F8 2C43-2 F8 2C43-3 F8 2C43-4 F8 2C44-1 F9 2C44-2 F9 2C44-3 F9 2C44-4 F9 3C00 C2 3C01 C2 3C02 D3 3C03 H2 3C04 H9 3C05-1 G6 3C05-2 G6 3C05-3 H5 3C05-4 H5 3C06-1 G5 3C06-2 H5 3C06-3 H2 3C06-4 I2 3C07-1 G6 3C07-2 G5 3C07-3 G5 3C07-4 H6 3C08-1 H5 3C08-2 H5 3C08-3 H6 3C09-1 H6 3C09-2 H5 3C09-3 H5 3C09-4 H6 3C10 C4 3C11 H6 3C12 I2 3C13 I2 3C20 B10 3C21 B10 3C22 B12 3C23 B12 3C25-1 G12 3C25-2 G12 3C25-3 H11 3C25-4 H12 3C26-1 G12 3C26-2 G11 3C26-3 G11 3C26-4 H12 3C27-1 G11 3C27-2 H11 3C27-3 H9 3C27-4 I8 3C28-1 H12 3C28-2 H11 3C28-3 H11 3C28-4 H12 3C30-1 H11 3C30-2 H11 3C30-3 I8 3C30-4 I9 3C31 H12 3C32 H12 7C00-8 A6 7C01 F3 7C02 F9 FC05 B11 FC06 B9 IC02 C2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

100

SSB: PNX5100: Video

2

1

3

4

5

6

7

8

PNX5100: VIDEO

B05B

3C50 B5 3C51 B5 7C00-5 B2 7C00-9 B6 IC54 B5

B05B

A

A

7C00-5 PNX5100E AE17 AF17 AC17 AD17

B

AC16 AD16 AE16 AF16 AE15 AF15 AC15 AD15

C

AE20 AF20 AC20 AD20 AC19 AD19 AE19 AF19 AE18 AF18

D

AC18 AD18

Φ

AP AN

LVDS_RX 7C00-9 PNX5100E

BP BN IC54

DV-CLK DV-FF_DE

CLKP CLKN

3C50

+3V3

LIN1

1K0

CP CN

3C51 1K0

DP DN EP EN AP AN DV-B4_UV0 DV-B5_UV1 DV-G0_UV2 DV-G1_UV3 DV-G2_UV4 DV-G3_UV5

BP BN CLKP CLKN LIN2

D6 A4 E2 G4 G3 G2 G1 F4 F3 F2 F1 E3 E1 D2 D1 C1 A2 A3 B3 B4

B

Φ

1 2 CLK 3 4

VDI

0 1 2 3 4 5 6 7 D 8 9 10 11 12 13 14 15

16 17 18 19 20 21 22 23 D 24 25 26 27 28 29 30 31

C4 A5 B5 C5 D5 A6 B6 C6 A7 B7 C7 D7 A8 B8 C8 D8

DV-G4_UV6 DV-G5_UV7 DV-G6_UV8 DV-G7_UV9 DV-B6_Y0 DV-B7_Y1 DV-R0_Y2 DV-R1_Y3 DV-R2_Y4 DV-R3_Y5 DV-R4_Y6 DV-R5_Y7 DV-R6_Y8 DV-R7_Y9 DV-VS DV-HS

C

CP CN DP DN

D

EP EN

E

E

I_18020_042.eps 200808

3104 313 6304.3

1

2

3

4

5

6

7

8

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

101

SSB: PNX5100: Power

5

4

6

7

8

PNX5100: POWER

K5 K3

+1V2-PNX5100-TRI-PLL2

L5 K4

+1V2-PNX5100-TRI-PLL3

T5 U4

VDD_1V2_DDRPLL1 VSS_DDRPLL1

VDDA_1V2_TRI_PLL3 VSSA_TRI_PLL3

VDDA_1V2_LVDS_PLL VDDA_3V3_LVDS1 VDDA_3V3_LVDS2 VSSA_LVDS1 VSSA_LVDS2

VDDD_1V2_TRI_PLL3 VSSD_TRI_PLL3 VDDA_1V2_DLL0 VSSA_DLL0 VDDA_1V2_DLL1 VSSA_DLL1 VDDA_1V2_DLL4 VSSA_DLL4

VDD_1V2_MCAB1 VDD_1V2_MCAB2 VDDA_1V2_1_7_MCAB VDDA_1V2_UIP_PLL VDDA_3V3_SYS_PLL VSS_MCAB1 VSS_MCAB2 VDDA_1V2_XTAL VSSA_XTAL

AD25 AD26 P22 T22

+1V2-PNX5100-DDR-PLL1

AE25

+3V3-PNX5100-DDR-PLL0

N22 R22

+1V2-PNX5100

B

E15 B15 D15 A15 C15

+1V2-PNX5100-LVDS-PLL +3V3-PNX5100-LVDS-PLL

AB14 AC14 AE14 AF12 AD14 AC13 AB13

+1V2-PNX5100 +1V2-PNX5100-CLOCK +3V3-PNX5100-CLOCK

C

AD13 AE12

+1V2-PNX5100-CLOCK

IC80

5C60

10u

+1V2-PNX5100-TRI-PLL2

100n

2C89

+3V3-PNX5100-DDR-PLL0

IC85

IC90

+1V2-PNX5100-LVDS-PLL

30R

100n

100n

+1V2-PNX5100

+3V3-PNX5100-LVDS-PLL

2C92

+3V3 2C91

5C65

100n

2C90

30R +1V2-PNX5100-DDR-PLL1

2C58

IC84

5C64

I_18020_043.eps 200808

3104 313 6304.3

1

2

3

4

5

6

E

IC89

5C69 +3V3

+1V2-PNX5100

2C83

100n 2C57

+3V3-PNX5100-CLOCK 30R

+1V2-PNX5100-TRI-PLL3

30R

100n

IC88

5C68 IC83

5C63

30R

IC87

+3V3

+1V2-PNX5100 30R

100n

+3V3-PNX5100-LVDS-IN 30R

2C88

5C62

D

5C67

+1V2-PNX5100 30R

+1V2-PNX5100-DLL

+3V3 IC82

100n

30R

2C84

+1V2-PNX5100-TRI-PLL1

2C87

+1V2-PNX5100

100n

30R

IC81

5C61

IC86

5C66 +1V2-PNX5100

2C86

100n

100n

2C93

+1V2-PNX5100-CLOCK 30R

2C80

+1V2-PNX5100

5C70

F

A

+1V2-PNX5100

100n

VSS

VDDA_1V2_TRI_PLL2 VSSA_TRI_PLL2

+1V2-PNX5100-DLL

100n

VSS

VDDA_3V3_DDRPLL0

2C94

VDD_3V3_LVDSOUT

VDDD_1V2_TRI_PLL2 VSSD_TRI_PLL2

100n

VDD_3V3_LVDSIN

F22 E22

VDDA_1V2_DDRPLL1 VSSA_DDRPLL1

100n

VSS

AA22 AB22

VDDA_1V2_TRI_PLL1 VSSA_TRI_PLL1

100n

A1 AA25 AB3 AB4 AB5 AC1 AC2 AC3 AC4 AD1 AD2 AD24

100n

100n 2C76

100n 2C75

2C73

100n 2C74

+3V3

VDD_3V3_PER

M22 L22

+1V2-PNX5100-DLL

2C62-2

100n

100n 2C72

2C71

D10 D13 D17 D20

VSS

U5 U3

+1V2-PNX5100

VDD_1V2_DDRPLL0 VSS_DDRPLL0

2

AB15 AB17

+3V3

VDD_1V8_DDR

VSS

VDDD_1V2_TRI_PLL1 VSSD_TRI_PLL1

V22 U22

100n

+1V2-PNX5100

2C62-4

AB20 AB6 AB7 D22 E6 E7 G5 M5 N5 V5 W5

VDD_1V2_CORE

AD3 AE1 AE2 AF1 B1 A10 A13 A17 B2 A20 C2 C25 C3 D3 D4 E4 E5 F25 H23 J25 L11 L12 L13 L14 L15 M11 M12 M13 M14 M15 M25 N11 N12 N13 N14 N15 P11 P12 P13 P14 P15 P23 R11 R12 R13 R14 R15 R23 R25 T11 T12 T13 T14 T15 V25 W23 AE26

VDDA_1V2_DLL7 VSSA_DLL7

4

Φ

SUPPLY_1

2C63-3

100n

5 2C78-4 4

7 100n 2C70-3 3 6 100n 2C70-4 4 5 100n

8

5

6

7

8

5

6

7

8

1 100n 2C68-2 2 100n 2C68-3 3 100n 2C68-4 4 100n 2C69-1 1 100n 2C69-2 2 100n 2C69-3 3 100n 2C69-4 4 100n 2C70-1 1 100n 2C70-2 2

10u

2C68-1

10u 2C56

J5 J4

VDDA_3V3_LVDSIN VSSA_LVDSIN

3

5

6

8

7

6

5

7

8

1 100n 2C66-2 2 100n 2C66-3 3 100n 2C66-4 4 100n 2C67-1 1 100n 2C67-2 2 100n 2C67-3 3 100n 2C67-4 4 100n

2C66-1 +3V3 2C55

+1V2-PNX5100-TRI-PLL1

2C82

100n

2C65

2C64 100n

100n

2C63-1 1 8 100n 2C63-2 2 7 100n 2C63-4 4 5 100n 2C81

2C62-1 1 8 100n 2C62-3 3 6 100n

5

7

6

8

2C61-1 1 100n 2C61-2 2 100n 2C61-3 3 100n 2C61-4 4 100n

5

6

7

8

2C60-1 1 100n 2C60-2 2 100n 2C60-3 3 100n 2C60-4 4 100n

2C78-1 1 8 100n 2C78-2 2 7 100n 2C78-3 3 6 100n

AA5 AB16 AB8 AB9 AC9 AD9 AE9 AF9 E16 E8 E9 F5 J22 K22 P5 R5 Y5 L16 M16 N16 P16 R16 T16

+1V8-PNX5100

E

H5 J3

2C79

7C00-10 PNX5100E

+1V2-PNX5100

D

+1V2-PNX5100

SUPPLY_2

2C77

SENSE+1V2-PNX5100

10u

10u

2C97

10u

2C96

2C95

330u 10V

2C59

+1V2-PNX5100

C

AB18 AB19

+3V3-PNX5100-LVDS-IN CC60

100n

A

B05C

Φ

7C00-11 PNX5100E

B

9

2C85 100n

B05C

3

2

10u

1

7

8

9

F

2C55 D1 2C56 D1 2C57 D9 2C58 F9 2C59 A1 2C60-1 B1 2C60-2 B1 2C60-3 B1 2C60-4 B1 2C61-1 B2 2C61-2 B2 2C61-3 B2 2C61-4 B2 2C62-1 B2 2C62-2 D6 2C62-3 B2 2C62-4 E6 2C63-1 B3 2C63-2 B3 2C63-3 E6 2C63-4 B3 2C64 B3 2C65 B3 2C66-1 C1 2C66-2 C2 2C66-3 C2 2C66-4 C2 2C67-1 C2 2C67-2 C2 2C67-3 C2 2C67-4 C2 2C68-1 D1 2C68-2 D2 2C68-3 D2 2C68-4 D2 2C69-1 D2 2C69-2 D2 2C69-3 D2 2C69-4 D2 2C70-1 D3 2C70-2 D3 2C70-3 D3 2C70-4 D3 2C71 E2 2C72 E2 2C73 E2 2C74 E2 2C75 E2 2C76 E3 2C77 C9 2C78-1 B1 2C78-2 B1 2C78-3 B1 2C78-4 D3 2C79 D6 2C80 D6 2C81 B3 2C82 F6 2C83 F6 2C84 D8 2C85 D9 2C86 D9 2C87 D9 2C88 E9 2C89 E9 2C90 F9 2C91 F8 2C92 F9 2C93 D7 2C94 F7 2C95 A1 2C96 A2 2C97 A2 5C60 D6

5C61 D6 5C62 E6 5C63 E6 5C64 F6 5C65 F6 5C66 D8 5C67 E8 5C68 E8 5C69 E8 5C70 F8 7C00-10 A4 7C00-11 A7 CC60 A3 IC80 D7 IC81 D7 IC82 E7 IC83 E7 IC84 F7 IC85 F7 IC86 D9 IC87 E9 IC88 E9 IC89 E9 IC90 F9

Circuit Diagrams and PWB Layouts

SSB: PNX5100: AmbiLight 2 1

B05D

3

Q529.1E LC

4

7.

102

5

PNX5100: AMBILIGHT

B05D

A

A

B

7C00-7 PNX5100E

C

Personal Notes:

B

RESERVED

Φ

AMBI

3C95-1 B5 3C95-2 B4 3C95-3 B5 3C95-4 B4 3C96-1 B5 3C96-2 B4 3C96-3 B5 3C96-4 B4 3C97 B5 3C98-2 C4 3C98-3 C5 3C98-4 C4 7C00-7 B3

3C95-2 0 1 2 3 AMBI 4 5 6 7 CLK DE SYNC_H SYNC_V

AF10 AE10 AD10 AC10 AB10 AF11 AE11 AD11

2 3C96-4

AC11 AB11 AB12 AC12

4

3C98-4

4

3C95-3

3

3C96-3

3

3C98-2

2

5 47R 5 47R 6 47R 6 47R

1 1 3C97

7 47R

C

47R 3

3C96-1 1

7 47R 7 3C96-2 47R 8 3C98-1 47R 8 3C95-1 47R

2

3C98-3

6 47R

8 47R

D

D I_18020_044.eps 200808

3104 313 6304.3

1

2

3

4

5

E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

103

SSB: PNX5100: LVDS 2

1

3

4

5

6

7

8

9

10

11

12

13

14

PNX5100: LVDS

B05E

B05E A

A +4V-STANDBY TX3A-

RES 5CG0

2CAS 2CAT

2CH2

220R

TX3A+

220R 5CH1

RES 10p 10p RES

220R ICAF

100n

E19 E18

TX1C+ TX1C-

C17 B17

TX1B+ TX1B-

B16 A16

TX1A+ TX1A-

D16 C16

EP EN

AP AN

AP AN

BP BN

BP BN

CLKP CLKN

LOUT2

LOUT4

CLKP CLKN

TX4B+ TX4BTX4A+ TX4A-

B11 A11

TX3E+ TX3E-

D11 C11

TX3D+ TX3D-

E11 E10

TX3CLK+ TX3CLK-

TX3D+

TX1E2CAA 2CAB TX1E+

RES 10p 10p RES

AUDIO-SDO AUDIO-WS AUDIO-CLK AUDIO-MCK

30R 5C73 30R

C10 CP B10 CN

TX3C+ TX3C-

DP DN

DP DN

B9 A9

TX3B+ TX3B-

EP EN

EP EN

D9 C9

TX3A+ TX3A-

RES 2CAC 2CAD TX2A+

10p 10p RES

TX2BRES 2CAE 2CAF TX2B+

10p 10p RES

ICA4 ICA3 ICA2 ICA5

5C72 30R RES

5C74

FCAB

30R

TX1ATX1A+ TX1BTX1B+ TX1CTX1C+

41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

FCJ2

5C71

TX2A-

CP CN

FCBN FCJ1

FI-RE41S-HF 51 50 48 49 46 47 44 45 42 43

FCA0 FCA1 FCA2 FCA3 FCA4 FCA5

TX1CLKTX1CLK+

FCA6 FCA7

TX1DTX1D+ TX1ETX1E+

FCA8 FCA9 FCAA

TX2C-

F

RES

TX2C+

10p 10p RES

TX2CLK2CAJ 2CAK TX2CLK+

RES 10p 10p RES

TX2DRES 2CAM 2CAN TX2D+

10p 10p RES

FCAC

TX2ATX2A+ TX2BTX2B+ TX2CTX2C+

FCAD FCAE FCAF FCAG FCAH FCAJ

TX2CLKTX2CLK+

FCAK FCAM

TX2DTX2D+ TX2ETX2E+

SDA-DISP SCL-DISP

FCAN FCAP FCAR

RES

TX2E+

2C04 TX3CLKTX3CLK+

FCB2

10p 10p RES

TX3E+

2CB6 2CB7

10p 10p RES

100p

100p

ICAC ICAD

FCAW FCAZ FCB0 FCB1

FCB3 FCB4 {BACKLIGHT-OUT,SCL-DISP,SDA-DISP} FCB5 FCB6 FCB7

TX3DTX3D+ TX3ETX3E+

FCB8 FCB9 FCBA FCBB FCBC FCBD

TX4A-

TX4A+

ICAB

FCAY

TX4ATX4A+ TX4BTX4B+ TX4CTX4C+ RES

100R 3CAD RES 100R

FCBE

TX4CLKTX4CLK+

FCBF FCBG

TX4DTX4D+ TX4ETX4E+

FCBH FCBJ FCBK

TX4BRES 2CB8 2CB9 TX4B+

FCBM

10p 10p RES

ICAE

9CA0 RES

+VDISP1 TX4CRES 2CBA 2CBB TX4C+

10p 10p RES

2CBC 2CBD

+3V3

F

G

RES

TX4D+

E

TO DISPLAY S1 PIN

RES 10p 10p RES

TX4D2CBE 2CBF

D

1G51

TX4CLK-

TX4CLK+

C

10p 10p RES 2C20

+3V3

+3V3

+3V3

+3V3

FCBR

2CBY RES 2CBZ RES

2CAP 2CAR

2CBJ RES 2CBK RES FCAV

3CAC 100R 3CAE 100R

1G50

100R

3CA3 100R RES

TX2E-

FCBP

3CA2 RES

10p

2CAG 2CAH

G

TX3ATX3A+ TX3BTX3B+ TX3CTX3C+

RES 10p 10p RES

ICA8

3CAB

RES 10p 10p RES

TX3E2CB4 2CB5

ICA7

10p 10p RES

51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

B

TX4ERES

TO DISPLAY 41 PIN

2CBG 2CBH TX4E+

10p 10p RES

7C20 PCA9540B

VDD

H SCL-SSB SDA-SSB

1 2

4K7

TX1CLK+ TX1CLK-

EP EN

B12 A12 D12 C12

TX1D+

3CAA 100R

4K7

D18 C18

DP DN

TX4C+ TX4C-

2CB2 2CB3

FCAT

CTRL-DISP4 CTRL-DISP3 CTRL-DISP2 CTRL-DISP1

TX3DRES 10p 10p RES

60 61 58 59 56 57 54 55 52 53

ICAG

9CA1

FCAS

100R

3C61

TX1D+ TX1D-

DP DN

C13 B13

TX3CLK+

TX1D2CA8 2CA9

3CA5 100R

3C60

B18 A18

CP CN

TX4CLK+ TX4CLK-

RES 3CA4

SDA-DISP SCL-DISP

100n

TX1E+ TX1E-

CP CN

E13 E12

220R

RES 2CB0 2CB1

RES

TX2A+ TX2A-

D19 C19

LOUT1

TX4D+ TX4D-

FCG0

RES

B19 A19

BP BN CLKP LOUT3 CLKN

D14 C14

+VDISP2

TX3CLK-

22p

TX2B+ TX2B-

CLKP CLKN

TX1CLK+

10p 10p RES

RES 10p 10p RES

BACKLIGHT-OUT

220R RES 5CG1

2CBW

C20 B20

BP BN

TX4E+ TX4E-

RES

TX2C+ TX2C-

AP AN

2CA6 2CA7

22p

E21 E20

RES

AP AN

TX3C+

2CH3 100n

TX1CLK-

2CBV

TX2CLK+ TX2CLK-

A22

B14 A14

2CAY 2CAZ

220R 5CG7

RES

D21 C21

RGB_CLK

1.0A T 63V

22p

TX2D+ TX2D-

LVDS_TX

LVDS1 IREF LVDS2

TX3C-

5CG6

1C51

10p

E

TX2E+ TX2E-

TX1C+

+5V

22p

D

B21 A21

Φ

RES 10p 10p RES

2CBT

C

ICA9 E17 E14

2CA4 2CA5

2CBU

ICAA

12K

12K

3CA7

3CA6

TX1C7C00-4 PNX5100E

FI-RE51S-HF

2CBM RES 2CBN RES 2CBP RES 2CBR RES 2CBS RES

220R

100p

TX3B+

RES 10p 10p RES

100p

2CAV 2CAW

220R 5CG5

100p

63V

10p

1.0A T

9CJ1

+3V3

1C50 220u 25V

TX1B+ +3V3

RES 10p 10p RES

RES 2C12

2CA2 2CA3

B

TX3B-

5CG4

10p

+3V3

3

TX1B-

3C63

+VDISP2

100n

TX1A+

RES 10p 10p RES

4K7

2CA0 2CA1

4K7 3C62

TX1A-

5CH0

SCL SDA

INP FIL

I2 C -BUS CTRL

SC0

5

SCL-DISP

SC1

8

SCL-ST

SD0

4

SDA-DISP

SD1

7

SDA-ST

SCL-DISP SCL-ST

IC61

H

SDA-DISP SDA-ST

IC63

6

VSS

I

I

I_18020_045.eps 200808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

1C50 B7 1C51 C7 1CAA H9 1G50 G8 1G51 F14 2C04 B14 2C12 B7 2C20 G12 2CA0 A5 2CA1 B5 2CA2 B5 2CA3 B5 2CA4 C5 2CA5 C5 2CA6 C5 2CA7 C5 2CA8 D5 2CA9 D5 2CAA D5 2CAB D5 2CAC E5 2CAD E5 2CAE F5 2CAF F5 2CAG F5 2CAH F5 2CAJ G5 2CAK G5 2CAM G5 2CAN G5 2CAP H5 2CAR H5 2CAS A10 2CAT B10 2CAV B10 2CAW B10 2CAY C10 2CAZ C10 2CB0 C10 2CB1 C10 2CB2 D10 2CB3 D10 2CB4 D10 2CB5 D10 2CB6 E10 2CB7 E10 2CB8 F10 2CB9 F10 2CBA F10 2CBB F10 2CBC G10 2CBD G10 2CBE G10 2CBF G10 2CBG H10 2CBH H10 2CBJ B12 2CBK B12 2CBM B13 2CBN B13 2CBP B13 2CBR B13 2CBS B13 2CBT D7 2CBU D7 2CBV D7 2CBW D8 2CBY H8 2CBZ H8 2CH2 B8 2CH3 C8 3C60 H13 3C61 H14 3C62 H14 3C63 H14 3CA2 G7 3CA3 G7 3CA4 C12 3CA5 C11 3CA6 C1 3CA7 C1 3CAA C12 3CAB C12 3CAC C12 3CAD C12 3CAE C12 5C71 E7 5C72 E7 5C73 E7 5C74 E7 5CG0 A8 5CG1 C7 5CG4 B8 5CG5 B8 5CG6 C8 5CG7 C8 5CH0 A13 5CH1 A13 7C00-4 C2 7C20 H11 9CA0 F14 9CA1 C14 9CJ1 B8 FCA0 E7 FCA1 E7 FCA2 E8 FCA3 E7 FCA4 E8 FCA5 E8 FCA6 F8 FCA7 F8 FCA8 F8

FCA9 F7 FCAA F8 FCAB E8 FCAC F7 FCAD F7 FCAE F7 FCAF F8 FCAG F8 FCAH F8 FCAJ G8 FCAK G8 FCAM G8 FCAN G7 FCAP G7 FCAR G7 FCAS C12 FCAT C12 FCAV C12 FCAW C12 FCAY C12 FCAZ D12 FCB0 D12 FCB1 D12 FCB2 D12 FCB3 D12 FCB4 D12 FCB5 D12 FCB6 D12 FCB7 D12 FCB8 D12 FCB9 E12 FCBA E12 FCBB E12 FCBC E12 FCBD E12 FCBE E12 FCBF E12 FCBG E12 FCBH E12 FCBJ E12 FCBK E12 FCBM F14 FCBN D8 FCBP G8 FCBR G8 FCG0 C7 FCJ1 D8 FCJ2 D8 IC61 H13 IC63 H13 ICA2 E8 ICA3 E8 ICA4 E8 ICA5 E8 ICA7 C12 ICA8 C12 ICA9 C1 ICAA C1 ICAB C13 ICAC C13 ICAD C13 ICAE F14 ICAF B14 ICAG B14

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

104

SSB: PNX5100: Control

1

B05F

2

3

4

5

6

7

8

PNX5100: CONTROL

B05F A

A

7C00-1 PNX5100E 27p

AE13 AF13

B

ICD7

3CD0

AF14

Φ

CONTROL

IN OUT

UA1

TX RX

UA2

TX RX

AE8 AF8

XTAL

OUT2

100R FCD0

EJTAG-PNX5100-TCK EJTAG-PNX5100-TDI EJTAG-PNX5100-TDO EJTAG-PNX5100-TMS EJTAG-PNX5100-TRSTn

FCD1 FCD2 FCD3 FCD4 FCD8

RESET-PNX5100

+3V3

10K

10K

+3V3

3CD2

10K

+3V3

3CD1-3

3CD1-2

10K

10K

3CD1-4

C

3CD1-1

ICD8 +3V3

H4 H2 H3 J1 J2 AF24 R1 AB21

TCK TDI TDO TMS TRST

1

SCL SDA

2

SCL SDA

K2 K1

3CD7 100R

100R

3CD8

SCL-SSB SDA-SSB

L2 L1

3CDA

3CD9 100R

100R RES

SCL-DISP SDA-DISP

RES

AD12

RESET_SYS RESET_IN OBSERVE

B

AC8 AD8

PNX5100-RST-OUT

G22 H22 W22 Y22

NC

VPP_ID

+3V3

C

+3V3

D

8

7CD0 M24C16-WDW6

Φ

C08 OR C16 0 1 2

WC SCL

ADR SDA

7 6 5

FCD6 WC-EEPROM-PNX5100 3CDC 3CDD

FCD5 100R

FCD7

3CDB

WC-EEPROM-PNX5100

D +3V3

4K7 SCL-SSB SDA-SSB

only for DEBUG

100R

4

1 2 3

(2Kx8) EEPROM

9CD0

2CD1

27M

27p

2CD0

1CD0

FCD9

E

E I_18020_046.eps 200808

3104 313 6304.3

1

2

3

4

5

6

7

8

1CD0 B2 2CD0 B2 2CD1 B3 3CD0 B2 3CD1-1 C2 3CD1-2 C2 3CD1-3 C2 3CD1-4 C2 3CD2 C3 3CD7 B6 3CD8 B5 3CD9 B6 3CDA C5 3CDB D8 3CDC D6 3CDD D6 7C00-1 B4 7CD0 D5 9CD0 D8 FCD0 B3 FCD1 B3 FCD2 B3 FCD3 C3 FCD4 C3 FCD5 D6 FCD6 D6 FCD7 D6 FCD8 C3 FCD9 E5 ICD7 B2 ICD8 C3

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

105

SSB: PNX5100: PCI

2

6

7

8

XIO

SCL

1K0 RES

RES

B

IC13

6

IC14

5

A2

3C40

RES

9CJ5

9CJ4 A1

100R

IC12

8

SDA

+3V3

7

PCI-CLK-PNX5100

1K0

2

A0

1K0

SCL-DISP

1

100n

1K0

3C42 100R IC18

OS

3C39

SDA-DISP

3 IC11

3C38

3C41

2C08

100R 100R 100R 100R 100R 100R 10K

7C06 LM75ADP

+VS

8 6 7 8 6 7

A

GND

3CFK-1 1 3CFK-3 3 3CFK-2 2 3CFL-1 1 3CFL-3 3 3CFL-2 2 3CFN

RES RES RES RES RES RES

PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3 PCI-PAR PCI-FRAME PCI-IRDY PCI-TRDY PCI-STOP PCI-DEVSEL PCI-AD25 PCI-PERR PCI-SERR PCI-REQ-USB20 PCI-REQ-PNX85XX PCI-REQ-ETHERNET PCI-GNT-USB20 PCI-GNT-PNX85XX PCI-GNT-ETHERNET

4 IC50

0 1 SEL 2 3 ACK AD25

M2 M3 M4 N1 AC6 AF7

+3V3 IC51

3CF1 +3V3 10K

8

7CJ2

C

100n

AD

+3V3

AE5 AD5 AC5 AF4 W3 U2 V1 V2 V4 V3 L4 W1 W2 AD6 AC7 AD7 AE6 AF6 AE7 M1 L3 H1

SML-310

0 1 CBE 2 3 PAR FRAME IRDY TRDY STOP DEVSEL IDSEL PERR SERR REQ REQA REQB GNT GNTA GNTB INTA CLK PLL_OUT

PCI_XIO

3C37

Φ

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

6CJ3

AF5 AE4 AD4 AF3 AE3 AF2 AB2 AB1 AA4 AA3 AA2 AA1 Y4 Y3 Y2 Y1 W4 U1 T4 T3 T2 T1 R4 R3 R2 P4 P3 P2 P1 N4 N3 N2

2C03

C

5

B05G

7C00-2 PNX5100E

PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

B

4

PNX5100: PCI

B05G A

3

9CJ6

1

VDD

3C45

6

SCL

7

LED1

SDA

100R

+3V3

LED0

LED2 PCA9533 LED3

1

FAN1-OUT

2

TACHO1-INV

D

3 5

IC17

1K0 3C14

VSS

FAN1-OUT

3C36

IC06

TACHO1-INV

PDTC114EU

10u 16V

2C06

22K

RES

3C16 IC04

27K

IC03 PDTA114EU

F

10K

IC07

3C24

TACHO1

100n 3C17

IC08

10K

3C19

7C07 7C03 BC857BW

100R

F

IC05

2C05

100R

4 2

1

3C33 IC20

2u2 2C07

IC09

10R

I_18020_047.eps 200808

3104 313 6304.3

1

E

7C05

10K

3C29

3C34

3

FAN1-DRV

RES

+12V

RES 3C18 +3V3

IC10 7C04 BCP53

RES

+12V

+12V 6CJ2 RES

1K0

10K

+12V

1K0

3C15 6CJ1

+3V3 RES 3C35 SML-310

E

+3V3

4

2C10

IC16

Φ

100n

FC14

3C44 100R SDA-DISP

SDA-DISP 100R

9CJ7

IC15

SCL-DISP

SCL-DISP

FC13 100R 3C46

3C43

SML-310

1 2 3 4

FAN1-DRV TACHO1

2C09

100p 2C47

100n 2C46

FC11

10p

FC10

+12V

FC12

10p 2C11

1 2 3 2C45

D

1M71

FC15

100n

1F01

2

3

4

5

6

7

8

1F01 D1 1M71 D3 2C03 C8 2C05 F7 2C06 F3 2C07 F3 2C08 A8 2C09 D4 2C10 D3 2C11 D4 2C45 D1 2C46 D1 2C47 D1 3C14 D8 3C15 D8 3C16 F7 3C17 F7 3C18 E5 3C19 F4 3C24 F3 3C29 E2 3C33 F2 3C34 F1 3C35 E1 3C36 F4 3C37 A7 3C38 B8 3C39 B8 3C40 B8 3C41 B6 3C42 B6 3C43 D6 3C44 D6 3C45 D4 3C46 D4 3CF1 C4 3CFK-1 B4 3CFK-2 B4 3CFK-3 B4 3CFL-1 B4 3CFL-2 B4 3CFL-3 B4 3CFN B4 6CJ1 E8 6CJ2 E2 6CJ3 B6 7C00-2 A2 7C03 F3 7C04 E2 7C05 E5 7C06 B7 7C07 E8 7CJ2 D7 9CJ4 B8 9CJ5 B8 9CJ6 B8 9CJ7 D4 FC10 D2 FC11 D2 FC12 D3 FC13 D3 FC14 D3 FC15 D1 IC03 F8 IC04 F7 IC05 E5 IC06 F4 IC07 F3 IC08 F3 IC09 F2 IC10 E1 IC11 B7 IC12 B8 IC13 B8

IC14 B8 IC15 D7 IC16 D7 IC17 D8 IC18 B7 IC20 F2 IC50 C4 IC51 C4

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

106

SSB: PNX5100: Display Interfacing 1

2

4

5

6

7

8

9

11

10

12

14

B05H Boost CTRL RESERVED

9CG1 RES 9CG0 RES

FAN-CTRL-1 ICGZ ICGV FAN-CTRL-2 BACKLIGHT-CTRL CTRL3-PNX5100 CTRL2-PNX5100 CTRL1-PNX5100

2CG2

220R 3CH2

100n

2K2

SML-310

6CG2

10K RES

BACKLIGHT-BOOST

B

BOOST-CTRL

+3V3

47K 2CG3

5 3CG0-4 4 ICGW

C

47K 7CG2 BC847BW ICG4 3CG0-2 ICG6 3CG0-3 2 7 3 6 47K

+3V3

47K

ICH7

4K7 RES 2CH0

100R

470p RES

7CH0 BC847BW 2 RES

3CHE

9CH0

1K0

RES

3CGG

RESET

CTRL-DISP2

PDWN

CTRL-DISP3

CPU-GO

CTRL-DISP4

PDP-GO

E-BOX

+12V

BACKLIGHT-OUT

RESET-SYSTEM

F RC

47R RES CTRL2-PNX5100

ICGN

CTRL4-PNX5100

3CH5

BACKLIGHT-CTRL ICGR

ICGP

4K7 RES 2CGD

1 2K2 RES

ICGA

47R RES 3CGJ

CTRL3-PNX5100

3CH3

ICG9

47R RES 3CGH

3

47K

ICG8

SDI

IRQ

3CGT

FCG5

3CGF

FCG7

3CGV

F

FHP CTRL-DISP1

470K

10K RES

3CG8

47R RES 3CG9

47R RES

3CG7

3CG6

47R RES

FCG2

FCG4

ICG7

D

E

FCG3

CTRL1-PNX5100

1

3

+3V3

E

2

BC847BPN 7CH1-2

5

2CH1

3CGA

4

ICH8

3CHB 12K RES

1

3CHG

ICH5

3

ICH6

15K RES

3CHC

3CHF

+3V3

4K7

1u0 RES

3CG5

D LCD-PWR-ON

7CH1-1 BC847BPN 6

ICH9

ICG5

VDISP-SWITCH

47K

100n

2CG4

2

3CHA

1

27K RES

3

BZX384-C5V6

10K

6CG0

3CH9

1u0

+12V

ICG1

3CH8

ICG3

3CH0

ICGY

100R

3CHD

47R

2CG1

7CG8 PDTA114EU

+3V3

GPIO

3CH7

3CG1

C

ICHB

GPIO

2K2 RES

ICG2

5CG3

22u RES

+12V 1.0A T 63V

CONTRAST-GAIN BOOST-CTRL

220R

7CG1 SI3441BDV

1C55

FCG1

+VDISP1 ICG0

7CG0 SI4835BDY RES

BACKLIGHT-PWM-ANA-SSB LCD-PWR-ON CONTRAST-GAIN

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

1K0

B

5CG2

10K

RES 3CKB

CTRL4-PNX5100

A +3V3

Φ

3CH1

ICH4

+VDISP2

AE24 AF25 AF26 C24 C26 B25 B26 A26 A25 A24 B24 A23 B23 C23 B22 C22

10K RES

+12V disp switch RESERVED

3CGZ

7C00-3 PNX5100E

+3V3

G

13

PNX5100: DISPLAY-INTERFACING

B05H A

3

6

ICGK 2 ICGM

3CGS

BC847BPN 7CG6-2

5

470K 7CG5 BC847BW RES 2

7CG6-1 BC847BPN 1

4

3

G

47R RES 470p RES

15K RES

1K0

FCG6

3CGR

1u0

3CGP

RES

RES 2CGB

100R

10K RES

3CGN

100R 3CKA

ICKA RESET-SYSTEM

9CG4

1K0

+3V3

3CGD

BACKLIGHT-OUT

3CH4

2CGC

100R

1u0 RES

3CGC

RC

ICGH

ICH3

H

H

7CG4 RES PDTC114EU

BACKLIGHT-PWM-ANA-SSB

BACKLIGHT-OUT

I

I

I_18020_048.eps 200808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

1C55 B1 2CG1 B5 2CG2 C4 2CG3 C2 2CG4 D5 2CGB H12 2CGC H12 2CGD G11 2CH0 D11 2CH1 E12 3CG0-2 C5 3CG0-3 C5 3CG0-4 C3 3CG1 C2 3CG5 D4 3CG6 E5 3CG7 E5 3CG8 E5 3CG9 E5 3CGA D3 3CGC G3 3CGD G3 3CGF F3 3CGG G3 3CGH G3 3CGJ G3 3CGN H11 3CGP H12 3CGR H13 3CGS G12 3CGT F11 3CGV F13 3CGZ B12 3CH0 B12 3CH1 B12 3CH2 B4 3CH3 G11 3CH4 G11 3CH5 G11 3CH7 C2 3CH8 D11 3CH9 D11 3CHA D13 3CHB D12 3CHC D11 3CHD D11 3CHE E11 3CHF E12 3CHG E13 3CKA H3 3CKB B6 5CG2 B4 5CG3 B4 6CG0 C3 6CG2 B5 7C00-3 A8 7CG0 B2 7CG1 B3 7CG2 C4 7CG4 H12 7CG5 G12 7CG6-1 G13 7CG6-2 G13 7CG8 B12 7CH0 D12 7CH1-1 D13 7CH1-2 D13 9CG0 B3 9CG1 B3 9CG4 G13 9CH0 E13 FCG1 B5 FCG2 E6 FCG3 F6 FCG4 F6 FCG5 F6 FCG6 G13 FCG7 E13 ICG0 B4 ICG1 C4 ICG2 C2 ICG3 C2 ICG4 C4 ICG5 D4 ICG6 C5 ICG7 F2 ICG8 G2 ICG9 G2 ICGA G2 ICGH H12 ICGK F13 ICGM G12 ICGN G11 ICGP G11 ICGR G10 ICGV B7 ICGW C3 ICGY B12 ICGZ B7 ICH3 H9 ICH4 A7 ICH5 D10 ICH6 D11 ICH7 D11 ICH8 D12 ICH9 D13 ICHB B6 ICKA H2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

107

SSB: PNX5100: Debug 1CJ0 A3

3CJ0 C3

3CJ1 C3

1

B05I

6CJ0 C3

7CJ0 D3

9CJ0 B3

FCJ0 B3

2

PNX5100: DEBUG

A

Personal Notes:

4

3

B05I A

RESERVED 1CJ0 1 2 3 4 5 6 7 8 9 10 11 12 13 14

EJTAG-PNX5100-TRSTn EJTAG-PNX5100-TDI EJTAG-PNX5100-TDO EJTAG-PNX5100-TMS EJTAG-PNX5100-TCK FCJ0

B +3V3

9CJ0

B

5-147279-3

C

3CJ0

+3V3

330R

10K

3CJ1

+3V3

C 6CJ0

SML-310

PNX5100-RST-OUT

7CJ0 PDTC114EU

D

D

I_18020_049.eps 200808

3104 313 6304.3

1

2

3

4

E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

108

SSB: Analogue Externals A 1

2

3

4

5

6

7

8

9

10

11

12

13

14

+12V

5

3K3

4

AP-SCART-OUT-L

BC847BS

3E64

3E14

+5v

2E82

1K0

D

100n

2E48

1n0

2E51 100n

2E59

0001

1025 6E24

FE68

16

+3V3

AV2-STATUS

13 12 11

IE05

75R

3E02

0001

1027

15

0001

6E02

1028

3K3

BZX384-C12

8K2

Y_CVBS-MON-OUT-SC

1 2 10

FE14

B-VGA FE15

G-VGA

FE20

AUDIO-IN3-L FE56

AUDIO-IN3-R

7

FE64

3E16

2E33

1 2 4X1 4X2

3E17

14

330p

IE04

FE12

R-VGA

6 FE87

6

FE11

AP-SCART-OUT-R

4

74HC4053PW

G4

FE10

1E01-1

2

2E06

AUDIO-OUT-L

9

FE75

3E07 150R

6 BC847BS 7E06-1

IE63

3E08

A-PLOP 10

FE66

IE62

1u0

8

FE65

+3V3 FE63

FE09

AV1-STATUS AP-SCART-OUT-L

1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

FE02

FE08

AUDIO-IN1-R

(AV2)

100n

2E83

SCART2

1E99

FE01 FE07

AUDIO-IN1-L

VDD

MDX

FE06

CVBS-OUT-SC1

5 7E02

FE05

AV1-Y_CVBS

3 100p

IE36

FE04

AV1-Y

2E75

2

AV3-PB

REGIMBEAU_CVBS-SWITCH

2E16

1

10K

+5v

BZX384-C 24V

100p

2E31

3E34 7E15 PDTC114EU

3E06

100n

2E77 8K2

3E99 3

IE98

100n

100K

+12V

C

FE03

FE62

6E14

IE21

B

AV1-PB AV1-BLK

2E70

+12V BZX384-C 24V

AUDIO-IN2-L

AV1-PR

1n0

1024

RES

0001

100p

2E32

RES

100K

3E21

470R

A-PLOP

FE61

6E12

RES

BZX384-C 24V

0001

100p

2E30

RES

AP-SCART-OUT-R

+12V

IEC3

3EB0

6E08

BZX384-C 24V

1K0

1u0 16V FEA1

7E01-2 3

3E11

AUDIO-CL-R 100K

150R

2EA5

3E18

IEC2

1n0

IE20

AUDIO-IN2-R 3EA8

A

+12V

1 BC847BS

1n0

2E50 0001

RES

2

3K3

B

1022

RES

AP-SCART-OUT-L

100p

FEA0

7E01-1 6 IEC1

3EA9

B08A FE60

470R

AUDIO-CL-L 2E29

A

2EA4 1u0 16V

100K

IEC0

150R

3E24

3EA7

6E10

3E63

AP-SCART-OUT-R

1023

B08A

BZX384-C 24V

ANALOGUE EXTERNALS A

+12V

2

3K3

1

11

IE96

C

D

30FMN-BMT-A-TFT 12

14 FE67

CVBS-TER-OUT

2E84

FE77

3K3

+3V3

100n

2E07

0001

1E13

100p

2E17

75R

3E51

F

21

8 1

4K7

3E04-1

10p

0001

IE24 5 3E04-4 4 4K7

100n

22

IE02

7

MRC-021V-51 PC (PHT)

7E03 BC847BW

3E13

+3V3

IE25

2E05

100n 16V

IE07

5

3E83

2EA6

100n RES

3EC7

27K RES

100K

6

1u0

IE60

IE38

2 2E79

3EB1 IE61

1u0 22K

3EA5

330R

10K

3EB2

IE59

560R

RES

3EA6

330R

9E21 3EC3

2E78

7E22-1 BC847BPN 1

470R

100p

2E41

0001

1E27

75R

1

7E16 BC847BW 2

Y_CVBS-MON-OUT-SC 3E62

6E37

BZX384-C6V8

9E10 100n

2E73 3EB9

I

100R IE93

3EC8

Y_CVBS-MON-OUT

0001

6E31

1E24

68R

BZX384-C6V8

3E52

390R

7E04 BC847BW 3EB8

I

3EA1

IE70

3

AV2-Y_CVBS

IE94

1K0

H

4 BC847BPN 7E22-2 3

+5V

3EA2

33R

3EA3

100n

1u0

IE89

100n

2E76

0001

+5V

100R

150R 1E26

IE06

2E95

2E81 9E06

3E69

1

7E14 BC847BW 2

BZX384-C6V8 3EC6

IE51

CVBS-OUT-SC1

6E36

3EB7

FE84

220R

3

390R

7E05 BC847BW

H

+5V IE90

5E02 +12V 150R

IE91

G

100n

IE01

3E61

2E13

4K7

3E73

100n

2E74

+5V

47R

FE83

2E08

3E20

180R

SPDIF-OUT

2

1E16

100p

2E19

2E52

23

AV2-BLK

7E07-1 1

20

FE79

6E35

2E85 BZX384-C 24V

100n

2

MRC-021V-51 PC (PHT)

75R

3E55

6 BC847BS

IE68

19

FE78

G

100R

FE86

18

MT 1E01-2

3EB6

3E09 150R

3E10

17

+12V

AV3-PR

16

A-PLOP 6E34

AV3-Y

F

IE64

1u0

15

FE76 100n

7

+12V

2E09

AUDIO-OUT-R

4K7

VSS VEE 8

E

13

3 5 9

3E04-2

4

BZX384-C 24V

E

47R

I_18020_050.eps 200808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

14

1022 A6 1023 B6 1024 B6 1025 C6 1027 D6 1028 E6 1E01-1 C8 1E01-2 G8 1E13 F7 1E16 G7 1E24 I6 1E26 H7 1E27 I6 1E99 C14 2E05 G9 2E06 D10 2E07 F10 2E08 G12 2E09 E10 2E13 H6 2E16 D5 2E17 F6 2E19 G6 2E29 A5 2E30 B5 2E31 C5 2E32 B5 2E33 E5 2E41 I6 2E48 A7 2E50 A7 2E51 B7 2E52 G9 2E59 B7 2E70 B6 2E73 I2 2E74 G2 2E75 D1 2E76 H11 2E77 C2 2E78 H14 2E79 I14 2E81 H12 2E82 C6 2E83 C6 2E84 F6 2E85 F6 2E95 H12 2EA4 A3 2EA5 A3 2EA6 H14 3E02 D6 3E04-1 G10 3E04-2 G10 3E04-4 G9 3E06 D4 3E07 D10 3E08 E10 3E09 E10 3E10 F10 3E11 A6 3E13 G10 3E14 C6 3E16 D6 3E17 E5 3E18 B5 3E20 G11 3E21 B5 3E24 A5 3E34 C5 3E51 F6 3E52 I5 3E55 G5 3E61 H7 3E62 I6 3E63 A6 3E64 B6 3E69 H6 3E73 H6 3E83 I12 3E99 C2 3EA1 H14 3EA2 H13 3EA3 H12 3EA5 I14 3EA6 I13 3EA7 A2 3EA8 A2 3EA9 A2 3EB0 B2 3EB1 I13 3EB2 I12 3EB6 H1 3EB7 H2 3EB8 I1 3EB9 I1 3EC3 I11 3EC6 H7 3EC7 H14 3EC8 I14 5E02 G11 6E02 E6 6E08 A7 6E10 A7 6E12 B6 6E14 C6 6E24 C6 6E31 I6 6E34 F6 6E35 F6 6E36 H6 6E37 I5 7E01-1 A2 7E01-2 B2 7E02 D1 7E03 G10 7E04 I1 7E05 H1

7E06-1 D10 7E07-1 F10 7E14 H6 7E15 C3 7E16 I11 7E22-1 H13 7E22-2 H12 9E06 H10 9E10 I2 9E21 I11 FE01 C13 FE02 C13 FE03 B12 FE04 B12 FE05 B12 FE06 C12 FE07 C12 FE08 C11 FE09 C11 FE10 C10 FE11 C11 FE12 C11 FE14 D11 FE15 D11 FE20 D11 FE56 D10 FE60 A7 FE61 A7 FE62 B7 FE63 C14 FE64 D7 FE65 E7 FE66 E7 FE67 E7 FE68 D7 FE75 D11 FE76 E7 FE77 F7 FE78 F7 FE79 F7 FE83 G13 FE84 H2 FE86 E10 FE87 D7 FEA0 A3 FEA1 B3 IE01 G11 IE02 G11 IE04 D1 IE05 D5 IE06 H6 IE07 I11 IE20 A5 IE21 C5 IE24 G10 IE25 G9 IE36 D3 IE38 I12 IE51 H5 IE59 I14 IE60 H14 IE61 I13 IE62 D10 IE63 D10 IE64 E10 IE68 E10 IE70 H13 IE89 H12 IE90 G13 IE91 H1 IE93 I2 IE94 I1 IE96 E2 IE98 C2 IEC0 A3 IEC1 A2 IEC2 A3 IEC3 B2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

109

SSB: Analogue Externals B/C 1

B08B

2

3

4

5

6

7

8

9

10

12

11

13

14

ANALOGUE EXTERNALS B/C

B08B

A

A

ANALOGUE EXTERNALS B

ANALOGUE EXTERNALS C

+5V V-SYNC-VGA

100n

2E43

BZX384-C 24V

CVBS MTJ-032-37BAA-423 NI 2

FE21

C

FRONT-Y_CVBS

FE52

6E11

6E21

75R

RES 3E74

FE22

3E81

E

100p

RES 2E97

100K

1n0

RES 3E76

1K0

MTJ-032-37BAA-423 NI 5 6 4 1E11-2 RED

2E42

RIGHT (RD)

4K7

3E89

47p

2E64

4K7

3E35

1242

47p

2E46

3E46

4K7

100R

1012

100p

100R

3E82 3E42

D

IE58

BZX384-C 24V

BZX384-C 24V FE16

4K7

FE13

AUDIO-IN5-L

+12V

3E90

ICD15S13E6GX00

AUDIO-IN5-R

AUDIO-HDPH-L-AP AUDIO-HDPH-R-AP

6E04

17 16

YELLOW 75R

3E03

1E11-1

+12V +12V

1007 2E35

1241

75R

3E01

75R

BAT54

3E05

IE80

1240

1

FE88

E

SDA

2E45

100u 4V

100p

RES 2E98

100K

RES 3E77

1n0

2E37 +12V

+12V

FE25

RIGHT

IE67

3

3E26-3

6

1n0

1K0 2E40

33R

MSJ-035-10A B AG PPO

DATA-SDA

6E44

FE18

3E80

FEB3

G

33R

33R

1010

AREAL SOCKET

IE66 1 3E26-1 8 2 3E26-2 7

LEFT

1n0

3 7 8 1

FE24

BZX384-C 24V

5 4 2

1K0

1E15

2E39

HEADPHONE

BZX384-C 24V

100R

3E79

100R

BAS321

3E72

5

6E45

3E65

4K7 6E17

1

1000

6E15

1 2 3 4

CLK-SCL

F

6

6E16

FE26

BAS321

1T99

2E80

6E43

1003

ADR

7

1002

WC SCL

10K

3E71

(256x8) EEPROM 0 1 2

FEB2

BAS321

1 2 3

IE32

4

2K2

Φ

2K2

3E66 IE30

4K7

BAS321 3E47

6E13

100n

2E26

100n

2E99

3E49

8

7E18 M24C02-WDW6

F

3E70

IE10

120R

FE19

IE72

3E78 1K0

5E04

+5VDCOUT

FE23

100u 4V

EDID NVM VGA

MTJ-032-37BAA-423 NI 8 9 7 1E11-3 WHITE FE17

BZX384-C 24V

+12V

LEFT (WH)

G

6E20

H-SYNC-VGA

B-VGA

+12V

6E05

BZX384-C 24V

100p

2E65

6E53

BZX384-C 24V

100p

2E11

100p

6E18

2EB4

BZX384-C 24V

FE55

6E32

BZX384-C 24V

D

FE58

+12V

1016

C

G-VGA

R-VGA 100n

2E36

+12V

1E05 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

B

+12V

VGA CONNECTOR

1004

B

4 3E26-4 5 33R

H

H

1F29 HOOK1

I

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1000 H10 1002 F10 1003 F10 1004 E10 1007 C10 1010 H12 1012 E3 1016 C3 1240 C4 1241 C5 1242 E5 1E05 C1 1E11-1 C9 1E11-2 E9 1E11-3 E9 1E15 G9 1F29 I7 1T99 G1 2E11 C4 2E26 F4 2E35 C10 2E36 B3 2E37 F11 2E39 H11 2E40 H12 2E42 E11 2E43 C11 2E45 F13 2E46 E4 2E64 E6 2E65 C5 2E80 E13 2E97 E12 2E98 F12 2E99 F3 2EB4 C4 3E01 C5 3E03 C6 3E05 C4 3E26-1 G12 3E26-2 G12 3E26-3 G13 3E26-4 H13 3E35 E5 3E42 D6 3E46 E4 3E47 F5 3E49 F5 3E65 G6 3E66 F5 3E70 F7 3E71 F7 3E72 G7 3E74 C11 3E76 E11 3E77 F11 3E78 F11 3E79 H10 3E80 H12 3E81 D11 3E82 D7 3E89 E6 3E90 D7 5E04 F4 6E04 D4 6E05 C6 6E11 D5 6E13 F4 6E15 G5 6E16 G7 6E17 F7 6E18 C4 6E20 C10 6E21 D10 6E32 C2 6E43 E10 6E44 G12 6E45 G10 6E53 C5 7E18 F6 FE13 D3 FE16 D5 FE17 F9 FE18 G10 FE19 F3 FE21 C10 FE22 D11 FE23 E11 FE24 G10 FE25 G12 FE26 G4 FE52 C6 FE55 C5 FE58 C3 FE88 D1 FEB2 F7 FEB3 G7 IE10 F6 IE30 F5 IE32 F7 IE58 D12 IE66 G13 IE67 G13 IE72 E12 IE80 C2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

110

SSB: Analogue Externals D

1

2

3

4

5

7

6

8

9

ANALOGUE EXTERNAL D

B08D

B08D A

A

1HE0

+3V3

2E62

IE85

100n

IE86

2E63

IE87

100n

IE88

IE81

9E03

C

3 4 5

11 10 13 8

IE82

TXD-MIPS

1

16

Φ

C1+

VCC

RS232

IE75 V-

C1V+

6

2E60 100n 2E61

2 IE76

C2+

100n

C2-

B4B-PH-SM4-TBT(LF)

T1 OUT T2

T1 IN T2 R1 IN R2

RXD-MIPS

GND

B

R1 OUT R2

12 9

1E50

FE92

14 7

TXD2

FE93

FE95

IE79

RXD2

6

5

RXD

IE84 FEC0

FE47

EJTAG-TRSTN EJTAG-DETECT EJTAG-TDI

FE46 FE45

3ED1

EJTAG-TRSTN

10K 3ED2

EJTAG-TDI FE44

EJTAG-TDO

FE43

EJTAG-TMS

FE42

EJTAG-TCK

+3V3 10K 3ED3

EJTAG-TDI

10K 3ED4

EJTAG-TMS FE41 FE40 FE39

B

+3V3 10K 3ED5

EJTAG-TCK

FE38

+3V3 10K

5-147279-3 1 2 3 4

UART2

FOR

C

+3V3

FACTORY

1E51 TXD

15

RXD-UP

1 2 3 4 5 6 7 8 9 10 11 12 13 14

FE99

PMEG1020EA 7E17 ST3232C

FEB9

USE ONLY

6E50

DEBUG / RS232 INTERFACE

TXD-UP

FOR FACTORY 9E09

9E08

PMEG1020EA

6E19

+3V3-STANDBY

5

4

1 2 3

USE ONLY UART1

9E05 B3B-PH-SM4-TBT(LF)

D FE57

FE96

TXD RXD

SDA

1 2 3

FE29

100R

3E85

UART SERVICE CONNECTOR

2 4 5

1008

1029 1HP0

SCL

MIPS/STBY

MSJ-035-10A B AG PPO

FE97

E

D

1E06 1 8 7 3

E

SCL-SSB

FE27 3E93 4

5

FE28

SDA-SSB

100R

+1V8-PNX8541

+1V8-PNX5100

F

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1008 E5 1029 E5 1E06 D6 1E50 C6 1E51 C6 1HE0 B7 1HP0 E1 2E60 B3 2E61 B3 2E62 B2 2E63 B2 3E85 E2 3E93 E2 3ED1 B9 3ED2 B9 3ED3 B9 3ED4 B9 3ED5 C9 6E19 A3 6E50 B3 7E17 B2 9E03 C1 9E05 D1 9E08 B3 9E09 A4 FE27 E2 FE28 E2 FE29 E2 FE38 C8 FE39 C7 FE40 C7 FE41 C7 FE42 B7 FE43 B7 FE44 B7 FE45 B7 FE46 B7 FE47 B7 FE57 D5 FE92 C5 FE93 C5 FE95 C5 FE96 D4 FE97 E4 FE99 B3 FEB9 C1 FEC0 D1 IE75 B3 IE76 C3 IE79 C3 IE81 C2 IE82 C2 IE84 D2 IE85 B2 IE86 B2 IE87 B2 IE88 C2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

111

SSB: Audio in HDMI

1

B08E

2

3

4

5

6

AUDIO IN HDMI

B08E

A

A

MSP-251V-03 NIDIP (ABSPC) 1

B

100n

RES 2E21

6E22

B

BZX384-C 24V

+12V

FE69

3E12

FE89

1K0

IE78 AUDIO-IN4-R

100p

RES 2E20

100K

RES 3E23

1P9A

1n0

2E12

1P0A 2

C

C

D

MSP-251V-03 NIDIP (ABSPC) 1

FE70

100n

2E18

BZX384-C 24V

6E09

+12V

D

IE83

3E15

AUDIO-IN4-L

1K0 100p

RES 2E15

100K

RES 3E22

1P9B

1n0

2E14

1P0B 2

E

E I_18020_053.eps 200808

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4

5

6

1P0A C2 1P0B D2 1P9A C2 1P9B D2 2E12 C2 2E14 D2 2E15 D4 2E18 D3 2E20 C4 2E21 B3 3E12 B3 3E15 D3 3E22 D3 3E23 C3 6E09 D2 6E22 B2 FE69 B2 FE70 D2 IE78 B4 IE83 D4

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

112

SSB: HDMI 6

5

7

8

9

10

11

12

+5V-EDID

CIN-5V

BAT54

FE73

1 2 3

HDMI 3 SIDE

0 1 2

6

SCL ADR 4

C

IE09

22R

3E50

7E20 BC847BW

100n

2E28

2E27

B

FE48

Φ

(256x8) EEPROM

EDID NVM 1 2 3

HDMI 2

0 1 2

FE72

7

WC

6

SCL ADR

5

SDA

47K

BIN-5V BRX-HOTPLUG

20

EDID2 IE31

47K 3E97

7E08 M24C02-WDW6

3E96

BRX-DDC-SCL BRX-DDC-SDA FE51 FE50 FE49

3EB4 22R

3E88 22R

HDMI CONNECTOR 2

9E04 RES

WRITE-PROT

C

HOT-PLUG

2E23

10n RES

10K 3E94

BRX-HOTPLUG

22R 3E75

1P56

1K0

BRXCPCEC-HDMI

FE54

IE08

3E53

3E54

120R

DC1R019JBAR190 WRITE-PROT

PBRX-DDC-SDA

IE29

FE53

22R 9E13 RES

CRX-HOTPLUG

BRX0BRXC+

3E48

HDMI CONNECTOR 3 SIDE

PBRX-DDC-SCL 9E20

5E09

BRX1BRX0+

23 22

22R

BRX-DDC-SDA BIN-5V-EDID

8

100n

3EC2

5

SDA

DC1R019JBAR190

FE91

47K

IE33 7

WC

BRX2BRX1+

IE18 IE17

HOT-PLUG

D

1P57

BIN-5V

IE16

10K

CIN-5V

D

3E95

7E09 BC847BW 2E34

23 22

2E22

8

Φ

(256x8) EEPROM

EDID NVM

CRX-HOTPLUG

20

47K 3E45

CIN-5V

EDID3

3E44

FE32 FE33

7E21 M24C02-WDW6

10K

CRX-DDC-SCL CRX-DDC-SDA

3E40

IE03

A 9E19

4

CRXCPCEC-HDMI

100n

2E10

CRX0CRXC+

1P55

1P54

120R

BRX-DDC-SCL

0001-0015

CRX1CRX0+

FE30 FE31

PCRX-DDC-SDA

5E07

BRX2+

1P51

9E11

CIN-5V-EDID

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 21

0001-0015 1P52

CRX-DDC-SDA

PCRX-DDC-SCL

1K0

CRX2CRX1+

9E07

1P50

CRX-DDC-SCL

BIN-5V-EDID

0001-0015

FE74

CRX2+

1P53

B

IE46 1P03

CIN-5V-EDID

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 21

B08F

+5V-EDID

BIN-5V

BAT54

1P05

14

6E26

6E06

IE47

A

13

10K

HDMI

B08F

4

3EB5

3

10n RES

2

100n

1

RES IE41

IE11 9E14

WRITE-PROT

WC-EEPROM-PNX5100

BC847BW 7E19 IE12 IE28

9E12

22K

3EC1

E

CEC-HDMI

E

RES

+5V

1P02

FE71

9E18

AIN-5V-EDID

FE59

IE19 9E16

HDMI 1

1 2 3

0 1 2

SCL ADR

+5V-CON

G

3E68

6

6E23

22R

5

SDA

FE90

47K

IE34 WC

47K 3E60

EDID1 7

10K

3E58

8

Φ

(256x8) EEPROM

EDID NVM

ARX-HOTPLUG

22K

3E92

100n

2E25

IE22

+3V3-STANDBY

3E67 22R

4

DC1R019JBAR190

PARX-DDC-SDA

IE13 7E12 M24C02-WDW6

20 23 22

BC847BW 7E10

F

100n

2E24

1P5A

1P59

ARXCPCEC-HDMI ARX-DDC-SCL ARX-DDC-SDA AIN-5V

IE23

100R

120R

ARX0ARXC+

FE36 FE37

3E91

PCEC-HDMI

5E08

ARX1ARX0+

FE34 FE35

PARX-DDC-SCL

ARX-DDC-SDA

3E59

G

ARX2ARX1+

9E17

ARX-DDC-SCL

1P58

F

ARX2+

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 21

3ED8

HDMI CONNECTOR 1

9E15

BAT54

100R

WRITE-PROT

BIN-5V

CIN-5V

IE65 +5V-EDID

+5V RES IE14

3E57 22R

IE15 7E11 BC847BW RES 2E94

AIN-5V

3E84

HOT-PLUG

H

10K

1P5B

1K0

3E56

H

10n

ARX-HOTPLUG

AIN-5V-EDID

+5V-CON IE45

I

6E03

I

6E29 +5V

AIN-5V

+5V-EDID

AIN-5V

BAT54

BAT54

I_18020_054.eps 200808

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9

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13

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1P02 F1 1P03 A8 1P05 A1 1P50 C9 1P51 B10 1P52 B10 1P53 C2 1P54 B3 1P55 B3 1P56 D4 1P57 D11 1P58 G2 1P59 F3 1P5A F4 1P5B H4 2E10 B5 2E22 B5 2E23 D5 2E24 F5 2E25 F5 2E27 B12 2E28 B12 2E34 D12 2E94 H5 3E40 B5 3E44 B6 3E45 B6 3E48 C6 3E50 C6 3E53 C4 3E54 D3 3E56 H3 3E57 H4 3E58 G5 3E59 G6 3E60 G6 3E67 G6 3E68 G5 3E75 D10 3E84 H6 3E88 C13 3E91 F9 3E92 F9 3E94 C11 3E95 D13 3E96 B13 3E97 B13 3EB4 B12 3EB5 B12 3EC1 E4 3EC2 B5 3ED8 G9 5E07 A5 5E08 F5 5E09 A12 6E03 I2 6E06 A4 6E23 G12 6E26 A12 6E29 I5 7E08 B11 7E09 D12 7E10 F9 7E11 H5 7E12 G4 7E19 E5 7E20 C5 7E21 B4 9E04 C12 9E07 A6 9E11 A6 9E12 E10 9E13 C5 9E14 D5 9E15 H6 9E16 F10 9E17 F6 9E18 F6 9E19 A13 9E20 A13 FE30 B1 FE31 B1 FE32 B1 FE33 B1 FE34 G1 FE35 G1 FE36 G1 FE37 G1 FE48 C8 FE49 B9 FE50 B9 FE51 B8 FE53 B8 FE54 B8 FE59 G1 FE71 G1 FE72 B12 FE73 C1 FE74 B1 FE90 G5 FE91 B5 IE03 B4 IE08 C5 IE09 C5 IE11 D5 IE12 E4 IE13 G4 IE14 H5 IE15 H5 IE16 D13 IE17 D12 IE18 C11 IE19 F10

IE22 F9 IE23 F9 IE28 E13 IE29 A12 IE31 B12 IE33 B5 IE34 G5 IE41 D3 IE45 I5 IE46 A12 IE47 A4 IE65 G9

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

113

SSB: HDMI

1

B08G

2

3

4

6

5

7

8

9

HDMI SWITCH

B08G A

A 5E03

FE80 +3V3-DIG

14 15 17 18 20 21 23 24 3E31 2 3 5 6 8 9 11 12

BRXCBRXC+ BRX0BRX0+ BRX1BRX1+ BRX2BRX2+ 2K2

3E32 64 65 67 68 70 71 73 74

CRXCCRXC+ CRX0CRX0+ CRX1CRX1+ CRX2CRX2+ 2K2

3E33 52 53 55 56 58 59 61 62

MPEG-TXCMPEG-TXC+ MPEG-TX0MPEG-TX0+ MPEG-TX1MPEG-TX1+ MPEG-TX2MPEG-TX2+

IN IP IN IP IN IP IN IP IN IP IN IP IN IP IN IP IN IP IN IP IN IP IN IP IN IP IN IP IN IP IN IP

OP0 ON0

A0

OP1 ON1

A1 A2

OP2 ON2

A3

OP3 ON3

B0

COM0 COM1 AUX COM2 COM3

B1 B2 B3

A0 A1 AUX A2 A3

C0 C1

B0 B1 AUX B2 B3

C2 C3

D0

AUX

C0 C1 C2 C3

AUX

D0 D1 D2 D3

D1 D2 D3

1n0

100n

2E04

2E56

1n0

2E54

10u

100n 2E55

1n0

1n0 2E91

100n 2E90

100n 2E89

1n0 2E88

1n0 2E87

1n0 2E86

1n0 2E72

100n 2E71

100n 2E69

100n 2E68

100n 2E67

10u 2E66

2E58

220u 25V

100 48 76 77

1n0

100n 2E93

2E92

100K

3E38

35 41

C

+3V3-DIG

34 33

RXC+ RXC-

37 36

RX0+ RX0-

40 39

RX1+ RX1-

43 42

RX2+ RX2-

+5V

90 89 88 87

D DDC-SCL DDC-SDA

99 98 97 96

PARX-DDC-SCL PARX-DDC-SDA

94 93 92 91

PBRX-DDC-SCL PBRX-DDC-SDA

86 85 84 83

PCRX-DDC-SCL PCRX-DDC-SDA

81 80 79 78

MPEG-DDC-SCLD MPEG-DDC-SDAD

+5V

MPEG-DDC-SCLD MPEG-DDC-SDAD

E

+5V

+5V

4 10 16 25 51 60 66 72

29 95

+5V-MUX

AVEE

DVEE

F

2E57

82

75 63 54 22 13 1

0 PP_PRE 1

OTO OCL EN EQ

3E30

ARXCARXC+ ARX0ARX0+ ARX1ARX1+ ARX2ARX2+ 2K2

PP

FE82

1K0

3EC5

2K2

0 PP_CH 1

3E43

47K

45 46

VTTO

IE95

3EC4

C

SCL I2C SDA

+5V-CON +3V3-ANA

47K

30 31

VTTI

7 19 57 69

RES

100R

0 1 I2C_ADDR 2

3E36

49 50

3E29

Φ

RESET

B

47K

100R SDA-SSB

AMUXVCC

30R

RES

3E28

AVCC

3E37

26 27 28

DVCC

7E13 AD8197AASTZ

47K

IE44 44

SCL-SSB

+3V3-ANA 47 38 32

3E27

100p

2E38

B

E

FE81

5E06 100R

D

2E53

3ED7 10K RES

RESET-SYSTEM

30R

+5V-MUX

+3V3-DIG

+3V3-ANA

+3V3

F IE40

FE85

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3

4

5

6

7

8

9

2E04 A8 2E38 B2 2E53 A6 2E54 A7 2E55 A7 2E56 A8 2E57 B6 2E58 B6 2E66 B6 2E67 B7 2E68 B7 2E69 B7 2E71 B7 2E72 B7 2E86 B8 2E87 B8 2E88 B8 2E89 B8 2E90 B9 2E91 B9 2E92 C7 2E93 C7 3E27 B2 3E28 B2 3E29 C2 3E30 C2 3E31 D2 3E32 E2 3E33 E2 3E36 D5 3E37 D5 3E38 C7 3E43 B6 3EC4 E6 3EC5 E6 3ED7 B2 5E03 A6 5E06 B6 7E13 B4 FE80 A7 FE81 B7 FE82 B7 FE85 F3 IE40 F4 IE44 B2 IE95 B6

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

114

SSB: USB 2.0 1

2

3

4

5

6

7

8

9

10

11

12

USB 2.0

B09A

13

B09A 5N04 30R

A

A

5N03

IN06

100n

2N0F

30R

5N02

IN07

B

100n

100n

+3V3

2N0E

B

2N0D

30R

10K RES

IN03

100n

100n 2N03

CN00

100n

IN0H

RESET-USB20

2N0B

30R 2N0C

3N06

5N01

C +3V3

2N01

100n

100n 2N08

100n 2N07

100n 2N06

100n 2N05

2N04 22u

2N18

2N21

IN09

30R

RES

100n

IN05

IN04

2N02

5N00

22u 6.3V

RESET-ETHERNET

100n

C

IN08

27p

RESET-USB20

75 5 96 97

E

PCI-CLK-USB20_ETH

7 99

4K7 3N05

3N35 +3V3 +3V3 RES

RES

F

PCI-REQ-USB20

PCI-CBE0 PCI-CBE1

48

PCI-GNT-USB20

PCI-CBE2

35

PCI-CBE3

23

PCI-REQ-USB20 PCI-GNT-USB20 PCI-AD22 IRQ-PCI PCI-FRAME PCI-DEVSEL PCI-IRDY

9 8 24 4 36 39 37 42 47 44 45 38 41

10K

3N0B +3V3

60

10K

RES

3N36

IN0D

IRQ-PCI 10K

IN0E

3N0D

100R

USB20-OC1

USB20-OC2

PCI-PAR PCI-PERR PCI-SERR PCI-TRDY PCI-STOP

USB20-OC1

USB20-OC1

33R 3N0C

USB-OC

IN01

3N00

33R

3N07 RES 3N08 +3V3

G

IN0C

11K

78 79 83 85

10K

3N09 +3V3 RES 10K 15K

3N03 15K

USB20-OC2

USB20-OC2

USB20-2-DM USB20-2-DP

USB20-2-DM USB20-2-DP

81

87 88 90 92

100n

2N00

16

2 73

3

86 93

Φ

XTAL 2

PCI HOST CONTROLLER

RST SCL SDA

VREG1V8

PCICLK PME C0 BE0 C1 BE1 C2 BE2 C3 BE3 REQ GNT IDSEL INTA FRAME DEVSEL IRDY CLKRUN PAR PERR SERR TRDY STOP

AD

AD

RREF OC1 PWE1 ATX1 DM1 DP1

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

18 43 58

100n

VCCIO 1

D IN0B

VREG3V3

22u 6.3V 2N0A

74

2N0G

1 2 3V3 1V8 VDDA VAUX AUX

2N20

AUX

12M

1N01

27p

7N00 ISP1564HL

FN00

2N0H

11 25 40 55 71

D

77 98 100

IN00

2N09

IN0A 2N22 100n

70 69 68 67 66 65 63 62 59 57 56 54 53 52 51 50 34 33 31 30 29 28 27 26 22 21 20 15 14 13 12 10

100n PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

E

F

G

OC2 PWE2 ATX2 DM2 DP2

3N04 GNDA

GNDA

1 17 46 61 72 80 82 84 89 91

6 19 32 49 64 76 94 95

GNDD

H 9N02

H

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2

3

4

5

6

7

8

9

10

11

12

13

1N01 D5 2N00 D9 2N01 D9 2N02 C9 2N03 C6 2N04 C6 2N05 C6 2N06 C6 2N07 C6 2N08 C6 2N09 E10 2N0A D9 2N0B C6 2N0C C6 2N0D B6 2N0E B6 2N0F A6 2N0G D5 2N0H D5 2N18 D5 2N20 D9 2N21 C9 2N22 E9 3N00 F5 3N03 G2 3N04 H2 3N05 E6 3N06 C2 3N07 G6 3N08 G3 3N09 G2 3N0B F2 3N0C F2 3N0D F2 3N35 E2 3N36 E2 5N00 C5 5N01 B5 5N02 B5 5N03 A5 5N04 A5 7N00 D7 9N02 H8 CN00 C2 FN00 D6 IN00 D8 IN01 F6 IN03 B7 IN04 C7 IN05 C9 IN06 A7 IN07 B7 IN08 D6 IN09 C8 IN0A E9 IN0B D9 IN0C G6 IN0D E6 IN0E F2 IN0H C2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

115

SSB: Ethernet 1N00 B11 1N02 C8 2N0K D8

2N0L D8 2N0M E3 2N0N H4

2N0P G10 2N0Q G10 2N0R B9

1

2N0S C9 2N0T B10 2N0U B10

2N0V H10 2N0W H10 2N0Y G12

2N0Z G13 2N10 G12 2N11 G12

2

B09B

2N12 G12 2N13 G11 2N14 G12

2N15 G11 2N16 G11 2N17 G11

2N1C H3 3N0F C7 3N0G D3

3N0H C7 3N0J F8 3N0K F8

4

3

3N0L-4 A8 3N0N-1 A9 3N0N-2 A9

3N0L-1 A8 3N0L-2 A9 3N0L-3 A8

5

3N0N-3 A9 3N0N-4 A9 3N0T-1 B9

6

3N0T-2 B9 3N0T-3 C9 3N0T-4 C9

7

ETHERNET

5N06 G10 5N07 H10 6N00 F8

3N0V C8 3N0W E8 3N0Y D1

6N01 F8 7N04-1 B3 7N04-2 H7

8

9N05 D1 9N06 D1 FN05 A10

9

FN06 A10 FN07 B10 FN08 B11

FN09 C11 FN0A E9 FN0B F9

FN0C E3 FN15 B10 IN0K E8

10

IN0L G11 IN0M C7 IN0N H3

IN0V C8 IN0W E8 IN0Y F8

IN0P A9 IN0T C8 IN0U H10

11

12

13

B09B

+3V3-ET-DIG

A

IN0Z F8 IN10 F8

A

58

137

56

33

27

21

9

117

94

107

80

69

47

39

+3V3-ET-ANA

7N04-1 DP83816AVNG

48

RST

MRD

REGE

MWR

129 130 131

1u0

F

PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

121 120 119 118 116 115 113 112 110 109 108 106 105 104 102 101 88 87 86 83 82 81 79 78 74 73 72 71 70 68 67 66

0 1 2 3

CMD/ BE

132 133 134 135 138 139 140 141

0 CFGDIS

0 EEDO MD 7

142 143 144 1 2 3 7 10 11 12 14 15 22 23 24 25

LEDACT LED10LNK LED100LNK EEDI EECLK MA5 0 1 RXD 2 3 RXER RXDV 0 1 TXD 2 3

AD DATA

IN0K

E

3N0W 1K0

IN0W

3N0J

IN0Y

270R 6N00

IN0Z

BAS316 6N01

FN0A

3N0K IN10

BAS316

ETH-ACT

FN0B

ETH-LINK

F

220R

IN0L

5N06 +3V3

MA

+3V3-ET-DIG 220R

41 50

RESERVED

127

G

31 VSS

C1

G

111 100 89 75

1

E

PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3

128

EESEL

100n

+3V3-ET-ANA

MCS

D

2N0Z

2N0M FN0C

10K

REQ

13 30

100n

62

TXE

2N0Y

64

RESET-ETHERNET

RXOE

DEVSEL

100n

PCI-REQ-ETHERNET

IDSEL

31

2N11

95

TXCLK

100n

RESET-ETHERNET

100R

STOP

DSX840GA 25M

4 6

2N10

PCI-REQ-ETHERNET 3N0Y

76

RXCLK

100n

9N06 +3V3-ET-DIG

PCI-DEVSEL

3N0G

GNT

2N14 100n

PCI-AD23 PCI-REQ-PNX85XX

96

PCI-STOP

MDC MDIO

FRAME

1M0 1N02

5

2N12

63

SERR

29

2N13 100n

PCI-GNT-ETHERNET

CRS

3N0V

2N15 100n

91

PERR

C

IN0M

2N16 100n

PCI-FRAME

COL

28

2N17 100n

PCI-SERR

TRDY

470R

40

VREF

IN0T

2

97 98

18

X2

IRDY

3N0F

4u7 6.3V

PCI-PERR

IN0V 17

X1

PAR

ETH-RDM

136

NC6 NC7 NC8 NC9 NC10

2N0V

NC1 NC2 NC3 NC4 NC5

+3V3-ET-ANA 220R

84 85 124 125 126

H

1

114

103

90

77

65

57

55

52

51

49

44

38

35

32

26

20

16

8

IN0U

+3V3 7N04-2 DP83816AVNG 34 36 37 42 43

100n

2N0N

2N1C

10u 16V

H

19

5N07 IN0N

100n

93

PCICLK

ETH-RDP

45

100n 2N0P

PCI-TRDY

TPRDM

ETH-TDM

46

4u7 2N0W

92

INTA

53

2N0Q

99

PCI-IRDY

TPRDP

2

PCI-GNT-PNX85XX

D

PCI-PAR

TPTDM

3VAUX

ETH-TDP

22p

PCI-GNT-ETHERNET

60

PWRGOOD

54

2N0K

9N05

PCI-CLK-USB20_ETH

TPTDP

2N0L

C

61

B

AUXVDD

MacPhyter II 10/100 Mb/s

10K

123 122 IRQ-PCI

PCIVDD

PMEM CLKRUN

3N0H

IAUXVDD

59

22p

B

I_18020_057.eps 200808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

116

SSB: Buffering

1

B09C

2

3

4

6

5

7

8

BUFFERING

B09C +3V3

18 16 14 12

PCMCIA-A7 PCMCIA-A6 PCMCIA-A5 PCMCIA-A4

IN34 CA-DATADIR

10

IN35

CA-CE1 CA-CE2 CA-OE CA-WE

10

18 16 14 12

20

PCI-AD26

17 16 15 14 13 12 11

PCI-AD25 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31 PCI-AD24

B

2N32

CA-ADDEN

7N12-1 74LVC244APW 1

PCI-AD14 PCI-AD13 PCI-AD12 PCI-AD11

2 4 6 8

3 5 7 9

CA-IOWR CA-IORD CA-REG PCI-AD18

CA-ADDEN

7N12-2 74LVC244APW 19

C

100n

EN 18 16 14 12

PCMCIA-A14 PCMCIA-A13 PCMCIA-A12 PCMCIA-A11

3 5 7 9

PCMCIA-A8 PCMCIA-A9 PCMCIA-A10

+3V3

10

D

PCMCIA-A0 PCMCIA-A1 PCMCIA-A2 PCMCIA-A3

18

+3V3

EN

17 15 13 11

PCI-AD23 PCI-AD22 PCI-AD19 CA-WAIT

3 4 5 6 7 8 9

1 2

10

CA-ADDEN

20

+3V3 7N10-2 74LVC244APW 19

2

10

100n

2N30

EN

2 4 6 8

C

PCMCIA-D2

3EN1 3EN2 G3

10

1

20

7N10-1 74LVC244APW

3 5 7 9

20

PCI-AD17 PCI-AD16 PCI-CBE2 PCI-CBE1

IN30

EN

17 15 13 11

PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3

19

3N33

D

EN

17 15 13 11

PCI-AD8 PCI-AD9 PCI-AD10 IN32

10

10K

20

CA-ADDEN

10K

3N30

B

7N11-2 74LVC244APW 19

CA-ADDEN

CA-DATAEN

PCMCIA-D1 PCMCIA-D3 PCMCIA-D4 PCMCIA-D5 PCMCIA-D6 PCMCIA-D7 PCMCIA-D0

+3V3 +3V3

7N13 74LVC245A 1

100n

2 4 6 8

PCI-AD7 PCI-AD6 PCI-AD5 PCI-AD4

A

EN

2N33

CA-ADDEN

+3V3

100n

20

A

7N11-1 74LVC244APW 1

20

2N31

E

E

I_18020_058.eps 200808

3104 313 6304.3

1

2

3

4

5

6

7

8

2N30 B3 2N31 A5 2N32 C5 2N33 A8 3N30 B1 3N33 D4 7N10-1 B2 7N10-2 C2 7N11-1 A4 7N11-2 B4 7N12-1 C4 7N12-2 D4 7N13 A7 IN30 B1 IN32 D4 IN34 A7 IN35 A7

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

117

SSB: SRP List Explanation Example Net Name

Diagram

+12-15V AP1 (4x) +12-15V AP4 (4x) +12-15V AP5 (12x) +12-15V AP6 (4x) +12-15V AP7 (8x) +12V AP1 (4x) +12V_NF AP1 (2x) +12VAL AP1 (2x) +25VLP AP1 (4x) +25VLP AP2 (1x) +3V3-STANDBY AP5 (3x) +400V-F AP1 (2x) +400V-F AP2 (2x) +400V-F AP3 (2x) +5V2 AP1 (6x) +5V2 AP2 (1x) +5V2-NF AP1 (1x) +5V2-NF AP2 (1x) +5V-SW AP1 (6x) +5V-SW AP2 (1x) +8V6 AP1 (3x) +AUX AP1 (2x) +AUX AP2 (1x) +DC-F AP1 (2x) +DC-F AP3 (2x) +SUB-SPEAKER AP5 (1x) +SUB-SPEAKER AP6 (2x) -12-15V AP1 (4x) -12-15V AP4 (6x) -12-15V AP5 (14x) -12-15V AP6 (6x) -12-15V AP7 (8x) AL-OFF AP1 (2x) AUDIO-L AP4 (1x) AUDIO-L AP5 (1x) AUDIO-PROT AP5 (3x) AUDIO-R AP4 (1x) AUDIO-R AP5 (1x) AUDIO-SW AP5 (1x) AUDIO-SW AP7 (1x) BOOST AP1 (2x) CPROT AP4 (2x) CPROT AP5 (1x) CPROT-SW AP5 (1x) CPROT-SW AP6 (2x) -DC-F AP1 (2x) -DC-F AP3 (2x) DC-PROT AP1 (1x) DC-PROT AP5 (2x) DIM-CONTROL AP1 (2x) FEEDBACK+SW AP6 (2x) FEEDBACK-L AP4 (2x) FEEDBACK-R AP4 (2x) FEEDBACK-SW AP6 (2x) GND-AL AP1 (2x) GNDHA AP1 (40x) GNDHA AP2 (20x) GNDHA AP3 (2x) GNDHOT AP3 (2x) GND-L AP1 (2x) GND-L AP4 (4x) GND-L AP5 (34x) GND-LL AP4 (7x) GND-LL AP5 (1x) GND-LR AP4 (7x) GND-LR AP5 (1x) GND-LSW AP5 (1x) GND-LSW AP6 (15x) GND-S AP1 (11x) GND-SA AP4 (8x) GND-SA AP5 (2x) GND-SA AP6 (8x) GND-SA AP7 (6x) GNDscrew AP3 (2x) GNDscrew AP5 (2x) GND-SSB AP5 (3x) GND-SSP AP1 (51x) GND-SSP AP2 (15x) IN+SW AP6 (2x) IN-L AP4 (2x) IN-R AP4 (2x) IN-SW AP6 (2x) INV-MUTE AP4 (1x) INV-MUTE AP5 (1x) INV-MUTE AP6 (1x) LEFT-SPEAKER AP4 (1x) LEFT-SPEAKER AP5 (1x) MUTE AP4 (2x) MUTE AP5 (1x) MUTE AP6 (2x) ON-OFF AP1 (3x) OUT AP6 (1x) OUT AP7 (2x) OUTN AP6 (1x) OUTN AP7 (1x) POWER-GOOD AP1 (2x) POWER-OK-PLATFORM AP1 (2x) RIGHT-SPEAKER AP4 (1x) RIGHT-SPEAKER AP5 (1x) SOUND-ENABLE AP5 (3x) STANDBY AP1 (5x) STANDBY AP2 (1x) -SUB-SPEAKER AP5 (1x) -SUB-SPEAKER AP6 (2x) V-CLAMP AP1 (1x) V-CLAMP AP3 (2x)

1.1.

Personal Notes:

Introduction SRP (Service Reference Protocol) is a software tool that creates a list with all references to signal lines. The list contains references to the signals within all schematics of a PWB. It replaces the text references currently printed next to the signal names in the schematics. These printed references are created manually and are therefore not guaranteed to be 100% correct. In addition, in the current crowded schematics there is often none or very little place for these references. Some of the PWB schematics will use SRP while others will still use the manual references. Either there will be an SRP reference list for a schematic, or there will be printed references in the schematic.

1.2.

Non-SRP Schematics There are several different signals available in a schematic:

1.2.1.

Power Supply Lines All power supply lines are available in the supply line overview (see chapter 6). In the schematics (see chapter 7) is not indicated where supplies are coming from or going to. It is however indicated if a supply is incoming (created elsewhere), or outgoing (created or adapted in the current schematic). +5V

Outgoing 1.2.2.

+5V

Incoming

Normal Signals For normal signals, a schematic reference (e.g. B14b) is placed next to the signals. B14b

1.2.3.

signal_name

Grounds For normal and special grounds (e.g. GNDHOT or GND3V3 etc.), nothing is indicated.

1.3.

SRP Schematics SRP is a tool, which automatically creates a list with signal references, indicating on which schematic the signals are used. A reference is created for all signals indicated with an SRP symbol, these symbols are: +5V

name

name

+5V

Power supply line.

name

Stand alone signal or switching line (used as less as possible). name

Signal line into a wire tree. name

name

Switching line into a wire tree. name

Bi-directional line (e.g. SDA) into a wire tree. name

Signal line into a wire tree, its direction depends on the circuit (e.g. ingoing for PDP, outgoing for LCD sets). Remarks: • When there is a black dot on the "signal direction arrow" it is an SRP symbol, so there will be a reference to the signal name in the SRP list. • All references to normal grounds (Ground symbols without additional text) are not listed in the reference list, this to keep it concise. • Signals that are not used in multiple schematics, but only once or several times in the same schematic, are included in the SRP reference list, but only with one reference. Additional Tip: When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adobe PDF reader: • Select the signal name you want to search for, with the "Select text" tool. • Copy and paste the signal name in the "Search PDF" tool. • Search for all occurrences of the signal name. • Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to "zoom in" to e.g. 150% to see clearly, which text is selected. Then you can zoom out, to get an overview of the complete schematic. PS. It is recommended to use at least Adobe PDF (reader) version 6.x, due to better search possibilities in this version. E_06532_031.eps 230606

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

118

SSB: SRP List Part 1 Netname

Diagram

+12V +12V +12V +12V +12V +12V +12V +12V +12V +12V +12V +12VF +12VF +12VF +12VFF +1V +1V +1V2DVB +1V2-PNX5100 +1V2-PNX5100 +1V2-PNX5100 +1V2-PNX5100-CLOCK +1V2-PNX5100-DDR-PLL1 +1V2-PNX5100-DLL +1V2-PNX5100-LVDS-PLL +1V2-PNX5100-TRI-PLL1 +1V2-PNX5100-TRI-PLL2 +1V2-PNX5100-TRI-PLL3 +1V2-PNX8541 +1V2-PNX8541 +1V2-PNX8541 +1V2-PNX8541 +1V2-PNX8541 +1V2-PNX8541 +1V2-STANDBY +1V2-STANDBY +1V2-STANDBY +1V8DVBC +1V8-PNX5100 +1V8-PNX5100 +1V8-PNX5100 +1V8-PNX8541 +1V8-PNX8541 +1V8-PNX8541 +1VTMDS +2V5 +2V5 +2V5 +2V5 +2V5-CLKGENA +2V5-REF +33VTUN +33VTUN +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3-ANA +3V3-DIG +3V3DVB +3V3DVBC +3V3-ET-ANA +3V3-ET-ANA +3V3-ET-DIG +3V3-ET-LED +3V3F +3V3F +3V3F +3V3-NAND +3V3-PER +3V3-PER +3V3-PER +3V3-PNX5100-CLOCK +3V3-PNX5100-DDR-PLL0 +3V3-PNX5100-LVDS-IN +3V3-PNX5100-LVDS-PLL +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +3V3TMDS +3V3TMDS +4V-STANDBY +4V-STANDBY +5V +5V +5V +5V +5V +5V +5V +5V +5V +5V +5V5-TUN +5V5-TUN +5V-CON +5V-CON +5V-EDID +5V-MUX +5V-TUN +5V-TUN +5V-TUN +VCC-LM +VDISP1 +VDISP1 +VDISP2 +VDISP2 +VTUN 27MHZ-3V3 2V5-LMI 2V5-LMI 3V3-ST 3V3-ST 4-MHz 4-MHz ADAC(1)

B01A B01B B04C B04G B04I B04M B05G B05H B08A B08B B08E B01A B01B B01C B01C B01B B03E B02A B01C B04A B05C B05C B05C B05C B05C B05C B05C B05C B01A B01B B02A B04A B04E B04P B01A B01B B04P B02C B05A B05C B08D B04G B04P B08D B03E B01B B03A B03C B03E B03E B01B B01B B02B B01A B01D B02A B02B B02C B03A B03B B03E B03G B03H B04A B04L B04M B04P B04Q B05C B05E B05F B05G B05H B05I B08A B08D B08G B09A B09B B09C B08G B08G B02A B02C B03F B09B B09B B03F B01A B01B B04G B04Q B04C B04E B04P B05C B05C B05C B05C B01B B01D B04A B04D B04P B08D B08F B03D B03E B01B B05E B01C B01D B03F B04A B04L B05E B08A B08B B08F B08G B01C B04C B08F B08G B08F B08G B02A B02B B04C B01B B05E B05H B05E B05H B02B B03A (2x) B03C (6x) B03E (2x) B01A (1x) B01B (1x) B02A (1x) B02B (2x) B04L (1x)

3104 313 6304.3

ADAC(2) ADAC(3) ADAC(3) ADAC(4) ADAC(4) ADAC(5) ADAC(5) ADAC(6) ADAC(6) ADAC(7) ADAC(7) ADAC(8) ADAC(8) AGC-COMP AIN-5V AIN-5V-EDID ALE A-PLOP A-PLOP AP-SCART-OUT-L AP-SCART-OUT-R ARX0ARX0ARX0+ ARX0+ ARX1ARX1ARX1+ ARX1+ ARX2ARX2ARX2+ ARX2+ ARXCARXCARXC+ ARXC+ ARX-DDC-SCL ARX-DDC-SDA ARX-HOTPLUG ASEBRKn ASEBRKn AUDIO-CLK AUDIO-CLK AUDIO-CL-L AUDIO-CL-L AUDIO-CL-R AUDIO-CL-R AUDIO-HDPH-L-AP AUDIO-HDPH-L-AP AUDIO-HDPH-R-AP AUDIO-HDPH-R-AP AUDIO-IN1-L AUDIO-IN1-L AUDIO-IN1-R AUDIO-IN1-R AUDIO-IN2-L AUDIO-IN2-L AUDIO-IN2-R AUDIO-IN2-R AUDIO-IN3-L AUDIO-IN3-L AUDIO-IN3-R AUDIO-IN3-R AUDIO-IN4-L AUDIO-IN4-L AUDIO-IN4-R AUDIO-IN4-R AUDIO-IN5-L AUDIO-IN5-L AUDIO-IN5-R AUDIO-IN5-R AUDIO-MCK AUDIO-MCK AUDIO-OUT-L AUDIO-OUT-L AUDIO-OUT-R AUDIO-OUT-R AUDIO-SDO AUDIO-SDO AUDIO-VDD AUDIO-WS AUDIO-WS AV1-BLK AV1-BLK AV1-PB AV1-PB AV1-PR AV1-PR AV1-STATUS AV1-STATUS AV1-Y AV1-Y AV1-Y_CVBS AV1-Y_CVBS AV2-BLK AV2-BLK AV2-C AV2-STATUS AV2-STATUS AV2-Y_CVBS AV2-Y_CVBS AV3-PB AV3-PB AV3-PR AV3-PR AV3-Y AV3-Y BACKLIGHT-BOOST BACKLIGHT-CTRL BACKLIGHT-OUT BACKLIGHT-OUT BACKLIGHT-PWM-ANA-SSB BIN-5V BIN-5V-EDID BOLT-ON-IO BOOST-CTRL BOOTMODE BRX0BRX0BRX0+ BRX0+ BRX1BRX1BRX1+ BRX1+ BRX2BRX2BRX2+ BRX2+ BRXCBRXCBRXC+ BRXC+ BRX-DDC-SCL BRX-DDC-SDA BRX-HOTPLUG BUF-RST-TARGETn BUF-RST-TARGETn B-VGA B-VGA B-VGA CA-ADDEN CA-ADDEN CA-CD1 CA-CD1

B04L (1x) B04L (1x) B04M (1x) B04L (1x) B04M (1x) B04I (1x) B04L (1x) B04I (1x) B04L (1x) B04I (1x) B04L (3x) B04I (1x) B04L (3x) B02A (2x) B08F (4x) B08F (2x) B04A (2x) B04M (1x) B08A (3x) B08A (3x) B08A (3x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (2x) B08F (2x) B08F (2x) B03A (1x) B03G (1x) B04L (1x) B05E (1x) B04I (1x) B08A (1x) B04I (1x) B08A (1x) B04M (1x) B08B (1x) B04M (1x) B08B (1x) B04L (1x) B08A (1x) B04L (1x) B08A (1x) B04L (1x) B08A (1x) B04L (1x) B08A (1x) B04L (1x) B08A (1x) B04L (1x) B08A (1x) B04L (1x) B08E (1x) B04L (1x) B08E (1x) B04L (1x) B08B (1x) B04L (1x) B08B (1x) B04L (1x) B05E (1x) B04I (1x) B08A (1x) B04I (1x) B08A (1x) B04L (1x) B05E (1x) B04I (5x) B04L (1x) B05E (1x) B04A (1x) B08A (1x) B04K (1x) B08A (1x) B04K (1x) B08A (1x) B04A (1x) B08A (1x) B04K (1x) B08A (1x) B04K (1x) B08A (1x) B04A (1x) B08A (1x) B04K (1x) B04A (1x) B08A (1x) B04K (1x) B08A (1x) B04K (1x) B08A (1x) B04K (1x) B08A (1x) B04K (1x) B08A (1x) B05H (1x) B05H (2x) B05E (1x) B05H (1x) B05H (2x) B08F (4x) B08F (2x) B04A (2x) B05H (3x) B04E (2x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (2x) B08F (2x) B08F (2x) B03A (1x) B03G (1x) B04K (1x) B08A (1x) B08B (1x) B04N (1x) B09C (6x) B03H (2x) B04N (1x)

CA-CD2 CA-CD2 CA-CE1 CA-CE1 CA-CE2 CA-CE2 CA-DATADIR CA-DATADIR CA-DATAEN CA-DATAEN CA-INPACK CA-IORD CA-IORD CA-IOWR CA-IOWR CA-MDI0 CA-MDI0 CA-MDI0 CA-MDI1 CA-MDI1 CA-MDI1 CA-MDI2 CA-MDI2 CA-MDI2 CA-MDI3 CA-MDI3 CA-MDI3 CA-MDI4 CA-MDI4 CA-MDI4 CA-MDI5 CA-MDI5 CA-MDI5 CA-MDI6 CA-MDI6 CA-MDI6 CA-MDI7 CA-MDI7 CA-MDI7 CA-MDO0 CA-MDO0 CA-MDO0 CA-MDO1 CA-MDO1 CA-MDO1 CA-MDO2 CA-MDO2 CA-MDO2 CA-MDO3 CA-MDO3 CA-MDO3 CA-MDO4 CA-MDO4 CA-MDO4 CA-MDO5 CA-MDO5 CA-MDO5 CA-MDO6 CA-MDO6 CA-MDO6 CA-MDO7 CA-MDO7 CA-MDO7 CA-MICLK CA-MICLK CA-MICLK CA-MISTRT CA-MISTRT CA-MISTRT CA-MIVAL CA-MIVAL CA-MIVAL CA-MOCLK_VS2 CA-MOCLK_VS2 CA-MOCLK_VS2 CA-MOSTRT CA-MOSTRT CA-MOSTRT CA-MOVAL CA-MOVAL CA-MOVAL CA-OE CA-OE CA-REG CA-REG CA-RST CA-RST CA-VS1 CA-VS1 CA-WAIT CA-WAIT CA-WE CA-WE CEC-HDMI CEC-HDMI CEC-HDMI CIN-5V CIN-5V-EDID CONTRAST-GAIN CPU-27MHZ CRX0CRX0CRX0+ CRX0+ CRX1CRX1CRX1+ CRX1+ CRX2CRX2CRX2+ CRX2+ CRXCCRXCCRXC+ CRXC+ CRX-DDC-SCL CRX-DDC-SDA CRX-HOTPLUG CTRL1-PNX5100 CTRL2-PNX5100 CTRL3-PNX5100 CTRL4-PNX5100 CTRL-DISP1 CTRL-DISP1 CTRL-DISP2 CTRL-DISP2 CTRL-DISP3 CTRL-DISP3 CTRL-DISP4 CTRL-DISP4 CVBS4 CVBS4 CVBS-OUT-SC1 CVBS-TER-OUT CVBS-TER-OUT DDC-SCL DDC-SCL DDC-SDA DDC-SDA DDR2-A0 DDR2-A1 DDR2-A10 DDR2-A11 DDR2-A12 DDR2-A2

B03H (2x) B04N (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B04N (1x) B09C (1x) B04N (1x) B09C (1x) B03H (2x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (1x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03A (1x) B03H (2x) B04N (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B04N (1x) B03H (2x) B04N (1x) B03H (2x) B09C (1x) B03H (1x) B09C (1x) B04A (2x) B04H (1x) B08F (1x) B08F (4x) B08F (2x) B05H (1x) B03A (2x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (2x) B08F (2x) B08F (2x) B05H (2x) B05H (2x) B05H (2x) B05H (2x) B05E (1x) B05H (1x) B05E (1x) B05H (1x) B05E (1x) B05H (1x) B05E (1x) B05H (1x) B02B (1x) B04K (1x) B08A (2x) B02B (1x) B08A (1x) B04H (1x) B08G (1x) B04H (1x) B08G (1x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x)

DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-BA0 DDR2-BA1 DDR2-CAS DDR2-CKE DDR2-CLK_N DDR2-CLK_P DDR2-CS DDR2-D0 DDR2-D1 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16 DDR2-D17 DDR2-D18 DDR2-D19 DDR2-D2 DDR2-D20 DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D25 DDR2-D26 DDR2-D27 DDR2-D28 DDR2-D29 DDR2-D3 DDR2-D30 DDR2-D31 DDR2-D4 DDR2-D5 DDR2-D6 DDR2-D7 DDR2-D8 DDR2-D9 DDR2-DQM0 DDR2-DQM1 DDR2-DQM2 DDR2-DQM3 DDR2-DQS0_N DDR2-DQS0_P DDR2-DQS1_N DDR2-DQS1_P DDR2-DQS2_N DDR2-DQS2_P DDR2-DQS3_N DDR2-DQS3_P DDR2-ODT DDR2-RAS DDR2-VREF-CTRL DDR2-VREF-DDR DDR2-WE DETECT1 DETECT-12V DETECT-12V DETECT2 DIF-N DIF-N DIF-P DIF-P DV-B4_UV0 DV-B4_UV0 DV-B5_UV1 DV-B5_UV1 DV-B6_Y0 DV-B6_Y0 DV-B7_Y1 DV-B7_Y1 DV-CLK DV-CLK DV-FF_DE DV-FF_DE DV-G0_UV2 DV-G0_UV2 DV-G1_UV3 DV-G1_UV3 DV-G2_UV4 DV-G2_UV4 DV-G3_UV5 DV-G3_UV5 DV-G4_UV6 DV-G4_UV6 DV-G5_UV7 DV-G5_UV7 DV-G6_UV8 DV-G6_UV8 DV-G7_UV9 DV-G7_UV9 DV-HS DV-HS DV-R0_Y2 DV-R0_Y2 DV-R1_Y3 DV-R1_Y3 DV-R2_Y4 DV-R2_Y4 DV-R3_Y5 DV-R3_Y5 DV-R4_Y6 DV-R4_Y6 DV-R5_Y7 DV-R5_Y7 DV-R6_Y8 DV-R6_Y8 DV-R7_Y9 DV-R7_Y9 DV-VS DV-VS EA EJTAG-DETECT EJTAG-DETECT EJTAG-PNX5100-TCK EJTAG-PNX5100-TCK EJTAG-PNX5100-TDI EJTAG-PNX5100-TDI EJTAG-PNX5100-TDO EJTAG-PNX5100-TDO EJTAG-PNX5100-TMS EJTAG-PNX5100-TMS EJTAG-PNX5100-TRSTn EJTAG-PNX5100-TRSTn EJTAG-TCK EJTAG-TCK EJTAG-TDI EJTAG-TDI EJTAG-TDO EJTAG-TDO EJTAG-TMS EJTAG-TMS EJTAG-TRSTN EJTAG-TRSTN EMI-A1 EMI-A1 EMI-A10 EMI-A10

B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (4x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (2x) B04G (4x) B04G (4x) B04G (2x) B04G (3x) B04G (4x) B04A (3x) B01B (1x) B04A (1x) B04A (3x) B02B (1x) B02C (1x) B02B (1x) B02C (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04O (1x) B05B (1x) B04A (2x) B04A (2x) B08D (1x) B05F (1x) B05I (1x) B05F (1x) B05I (1x) B05F (1x) B05I (1x) B05F (1x) B05I (1x) B05F (1x) B05I (1x) B04E (1x) B08D (1x) B04E (1x) B08D (3x) B04E (1x) B08D (1x) B04E (1x) B08D (2x) B04E (1x) B08D (2x) B03A (1x) B03B (2x) B03A (1x) B03B (2x)

EMI-A11 EMI-A12 EMI-A12 EMI-A13 EMI-A13 EMI-A14 EMI-A14 EMI-A15 EMI-A15 EMI-A16 EMI-A17 EMI-A18 EMI-A19 EMI-A2 EMI-A2 EMI-A20 EMI-A21 EMI-A22 EMI-A3 EMI-A3 EMI-A4 EMI-A4 EMI-A5 EMI-A5 EMI-A6 EMI-A6 EMI-A7 EMI-A7 EMI-A8 EMI-A8 EMI-A9 EMI-A9 EMI-D0 EMI-D1 EMI-D10 EMI-D11 EMI-D12 EMI-D13 EMI-D14 EMI-D15 EMI-D2 EMI-D3 EMI-D4 EMI-D5 EMI-D6 EMI-D7 EMI-D8 EMI-D9 EMI-FLASH-CSn EMI-OEn EMI-RB-WAIT EMI-WRn ENABLE-1V2 ENABLE-1V2 ENABLE-1V2 ENABLE-3V3 ENABLE-3V3 ENABLE-3V3 ETH-RDM ETH-RDM ETH-RDP ETH-RDP ETH-TDM ETH-TDM ETH-TDP ETH-TDP FAN1-DRV FAN1-OUT FE-CLK FE-CLK FE-CLK FE-DATA0 FE-DATA0 FE-DATA0 FE-DATA1 FE-DATA1 FE-DATA1 FE-DATA2 FE-DATA2 FE-DATA2 FE-DATA3 FE-DATA3 FE-DATA3 FE-DATA4 FE-DATA4 FE-DATA4 FE-DATA5 FE-DATA5 FE-DATA5 FE-DATA6 FE-DATA6 FE-DATA6 FE-DATA7 FE-DATA7 FE-DATA7 FE-ERR FE-ERR FE-SOP FE-SOP FE-SOP FE-VALID FE-VALID FE-VALID FRONT-C FRONT-Y_CVBS FRONT-Y_CVBS GND-SIG GND-SIG1 G-VGA G-VGA G-VGA HOT-PLUG HOT-PLUG H-SYNC-VGA H-SYNC-VGA IF-FILTN1 IF-FILTN2 IF-FILTN3 IF-FILTP1 IF-FILTP2 IF-FILTP3 IF-N IF-N IF-N IF-N IF-P IF-P IF-P IF-P IRQ-CA IRQ-CA IRQ-PCI IRQ-PCI IRQ-PCI JTAG-TCK-ST JTAG-TCK-ST JTAG-TCK-TDA10023 JTAG-TCK-TDA10048 JTAG-TDI-ST JTAG-TDI-ST JTAG-TDI-TDA10023 JTAG-TDI-TDA10048 JTAG-TDO-ST JTAG-TDO-ST JTAG-TDO-TDA10023 JTAG-TDO-TDA10048

B03B (2x) B03A (1x) B03B (2x) B03A (1x) B03B (2x) B03A (2x) B03B (2x) B03A (1x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03A (1x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03A (1x) B03B (2x) B03A (1x) B03B (2x) B03A (1x) B03B (2x) B03A (1x) B03B (2x) B03A (1x) B03B (2x) B03A (1x) B03B (2x) B03A (1x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (2x) B03B (3x) B03B (3x) B03B (1x) B03B (2x) B01A (1x) B01C (1x) B04A (2x) B01A (1x) B01C (1x) B04A (2x) B03F (1x) B09B (1x) B03F (1x) B09B (1x) B03F (1x) B09B (1x) B03F (1x) B09B (1x) B05G (2x) B05G (2x) B02A (1x) B02C (1x) B04N (1x) B02A (1x) B02C (2x) B04N (1x) B02A (1x) B02C (2x) B04N (1x) B02A (1x) B02C (2x) B04N (1x) B02A (1x) B02C (2x) B04N (1x) B02A (1x) B02C (2x) B04N (1x) B02A (1x) B02C (2x) B04N (1x) B02A (1x) B02C (2x) B04N (1x) B02A (1x) B02C (2x) B04N (1x) B02A (1x) B04N (2x) B02A (1x) B02C (1x) B04N (1x) B02A (1x) B02C (1x) B04N (1x) B04K (1x) B04K (1x) B08B (1x) B01A (14x) B01C (14x) B04K (1x) B08A (1x) B08B (1x) B04H (1x) B08F (3x) B04K (1x) B08B (1x) B02B (2x) B02B (2x) B02B (2x) B02B (2x) B02B (2x) B02B (2x) B02A (1x) B02B (1x) B02C (1x) B04K (1x) B02A (1x) B02B (1x) B02C (1x) B04K (1x) B03H (2x) B04E (2x) B04E (2x) B09A (2x) B09B (1x) B03A (2x) B03G (1x) B02C (1x) B02A (1x) B03A (2x) B03G (1x) B02C (1x) B02A (1x) B03A (2x) B03G (1x) B02C (1x) B02A (1x)

JTAG-TMS-ST JTAG-TMS-ST JTAG-TMS-TDA10023 JTAG-TMS-TDA10048 JTAG-TRSTn-ST JTAG-TRSTn-ST JTAG-TRST-TDA10023 JTAG-TRST-TDA10048 KEYBOARD KEYBOARD LCD-PWR-ON LED1 LED1 LED2 LED2 LIGHT-SENSOR LIGHT-SENSOR

B03A (2x) B03G (1x) B02C (1x) B02A (1x) B03A (2x) B03G (1x) B02C (1x) B02A (1x) B01D (1x) B04A (2x) B05H (2x) B01D (1x) B04A (2x) B01D (1x) B04A (2x) B01D (1x) B04A (1x)

I_18020_121.eps 120908

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

119

SSB: SRP List Part 2 Netname

Diagram

LMI-A(0) LMI-A(1) LMI-A(10) LMI-A(11) LMI-A(12) LMI-A(2) LMI-A(3) LMI-A(4) LMI-A(5) LMI-A(6) LMI-A(7) LMI-A(8) LMI-A(9) LMI-BA0 LMI-BA1 LMI-CASnot LMI-CLK LMI-CLKEN LMI-CLKnot LMI-CSnot LMI-D(0) LMI-D(1) LMI-D(10) LMI-D(11) LMI-D(12) LMI-D(13) LMI-D(14) LMI-D(15) LMI-D(16) LMI-D(17) LMI-D(18) LMI-D(19) LMI-D(2) LMI-D(20) LMI-D(21) LMI-D(22) LMI-D(23) LMI-D(24) LMI-D(25) LMI-D(26) LMI-D(27) LMI-D(28) LMI-D(29) LMI-D(3) LMI-D(30) LMI-D(31) LMI-D(4) LMI-D(5) LMI-D(6) LMI-D(7) LMI-D(8) LMI-D(9) LMI-DQM0 LMI-DQM1 LMI-DQM2 LMI-DQM3 LMI-DQS0 LMI-DQS1 LMI-DQS2 LMI-DQS3 LMI-RASnot LMI-VREF LMI-VREF2-ST LMI-VREF-ST LMI-WEnot MDO0 MDO1 MDO2 MDO3 MDO4 MDO5 MDO6 MDO7 MOCLK_VS2 MOSTRT MOVAL MPEG-DDC-SCLD MPEG-DDC-SDAD MPEG-TX0MPEG-TX0MPEG-TX0+ MPEG-TX0+ MPEG-TX1MPEG-TX1MPEG-TX1+ MPEG-TX1+ MPEG-TX2MPEG-TX2MPEG-TX2+ MPEG-TX2+ MPEG-TXCMPEG-TXCMPEG-TXC+ MPEG-TXC+ NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7) NAND-ALE NAND-CLE NAND-REn NAND-WEn P0.4 P0.7 P2.0 P2.2 PARX-DDC-SCL PARX-DDC-SCL PARX-DDC-SDA PARX-DDC-SDA PBRX-DDC-SCL PBRX-DDC-SCL PBRX-DDC-SDA PBRX-DDC-SDA PCEC-HDMI PCI-AD0 PCI-AD0 PCI-AD0 PCI-AD0 PCI-AD0 PCI-AD0 PCI-AD1 PCI-AD1 PCI-AD1 PCI-AD1 PCI-AD1 PCI-AD1 PCI-AD10 PCI-AD10

B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (3x) B03C (4x) B03C (3x) B03C (4x) B03C (3x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (2x) B03C (3x) B03C (2x) B03C (2x) B03C (2x) B03C (3x) B03H (4x) B03H (4x) B03H (4x) B03H (4x) B03H (4x) B03H (4x) B03H (4x) B03H (4x) B03H (4x) B03H (4x) B03H (4x) B08G (1x) B08G (1x) B03D (1x) B08G (1x) B03D (1x) B08G (1x) B03D (1x) B08G (1x) B03D (1x) B08G (1x) B03D (1x) B08G (1x) B03D (1x) B08G (1x) B03D (1x) B08G (1x) B03D (1x) B08G (1x) B04Q (2x) B04Q (2x) B04Q (2x) B04Q (2x) B04Q (2x) B04Q (2x) B04Q (2x) B04Q (2x) B04Q (2x) B04Q (2x) B04Q (2x) B04Q (2x) B04A (2x) B04A (2x) B04A (2x) B04A (2x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B08F (4x) B04F (1x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x)

3104 313 6304.3

PCI-AD10 PCI-AD10 PCI-AD10 PCI-AD11 PCI-AD11 PCI-AD11 PCI-AD11 PCI-AD11 PCI-AD12 PCI-AD12 PCI-AD12 PCI-AD12 PCI-AD12 PCI-AD13 PCI-AD13 PCI-AD13 PCI-AD13 PCI-AD13 PCI-AD14 PCI-AD14 PCI-AD14 PCI-AD14 PCI-AD14 PCI-AD15 PCI-AD15 PCI-AD15 PCI-AD15 PCI-AD16 PCI-AD16 PCI-AD16 PCI-AD16 PCI-AD16 PCI-AD17 PCI-AD17 PCI-AD17 PCI-AD17 PCI-AD17 PCI-AD18 PCI-AD18 PCI-AD18 PCI-AD18 PCI-AD18 PCI-AD19 PCI-AD19 PCI-AD19 PCI-AD19 PCI-AD19 PCI-AD2 PCI-AD2 PCI-AD2 PCI-AD2 PCI-AD2 PCI-AD20 PCI-AD20 PCI-AD20 PCI-AD20 PCI-AD21 PCI-AD21 PCI-AD21 PCI-AD21 PCI-AD22 PCI-AD22 PCI-AD22 PCI-AD22 PCI-AD22 PCI-AD23 PCI-AD23 PCI-AD23 PCI-AD23 PCI-AD23 PCI-AD24 PCI-AD24 PCI-AD24 PCI-AD24 PCI-AD24 PCI-AD24 PCI-AD25 PCI-AD25 PCI-AD25 PCI-AD25 PCI-AD25 PCI-AD25 PCI-AD26 PCI-AD26 PCI-AD26 PCI-AD26 PCI-AD26 PCI-AD26 PCI-AD27 PCI-AD27 PCI-AD27 PCI-AD27 PCI-AD27 PCI-AD27 PCI-AD28 PCI-AD28 PCI-AD28 PCI-AD28 PCI-AD28 PCI-AD28 PCI-AD29 PCI-AD29 PCI-AD29 PCI-AD29 PCI-AD29 PCI-AD29 PCI-AD3 PCI-AD3 PCI-AD3 PCI-AD3 PCI-AD3 PCI-AD30 PCI-AD30 PCI-AD30 PCI-AD30 PCI-AD30 PCI-AD30 PCI-AD31 PCI-AD31 PCI-AD31 PCI-AD31 PCI-AD31 PCI-AD31 PCI-AD4 PCI-AD4 PCI-AD4 PCI-AD4 PCI-AD4 PCI-AD5 PCI-AD5 PCI-AD5 PCI-AD5 PCI-AD5 PCI-AD6 PCI-AD6 PCI-AD6

B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B04F (1x) B05G (1x) B09A (2x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (2x) B09C (1x) B04F (2x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B04Q (1x) B05G (2x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x)

PCI-AD6 PCI-AD6 PCI-AD7 PCI-AD7 PCI-AD7 PCI-AD7 PCI-AD7 PCI-AD8 PCI-AD8 PCI-AD8 PCI-AD8 PCI-AD8 PCI-AD9 PCI-AD9 PCI-AD9 PCI-AD9 PCI-AD9 PCI-CBE0 PCI-CBE0 PCI-CBE0 PCI-CBE0 PCI-CBE1 PCI-CBE1 PCI-CBE1 PCI-CBE1 PCI-CBE1 PCI-CBE1 PCI-CBE2 PCI-CBE2 PCI-CBE2 PCI-CBE2 PCI-CBE2 PCI-CBE2 PCI-CBE3 PCI-CBE3 PCI-CBE3 PCI-CBE3 PCI-CLK-ETHERNET PCI-CLK-OUT PCI-CLK-PNX5100 PCI-CLK-PNX5100 PCI-CLK-PNX8535 PCI-CLK-PNX8535 PCI-CLK-USB20_ETH PCI-CLK-USB20_ETH PCI-CLK-USB20_ETH PCI-DEVSEL PCI-DEVSEL PCI-DEVSEL PCI-DEVSEL PCI-FRAME PCI-FRAME PCI-FRAME PCI-FRAME PCI-GNT PCI-GNT-B PCI-GNT-ETHERNET PCI-GNT-ETHERNET PCI-GNT-PNX85XX PCI-GNT-PNX85XX PCI-GNT-PNX85XX PCI-GNT-USB20 PCI-GNT-USB20 PCI-GNT-USB20 PCI-IRDY PCI-IRDY PCI-IRDY PCI-IRDY PCI-PAR PCI-PAR PCI-PAR PCI-PAR PCI-PERR PCI-PERR PCI-PERR PCI-PERR PCI-REQ PCI-REQ-B PCI-REQ-ETHERNET PCI-REQ-ETHERNET PCI-REQ-PNX85XX PCI-REQ-PNX85XX PCI-REQ-PNX85XX PCI-REQ-USB20 PCI-REQ-USB20 PCI-REQ-USB20 PCI-SERR PCI-SERR PCI-SERR PCI-SERR PCI-STOP PCI-STOP PCI-STOP PCI-STOP PCI-TRDY PCI-TRDY PCI-TRDY PCI-TRDY PCMCIA-A0 PCMCIA-A0 PCMCIA-A1 PCMCIA-A1 PCMCIA-A10 PCMCIA-A10 PCMCIA-A11 PCMCIA-A11 PCMCIA-A12 PCMCIA-A12 PCMCIA-A13 PCMCIA-A13 PCMCIA-A14 PCMCIA-A14 PCMCIA-A2 PCMCIA-A2 PCMCIA-A3 PCMCIA-A3 PCMCIA-A4 PCMCIA-A4 PCMCIA-A5 PCMCIA-A5 PCMCIA-A6 PCMCIA-A6 PCMCIA-A7 PCMCIA-A7 PCMCIA-A8 PCMCIA-A8 PCMCIA-A9 PCMCIA-A9 PCMCIA-D0 PCMCIA-D0 PCMCIA-D1 PCMCIA-D1 PCMCIA-D2 PCMCIA-D2 PCMCIA-D3 PCMCIA-D3

B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B04F (1x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B04Q (1x) B05G (1x) B09A (1x) B09B (1x) B09C (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B04E (2x) B04E (3x) B04E (2x) B05G (1x) B04E (2x) B04F (1x) B04E (2x) B09A (1x) B09B (1x) B04F (2x) B05G (1x) B09A (1x) B09B (1x) B04F (2x) B05G (1x) B09A (1x) B09B (1x) B04F (2x) B04F (2x) B05G (1x) B09B (2x) B04F (1x) B05G (1x) B09B (1x) B04F (1x) B05G (1x) B09A (2x) B04F (2x) B05G (1x) B09A (1x) B09B (1x) B04F (1x) B05G (1x) B09A (1x) B09B (1x) B04F (2x) B05G (1x) B09A (1x) B09B (1x) B04F (2x) B04F (2x) B05G (1x) B09B (2x) B04F (1x) B05G (1x) B09B (1x) B04F (1x) B05G (1x) B09A (2x) B04F (2x) B05G (1x) B09A (1x) B09B (1x) B04F (2x) B05G (1x) B09A (1x) B09B (1x) B04F (2x) B05G (1x) B09A (1x) B09B (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x)

PCMCIA-D4 PCMCIA-D4 PCMCIA-D5 PCMCIA-D5 PCMCIA-D6 PCMCIA-D6 PCMCIA-D7 PCMCIA-D7 PCMCIA-VCC-VPP PCMOUT2 PCMOUT2 PCMOUT3 PCMOUT3 PCMOUT4 PCMOUT4 PCRX-DDC-SCL PCRX-DDC-SCL PCRX-DDC-SDA PCRX-DDC-SDA PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-BA0 PNX5100-DDR2-BA1 PNX5100-DDR2-CAS PNX5100-DDR2-CKE PNX5100-DDR2-CLK_N PNX5100-DDR2-CLK_P PNX5100-DDR2-CS PNX5100-DDR2-D0 PNX5100-DDR2-D1 PNX5100-DDR2-D10 PNX5100-DDR2-D11 PNX5100-DDR2-D12 PNX5100-DDR2-D13 PNX5100-DDR2-D14 PNX5100-DDR2-D15 PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D2 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D3 PNX5100-DDR2-D30 PNX5100-DDR2-D31 PNX5100-DDR2-D4 PNX5100-DDR2-D5 PNX5100-DDR2-D6 PNX5100-DDR2-D7 PNX5100-DDR2-D8 PNX5100-DDR2-D9 PNX5100-DDR2-DQM0 PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM2 PNX5100-DDR2-DQM3 PNX5100-DDR2-DQS0_N PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS1_N PNX5100-DDR2-DQS1_P PNX5100-DDR2-DQS2_N PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS3_N PNX5100-DDR2-DQS3_P PNX5100-DDR2-ODT PNX5100-DDR2-RAS PNX5100-DDR2-VREF-CTRL PNX5100-DDR2-VREF-DDR PNX5100-DDR2-WE PNX5100-RST-OUT PNX5100-RST-OUT PROT-DC PROT-DC PSEN RC RC RC REGIMBEAU_CVBS-SWITCH REGIMBEAU_CVBS-SWITCH RESET-AUDIO RESET-AUDIO RESET-ETHERNET RESET-ETHERNET RESET-ETHERNET RESET-FLASH-STn RESET-NVM RESET-NVM RESET-PNX5100 RESET-PNX5100 RESET-ST7100 RESET-ST7100 RESET-ST7100 RESET-STBY RESET-STBY RESET-SYSTEM RESET-SYSTEM RESET-SYSTEM RESET-SYSTEM RESET-SYSTEM RESET-SYSTEM RESET-USB20 RREF-PNX8541 RREF-PNX8541 RSETIN-ST7100 RST-TARGETn R-VGA R-VGA R-VGA RX0RX0RX0+ RX0+ RX1RX1RX1+ RX1+ RX2-

B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (1x) B09C (1x) B03H (4x) B03A (1x) B03D (1x) B03A (1x) B03D (1x) B03A (1x) B03D (1x) B08F (1x) B08G (1x) B08F (1x) B08G (1x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (3x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (2x) B05A (3x) B05A (3x) B05A (2x) B05A (3x) B05A (3x) B05F (1x) B05I (1x) B01A (1x) B01C (1x) B04A (2x) B01D (1x) B04A (2x) B05H (1x) B04A (2x) B08A (1x) B04A (2x) B04M (2x) B04A (2x) B09A (1x) B09B (2x) B03B (3x) B04A (2x) B04C (1x) B04A (2x) B05F (1x) B03A (1x) B03B (1x) B04A (1x) B04A (1x) B04D (1x) B02A (1x) B02C (1x) B04A (2x) B04E (2x) B05H (1x) B08G (1x) B09A (2x) B04H (1x) B04P (1x) B03A (2x) B03G (2x) B04K (1x) B08A (1x) B08B (1x) B04H (1x) B08G (1x) B04H (1x) B08G (1x) B04H (1x) B08G (1x) B04H (1x) B08G (1x) B04H (1x)

RX2RX2+ RX2+ RXCRXCRXC+ RXC+ RXD-ASC2 RXD-ASC2 RXD-MIPS RXD-MIPS RXD-UP RXD-UP SCL1 SCL2 SCL3 SCL-DISP SCL-DISP SCL-DISP SCL-DISP SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-SSB SCL-ST SCL-ST SCL-TUNER SCL-TUNER SCL-TUNER SCL-UP-MIPS SCL-UP-MIPS SCL-UP-MIPS SDA1 SDA2 SDA3 SDA-DISP SDA-DISP SDA-DISP SDA-DISP SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-SSB SDA-ST SDA-ST SDA-TUNER SDA-TUNER SDA-TUNER SDA-UP-MIPS SDA-UP-MIPS SDA-UP-MIPS SDM SENSE+1V SENSE+1V SENSE+1V2-PNX5100 SENSE+1V2-PNX5100 SENSE+1V2-PNX8541 SENSE+1V2-PNX8541 SPDIF-OUT SPDIF-OUT SPI-CLK SPI-CSB SPI-PROG SPI-SDI SPI-SDO SPI-WP STANDBY STANDBY ST-DL-APP ST-DL-APP SUPPLY-FAULT SUPPLY-FAULT TACHO1 TACHO1-INV TDA-IF-AGC TDA-IF-AGC TDA-IF-AGC TMUCLK TRIG-IN TRIG-IN TRIG-OUT TRIG-OUT TSI0-ST-CLK TSI0-ST-D0 TSI0-ST-D1 TSI0-ST-D2 TSI0-ST-D3 TSI0-ST-D4 TSI0-ST-D5 TSI0-ST-D6 TSI0-ST-D7 TSI0-ST-STRT TSI0-ST-VAL TSI1-ST-CLK TSI1-ST-D0 TSI1-ST-D1 TSI1-ST-D2 TSI1-ST-D3 TSI1-ST-D4 TSI1-ST-D5 TSI1-ST-D6 TSI1-ST-D7 TSI1-ST-VAL TUN-AGC TUN-AGC TUN-AGC-MON TUN-AGC-MON TX1ATX1A+ TX1BTX1B+ TX1CTX1C+ TX1CLKTX1CLK+ TX1DTX1D+ TX1ETX1E+ TX2ATX2A+ TX2BTX2B+ TX2CTX2C+ TX2CLKTX2CLK+ TX2D-

B08G (1x) B04H (1x) B08G (1x) B04H (1x) B08G (1x) B04H (1x) B08G (1x) B03A (1x) B03G (1x) B04E (1x) B08D (1x) B04A (2x) B08D (1x) B04E (2x) B04E (2x) B04E (2x) B01B (1x) B05E (2x) B05F (1x) B05G (3x) B02A (1x) B02B (2x) B02C (1x) B04E (2x) B05E (1x) B05F (2x) B08D (1x) B08G (1x) B03A (1x) B05E (1x) B02A (1x) B02B (2x) B02C (1x) B04A (2x) B04C (1x) B04E (2x) B04E (2x) B04E (2x) B04E (2x) B01B (1x) B05E (2x) B05F (1x) B05G (3x) B02A (1x) B02B (2x) B02C (1x) B04E (2x) B05E (1x) B05F (2x) B08D (1x) B08G (1x) B03A (1x) B05E (1x) B02A (1x) B02B (2x) B02C (1x) B04A (2x) B04C (1x) B04E (2x) B04A (3x) B01B (4x) B03E (2x) B01C (6x) B05C (2x) B01A (1x) B04P (1x) B04L (1x) B08A (1x) B04A (2x) B04A (2x) B04A (3x) B04A (3x) B04A (2x) B04A (3x) B01B (1x) B04A (2x) B03A (1x) B04A (2x) B01A (1x) B04A (2x) B05G (2x) B05G (2x) B02A (1x) B02B (1x) B02C (1x) B03A (2x) B03A (2x) B03G (1x) B03A (1x) B03G (1x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (1x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B03A (2x) B02A (1x) B02B (3x) B02A (1x) B02B (1x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x)

TX2D+ TX2ETX2E+ TX3ATX3A+ TX3BTX3B+ TX3CTX3C+ TX3CLKTX3CLK+ TX3DTX3D+ TX3ETX3E+ TX4ATX4A+ TX4BTX4B+ TX4CTX4C+ TX4CLKTX4CLK+ TX4DTX4D+ TX4ETX4E+ TXD-ASC2 TXD-ASC2 TXD-MIPS TXD-MIPS TXD-UP TXD-UP USB20-2-DM USB20-2-DM USB20-2-DP USB20-2-DP USB20-OC1 USB20-OC2 USB-OC USB-OC V_LVC04 V1 VDDA-ADC VDDA-AUDIO VDDA-AUDIO VDDA-DAC VDDA-LVDS VDDA-LVDS VDDE-2V5 VDDE-3V3 VSW VSW V-SYNC-VGA V-SYNC-VGA VTT-TERM-DDR WC-EEPROM-PNX5100 WC-EEPROM-PNX5100 WC-EEPROM-PNX5100 WP-FLASH-ST WP-FLASH-ST WP-NANDFLASH WP-NANDFLASH WRITE-PROT XIO-ACK XIO-ACK XIO-SEL-NAND XIO-SEL-NAND Y_CVBS-MON-OUT Y_CVBS-MON-OUT Y_CVBS-MON-OUT-SC

B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B05E (3x) B03A (1x) B03G (1x) B04E (1x) B08D (1x) B04A (2x) B08D (1x) B03F (1x) B09A (2x) B03F (1x) B09A (2x) B09A (3x) B09A (3x) B03F (1x) B09A (1x) B03A (5x) B02B (3x) B04P (2x) B04L (2x) B04P (2x) B04P (2x) B04O (1x) B04P (2x) B03E (7x) B03E (3x) B01A (1x) B01B (1x) B04K (1x) B08B (1x) B04G (2x) B04E (1x) B05F (2x) B08F (1x) B03A (1x) B03B (1x) B04A (2x) B04Q (2x) B08F (4x) B04F (1x) B04Q (2x) B04F (1x) B04Q (2x) B04K (1x) B08A (1x) B08A (2x)

I_18020_122.eps 120908

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

120

Layout Small Signal Board (Overview Top Side) 1AM0 1AM2 1C00 1C51 1CJ0 1E01 1E05 1E06 1E11 1E15 1E50 1E51 1E99 1F01 1F29 1G50

G5 F5 C1 D1 A1 A4 A5 A3 D8 C8 B3 A3 B6 D1 A3 A1

1G51 1H11 1HE0 1HP0 1M20 1M71 1M95 1N00 1N01 1P00 1P02 1P03 1P05 1P07 1P0A 1P0B

B1 D6 B4 A3 G1 C1 F1 E8 E3 E7 A7 A8 A8 D8 B8 B8

1T04 1T55 1T65 1T70 1T71 1T99 1U01 2A57 2A58 2A59 2A60 2A61 2A63 2A64 2A70 2A71

D8 E7 E8 E7 D8 A7 G1 E8 E8 E8 E8 E8 E8 E8 G6 G6

2AEA 2AEM 2AEU 2C03 2C05 2C06 2C07 2C08 2C09 2C10 2C11 2C12 2C45 2C46 2C47 2CBK

G4 G4 G4 C1 C2 C1 C1 A3 C1 C1 C1 D2 C1 C1 C1 C1

2CBM 2CBN 2CBP 2CBR 2CBS 2CBY 2CG2 2CH0 2CH1 2E06 2E09 2E10 2E11 2E12 2E13 2E14

C1 C1 C1 C1 C1 A1 C1 C1 C1 A6 A7 A8 A6 B8 A5 B8

2E15 2E16 2E17 2E18 2E19 2E20 2E21 2E22 2E23 2E24 2E25 2E26 2E27 2E28 2E29 2E30

B8 A4 A4 B8 A4 B8 B8 A8 A8 A7 A7 A6 A8 A8 A3 A4

2E31 2E32 2E33 2E34 2E35 2E36 2E37 2E39 2E40 2E41 2E42 2E43 2E45 2E46 2E48 2E50

A4 A4 A4 A8 D8 A6 C8 C8 C8 A5 D8 D8 B8 A6 A3 A3

2E51 2E57 2E59 2E64 2E65 2E70 2E73 2E74 2E75 2E76 2E77 2E78 2E79 2E80 2E81 2E82

A4 B6 A4 A6 A6 A4 A5 A5 A5 A5 A5 A5 A5 B8 B5 A4

2E83 2E84 2E85 2E94 2E95 2E97 2E98 2E99 2EA4 2EA5 2EA6 2EB4 2H02 2H10 2H11 2H12

A4 A4 A4 A7 A5 C8 C8 A6 A4 A3 A5 A6 B4 C4 B5 B5

2H14 D6 2H80 B3 2H81 B3 2H82 B3 2H83 B3 2H84 B4 2H85 B4 2H86 B4 2HA0 D4 2HA1 D3 2HHB D2 2HKA D2 2HKC D2 2HMG C3 2HR0 C5 2HR1 C5

2HR2 2HR3 2HR4 2HR5 2HR6 2HR7 2HR8 2HR9 2HRA 2HRB 2HRC 2HRD 2HRE 2HRF 2HRG 2HRH

C5 C5 C5 C5 C5 C5 C5 C5 C5 C5 C5 C5 C5 C5 C5 C5

2HRJ 2HRK 2HRZ 2HS0 2HS1 2HS2 2HS3 2HS4 2HS7 2HS8 2HS9 2HSA 2HSB 2HSC 2HSD 2HSE

C5 C5 C5 C5 C5 C5 C5 D5 D5 D5 D5 D5 C5 C5 C5 C5

2HSF 2HSJ 2HSK 2HSM 2HSP 2HT8 2HTL 2HTP 2HTR 2HTU 2HTV 2HU5 2HU8 2HVC 2N0K 2N0L

D5 D5 D5 D5 C5 D5 D5 D5 D5 D5 D5 D5 D5 B4 F4 F4

2N0M 2N0N 2N0Z 2N13 2N1C 2N21 2T48 2T49 2T53 2T59 2T61 2T62 2T64 2T67 2T68 2T69

E5 F5 E4 E5 E5 E3 D6 D6 D6 D6 C6 D6 D6 C6 D6 D6

2T71 2T72 2T91 2U05 2U06 2U08 2U09 2U0F 2U0J 2U0K 2U0R 2U0W 2U0Y 2U0Z 2U10 2U11

C6 C6 D6 F2 F3 E2 E2 E2 E2 E2 E2 E2 F2 F3 F2 F2

2U14 2U15 2U19 2U1A 2U1B 2U20 2U21 2U24 2U25 2U26 2U32 2U33 2U34 2U35 2U36 2U40

F2 G3 G2 E2 E3 F2 F1 E2 E2 E2 G1 F1 G1 G1 G1 E2

2U50 2U60 2U62 2U63 2U64 2U65 2U66 2U67 2U68 2U69 2U72 2U73 2U74 2U86 2U8A 2U8C

E1 E2 E2 E2 F2 F2 E2 E2 F2 F2 G1 G1 G1 G2 G2 G2

2U8D 2U8E 2U8F 2U8G 2U8H 2U8K 2U8M 2U8Q 2U8R 2U8U 2U8V 2U90 2U91 2U92 2U93 2U94

G2 G1 F2 G2 G2 F2 F2 G1 G1 G2 G2 G1 G1 G1 G1 G1

2U95 3A18 3A22 3A33 3A34 3A40 3A41 3A42 3A51 3A53 3A55 3A60 3A61 3A62 3A63 3A79

G1 G5 G6 G5 G5 G5 G5 G5 G5 G5 G5 E8 E8 E8 E8 G6

3A80 3A81 3A82 3A83 3A84 3A85 3A86 3A87 3AA1 3AA2 3AA3 3AA4 3AA5 3AA6 3AA7 3AA8

G6 G6 G6 G6 G6 G6 G6 G6 G3 G3 F3 F3 G3 G3 F3 F3

3AA9 3AAB 3AAC 3AAK 3AAL 3AAM 3AM7 3AM8 3C03 3C05 3C06 3C07 3C08 3C09 3C11 3C12

G4 G3 F3 F4 G4 F4 F5 F5 A2 A2 A2 A2 A2 A2 A2 A2

3C13 3C14 3C15 3C16 3C17 3C18 3C19 3C24 3C25 3C26 3C27 3C28 3C29 3C30 3C31 3C32

A2 C1 C1 C2 C1 C1 C1 C1 A1 A2 A1 A2 C1 A1 A1 A1

3C33 3C34 3C35 3C36 3C37 3C38 3C39 3C40 3C41 3C42 3C43 3C44 3C45 3C46 3CA2 3CA3

C1 C1 C1 C1 A2 A3 A3 A3 A2 A2 C2 C1 C1 C1 A1 A1

3CAA 3CAB 3CAC 3CAD 3CAE 3CD0 3CD1 3CD2 3CFK 3CFL 3CH8 3CH9 3CHA 3CHB 3CHC 3CHD

C1 C1 C1 C1 C1 B3 A1 A1 C2 C2 C1 C1 C1 C1 C1 C1

3CHE 3CHF 3CHG 3E01 3E02 3E03 3E05 3E06 3E07 3E08 3E09 3E10 3E11 3E12 3E14 3E15

C1 C1 C1 A6 A4 A6 A6 A5 B6 A6 B7 A6 A4 B8 A4 B8

3E16 3E17 3E18 3E21 3E22 3E23 3E24 3E26 3E34 3E35 3E36 3E37 3E40 3E42 3E44 3E45

Part 2 I_18020_059b.eps Part 1 I_18020_059a.eps

Part 3 I_18020_059c.eps

Part 4 I_18020_059d.eps

3104 313 6304.3

I_18020_059.eps 200808

A4 A4 A4 A4 B8 B8 A3 B8 A4 A6 A8 A8 A8 A6 A8 A8

3E46 A6 3E47 A6 3E48 A8 3E49 A6 3E50 A8 3E51 A4 3E52 A5 3E53 B8 3E54 A8 3E55 A4 3E56 A7 3E57 A7 3E58 A7 3E59 A7 3E60 A7 3E61 A5 3E62 A5 3E63 A3 3E64 A4 3E65 A6 3E66 A6 3E67 A7 3E68 A7 3E69 A5 3E70 A6 3E71 A6 3E72 A6 3E73 A5 3E74 D8 3E75 A8 3E76 C8 3E77 C8 3E78 C8 3E79 B8 3E80 C8 3E81 D8 3E82 A6 3E83 A5 3E84 A7 3E85 B3 3E89 A6 3E90 A6 3E93 B3 3E94 A8 3E95 A8 3E96 A8 3E97 A8 3E99 A5 3EA1 A5 3EA2 A5 3EA3 B5 3EA5 A5 3EA6 A5 3EA7 A4 3EA8 A3 3EA9 A4 3EB0 A4 3EB1 A5 3EB2 A5 3EB4 A8 3EB5 A8 3EB6 A5 3EB7 A5 3EB8 A5 3EB9 A5 3EC1 A7 3EC2 B8 3EC3 A5 3EC4 A8 3EC5 A8 3EC6 A5 3EC7 A5 3EC8 A5 3ED1 B4 3ED2 B4 3ED3 B4 3ED4 B4 3ED5 B4 3ED8 A7 3H01 B4 3H06 B4 3H07 B4 3H08 B4 3H38 C3 3H41 B5 3H43 B5 3H53 C3 3H54 B4 3H55 C3 3H56 B4 3H61 D4 3H69 B5 3H72 B5 3H73 B5 3H85 B4 3HA0 D3 3HA3 D3 3HA4 D4 3HA8 D4 3HAC D3 3HG0 B3 3HJ0 C3 3HKM C3 3HP0 C4 3HP1 C4 3HP5 C4 3HR0 C5 3HR3 C5 3HR6 C4 3HR8 C5 3HR9 C4 3HRC C5 3HRJ C5 3HRP C5 3HRR C5 3HRS D5 3HRT D5 3HRU D5 3HRV D5 3HRW C5 3HRY C5 3HRZ D5 3HS0 D5 3HS1 D5 3HS2 D5 3HS8 D5 3HS9 D5 3HSF D5 3HSH D5 3HSJ D5 3HSM D5 3HSN D5 3HSP C5 3HSQ C5 3HST C5 3HSV C5 3HSW D5 3N03 E3 3N04 E3 3N05 E3 3N07 E3 3N08 E3 3N09 E3 3N0C E3 3N0D E3 3N0F F4 3N0H E5 3N0J E4 3N0K E4 3N0V F4

3N0W 3N0Y 3N36 3T35 3T36 3T37 3T38 3T65 3T66 3T67 3U07 3U08 3U09 3U0K 3U1J 3U1W 3U1Y 3U2G 3U2H 3U33 3U34 3U3J 3U3N 3U3T 3U3V 3U3W 3U42 3U46 3U4A 3U4B 3U50 3U51 3U52 3U53 3U54 3U60 3U61 3U62 3U63 3U64 3U65 3U66 3U67 3U68 3U69 3U6A 3U6B 3U70 3U74 3U75 3U76 3U80 3U81 3U82 3U84 3U85 3U86 3U88 3U89 3U90 3U91 3U92 3U93 3U94 3U95 3U96 3U97 3U98 3U99 5A60 5A61 5E02 5E04 5E07 5E08 5E09 5HA0 5HR0 5HR2 5HR3 5HR5 5HRC 5HRG 5T52 5T61 5U00 5U01 5U02 5U03 5U04 5U05 5U06 5U08 5U09 5U90 6CJ1 6CJ2 6CJ3 6E02 6E03 6E04 6E05 6E08 6E09 6E10 6E11 6E12 6E13 6E14 6E15 6E16 6E17 6E18 6E20 6E21 6E22 6E23 6E24 6E26 6E29 6E31 6E32 6E34 6E35 6E36 6E37 6E43 6E44 6E45 6E53 6H10 6H11 6HD2 6N00 6N01 6T55 6T56 6T57 6U09 6U40 7A00 7A70 7A71 7AA1 7AA2 7AM1 7C00 7C01 7C02 7C03

E4 E5 E3 D6 D6 D6 C6 D7 D7 E6 E2 E2 E2 E2 E2 G2 G2 G2 G1 G2 G2 G2 G1 G2 E2 E2 G1 E2 E2 G1 E2 E2 E2 E1 E1 E2 E2 E2 E2 E2 F2 F2 F2 E2 E2 F2 E2 F3 E2 E2 E2 E2 E2 E2 E2 E2 E2 E2 E2 G1 G1 G1 G1 G1 G1 G1 G1 G1 G1 E8 E8 A5 A6 A8 A7 A8 D3 C5 D5 C5 D5 D5 D5 D7 D6 E3 F3 F2 G2 F2 G2 G1 F1 G1 G1 C1 C1 A2 A4 A7 A6 A6 A4 B8 A4 A6 A4 A6 A4 A6 A6 A6 A5 D8 D8 B8 A8 A4 A8 A7 A5 A6 A4 A4 A5 A5 C8 C8 C8 A6 B5 C3 B4 E4 E4 E7 E6 E7 G1 E2 F5 G6 G6 G3 F3 F5 A2 A2 A2 C1

7C04 7C05 7C06 7CH0 7CH1 7CJ2 7E01 7E02 7E04 7E05 7E06 7E07 7E08 7E09 7E11 7E12 7E13 7E14 7E15 7E16 7E18 7E19 7E20 7E21 7E22 7H00 7H01 7H02 7H11 7HA0 7HG0 7HG1 7HV0 7N00 7N04 7U02 7U05 7U06 7U08 7U0D 7U0H 7U0M 7U0N 7U0Q 7U40 7U41 7U50 7U51 7U73 7U90 7U91 9AM1 9AM2 9CH0 9CJ0 9CJ4 9CJ5 9CJ6 9CJ7 9E04 9E07 9E10 9E11 9E13 9E14 9E15 9E19 9E20 9E21 9H06 9H08 9H13 9H16 9N05 9N06 9T21 9T53 9T54 9T55 9T56 9T58 9T61 9T64 9T77 9U01 9U04 9U05 9U90 9U91 9U92

C2 C1 A2 C1 C1 C2 A4 A5 A5 A5 A6 B6 A8 A8 A7 A7 A8 A4 A5 A5 A6 A7 B8 B8 A5 D4 B3 B5 B5 D4 C3 D3 B4 E4 E5 F2 F2 F2 F2 G2 G2 E2 E2 G1 E2 E2 E1 E2 G1 G1 G1 F5 F5 C1 A1 A3 A3 A3 C1 A8 A8 A5 A8 A8 A7 A7 A8 A8 A5 C5 B4 B5 B4 E3 E3 D6 C6 C6 E7 C6 D6 D6 D6 D6 G1 G2 G2 G1 G1 G1

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

121

Layout Small Signal Board (Part 1 Top Side)

Part 1

I_18020_059a.eps 200808

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

122

Layout Small Signal Board (Part 2 Top Side)

Part 2

I_18020_059b.eps 200808

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

123

Layout Small Signal Board (Part 3 Top Side)

Part 3

I_18020_059c.eps 200808

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

124

Layout Small Signal Board (Part 4 Top Side)

Part 4

I_18020_059d.eps 200808

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

125

Layout Small Signal Board (Overview Bottom Side) 1A10 1C50 1C55 1CD0 1HF0 1N02 1T85 1TA1 2A18 2A19 2A20 2A21 2A22 2A23 2A24 2A25 2A26 2A50 2A55

F5 B8 B8 B6 C4 F4 D2 D2 F5 E5 F5 F5 F5 F5 G4 G4 F4 G5 F2

2A56 2A62 2AA0 2AA1 2AA2 2AA3 2AA6 2AA7 2AA8 2AA9 2AAA 2AAB 2AAE 2AAF 2AAG 2AAH 2AAJ 2AAK 2AAL

F2 E1 G5 G6 F5 F6 G6 G6 G6 F6 F6 F6 F6 F6 F6 F5 F6 F6 G6

2AAM 2AAN 2AAP 2AAR 2AAS 2AAT 2AAU 2AAZ 2AB0 2AB1 2AB2 2AB3 2AB4 2AB5 2AB6 2AB8 2AB9 2ABA 2ABB

G6 G6 G6 G6 G5 G6 G6 F5 F5 F5 F5 F5 F5 G5 G5 F5 F5 F5 F5

2AC0 2AE2 2AE5 2AE7 2AE8 2AEB 2AEC 2AED 2AEE 2AEH 2AEJ 2AEN 2AER 2AET 2AEZ 2AF0 2AF4 2AF5 2AF8

F4 G4 G5 G4 G4 G4 G5 F5 F4 F5 F4 G4 G4 F4 F4 G4 F4 F4 G4

2AFB 2AFC 2AFD 2AFE 2AFF 2AFG 2AFH 2AFJ 2AFK 2AFL 2AFN 2AFR 2AFS 2AFT 2AG4 2AG5 2AG6 2AG7 2AG8

G5 G5 G5 F4 G4 F4 F4 G4 G4 G4 F5 F5 F5 F5 F4 F4 F4 F4 F4

2AG9 2AGA 2AGB 2AGC 2AGD 2AGG 2AGH 2AGN 2AGP 2AGT 2AM0 2AM1 2AM2 2AM3 2AM4 2C00 2C01 2C02 2C04

G4 G5 G5 F5 F5 F5 F5 G5 G4 F5 G4 F4 F4 F4 F4 B7 A7 A8 C8

2C13 2C14 2C15 2C16 2C17 2C18 2C19 2C20 2C29 2C30 2C32 2C33 2C34 2C35 2C36 2C38 2C39 2C40 2C41

A7 A7 A7 A7 A7 A7 A6 C7 A7 A7 A7 A8 A8 A7 A8 A8 A7 A7 A7

2C42 2C43 2C44 2C55 2C56 2C57 2C58 2C59 2C60 2C61 2C62 2C63 2C64 2C65 2C66 2C67 2C68 2C69 2C70

A7 A8 A7 B7 A6 B7 A7 B7 B7 B7 B7 B7 B7 B7 B7 B7 B7 B7 B8

2C71 2C72 2C73 2C74 2C75 2C76 2C77 2C78 2C79 2C80 2C81 2C82 2C83 2C84 2C85 2C86 2C87 2C88 2C89

B7 B7 B7 B7 B8 B7 B7 B7 B7 B7 B7 B7 B8 B7 B7 B7 B7 B7 B7

2C90 2C91 2C92 2C93 2C94 2C95 2C96 2C97 2CA0 2CA1 2CA2 2CA3 2CA4 2CA5 2CA6 2CA7 2CA8 2CA9 2CAA

A7 B8 B8 B7 B7 B7 B7 B7 B8 A8 B8 B8 B8 A8 A8 A8 A8 A8 A8

2CAB 2CAC 2CAD 2CAE 2CAF 2CAG 2CAH 2CAJ 2CAK 2CAM 2CAN 2CAP 2CAR 2CAS 2CAT 2CAV 2CAW 2CAY 2CAZ

A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 C8 C8 C8 C8 C8 C8

2CB0 2CB1 2CB2 2CB3 2CB4 2CB5 2CB6 2CB7 2CB8 2CB9 2CBA 2CBB 2CBC 2CBD 2CBE 2CBF 2CBG 2CBH 2CBJ

C8 C8 C8 C8 C8 B8 B8 B8 B8 B8 B8 B8 B8 B8 B8 B8 B8 B8 C8

2CBT 2CBU 2CBV 2CBW 2CBZ 2CD0 2CD1 2CG1 2CG3 2CG4 2CGB 2CGC 2CGD 2CH2 2CH3 2E04 2E05 2E07 2E08

B8 B8 B8 B8 A8 B7 B7 C8 B8 B8 A8 A8 A8 B8 B8 A1 B5 B5 B4

2E38 2E52 2E53 2E54 2E55 2E56 2E58 2E60 2E61 2E62 2E63 2E66 2E67 2E68 2E69 2E71 2E72 2E86 2E87

A2 B5 A2 A2 A2 A2 A2 A6 B6 B6 B6 A2 A2 A1 A1 A2 A1 A2 A1

2E88 2E89 2E90 2E91 2E92 2E93 2H00 2H01 2H03 2H04 2H05 2H06 2H07 2H09 2H13 2H15 2H16 2H87 2H88

A1 A1 A1 A2 A1 A1 C4 C4 B4 D4 D4 C4 C4 D3 D3 D4 D4 B6 B6

2HA2 2HA3 2HA4 2HA5 2HC0 2HD0 2HF0 2HF1 2HF2 2HF5 2HF6 2HF7 2HF8 2HG0 2HG1 2HG2 2HG3 2HG4 2HG5

D4 D4 D4 C4 C6 B5 C4 C4 C5 C6 C6 C6 C6 C6 C6 C6 C6 C6 C6

2HG6 2HG7 2HG8 2HG9 2HGA 2HGB 2HGC 2HGD 2HGE 2HGF 2HGG 2HGH 2HGJ 2HGK 2HGM 2HGN 2HGP 2HGR 2HGS

C6 C6 C6 C6 C6 C6 C6 C6 C6 C6 C6 D6 D6 D6 D6 D6 D6 D6 D6

2HGT D6 2HGU D6 2HGV D6 2HGW D6 2HGY D6 2HGZ D6 2HH0 D6 2HH1 D6 2HH2 D6 2HH3 D6 2HH4 C5 2HH5 C6 2HH6 D5 2HH7 D5 2HH8 C5 2HH9 C5 2HHA C6 2HHC D6 2HHD D7

2HHE 2HHF 2HHG 2HHH 2HHJ 2HHK 2HHM 2HHN 2HHP 2HHR 2HHS 2HK1 2HK2 2HK4 2HK6 2HK7 2HK8 2HKL 2HMJ

D6 D6 C7 C6 C6 C6 C5 D6 D6 D6 D6 D5 D5 D5 D5 D5 D5 D4 C4

2HMP B4 2HMT C4 2HMW C5 2HMY C5 2HMZ B5 2HN1 C5 2HP4 C4 2HP5 C5 2HP6 C5 2HP7 C5 2HP8 C5 2HPA C4 2HPB C4 2HRM C5 2HRN C5 2HRP C4 2HRQ C5 2HRR C5 2HRS C5

2HRT C5 2HRU C5 2HRV C5 2HRW C5 2HRY C4 2HSN D4 2HSR D4 2HSS D4 2HST C4 2HSU D4 2HSV C4 2HSW C4 2HSY C4 2HSZ D4 2HT0 D4 2HT1 D4 2HT2 D4 2HT3 D4 2HT4 D4

2HT5 2HT6 2HT7 2HTB 2HTC 2HTD 2HTE 2HTF 2HTG 2HTH 2HTK 2HTZ 2HU0 2HUB 2HUK 2HUN 2HUP 2HVA 2HVB

D4 C5 D4 D4 D4 D4 D4 D4 D4 D4 D4 D4 D4 D4 D4 D4 D4 B5 B5

2HVD 2HVE 2HVG 2HY0 2HY1 2HY2 2HY3 2HY4 2HY5 2HY6 2HY7 2HY8 2HY9 2HYA 2HYB 2HYC 2HYD 2HYE 2HYF

B5 B5 B5 D5 D5 D4 D5 C5 C5 C5 C5 D5 D5 C5 C5 C5 C5 D5 D5

2HYG 2HYH 2HYJ 2HYK 2HYM 2HYN 2HYP 2HYR 2HYS 2HYT 2HYU 2HYV 2HYW 2HYY 2HYZ 2HZ0 2HZ1 2HZ2 2HZ3

C5 C5 C5 C5 D5 D5 D5 D5 C5 D5 D5 C5 C5 D5 D5 C5 C5 C4 C4

2HZ4 2HZ7 2HZ8 2HZ9 2HZA 2HZB 2HZC 2HZD 2HZH 2HZJ 2HZN 2HZP 2HZR 2HZS 2HZT 2HZU 2HZV 2N00 2N01

C4 C4 C5 C5 C5 D5 C5 D5 C5 C5 C5 C5 C5 C5 C5 C5 C5 E5 E6

2N02 2N03 2N04 2N05 2N06 2N07 2N08 2N09 2N0A 2N0B 2N0C 2N0D 2N0E 2N0F 2N0G 2N0H 2N0P 2N0Q 2N0V

E6 E6 E5 E5 E5 E5 E5 E5 E5 E6 E6 E6 E6 E6 E6 E6 F5 F5 E4

2N0W 2N0Y 2N10 2N11 2N12 2N14 2N15 2N16 2N17 2N18 2N20 2N22 2N30 2N31 2N32 2N33 2T01 2T02 2T03

Part 1 I_18020_060a.eps

Part 2 I_18020_060b.eps

Part 3 I_18020_060c.eps

3104 313 6304.3

Part 4 I_18020_060d.eps

I_18020_060.eps 200808

E4 E5 E5 E5 E5 E4 E4 F4 E5 E6 E5 E5 E4 E5 E5 E4 D1 C2 D2

2T04 2T05 2T07 2T08 2T09 2T12 2T13 2T14 2T15 2T16 2T18 2T20 2T21 2T24 2T25 2T26 2T27 2T28 2T29 2T31 2T32 2T35 2T36 2T37 2T46 2T47 2T51 2T60 2T63 2T65 2T66 2T73 2T74 2T75 2T77 2T78 2T79 2T80 2T81 2T82 2T83 2T84 2T86 2T92 2T93 2T96 2T97 2T99 2TA1 2TA2 2TA3 2TA4 2TA5 2TA6 2TA7 2TA8 2TA9 2TAA 2TAB 2TAC 2TAD 2TAE 2TAF 2TAG 2TAJ 2TAK 2TAL 2TAM 2TAN 2TAS 2U00 2U01 2U02 2U03 2U04 2U07 2U0A 2U0B 2U0C 2U0D 2U0E 2U0G 2U0H 2U0L 2U0M 2U0N 2U0P 2U0S 2U0T 2U0U 2U0V 2U12 2U13 2U16 2U17 2U18 2U27 2U28 2U29 2U2A 2U2B 2U70 2U71 2U80 2U81 2U82 2U83 2U84 2U85 2U87 2U88 2U89 2U8B 2U8L 2U8N 2U8P 2U8S 2U8T 2U8W 2U8Y 2U8Z 3A01 3A02 3A13 3A14 3A16 3A19 3A20 3A21 3A23 3A25 3A26 3A27 3A28 3A29 3A30 3A31 3A32 3A35 3A36 3A37 3A38 3A39 3A44 3A45 3A46 3A47 3A48 3A49 3A50 3A54 3A57 3A64

D1 D1 C2 D2 C1 D2 D2 D2 C2 C2 D2 D1 D2 C2 D1 C1 D2 D2 D2 C1 D1 C2 C1 D1 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 D2 E3 E3 D2 C2 C2 C2 D2 C2 C2 C2 D2 D2 C2 D2 C2 D2 D2 D1 D1 E2 D1 C2 F7 E7 E7 F7 F7 E6 F7 F7 F7 F7 F7 F7 F7 E7 F7 F7 E7 E7 E7 E6 E6 F7 F7 E7 E7 F7 F7 F7 F7 F8 F7 F6 F6 G7 G7 G7 G7 G7 F7 G7 G7 G7 G7 G7 G8 G7 G7 G7 G7 G7 G7 G4 G4 F4 F5 F3 G5 F4 F4 G4 G4 F5 F5 F5 G4 G5 G5 G5 G5 F4 G4 G4 G4 G4 G4 F4 F4 F4 G4 G4 G4 G4 E1

3A65 3A70 3A71 3A72 3A73 3A74 3A75 3A76 3A77 3A78 3AAA 3AAD 3AAG 3AAH 3AAN 3AAP 3AAQ 3AAR 3AAS 3AAT 3AC1 3AC2 3AC3 3AC4 3AC5 3AC9 3ACA 3AM0 3AM1 3AM2 3AM3 3C00 3C01 3C02 3C04 3C10 3C20 3C21 3C22 3C23 3C50 3C51 3C60 3C61 3C62 3C63 3C95 3C96 3C97 3C98 3CA4 3CA5 3CA6 3CA7 3CD7 3CD8 3CD9 3CDA 3CDB 3CDC 3CDD 3CF1 3CFN 3CG0 3CG1 3CG5 3CG6 3CG7 3CG8 3CG9 3CGA 3CGC 3CGD 3CGF 3CGG 3CGH 3CGJ 3CGN 3CGP 3CGR 3CGS 3CGT 3CGV 3CGZ 3CH0 3CH1 3CH2 3CH3 3CH4 3CH5 3CH7 3CJ0 3CJ1 3CKA 3CKB 3E04 3E13 3E20 3E27 3E28 3E29 3E30 3E31 3E32 3E33 3E38 3E43 3E88 3E91 3E92 3ED7 3H00 3H02 3H03 3H04 3H05 3H09 3H10 3H11 3H13 3H14 3H15 3H16 3H17 3H18 3H19 3H20 3H21 3H23 3H24 3H26 3H27 3H28 3H29 3H30 3H31 3H32 3H33 3H34 3H35 3H36 3H37 3H39 3H40 3H42 3H44 3H45 3H46 3H47 3H48 3H49 3H50 3H51

E1 F3 F3 G3 F2 F3 F3 F3 F3 G2 F5 F5 G5 F5 G6 G6 G6 F5 F5 F5 F4 F4 F4 F4 F4 F4 F4 F4 G4 G4 G4 B7 B7 A7 A8 B7 B7 B7 A7 A7 B7 B7 C7 C7 C7 C7 B6 B6 B6 B6 C8 C8 B7 B7 B7 B7 B7 B7 B7 B7 B7 B7 B7 B8 B8 B8 B8 B8 B8 B8 B8 C8 C8 A8 A8 A8 A8 A8 A8 A8 A8 A8 A8 B8 B8 B8 C8 A8 A8 A8 B8 B7 B7 A8 A8 B5 B5 B4 A2 A2 A2 A1 A1 A1 A2 A1 A1 A1 A5 A5 A2 C4 C4 C4 C4 C4 D3 B4 D5 B4 B4 B4 B4 B4 B5 B4 B4 B4 B4 B4 B4 B4 B4 D3 B4 B4 C4 D3 D3 D3 C4 C4 C4 D3 C4 B4 C4 C4 C4 C4 C4 C4 C4

3H58 C4 3H60 C4 3H64 C4 3H65 C4 3H66 C4 3H67 C4 3H68 C4 3H70 C4 3H78 B4 3H80 B6 3H81 B6 3H82 B5 3H83 B5 3H84 B6 3H86 B4 3H87 B4 3H92 B4 3HAG C4 3HAH C4 3HC2 C6 3HD4 B5 3HES D5 3HEU D5 3HF2 C6 3HF3 C5 3HF4 C6 3HF5 D5 3HF9 C5 3HFD D5 3HFE D5 3HFG C6 3HFH C6 3HFK C6 3HFM C6 3HFN C6 3HFP C6 3HFR C6 3HFY C5 3HG1 C5 3HG2 D5 3HG3 C5 3HG4 C5 3HG5 D5 3HG6 C5 3HG7 D5 3HG8 C5 3HG9 D5 3HGA C5 3HGB D5 3HGC C6 3HGD D5 3HGE C5 3HGF C6 3HGG C5 3HGH C5 3HGJ D5 3HGK C6 3HGM C5 3HGN C5 3HGP C6 3HGR C6 3HGS C6 3HGT C6 3HGU C6 3HGV C6 3HGW C6 3HGY C6 3HGZ C6 3HH0 C6 3HH1 C6 3HH2 C6 3HH3 C6 3HH4 C6 3HH5 C6 3HH6 C6 3HH7 C6 3HH8 C6 3HH9 C6 3HHA C6 3HHB D6 3HHC D6 3HHD D6 3HHE D6 3HHF D6 3HHG D6 3HHH D6 3HHJ D6 3HHK D6 3HHL D6 3HHM D6 3HHN D6 3HHP D6 3HHR D6 3HHS D6 3HHT D6 3HHU D6 3HHV D6 3HHW D6 3HHY D6 3HHZ D6 3HJ1 C5 3HJ2 C5 3HJ3 C6 3HJ4 C6 3HJ5 C5 3HJ6 C6 3HJ7 D6 3HJ8 C6 3HJ9 C6 3HJA D6 3HJB C6 3HJC C6 3HJD C6 3HJE C6 3HJF C6 3HJG C6 3HJH C6 3HJJ C6 3HJK C6 3HJM C6 3HJN C6 3HJP C6 3HJR C6 3HJS C6 3HJT C6 3HJU C6 3HJY C5 3HJZ C5 3HK0 D5 3HKN D6 3HME C4 3HMM B5 3HP8 D5 3HP9 C5 3HPA C5 3HPD C6 3HPE C5 3HPF C5 3HPG C5 3HPH C5 3HPJ C5 3HPK C5 3HPM C5 3HPN C5 3HRK D5 3HRM D4 3HRN D4 3HS3 D4 3HS4 D4 3HS5 D4 3HS6 D4 3HS7 D4 3HSA D4

3HSB D4 3HSD D4 3HSE D4 3HSR D4 3HSU D4 3HT3 D4 3HT4 D4 3HT8 C5 3HT9 D4 3HV3 B5 3HV4 B5 3HW0 C5 3HW1 C5 3HW2 C5 3HW3 C5 3HW4 C5 3HW5 C5 3HW6 C5 3HW7 C5 3HWK D4 3HWN D5 3HWP D5 3HWR D5 3HWV D5 3N00 E5 3N06 E5 3N0B E5 3N0G E4 3N30 E5 3N33 E4 3N35 E5 3T02 D2 3T07 D1 3T08 D2 3T09 D2 3T10 D1 3T11 D2 3T12 C2 3T13 C1 3T14 C1 3T15 C2 3T16 D1 3T17 D2 3T18 D1 3T19 D2 3T20 D2 3T21 D2 3T22 D2 3T23 C2 3T24 D2 3T25 D2 3T26 C1 3T28 C1 3T29 D1 3T30 D1 3T31 D1 3T32 C2 3T33 C2 3T39 D2 3T40 D2 3T41 D2 3T42 D2 3T43 C2 3T44 C2 3T54 D2 3T55 D2 3T56 D2 3T57 D2 3T61 D2 3T70 D1 3T71 D1 3T74 D2 3T75 D2 3T76 D2 3T85 D1 3T86 D2 3T87 D2 3TB0 D1 3TB1 D1 3TB2 D1 3TB4 C2 3TB5 D2 3TB6 D2 3TB7 C2 3TB8 C2 3TB9 C2 3TBA C2 3TBB C2 3TBC C2 3TBD C2 3TBE C2 3TBF C2 3TBG C2 3U00 F7 3U01 F7 3U02 E7 3U03 F7 3U04 F7 3U05 F7 3U06 F7 3U0A F7 3U0B E7 3U0C E7 3U0D E7 3U0E E7 3U0F F7 3U0G F7 3U0H F7 3U0J F7 3U0M F7 3U0N F7 3U0P F7 3U0S F7 3U0T F7 3U0U F7 3U0V F7 3U0W F7 3U0Y F7 3U0Z F7 3U10 F7 3U11 F7 3U12 E7 3U13 E7 3U14 F7 3U15 F7 3U16 F7 3U17 F7 3U18 E7 3U19 E7 3U1A E7 3U1B E7 3U1C E7 3U1D F7 3U1E E7 3U1F E7 3U1G F7 3U1H F7 3U1K E7 3U1M F7 3U1N F7 3U1P F7 3U1T F7 3U1U E7 3U1V E7 3U1Z G7 3U20 G7 3U21 G7 3U22 G7 3U23 G7 3U24 G7 3U25 G7 3U26 G7 3U27 G7

3U28 3U29 3U2A 3U2B 3U2C 3U2D 3U2E 3U2F 3U2J 3U2K 3U2M 3U2N 3U2R 3U2U 3U2V 3U2W 3U2Y 3U2Z 3U30 3U31 3U32 3U35 3U36 3U39 3U3A 3U3B 3U3C 3U3D 3U3E 3U3F 3U3G 3U3H 3U3K 3U3M 3U3P 3U3Q 3U3Y 3U3Z 3U40 3U43 3U44 3U45 3U47 3U48 3U49 3U72 3U73 3U83 3U87 5A10 5AA0 5AE0 5AE2 5AE4 5AE5 5AE7 5AE8 5AE9 5C60 5C61 5C62 5C63 5C64 5C65 5C66 5C67 5C68 5C69 5C70 5C71 5C72 5C73 5C74 5CG0 5CG1 5CG2 5CG3 5CG4 5CG5 5CG6 5CG7 5CH0 5CH1 5E03 5E06 5HG0 5HG1 5HK0 5HK1 5HK2 5HK3 5HK4 5HP2 5HR6 5HR7 5HR9 5HRA 5HRL 5HRZ 5HY0 5HY1 5HY2 5HY3 5HY4 5HY5 5HY6 5HY7 5HY8 5HY9 5HYA 5N00 5N01 5N02 5N03 5N04 5N06 5N07 5T08 5T09 5T53 5T54 5TA1 5TA2 6CG0 6CG2 6CJ0 6E06 6E19 6E50 6HF0 6HW2 6TA1 6U00 6U01 6U02 6U03 6U04 6U05 6U06 6U07 6U08 6U0B 6U0C 7A10 7A11 7A12 7A50 7AM0 7C07 7C20 7CD0 7CG0 7CG1

G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G8 F8 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 G7 F7 F7 F7 F8 F7 F7 F7 F8 G8 F7 F7 E7 E7 F5 F5 G5 F4 F5 F5 F5 G4 F5 B7 B7 B7 B7 B7 B7 B7 B7 B7 B7 B8 B8 B8 B8 B8 B8 B8 C8 C8 B8 B8 B8 B8 C8 C8 A2 A2 D5 D5 D5 D5 D5 D5 D5 C5 D4 D4 D4 D4 D4 C5 D5 C5 C5 C5 C5 D5 C5 C5 C5 C5 D5 E5 E6 E6 E5 E5 F5 E4 D1 D1 D2 D2 C2 C2 B8 C8 B7 B1 B6 B5 C5 B4 D1 E7 E7 F7 E7 E7 G7 G7 G7 G7 F8 F8 F5 F4 E5 G5 F4 C8 C7 B6 B8 B8

7CG2 7CG4 7CG5 7CG6 7CG8 7CJ0 7E03 7E10 7E17 7H04 7H05 7H06 7H07 7H14 7H16 7H80 7H93 7HC3 7HC4 7HD0 7HF1 7HF2 7HG2 7HM1 7HP0 7HVA 7N10 7N11 7N12 7N13 7T17 7T18 7T19 7T20 7T25 7T56 7T57 7TA1 7TA2 7TA3 7TA4 7U00 7U01 7U03 7U04 7U07 7U09 7U0A 7U0E 7U0G 7U0K 7U0L 7U0P 7U0R 7U70 7U71 7U72 9A21 9A22 9A23 9A24 9A25 9A51 9AM0 9CA0 9CA1 9CD0 9CG0 9CG1 9CG4 9CJ1 9E03 9E05 9E06 9E08 9E09 9E12 9E16 9E17 9E18 9H07 9H14 9H15 9H17 9HF4 9HF5 9HF6 9HF7 9HF8 9HG1 9HG2 9HG3 9HK0 9HW0 9N02 9T20 9T57 9T59 9T60 9T62 9T63 9T70

B8 A8 A8 C7 B8 B7 B4 A5 A6 D4 D4 C6 C6 B4 B4 B5 B4 C6 C6 B5 B6 C5 D6 B5 C4 B5 E4 E5 E4 E4 C2 C1 C2 D2 D2 D1 D2 E2 D1 D1 C2 F7 F7 E7 E7 F7 E7 F7 F7 G7 G7 G8 F7 G8 E7 F7 F6 F5 F5 F4 F4 F4 G4 F4 B8 C8 B7 B8 B8 A8 B8 A5 B5 B5 B6 B5 A5 A5 A2 A2 D4 B5 B5 C6 D5 D5 D5 D5 C5 D5 D5 C6 D5 D4 E6 C1 D2 C2 C2 D2 D2 D2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

126

Layout Small Signal Board (Part 1 Bottom Side)

Part 1

I_18020_060a.eps 200808

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

127

Layout Small Signal Board (Part 2 Bottom Side)

Part 2

I_18020_060b.eps 200808

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

128

Layout Small Signal Board (Part 3 Bottom Side)

Part 3

I_18020_060c.eps 200808

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

129

Layout Small Signal Board (Part 4 Bottom Side)

Part 4

I_18020_060d.eps 200808

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

130

I/O Panel 1

2

I/O

G

4

3

5

6

7

10

11

12

13

G

6102

PDZ24-B

1 3 +12VD 3104

AUDIO-IN1-R

1n0

1102

2105 100n 6104

0001 2106

100p RES

2107

3105

100K RES

AP-AUDIO-OUT-R 3107

AP-SCART-OUT-L

100n

1104

1n0

2110

0001

C

3110

AUDIO-IN1-L

G-VGA

F104

1 75R

2

4 100n

6107 +12VD

F110

9 10

330p

2119

6109

+12VD

F126

F134

100p

100p 2149

100p 2148

100p 2147

100p 2146

100p 2145

100p 2144

F125

AUDIO-IN3-L AUDIO-IN3-R

F127 F128 +12VD

AP-AUDIO-OUT-L AP-AUDIO-OUT-R

F131

SPI-OUT

F133

F140 F130

21

100n

2136

6112

PDZ24-B

100n

F141

E

F

GND-SPDIF

23

100p

100p 2158

100p 2157

100p 2156

MT 1E00-2 22

100p 2155

F136 MRC-021V-44 PC

2123

100p 2143

G-VGA

15

D

30FMN-BMT-A-TFT

100p

2121

0001

1110

75R

3117

100p

2122

75R

3118

1111

G

MRC-021V-44 PC

AV1-PR 3120

100p

2124

100p RES

2126

100K RES

3121

1113

0001

3119

AUDIO-IN3-L

1K0

1112

F137

75R

6113

PDZ24-B

14

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

20

+12VD

1n0

F124

19

F135

+12VD

2125

F123

18

AV1-Y

G

R-VGA B-VGA

17

B-VGA

YKC21-4374 2

12 13

100p 2154

F132 1 3

F119 F120 F122

16

100n

PDZ24-B 2135

6111

100n

2120

6110

F

PDZ24-B

F129

1E04

AV1-STATUS AP-SCART-OUT-L AP-SCART-OUT-R

100p 2153

+12VD

BZX384-C12

0001

1109

GND-SPDIF GND-SPDIF

3K3

3116

GND-SPDIF

11

100p 2152

22p RES

2118

120R RES

3115

12p

2117

1108

F121 3114

AV1-STATUS

8K2

GND-SPDIF

F116 F117

SPI-OUT

30R

E

F114

AUDIO-IN1-L AUDIO-IN1-R

8

100p

2116

0001

1107

75R

5100

CVBS-OUT-SC1

+3V3

7 F115

3113

6108

PDZ24-B

F118

AV1-Y_CVBS

F107 F108 F109 F111 F112

6

F113

1E99

F106

AV1-PR AV1-PB AV1-BLK AV1-Y

5

AV1-PB

100p 2142

3

2150

3112

100p

2

F105

PDZ24-B 2134

YKC21-4374

2115

1106

+12VD 3

1

100p 2141

F102

2140

1E00-1

0001

1105

1n0

2114

2113

3111

F103

100p RES

1K0 100K RES

1E03

2112

6106

PDZ24-B

6105

C

+12VD

100p RES

+12VD

2111

3109

100K RES

470R

PDZ24-B

100p RES

2109

3108

100K RES

1n0 RES

2108

1103

470R

100p 2151

6103

PDZ24-B 3106

B

+12VD

1K0

PDZ24-B

YKC21-4374 2

1n0

+12VD

2103

1101

100p RES

2104

3103

100K RES

100p RES

2102

3102

100K RES

1n0 RES

2101

470R

1E02

F101

A

3101

AP-SCART-OUT-R

470R

100n

6101 AP-AUDIO-OUT-L

0001

3100

1100

PDZ24-B 2100

100n

6100

PDZ24-B 2138

+12VD

F100

D

9

+12VD

A

B

8

100p

2130

75R

0001

1114

YKC21-4374 2

I 2131

100p

1117

0001

0001

1116

75R

100p RES

2133

100K RES

3129

1118

1n0

2132

3126

100p

2137

68R

AUDIO-IN3-R

1K0

J

PDZ6.8-B

3127

CVBS-OUT-SC1 3128

PDZ6.8-B

F139

PDZ24-B

6117

+12VD

6118

AV1-Y_CVBS

6116

I

1115

3

3125

1

150R

100R 6115

R-VGA

3123

3130

1

150R

I111

F138

100n

2128

2127

22u 10V

3 7100 BC847BW 2

3124

AV1-BLK

H

PDZ6.8-B

100n

2129

6114 1E05

PDZ24-B

+12VD

H

4K7

3122

+3V3

J I_18020_063.eps 200808

3104 313 6304.3 1

2

3

4

5

6

7

8

9

10

11

12

13

1100 A2 1101 A6 1102 B6 1103 C2 1104 C6 1105 C6 1106 D2 1107 E6 1108 E2 1109 E6 1110 F6 1111 F2 1112 G6 1113 H2 1114 I7 1115 I2 1116 I6 1117 J6 1118 J2 1E00-1 C9 1E00-2 G9 1E02 A1 1E03 C1 1E04 F1 1E05 H1 1E99 D13 2100 A7 2101 A2 2102 A3 2103 A7 2104 B5 2105 B7 2106 B7 2107 B5 2108 C2 2109 C3 2110 C6 2111 C5 2112 C3 2113 C5 2114 C6 2115 D2 2116 E6 2117 E3 2118 E4 2119 E6 2120 F2 2121 F6 2122 F3 2123 G2 2124 G6 2125 H2 2126 H3 2127 H5 2128 H6 2129 H2 2130 I3 2131 I6 2132 J2 2133 J3 2134 D5 2135 F6 2136 G6 2137 J7 2138 A2 2140 C10 2141 C10 2142 C10 2143 C11 2144 C11 2145 C11 2146 C11 2147 C11 2148 C12 2149 C12 2150 G10 2151 G10 2152 G10 2153 G11 2154 G11 2155 G11 2156 G11 2157 G11 2158 G12 3100 A3 3101 A6 3102 A3 3103 B5 3104 B6 3105 B5 3106 B3 3107 C6 3108 C3 3109 C5 3110 C6 3111 C5 3112 D3 3113 E5 3114 E5 3115 E3 3116 E5 3117 F5 3118 F2 3119 G6 3120 G3 3121 H3 3122 H5 3123 H6 3124 I6 3125 I2 3126 I6 3127 J5 3128 J3 3129 J3 3130 I6 5100 E3 6100 A2 6101 A7 6102 B7

6103 B2 6104 B7 6105 C7 6106 C3 6107 D5 6108 E3 6109 E6 6110 F2 6111 F5 6112 G6 6113 G2 6114 H2 6115 I6 6116 I5 6117 J3 6118 J6 7100 H5 F100 A2 F101 B2 F102 C8 F103 D2 F104 D8 F105 D8 F106 D13 F107 D13 F108 D13 F109 D13 F110 D8 F111 D13 F112 D13 F113 D8 F114 D13 F115 D8 F116 E13 F117 E13 F118 E2 F119 E13 F120 E13 F121 E8 F122 E13 F123 E13 F124 E13 F125 E13 F126 E8 F127 F13 F128 F13 F129 F8 F130 F13 F131 F13 F132 F2 F133 F13 F134 F8 F135 F8 F136 G8 F137 G2 F138 I2 F139 J2 F140 F13 F141 F13 I111 H5

Circuit Diagrams and PWB Layouts

Layout I/O Panel (Top Side)

I_18020_064.eps 200808

7.

131

Layout I/O Panel (Bottom Side) 1E00 1E02 1E03 1E04 1E05 1E99 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129 3130 5100 6100 6101 6102 6103 6104 6105 6106 6107 6108 6109 6110 6111

3104 313 6306.2

Q529.1E LC

-------------------------------------------------------------------------------------------------------------

3104 313 6304.3

I_18020_065.eps 200808

Circuit Diagrams and PWB Layouts

IR & LED Panel (ME TOP) 1

J

2

Q529.1E LC

3

7.

132

5

4

6

7

8

IR LED PANEL

J

A

A

1M20

RC LED2

F004 F009

B

LED1

KEYBOARD TACTSWITCH

WHITE

F010

RED

9002 RES

10 11

1M01

F012

C

6

5

6051

9001

4

9003

RES 1P05

I015

I016

I017

+5V2

BC857BW 7051

LED2

3053

I028 F008

10K

7

3080

6

BM05B-SRSS-TBT

D

I014

7061 BC847BW

+3V3-STBY 10K

LIGHTSPILL

1 2 3 4 5

3063

D

I019

10K

LIGHT SPILL

I013

3055

3065

1P09

6052

5

I026

1 2 3

+3V3-STBY

+5V2

I027

680R

C

F011

LTW-C193TS5

KEYBOARD

1 2 3 4

47R

B

LIGHT-SENSOR

F005

SML-310

TO SSB

F006

1 2 3 4 5 6 7 8 9

E

I001

3999

I002

+3V3-STBY

10R

3040

330R

3043

10K

F

LED2 LIGHT-SENSOR

RC

LED1

E

F

+5V2

+5V2

6K8

100K

RES 3073

7070

I021

7071 BC847CW

2 TEMT6200FX01

G

1M0

3079

10K

I023

3077

BZX384-C3V3

6053

33K

RES 3071

2

100u 16V

9005

2070

GND2

1

1

2040

GND1

I020 4

100u 16V

G

+5V2

I025

3

10K

OUT

RES 3041

1040 TSOP6136TT VS

RES 3042

9004

I022

H

H "IR RECEIVER"

"LIGHT SENSOR" I_18020_066.eps 200808

3104 313 6304.3

1

2

3

4

5

6

7

8

1040 G3 1M01 C2 1M20 B2 1P05 D2 1P09 C2 2040 G4 2070 H5 3040 F3 3041 G3 3042 G3 3043 F4 3053 E7 3055 C7 3063 E4 3065 C5 3071 H5 3073 G5 3077 H6 3079 H6 3080 E5 3999 F2 6051 D5 6052 D7 6053 H5 7051 D7 7061 D5 7070 G8 7071 G6 9001 D3 9002 C3 9003 D3 9004 F6 9005 G6 F004 B3 F005 B3 F006 B3 F008 E2 F009 B3 F010 B2 F011 C2 F012 C3 I001 E1 I002 E2 I013 C5 I014 D7 I015 D7 I016 D5 I017 D5 I019 C7 I020 G3 I021 G6 I022 F4 I023 G6 I025 G6 I026 C3 I027 C3 I028 D3

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

133

Layout IR & LED Panel (ME TOP) (Top Side) 1M01 --

1M20 --

1P05 --

1P09 --

2040

--

2070

--

3073

Personal Notes:

--

I_18020_067.eps 200808

3104 313 6285.2

Layout IR & LED Panel (ME TOP) (Bottom Side) 1040 -3040 -3041 --

3042 -3043 -3053 --

3104 313 6285.2

3055 -3063 -3065 --

3071 -3077 -3079 --

3080 -3999 -6051 --

6052 -6053 -7051 --

7061 -7070 -7071 --

9001 -9002 -9003 --

9004 -9005 --

I_18020_068.eps 200808

E_06532_012.eps 131004

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

134

LVDS2DP Panel: Connector & Supply 1

LD1

3

2

4

5

6

7

9

8

10

11

LVDS CONNECTOR + SUPPLY

LD1

A

A 9100 9101

22u 16V

2100

+3V3-SSB

F100

7010 LD1117DT33

7011 LD1117DT18

+5V-SSB

9102 RES 9103 RES

3

IN

OUT

F101

2

+1V8

COM 1

1

2101

OUT COM

22u 16V

B

IN

2

2102

I101 3

22u 16V

I100

B

9104 RES 9105 RES

2103

22u 16V

+3V3

C

C

F102

SDA-DISP I102

5101

F104

2108

30R

F106

22p

AUDIO-DAO I104

5102

AUDIO-WS I105

30R

5103

I107

5104

30R

F111

30R

AUDIO-BCK AUDIO-MCK

BACKLIGHT-IN

22p

F105 F107

D 2112

3102

F109 100n

F153 F155

F160 F161

F163

F166 F167

3125

100R

F170

3127

3106 3108

100R 100R

3110 3112

100R 100R

3114 3116

100R RES

F139 F142 F143 F146 F147 F150

FROM SSB

F151

F152 F154 F156 +12V

F159

F157

9110

F158

F162 52 53 54 55 56 57 58 59 60 61

F165 F168 F169

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51

E

F

G

H

FI-RE51S-HF F172

RX4D+ RX4E-

F173 100R

F138

RX4CLK+ RX4D-

F175 F176

F135

RX4C+ RX4CLK-

F171

RX2D+ RX2E-

F134

RX4B+ RX4C-

42 43 44 45 46 47 48 49 50 51 FI-RE41S-HF

100p

F130

RX4A+ RX4B-

3126

3123

100R

F164

RX2CLK+ RX2D-

100R

3104

F148 F149

RES 9109 RX4A-

3118

F145

100R

F144

RX3E+ 9107 RES

3120

F141

100R

F140

F118 F121

100p

F129

RX3D+ RX3E-

3122

F137

100R

F136

2106

F125

RX3CLK+ RX3D-

3124

F132

F133

100p +3V3-STANDBY

F123

RX3C+ RX3CLK-

100R

F131

F114 F117

2107

FROM SSB 3128

3121

100R

F127

2105

F119

RX3B+ RX3C-

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

2104 100p

100R

1F42 F124

1F41

F113

F116

RX3A+ RX3B-

+3V3-SSB

RX2C+ RX2CLK-

F112

RX3A-

F128

RX2B+ RX2C-

RX2E+

2111

I106

100R

100R

3103 3105

100R 100R

3107 3109

100R 100R

3111 3113

100R

3115

100R RES

3117

100R

3119

100R

RX2A+ RX2B-

I

22p

F126

RX1D+ RX1E-

H

F110

+5V-SSB

RX1CLK+ RX1D-

G

RESET-SYSTEM

F122

RX1C+ RX1CLK-

RES 9108 RX2A-

22p

F120

RX1B+ RX1C-

RX1E+ 9106 RES

2110

F115

RX1A+ RX1B-

F

F108

3101 100R

100R

RX1A-

E

I103 RC

2109

100R

D

F103

SCL-DISP

RX4E+

F174

I

F177

I_18020_079.eps 270808

3103 313 6299.3

1

2

3

4

5

6

7

8

9

10

11

1F41 D11 1F42 E6 2100 A3 2101 B2 2102 B5 2103 C5 2104 E10 2105 E9 2106 E10 2107 E10 2108 D5 2109 D5 2110 D5 2111 D5 2112 D10 3101 D8 3102 D8 3103 E2 3104 E7 3105 E2 3106 E7 3107 E2 3108 E7 3109 F2 3110 F7 3111 F2 3112 F7 3113 F2 3114 F7 3115 G2 3116 G7 3117 G2 3118 G7 3119 G2 3120 G7 3121 H2 3122 H7 3123 H2 3124 H7 3125 I2 3126 I7 3127 I2 3128 I7 5101 D4 5102 D3 5103 D4 5104 D3 7010 B3 7011 B5 9100 A4 9101 A4 9102 B4 9103 B4 9104 B3 9105 C3 9106 G2 9107 G7 9108 G2 9109 G7 9110 H10 F100 A4 F101 B5 F102 D8 F103 D8 F104 D4 F105 D8 F106 D4 F107 D8 F108 D4 F109 D8 F110 D4 F111 D3 F112 D7 F113 D10 F114 E10 F115 E3 F116 E7 F117 E10 F118 E10 F119 E7 F120 E3 F121 E10 F122 E3 F123 E7 F124 E5 F125 E7 F126 E3 F127 E5 F128 E3 F129 E7 F130 F7 F131 F3 F132 F5 F133 F3 F134 F7 F135 F7 F136 F3 F137 F3 F138 F7 F139 F7 F140 F3 F141 G3 F142 G7 F143 G7 F144 G3 F145 G3 F146 G7 F147 G7 F148 G3 F149 G3

F150 G7 F151 G10 F152 G7 F153 G3 F154 G10 F155 H3 F156 H7 F157 H10 F158 H10 F159 H7 F160 H3 F161 H3 F162 H7 F163 H5 F164 H5 F165 H7 F166 H3 F167 H3 F168 H7 F169 H7 F170 H3 F171 I3 F172 I7 F173 I6 F174 I7 F175 I3 F176 I3 F177 I7 I100 B3 I101 B4 I102 D3 I103 D7 I104 D3 I105 D3 I106 D7 I107 D3

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

135

LVDS2DP Panel: FPGA: I/O Banks 1

2

LD2

3

4

5

7

6

8

9

10

11

12

13

FPGA: I/O BANKS

LD2

7205-6 EP2C5F256C7N

Φ

A +2V5-L51

VCCIO1

A15 A2 C10 C7 E10 E7

+3V3-FPGA

B

A

POWER B1 G3 K3 R1

B16 G14 K14 R16

+2V5-L41

M10 M7 P10 P7 T15 T2

+3V3-FPGA

G9 H10 H7 J7

+1V2-FPGA

C

GND

VCCIO2

GND VCCIO3

VCCIO4 GND

L6 F11

7205-3 EP2C5F256C7N

Φ

BANK2 A-R3 A-R0 AUDIO-OUT-MCK AUDIO-OUT-BCK A-G2 A-G1 A-R8 A-R9 A-R7 A-R6 A-R4 A-R5 A-R1 A-R2 A-G7 A-G6 A-G8 A-G9 AUDIO-OUT-WS AUDIO-OUT-DAO A-G4 A-G5

VCCINT

M5 1 E12 VCCA_PLL 2

+1V2-PLL

A1 A16 B15 B2 C8 C9 E8 E9 G8 H14 H3 H8 H9 J14 J3 J8 J9 K9 M8 M9 P8 P9 R15 R2 T1 T16

1 VCCD_PLL 2

GND_PLL1

L5 N5

GND_PLL2

D12 F12

M6 1 E11 GNDA_PLL 2

C4 C5 G7 G6 F9 F10 E6 F6 A3 B3 A4 B4 A5 B5 C6 D6 A6 B6 F8 F7 B7 A7

B9 A9 D10 D11 A10 B10 G11 G10 A12 B12 A13 B13 C12 C13 A14 B14 D8 C11 A8 A11 B11

100R 100R

B

A-B8 A-G0 A-B7 A-B6 A-B9 A-VS 3201 SCL-DISP 3202 SDA-DISP A-B5 A-B4 A-B2 A-B1 A-B3 A-B0 CLK-FPGA BACKLIGHT-OUT F200 F201

7205-2 EP2C5F256C7N

ASDO nCSO RX2E+ RX2ERX2D+ RX2DRX2C+ RX2CRX2A+ RX2ARX2BRX2B+ RX1C+ RX1CRX1B+ RX1B-

A-G3 A-HS A-DE

Φ

3204 22R

3205 22R

C3 F4 P1 P2 N1 N2 L1 L2 K4 K5 K1 K2 E1 E2 D3 D4

BANK1

IO_C3|ASDO IO_F4|CSO_ IO_P1|LVDS0p IO_P2|LVDS0n IO_N1|LVDS1p IO_N2|LVDS1n IO_L1|LVDS2p IO_L2|LVDS2n IO_K4|LVDS3p IO_K5|LVDS3n IO_K1|LVDS4n IO_K2|LVDS4p IO_E1|LVDS5p IO_E2|LVDS5n IO_D3|LVDS6p IO_D4|LVDS6n

+3V3-FPGA

7205-1 EP2C5F256C7N

Φ

E

CONTROL H2 H1 J2 J1 H16 H15 J15 J16

RX1CLK+ RX1CLKRX2CLK+ RX2CLKRX4CLK+ RX4CLKRX3CLK+ RX3CLK-

DATA0 DCLK

F1 H4

3207

0 1 2 3 4 CLK 5 6 7

CONFIG CONF_DONE

DATA0 DCLK

TCK TMS TDO TDI

22R

CE STATUS

MSEL

0 1

G5 M13

3200 10K

J5 L13

nCONFIG CONF-DONE

I203 J13 K12 I204 F2 G1 G2 H5

9200 9201 RES 3203 10K

M11 L11 T14 R14 T13 R13 T12 R12 P12 P13 K11 K10 R10 T10 L9 L10 T11 R11 T9 R9 T8 R8

IO_M11|LVDS43p IO_L11|LVDS43n IO_T14|LVDS44p IO_R14|LVDS44n IO_T13|LVDS45p IO_R13|LVDS45n IO_T12|LVDS46p IO_R12|LVDS46n IO_P12|LVDS47p IO_P13|LVDS47n IO_K11|LVDS48p IO_K10|LVDS48n IO_R10|LVDS49p IO_T10|LVDS49n IO_L9|LVDS50p IO_L10|LVDS50n IO_T11|LVDS51p IO_R11|LVDS51n IO_T9|LVDS52p IO_R9|LVDS52n IO_T8|LVDS53p IO_R8|LVDS53n

E3 E4 D5 E5 C1 C2 L4 M4 F3 J4 L3 M1 M2 M3 P3

I201

RX1D+ RX1DRX1E+ RX1ERX1A+ RX1AA-CLK

3208 F202

10R

Φ

Φ

C

D

BANK3

BANK4 AUDIO-IN-MCK AUDIO-IN-BCK B-R8 B-R9 B-R5 B-R6 B-R2 B-R3 B-R4 B-R7 AUDIO-IN-DAO BACKLIGHT-IN B-G7 B-G6 B-G0 AUDIO-IN-WS B-G9 B-R0 B-G2 B-G3 B-B9 B-G5

IO_E3|LVDS7p IO_E4|LVDS7n IO_D5|LVDS8p IO_E5|LVDS8n IO_C1|LVDS9p IO_C2|LVDS9n IO_L4|PLL1_OUTp IO_M4|PLL1_OUTn IO_F3|VREFB1N0 IO_J4|VREFB1N1 IO_L3 IO_M1 IO_M2 IO_M3 IO_P3

7205-4 EP2C5F256C7N

7205-5 EP2C5F256C7N

D

F

IO_B9|LVDS21p IO_A9|LVDS21n IO_D10|LVDS22p IO_D11|LVDS22n IO_A10|LVDS23p IO_B10|LVDS23n IO_G11|LVDS24p IO_G10|LVDS24n IO_A12|LVDS25p IO_B12|LVDS25n IO_A13|LVDS26p IO_B13|LVDS26n IO_C12|LVDS27p IO_C13|LVDS27n IO_A14|LVDS28p IO_B14|LVDS28n IO_D8|VREFB2N1 IO_C11|VREFB2N0 IO_A8 IO_A11 IO_B11

IO_C4|LVDS10p IO_C5|LVDS10n IO_G7|LVDS11p IO_G6|LVDS11n IO_F9|LVDS12p IO_F10|LVDS12n IO_E6|LVDS13p IO_F6|LVDS13n IO_A3|LVDS14p IO_B3|LVDS14n IO_A4|LVDS15p IO_B4|LVDS15n IO_A5|LVDS16p IO_B5|LVDS16n IO_C6|LVDS17p IO_D6|LVDS17n IO_A6|LVDS18p IO_B6|LVDS18n IO_F8|LVDS19p IO_F7|LVDS19n IO_B7|LVDS20p IO_A7|LVDS20n

T7 IO_T7|LVDS54p R7 IO_R7|LVDS54n T5 IO_T5|LVDS55p R5 IO_R5|LVDS55n T4 IO_T4|LVDS56p R4 IO_R4|LVDS56n P5 IO_P5|LVDS57p P4 IO_P4|LVDS57n T3 IO_T3|LVDS58p R3 IO_R3|LVDS58n N9 IO_N9|LVDS59p N10 IO_N10|LVDS59n L7 IO_L7|LVDS60p L8 IO_L8|LVDS60n N11 IO_N11|VREFB4N0 N8 IO_N8|VREFB4N1 L12 IO_L12 P11 IO_P11 T6 IO_T6

B-B6 B-B7 B-VS B-DE B-B2 B-B3 B-B5 B-B4 B-B0 B-B1 B-G1 B-G8 B-B8 B-G4

RX4E+ RX4ERX4B+ RX4B-

RX4D+ RX4DRX4C+ RX4CRX4A+ RX4ARX3E+ RX3ERX3D+ RX3D-

F206 F207 B-R1 B-HS

D13 C14 D16 D15 G13 G12 H11 J11 F16 F15 G15 G16 J12 H12 K15 K16 L16 L15

IO_D13|LVDS29p IO_C14|LVDS29n IO_D16|LVDS30p IO_D15|LVDS30n IO_G13|LVDS31p IO_G12|LVDS31n IO_H11|LVDS32p IO_J11|LVDS32n IO_F16|LVDS33p IO_F15|LVDS33n IO_G15|LVDS34p IO_G16|LVDS34n IO_J12|LVDS35p IO_H12|LVDS35n IO_K15|LVDS36p IO_K16|LVDS36n IO_L16|LVDS37p IO_L15|LVDS37n

TCK TMS TDO TDI

IO_M16|LVDS38p IO_M15|LVDS38n IO_N16|LVDS39p IO_N15|LVDS39n IO_P16|LVDS40p IO_P15|LVDS40n IO_N14|LVDS41p IO_N13|LVDS41n IO_M12|LVDS42p IO_N12|LVDS42n IO_M14|VREFB3N1 IO_H13|VREFB3N0 IO_E14|PLL2_OUTp IO_D14|PLL2_OUTn IO_E16 IO_L14 IO_P14

M16 M15 N16 N15 P16 P15 N14 N13 M12 N12 M14 H13 E14 D14 E16 L14 P14

RX3C+ RX3CRX3B+ RX3BRX3A+ RX3AF204

F203 I202 F205

3209

B-CLK

10R

E

F

7205-7 EP2C5F256C7N

Φ

NC B8 C15 C16 D1 D2 D7 D9 E13 E15 F13 F14 F5 G4

G

NC

NC

H6 J10 J6 K13 K6 K7 K8 N3 N4 N6 N7 P6 R6

+1V2-FPGA

G

I_18020_080.eps 080908

3103 313 6299.3 1

2

3

4

5

6

7

8

9

10

11

12

13

3200 E4 3201 C8 3202 C8 3203 F4 3204 B10 3205 C10 3207 F1 3208 C13 3209 E13 7205-1 E2 7205-2 B11 7205-3 B7 7205-4 D11 7205-5 D7 7205-6 A2 7205-7 F11 9200 F3 9201 F3 F200 C8 F201 C8 F202 C12 F203 E12 F204 E12 F205 E12 F206 E8 F207 E8 I201 C12 I202 E12 I203 F3 I204 F3

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

136

LVDS2DP Panel: Genesis 5 7306 ST3232C

+1V8-SLA

1FDP

RxD

I312

F327

DPTX_VDDA

PORTS_NC

9303 RES

I321 A-HS A-DE A-VS A-CLK

DVDD_1V8

I325 I326

61 62 60 59

I328

+3V3-SLA

100R

I343 24 26 I347 27

9300 9301

H

I2C_SCL I2C_SDA

GPO_8|BS_8 GPO_9|BS_9 GPO_10|BS_10 GPO_11|BS_11 GPO_12|BS_12 GPO_13|BS_7 GPO_14|BS_6 GPO_15|BS_5

TEST0 TEST1 RESET

RESET GPIO_30 GPIO_31 GPIO_32

I375

I370

+3V3-DVDD 4K7

GPIO_42|I2C_MSCL GPIO_43|I2C_MSDA

20 21

UA-RX UA-TX-BS-4

155 156 157 159 160 2 3 4

BS-8 BS-9 BS-10 BS-11 BS-12 BS-7 BS-6 BS-5

I334

I349

4K7

98 100 99 101

I344

3320

3342 DPTX_ML_L2P DPTX_ML_L2N

DPTX_ML_L3P DPTX_ML_L3N

4K7

DPTX_REXT DPTX_VBUFC

I323

134

SDA

DPRX-3P DPRX-3N

F315

3334 100R

F316

3335 100R

5

F328

3308 +1V8-SLA

NC

E SPI MEMORY +3V3-DVDD

43 44 111 112 113 114 115 116 117 7302 M25P20-VMN SPI-DO-BS-3

5 F321

SPI-CLK SPI-CSN-BS-1

F

VCC

F322

6

F319

C

1 F318

3309 +3V3-DVDD

D

10K F320 3311

Φ

2M FLASH

F317

2

Q

SPI-DI

S

3

W

7

HOLD

10K

VSS

G F329

+1V8-SLA +3V3-DVDD

PORT_B NC +3V3-DVDD

H

RES 7305 DSO751SV 1

I359

GCLK CLK-FPGA 3

GCLK

3344 22R 3343

I369 11

TCLK 27M0

VDDOUT VDD Φ VCTRL

100R 9

9305 I371

8

4K7

Y1

XIN|CLK

Y2

XOUT

Y3

S0 S1|SDA S2|SCL

2336

I352

4 1

2 13 12

I358 I360

18p 2337

14

I

18p I361

3329

3330

100R 100R

SDA-DISP SCL-DISP

I364

5

10

7304 CDCE913PW

I363

GND

I_18020_081.eps 270808

3103 313 6299.3 1

4K7 SCL-HDCP SDA-HDCP

249R 1%

132

PORT_A DPTX

4K7

4K7 3326 RES 4K7 3328

I355

6

SCL ADR

+3V3-DVDD

3325

BS-7

2357 100n

140 139

0 1 2

DPTX_VSSA

I354 BS-6

1 2 3

DPRX-2P DPRX-2N

D

7

WC

2358 100n

DIPB_0|GPIO_0 DIPB_1|GPIO_1 DIPB_2|GPIO_2 DIPB_3|GPIO_3 DIPB_4|GPIO_4 DIPB_5|GPIO_5 DIPB_6|GPIO_6 DIPB_7 DIPB_8 DIPB_9 DIPB_10|GPIO_10 DIPB_11|GPIO_11 DIPB_12 DIPB_13 DIPB_14 DIPB_15 DIPB_16 DIPB_17 DIPB_18 DIPB_19 DIPB_20|GPIO_20 DIPB_21|GPIO_21 DIPB_22 DIPB_23 DIPB_24 DIPB_25 DIPB_26 DIPB_27 DIPB_28 DIPB_29 DIPB_HS DIPB_DE DIPB_VS DIPB_CLK

2355 100n

143 142

2356 100n

4K7 3323 RES 4K7 3324

I353

BS-8

I335

B-HS I338 B-DE I342 B-VS B-CLK

Φ

(512x8) EEPROM

2354 100n

4K7 3321 RES 4K7 3322

BS-5

123

3338

BS-6

SCL-HDCP SDA-HDCP

3339

4K7

3332

I368

RPLL_VSS

4K7

4K7

I367

100R 2348

I

BS-12

3319

10n

I374 BAS316

I341

UA-TX-BS-4 126 127

3316 3318

INTR-OUT-BS-0

I366 119 120 14

6303 RESET-SYSTEM

I333 BS-10 BS-11

F314

DPRX-1P DPRX-1N

100n

3341

100R

UART_RX|GPO_4 UART_TX|BS_4|GPO_5

TCLK

23 22

3314

4K7

10K

1u0 50V 2342

SDA-DISP

3340

152 I372 I373

3313

SPI-DO-BS-3 I332 BS-9

4K7

DPTX_ML_L1P DPTX_ML_L1N

3333

100n 7301 M24C04-WDW6

2352 100n 2353 100n

146 145

2328

27M

4K7

XTAL

3312

SPI-CLK

DPRX-0P DPRX-0N

1301

153

SPI-CSN-BS-1 SPI-CLK SPI-DO-BS-3 SPI-DI

4K7

DPRX-HPD 2351 100n

149 148

+3V3-DVDD

2335

+3V3

4K7

VBUFC_RPLL

16 17 18 19

3310

SPI-CSN-BS-1

DPTX_ML_L0P DPTX_ML_L0N

130

RES

+3V3-DVDD

3

3317

SPI_CS_|BS_1|GPO_0 SPI_CLK|BS_2|GPO_1 SPI_DO|BS_3|GPO_2 SPI_DI|GPO_3

INTR-OUT-BS-0

C

6

121

3315

INTR0_IN INTR_OUT|BS_0

3305

7

I331 RES

I365 13 15

47272-0001

HDCP NVM

DPRX-AUXP DPRX-AUXN

100n 2334

SYSTEM

18p

SCL-DISP

122

9306

27M

RPLL

1300

G

AVDD_3V3

137 136

2340

RES

DVDD_1V8

18p

2333

7300-1 GM60028-BC

I330

2332 RES

DPTX_HPD_IN

RES

+3V3-SLA

124

TCLK

2349 100n

2350 100n

2338

+1V8-DVDD

DPTX_AUXP DPTX_AUXN

135 141 147 151

F

70 71 72 73 74 75 76 78 79 80 81 82 83 84 85 86 88 89 90 91 92 93 94 96 103 105 106 107 108 109

B-B0 B-B1 B-B2 B-B3 B-B4 B-B5 B-B6 B-B7 B-B8 B-B9 B-G0 B-G1 B-G2 B-G3 B-G4 B-G5 B-G6 B-G7 B-G8 B-G9 B-R0 B-R1 B-R2 B-R3 B-R4 B-R5 B-R6 B-R7 B-R8 B-R9

DIPA_HS DIPA_DE DIPA_VS DIPA_CLK

21 23

F313

1u0 50V

E

CRVSS

I320

6 10R

+3V3-DVDD

100n 2341

+1V8-DVDD

RVDD_3V3

3 5304

I318

B

4

5 25 45 97 104 131

12 35 58 77 95 102 118 125 129 158

8 10R 7 3302-3

9302 RES

2

1 28 46 68 87 110 128 154

+3V3-DVDD

3302-2 2 10R

2330

POWER

DPRX-AUXN DPRX-HPD

220R

DIPA_0 DIPA_1 DIPA_2 DIPA_3 DIPA_4 DIPA_5 DIPA_6 DIPA_7 DIPA_8 DIPA_9 DIPA_10 DIPA_11 DIPA_12 DIPA_13 DIPA_14 DIPA_15 DIPA_16 DIPA_17 DIPA_18 DIPA_19 DIPA_20 DIPA_21 DIPA_22 DIPA_23 DIPA_24 DIPA_25 DIPA_26 DIPA_27 DIPA_28 DIPA_29

RES

D

3302-1 1

4

7300-3 GM60028-BC

100p

RC DPRX-AUXP

+3V3-STANDBY

2329

+1V8-SLA

100n

100n 2327

100n 2326

2325

2324

22u 10V

C

29 30 31 32 33 34 36 37 38 39 40 41 42 47 48 49 50 51 52 53 54 55 56 57 63 64 65 66 67 69

RC

100n

I319

220R

A-B0 A-B1 A-B2 A-B3 A-B4 A-B5 A-B6 A-B7 A-B8 A-B9 A-G0 A-G1 A-G2 A-G3 A-G4 A-G5 A-G6 A-G7 A-G8 A-G9 A-R0 A-R1 A-R2 A-R3 A-R4 A-R5 A-R6 A-R7 A-R8 A-R9

8 10R

1n0

BACKLIGHT 2319

DIPA_I2S_0|DIPA_SPDIF DIPA_I2S_1 DIPA_I2S_2 DIPA_I2S_3 DIPA_I2S_SCLK DIPA_I2S_WS

2339

5305 +1V8

GEN-BCK GEN-WS

+3V3-SLA

100n

2321

2320

220R

22u 10V

+3V3

6 7 8 9 10 11

GEN-DAO

I315

1u0

5303

3300-1 1 2310

BACKLIGHT

4K7

7300-2 GM60028-BC

F324

5 10R 6 10R

7 10R

DPRX-0P

100n 1SP2

UA-RX

B

2309

3300-2 2

3307

100R

3300-4 4 3300-3 3

DPRX-1P DPRX-0N

BZX384-C12

4

3301-1 1

DPRX-2P DPRX-1N

3306

F326

5

TxD

100p 6300

12 9

1 2 3

2343

1302

F325

100R 3337

A

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 24

100n

R1 R2

3336

14 7

7 10R 8 10R

2331

OUT

T1 T2

3301-2 2

100K

R1 IN R2

OUT

5 10R 6 10R

3301-3 3

DPRX-3P DPRX-2N

C2-

T1 IN T2

3301-4 4

DPRX-3N

100n

100K 1SP1

2347

22u 10V

100n

2

C2+

8

6

15

100n

100n 2318

100n 2317

100n 2316

100n 2315

100n 2314

100n 2313

2312

2311

22u 10V

V+

4

13 8

VC1-

8

11 10

LD3

6302

F323

+1V8-DVDD 220R

13

2346

BZX384-C12

5

I310

5302 +1V8

12

VCC

RS232

1SP3

UA-TX-BS-4

11

100n

4

100n

100n

100n 2308

100n 2307

100n 2306

100n 2305

100n 2304

100n 2303

100n 2302

2301

2300

22u 10V

3

2345

Φ

C1+

6301

+3V3-DVDD 220R

1

100n

I301

5300 +3V3

10

+3V3-DVDD

DEBUG

2344

A

9

16

LD3

8

BZX384-C12

GENESIS

7

6

5301

4

220R

3

133 138 144 150

2

GND

1

2

3

4

5

6

7

8

9

10

11

12

13

1301 I13 1302 A8 1FDP A13 1SP1 C12 1SP2 B9 1SP3 B10 2300 A2 2301 A2 2302 A2 2303 A3 2304 A3 2305 A3 2306 A3 2307 A3 2308 A4 2309 B9 2310 B11 2311 B2 2312 B2 2313 B2 2314 B3 2315 B3 2316 B3 2317 B3 2318 B3 2319 B11 2320 C2 2321 C2 2324 C2 2325 C2 2326 C2 2327 C3 2328 D12 2329 E10 2330 F12 2331 F12 2332 F1 2333 G1 2334 H12 2335 H13 2336 I13 2337 I13 2338 I8 2339 I9 2340 H11 2341 H11 2342 H13 2343 C13 2344 A5 2345 A5 2346 A7 2347 A7 2348 I2 2349 C9 2350 C9 2351 D9 2352 D9 2353 D9 2354 D9 2355 D9 2356 D9 2357 E9 2358 E9 3300-1 B12 3300-2 A11 3300-3 A12 3300-4 A12 3301-1 A11 3301-2 A11 3301-3 A12 3301-4 A12 3302-1 B11 3302-2 B11 3302-3 B11 3305 C12 3306 D13 3307 D13 3308 E10 3309 G11 3310 G5 3311 G11 3312 G5 3313 G5 3314 G5 3315 G1 3316 G5 3317 G1 3318 G5 3319 H5 3320 H5 3321 H5 3322 H5 3323 H5 3324 I5 3325 I5 3326 I5 3328 I5 3329 I13 3330 I13 3332 H5 3333 D12 3334 D13 3335 D13 3336 A7 3337 A7 3338 I2 3339 I1 3340 H1 3341 H1 3342 C12 3343 I11 3344 I11 5300 A2 5301 A8 5302 B2

5304 B12 5305 C2 6300 C13 6301 B10 6302 B10 6303 I1 7300-1 F2 7300-2 B8 7300-3 D2 7301 D11 7302 F12 7304 I12 7305 H9 7306 A6 9300 H1 9301 H1 9302 C12 9303 E4 9305 I11 9306 G2 F313 B12 F314 D12 F315 D13 F316 D13 F317 F13 F318 G11 F319 F11 F320 G11 F321 F11 F322 F11 F323 A6 F324 B5 F325 A7 F326 B7 F327 B8 F328 E12 F329 G12 I301 A3 I310 A2 I312 B8 I315 B3 I318 B11 I319 C3 I320 D4 I321 E7 I323 E9 I325 E7 I326 E7 I328 E7 I330 F1 I331 G1 I332 G5 I333 G5 I334 G5 I335 G6 I338 H6 I341 H5 I342 H6 I343 H2 I344 H7 I347 H2 I349 H5 I352 I13 I353 I5 I354 I5 I355 I5 I358 I13 I359 I5 I360 I13 I361 I13 I363 I13 I364 I13 I365 G4 I366 H4 I367 H4 I368 H4 I369 I11 I370 H1 I371 I11 I372 G2 I373 H2 I374 I1 I375 H2

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

137

LVDS2DP Panel: Fan Control

3

4

SDA-DISP 3405

SCL-DISP

1 I406

100R

I408

2

SDA

A1

SCL

A2

LD4 9402

I403

6

A

I405

5

I409

4

100R

7

3401

8

A0

9401

3404

OS

3400

3

A

7400 LM75ADP

+VS

SML-310

RES 1K0

1K0

100n

GND

3403

+3V3

9400

2400

DEBUG

8

7

+3V3

+3V3

6400

6

RES 1K0

FAN CONTROL

5

1K0 RES

LD4

2

3402

1

+3V3

+3V3

B

RES

8

7401 PCA9533

3406

100n

B

10K

2401

VDD I412

3407

SCL-DISP 3408

SDA-DISP

100R

I414

Φ

6 7

SCL

1

LED0

2

LED1

SDA

TACH01-INV 3409

3

LED2

100R

I417

5

LED3

+12V

FAN1-OUT

1K0

SML-310 +3V3

4K7

VSS 4

C

3410

6401

FAN1-DRV TACH01

1K0 7402 BCP53

I422

3415

3413

4

100n

100n 2404

100n 2403

2402

5

1 2 3

D

I423 I424

BC857BW 7403

3416

I425

3417

I426

22K

100R 2405

100R

10K

SML-310 I421

10u 16V

10R

+12V

2u2 2406

D

3412

3414

6402

+12V

FAN1-DRV

F401

F402

C

1F01

10K

3411

F400 +12V

7404 PDTC114EU

+3V3

+12V I427

E

FAN1-OUT

7405 PDTA114EU

TACH01

I429

I430

3418

E TACH01-INV

100n

2407

10K

3419

27K

I_18020_082.eps 270808

3103 313 6299.3

1

2

3

4

5

6

7

8

1F01 C8 2400 A3 2401 B4 2402 C7 2403 C7 2404 C8 2405 D5 2406 D5 2407 E4 3400 A4 3401 A4 3402 A4 3403 A2 3404 A3 3405 A2 3406 B5 3407 C3 3408 C2 3409 C4 3410 C4 3411 C3 3412 D4 3413 D5 3414 D2 3415 D4 3416 D5 3417 D5 3418 E4 3419 E4 6400 A3 6401 C5 6402 D3 7400 A4 7401 B3 7402 D3 7403 D4 7404 D5 7405 E3 9400 A4 9401 A4 9402 A4 F400 C8 F401 C8 F402 C7 I403 A4 I405 A4 I406 A3 I408 A3 I409 A5 I412 B3 I414 C3 I417 C4 I421 D3 I422 D3 I423 D4 I424 D4 I425 D5 I426 D5 I427 E6 I429 E3 I430 E6

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

138

LVDS2DP Panel: FPGA: Control

1

2

3

4

5

6

7

8

9

FPGA: CONTROL

LD5

LD5

30R

55A1

+3V3

A

F5A0

+1V2-PLL

7 65A0 35C6

55AB

100n

25A2

100n

25A1

22u

25B5

100n

100n 25B4

100n 25B3

100n 25B2

25B1

1u0

10n

25D7

10n

25D6

10n

10n 25D5

10n 25D4

25D3

10n

10n 25D2

25C2 +2V5-L51

+3V3-FPGA

30R

+3V3-FPGA

100n

BP

4

3

IN

OUT

35B8

TDI

100R

F5B0 F5B2

2

+1V2-STAB

9515 RES

AUDIO-BCK

2

5-147279-2

9500

AUDIO-IN-BCK

AUDIO-OUT-BCK

AUDIO-WS

9501

AUDIO-DAO

9502

AUDIO-IN-DAO

AUDIO-OUT-DAO

AUDIO-MCK

9503

AUDIO-IN-MCK

AUDIO-OUT-MCK

AUDIO-BCK

9504

GEN-BCK

AUDIO-WS

9505

GEN-WS

AUDIO-DAO

9506

GEN-DAO

AUDIO-MCK

9507

GEN-MCK

+2V5-STAB

AUDIO-IN-WS

AUDIO-OUT-WS

35C1

GEN-BCK 100R

35C2

GEN-WS 100R

35C3

GEN-DAO 100R

35C4

GEN-MCK 100R

F

BACKLIGHT-IN

9512

BACKLIGHT-OUT

9513

BACKLIGHT

F

I5FB

I_18020_083.eps 080908

3103 313 6299.3

1

D

1u0

+1V8

1

100n

22u

OUT COM

COM RES 25J9

IN

25E6

F5A6

3

E

75E4 RES LD1117DT25 +3V3

1K0

100R

F5A5

9514

1

100n

35A8

+3V3 1 2 3 4 5 6 7 8 9 10

10n

25J7

2

TMS

I5F9

COM

E

100R

15A0

F5A4

1K0

INH

100n 25E4

100n 25E3 OUT

100R

35A7

35B9

100n

3

IN

75E3 LD3985M25 5

35A6

TDO

1u0

+3V3

TCK

25J6

1

100n 25E2

25E0

4u7 25E1

30R

100n

+2V5-STAB

7012 LD1117DT12 I5FA

25E5

+2V5-L41

RES

F5A3

1K0 35A4

+3V3 35A5

100n 2010

100n 2009

100n 2008

4u7 2007

2006

+3V3-FPGA

55A7

25J8

C

F5AB

+2V5-STAB

RES

1u0

25A9

1u0

25A0

25B0

+3V3-FPGA

30R

F5AA

10K

4u7

F5A2

nCONFIG

+3V3-FPGA

25J5

55A6 +3V3

25D1

DATA0

22R

35BA

75A1 BC847BW

100K 35A2

F5AC 35B7

B

100K

CONF-DONE F5A9

+1V2-FPGA

10K

35A1

4 F5B1

D

25B9

30R

VSS

I5A5

F5A1

+3V3-FPGA

HOLD

C

30R 55AA

1u0

B

nCSO

3

W

30R

55A2 S

DCLK

F5AF

1

55A9

I5AA +1V2-STAB

F5AE

6

C

ASDO

SML-310

1M FLASH

A

+3V3-FPGA

F5AD

5

D

35A0

Φ

470R

75A3 M25P10-AVMN6 VCC 2 Q

1K0 35A3

10n

25F1

10n

25F2

8

I5A1

2

3

4

5

6

7

8

9

15A0 D6 2006 D1 2007 D2 2008 D2 2009 D2 2010 D2 25A0 A6 25A1 A8 25A2 A8 25A9 A7 25B0 B6 25B1 B7 25B2 B7 25B3 B7 25B4 B7 25B5 B8 25B9 B6 25C2 C6 25D1 C6 25D2 C7 25D3 C7 25D4 C7 25D5 C8 25D6 C8 25D7 C8 25E0 D1 25E1 D2 25E2 D2 25E3 D2 25E4 D2 25E5 D7 25E6 D8 25F1 A1 25F2 A1 25J5 E1 25J6 E2 25J7 E2 25J8 F1 25J9 F1 35A0 B4 35A1 B3 35A2 C4 35A3 D4 35A4 D5 35A5 D4 35A6 D5 35A7 D5 35A8 D5 35B7 C2 35B8 E5 35B9 E4 35BA C2 35C1 E7 35C2 E7 35C3 F7 35C4 F7 35C6 B4 55A1 A2 55A2 A6 55A6 C5 55A7 D1 55A9 A6 55AA B6 55AB C1 65A0 B4 7012 D8 75A1 C4 75A3 A1 75E3 E2 75E4 E2 9500 E5 9501 E5

9502 F5 9503 F5 9504 F5 9505 F5 9506 F5 9507 F5 9512 F7 9513 F7 9514 D7 9515 D7 F5A0 A7 F5A1 B7 F5A2 C6 F5A3 D2 F5A4 D5 F5A5 D5 F5A6 D5 F5A9 C1 F5AA C2 F5AB C2 F5AC C3 F5AD A2 F5AE B2 F5AF B2 F5B0 E5 F5B1 B2 F5B2 E5 I5A1 A2 I5A5 C1 I5AA A5 I5F9 E2 I5FA D7 I5FB F8

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

139

LVDS2DP: SRP List Netname

Diagram

+12V +12V +1V2-FPGA +1V2-FPGA +1V2-PLL +1V2-PLL +1V2-STAB +1V8 +1V8 +1V8 +1V8-DVDD +1V8-SLA +2V5-L41 +2V5-L41 +2V5-L51 +2V5-L51 +2V5-STAB +3V3 +3V3 +3V3 +3V3 +3V3-DVDD +3V3-FPGA +3V3-FPGA +3V3-SLA +3V3-SSB +3V3-STANDBY +3V3-STANDBY +5V-SSB A-B0 A-B0 A-B1 A-B1 A-B2 A-B2 A-B3 A-B3 A-B4 A-B4 A-B5 A-B5 A-B6 A-B6 A-B7 A-B7 A-B8 A-B8 A-B9 A-B9 A-CLK A-CLK A-DE A-DE A-G0 A-G0 A-G1 A-G1 A-G2 A-G2 A-G3 A-G3 A-G4 A-G4 A-G5 A-G5 A-G6 A-G6 A-G7 A-G7 A-G8 A-G8 A-G9 A-G9 A-HS A-HS A-R0 A-R0 A-R1 A-R1 A-R2 A-R2 A-R3 A-R3 A-R4 A-R4 A-R5 A-R5 A-R6 A-R6 A-R7 A-R7 A-R8 A-R8 A-R9 A-R9 ASDO ASDO AUDIO-BCK AUDIO-BCK

LD1 LD4 LD2 LD5 LD2 LD5 LD5 LD1 LD3 LD5 LD3 LD3 LD2 LD5 LD2 LD5 LD5 LD1 LD3 LD4 LD5 LD3 LD2 LD5 LD3 LD1 LD1 LD3 LD1 LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD5 (1x) LD1 (1x) LD5 (2x)

3104 313 6299.3

AUDIO-DAO AUDIO-DAO AUDIO-IN-BCK AUDIO-IN-BCK AUDIO-IN-DAO AUDIO-IN-DAO AUDIO-IN-MCK AUDIO-IN-MCK AUDIO-IN-WS AUDIO-IN-WS AUDIO-MCK AUDIO-MCK AUDIO-OUT-BCK AUDIO-OUT-BCK AUDIO-OUT-DAO AUDIO-OUT-DAO AUDIO-OUT-MCK AUDIO-OUT-MCK AUDIO-OUT-WS AUDIO-OUT-WS AUDIO-WS AUDIO-WS A-VS A-VS BACKLIGHT BACKLIGHT BACKLIGHT-IN BACKLIGHT-IN BACKLIGHT-IN BACKLIGHT-OUT BACKLIGHT-OUT B-B0 B-B0 B-B1 B-B1 B-B2 B-B2 B-B3 B-B3 B-B4 B-B4 B-B5 B-B5 B-B6 B-B6 B-B7 B-B7 B-B8 B-B8 B-B9 B-B9 B-CLK B-CLK B-DE B-DE B-G0 B-G0 B-G1 B-G1 B-G2 B-G2 B-G3 B-G3 B-G4 B-G4 B-G5 B-G5 B-G6 B-G6 B-G7 B-G7 B-G8 B-G8 B-G9 B-G9 B-HS B-HS B-R0 B-R0 B-R1 B-R1 B-R2 B-R2 B-R3 B-R3 B-R4 B-R4 B-R5 B-R5 B-R6 B-R6 B-R7 B-R7 B-R8 B-R8 B-R9 B-R9 BS-10 BS-11 BS-12 BS-5

LD1 (1x) LD5 (2x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD1 (1x) LD5 (2x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD1 (1x) LD5 (2x) LD2 (1x) LD3 (1x) LD3 (1x) LD5 (1x) LD1 (1x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD3 (1x) LD3 (1x) LD3 (1x) LD3 (1x)

BS-6 BS-7 BS-8 BS-9 B-VS B-VS CLK-FPGA CLK-FPGA CONF-DONE CONF-DONE DATA0 DATA0 DCLK DCLK DPRX-0N DPRX-0P DPRX-1N DPRX-1P DPRX-2N DPRX-2P DPRX-3N DPRX-3P DPRX-AUXN DPRX-AUXP DPRX-HPD FAN1-DRV FAN1-OUT GCLK GEN-BCK GEN-BCK GEN-DAO GEN-DAO GEN-MCK GEN-WS GEN-WS INTR-OUT-BS-0 nCONFIG nCONFIG nCSO nCSO RC RC RESET-SYSTEM RESET-SYSTEM RX1ARX1ARX1A+ RX1A+ RX1BRX1BRX1B+ RX1B+ RX1CRX1CRX1C+ RX1C+ RX1CLKRX1CLKRX1CLK+ RX1CLK+ RX1DRX1DRX1D+ RX1D+ RX1ERX1ERX1E+ RX1E+ RX2ARX2ARX2A+ RX2A+ RX2BRX2BRX2B+ RX2B+ RX2CRX2CRX2C+ RX2C+ RX2CLKRX2CLKRX2CLK+ RX2CLK+ RX2DRX2DRX2D+ RX2D+ RX2ERX2ERX2E+ RX2E+ RX3ARX3ARX3A+ RX3A+ RX3BRX3BRX3B+ RX3B+ RX3C-

LD3 (1x) LD3 (1x) LD3 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD3 (1x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD3 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD4 (2x) LD4 (2x) LD3 (2x) LD3 (1x) LD5 (2x) LD3 (1x) LD5 (2x) LD5 (2x) LD3 (1x) LD5 (2x) LD3 (1x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD1 (1x) LD3 (1x) LD1 (1x) LD3 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x)

RX3CRX3C+ RX3C+ RX3CLKRX3CLKRX3CLK+ RX3CLK+ RX3DRX3DRX3D+ RX3D+ RX3ERX3ERX3E+ RX3E+ RX4ARX4ARX4A+ RX4A+ RX4BRX4BRX4B+ RX4B+ RX4CRX4CRX4C+ RX4C+ RX4CLKRX4CLKRX4CLK+ RX4CLK+ RX4DRX4DRX4D+ RX4D+ RX4ERX4ERX4E+ RX4E+ SCL-DISP SCL-DISP SCL-DISP SCL-DISP SCL-HDCP SDA-DISP SDA-DISP SDA-DISP SDA-DISP SDA-HDCP SPI-CLK SPI-CSN-BS-1 SPI-DI SPI-DO-BS-3 TACH01 TACH01-INV TCK TCK TCLK TDI TDI TDO TDO TMS TMS UA-RX UA-TX-BS-4

LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD1 (1x) LD2 (1x) LD3 (2x) LD4 (2x) LD3 (2x) LD1 (1x) LD2 (1x) LD3 (2x) LD4 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD3 (2x) LD4 (2x) LD4 (2x) LD2 (1x) LD5 (1x) LD3 (2x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD2 (1x) LD5 (1x) LD3 (2x) LD3 (2x)

I_18020_123.eps 120908

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

140

Layout LVDS2DP Panel (Top Side) 1300 1302 15A0 1F01 1F41 1F42 1FDP 2100

A3 A3 A2 A1 A1 A3 A3 A1

2101 2102 2103 2104 2105 2106 2107 2108

A1 A2 A1 A1 A1 A1 A1 A2

3103 313 6299.3

2109 2110 2111 2112 2300 2301 2302 2303

A2 A2 A2 A1 A3 A2 A2 A3

2304 2305 2306 2307 2308 2309 2311 2312

A3 A3 A3 A2 A2 A3 A2 A2

2313 2314 2315 2316 2317 2318 2320 2321

A2 A3 A3 A3 A2 A2 A3 A3

2324 2325 2326 2327 2332 2333 2334 2335

A3 A3 A3 A3 A3 A3 A3 A3

2338 2339 2344 2345 2346 2347 2406 25E5

A3 A3 A2 A2 A2 A2 A1 A3

25E6 25F1 25F2 25J5 25J6 25J7 25J8 25J9

A2 A3 A3 A2 A2 A2 A2 A2

3102 3103 3104 3105 3106 3107 3108 3109

A1 A2 A1 A2 A1 A2 A1 A2

3110 3111 3112 3113 3114 3117 3118 3119

A1 A2 A1 A2 A1 A2 A1 A2

3120 3121 3122 3123 3124 3125 3126 3127

A1 A2 A1 A2 A1 A2 A1 A2

3128 3204 3205 3207 3208 3315 3317 3336

A1 A2 A2 A2 A2 A2 A2 A2

3337 3340 3341 3343 3344 35A0 35A1 35A2

A2 A2 A2 A3 A3 A3 A3 A3

35A3 35A4 35A5 35A6 35A7 35A8 35B7 35B8

A2 A2 A2 A2 A2 A2 A3 A2

35B9 35BA 35C6 5300 5301 5302 5303 5305

A2 A3 A3 A3 A3 A2 A3 A3

55A1 55A2 55A9 55AA 65A0 7010 7011 7012

A3 A2 A2 A2 A3 A1 A1 A2

7205 7305 7306 75A1 75A3 75E3 75E4 9100

A1 A3 A3 A3 A3 A2 A2 A1

9101 9102 9103 9104 9105 9110 9300 9301

A1 A1 A1 A1 A1 A2 A2 A2

9305 9306 9514 9515

A3 A3 A3 A3

I_18020_084.eps 270808

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

141

Layout LVDS2DP Panel (Bottom Side) 1301 2006 2007 2008 2009 2010 2310 2319 2328

A1 A2 A3 A2 A3 A2 A1 A1 A1

2329 2330 2331 2336 2337 2340 2341 2342 2343

A1 A1 A1 A1 A1 A1 A1 A1 A1

3103 313 6299.3

2348 2349 2350 2351 2352 2353 2354 2355 2356

A2 A1 A1 A1 A1 A1 A1 A1 A1

2357 2358 2400 2401 2402 2403 2404 2405 2407

A1 A1 A3 A3 A3 A3 A3 A3 A3

25A0 25A1 25A2 25A9 25B0 25B1 25B2 25B3 25B4

A3 A3 A3 A3 A3 A3 A3 A3 A3

25B5 25B9 25C2 25D1 25D2 25D3 25D4 25D5 25D6

A2 A3 A2 A3 A3 A3 A3 A2 A3

25D7 25E0 25E1 25E2 25E3 25E4 3101 3115 3116

A3 A3 A3 A3 A3 A3 A1 A1 A3

3200 3201 3202 3203 3209 3300 3301 3302 3305

A3 A3 A3 A3 A3 A1 A1 A1 A1

3306 3307 3308 3309 3310 3311 3312 3313 3314

A1 A1 A1 A1 A2 A1 A2 A2 A1

3316 3318 3319 3320 3321 3322 3323 3324 3325

A1 A1 A1 A1 A2 A2 A2 A1 A1

3326 3328 3329 3330 3332 3333 3334 3335 3338

A1 A1 A1 A1 A1 A1 A1 A1 A2

3339 3342 3400 3401 3402 3403 3404 3405 3406

A2 A1 A3 A3 A3 A3 A3 A3 A3

3407 3408 3409 3410 3411 3412 3413 3414 3415

A3 A3 A3 A3 A3 A3 A3 A3 A3

3416 3417 3418 3419 35C1 35C2 35C3 35C4 5101

A3 A3 A3 A3 A2 A2 A2 A2 A2

5102 5103 5104 5304 55A6 55A7 55AB 6300 6301

A2 A2 A2 A1 A3 A3 A2 A1 A1

6302 6303 6400 6401 6402 7300 7301 7302 7304

A1 A2 A3 A3 A3 A1 A1 A1 A1

7400 7401 7402 7403 7404 7405 9106 9107 9108

A3 A3 A3 A3 A3 A3 A1 A3 A1

9109 9200 9201 9302 9303 9400 9401 9402 9500

A3 A3 A3 A1 A1 A3 A3 A3 A2

9501 9502 9503 9504 9505 9506 9507 9512 9513

A2 A2 A2 A2 A2 A2 A2 A2 A2

I_18020_085.eps 270808

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

142

Monitor Panel: DC/DC

1

2

3

4

5

6

7

8

9

DC / DC

M01A 5U00

BZG05C27

6U06

BZG05C27

6U05

2U13

100u 35V

220n

2U12

RES

220n

35V

220R 5U02

22u

6U04

+24VF

RES 22u 5U01

T 1.5A 63V 2U02 RES

A

220R

IU05

3U00 6R8

4

4u7

2U11

9U00

1n0

2U07

GND

VIA1 VIA2

IU22

5U04

16 17

2U15

RES 2U17

ENABLE+3V3

RES 3U07

FU04

68K

3U14

3K3 1%

3U13

3K3

3U12 RES

220R

10K 1%

IU16 7U02 LDS3985M25 1

+3V3

3

47K

FU03

220R

D

22n 3U15

22n

IU13

IU15

2U21 RES

IU14

3K3

RES 3U06

BAS316

FU08 +3V3

22n

16V 22u

+12V

RES 2U10

RES 6U03

3K3 1%

3U05

22n 3U04

RES 2U09

3U03

1n0

2U23 IU11

1% 47K

2U20

C

IU18

1n0

2U06

GND

+12V

D

22u

IU19

GND_HS

IU10

RES 2U08

22u 2U19

IU21

3U10

+3V3 22u

100u 35V

IU09

ILIM2 SEQ BP

13 12 6 8

2U18

9 IU08 10 11

BOOT2 SW2 EN2 FB2

6R8

6U01

IU07

Φ

33n

SS24

10R

3U02

SS24

6U00

100u 35V

22u

2U05

22u 2U04

2U03

22u

BOOT1 SW1 EN1 FB1

IU20

3U11

2 3 5 7

PVDD2

3U09

2U16

PVDD1

IU06

14

33n

2U14

15

6R8

7U00 TPS54383PWP

1

2U22

+12V

C

B

6R8

3U01 IU04

5U03

FU05

3U08

10R

B

IU23

1n0

2U24

1n0

FU06

LCD-PWR-ON

1n0

A

BZG05C27

6U02

BZG05C27

+AUDIO-POWER

2U01

1U00

IU02

100u 35V

FU07

IU01

2U00

M01A

IN

OUT

INH

BP

FU09

5

+2V5-STAB51 IU03

4

3 7 8 1

RXD

2u2

33n

2U29

2U28

2 1

+3V3

3

IN

OUT

INH

BP

FU11

5

+2V5-STAB41 IU12

4

F

2u2

33n

MSJ-035-10A B AG PPO

CU01

2U35

COM 2U34

+AUDIO-POWER

7U03 LD3985M25

TXD

2

33n

5 4 2

1u0

F

GND-24V

2U33

GND-24V

UART SERVICE CONNECTOR 1E06

1U02

47R

+24V

1U01

FU02

1 2 3 4 5 6 7 8

RES 2U31

33n

1 2 3 4 5 6 7 8 9 10 11 12

33n

RES 3U16

RES 2U30

+24V

E

13DP

1316

FU01

RES 2U32

E

1u0

2U27

COM

FU10

CU02

GND-AUDIO

I_18020_069.eps 210808

3103 313 6298.3

1

2

3

4

5

6

7

8

9

1316 E2 13DP E3 1E06 E5 1U00 A2 1U01 F5 1U02 F5 2U00 A4 2U01 A4 2U02 A2 2U03 C2 2U04 C2 2U05 C2 2U06 C3 2U07 C3 2U08 D3 2U09 D2 2U10 D4 2U11 C5 2U12 A6 2U13 A6 2U14 B6 2U15 C7 2U16 C7 2U17 D7 2U18 C8 2U19 C8 2U20 C8 2U21 E6 2U22 B4 2U23 D6 2U24 B3 2U27 E8 2U28 E8 2U29 E9 2U30 E2 2U31 E3 2U32 F3 2U33 F8 2U34 F8 2U35 F9 3U00 B4 3U01 B4 3U02 C3 3U03 C9 3U04 D3 3U05 D3 3U06 D4 3U07 E3 3U08 B7 3U09 B7 3U10 C9 3U11 C7 3U12 D6 3U13 D6 3U14 D7 3U15 D7 3U16 F1 5U00 A3 5U01 A3 5U02 A3 5U03 B3 5U04 B8 6U00 C3 6U01 C7 6U02 A2 6U03 D3 6U04 A2 6U05 A3 6U06 A3 7U00 B5 7U02 D8 7U03 E8 9U00 C4 CU01 F2 CU02 F2 FU01 E2 FU02 F2 FU03 E2

FU04 E4 FU05 B2 FU06 B2 FU07 A2 FU08 D8 FU09 E9 FU10 F5 FU11 F9 IU01 A2 IU02 A4 IU03 E8 IU04 B3 IU05 B4 IU06 B4 IU07 C4 IU08 C5 IU09 C3 IU10 C3 IU11 D3 IU12 F8 IU13 E3 IU14 D3 IU15 D4 IU16 D6 IU18 C7 IU19 C7 IU20 B6 IU21 C6 IU22 B6 IU23 B6

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

143

Monitor Panel: DC/DC

1

2

3

4

5

DC / DC

7

8

M01B

A

220n

220n

2U51

+24VF

2U50

M01B

6

A

RES IU51

IU53

IU54

RES

5U51 +5V

IU25

16 17

IU63 2U64

1n0

2U55 RES 2U57

B

IU62

IU55

C

RES

C

IU56

RES 2U65

68K

RES 3U62

3K3 1%

22n 3U63 18K 1%

22n

2U60 RES

IU65

3U61

3K3

3U60 RES

IU58

22n

IU57

D

3K3

RES

FU52 +5V

RES 2U59

33K

3U55

3K3 1%

RES

RES

3U54

22n 3U53

RES 3U56

+3V3-RS232

1% 10K

22u

IU64

22u

22u

GND_HS

4

4u7

2U58

1n0

2U54

GND RES

VIA1 VIA2

IU61

2U66

ILIM2 SEQ BP

6R8

33n

2U62

9 10 11

IU59 13 12 6 8

SS24

RES

BOOT2 SW2 EN2 FB2

6U51

10R

3U52

SS24

IU24

Φ PVDD2

1n0

RES

RES

6U50

22u

22u 2U53

2U52

330R

3U19

330R

330R

3U17

3U18

RES

9U01

BOOT1 SW1 EN1 FB1

10R

RES

22u

RES

2 3 5 7

1n0

+3V3-RS232

B

PVDD1

IU52

3U58

3U59

33n

14

6R8 RES

2U61

2U63

IU50

6R8 7U50 TPS54283PWP

9U03

RES 5U50

FU50

3U57

15

3U51

RES 2U56

6R8

1

3U50

IU60

D

FU51

7U51 LD2985BM33R +5V

10n

2U68

2

E 100n

IU26

4

2U70

BP

BZX384-C5V1

INH

+5V

+3V3-RS232

5

6U52

OUT

COM

1u0

2U67

3

IN

2U69

560R

3U69

560R

3U68

560R

3U67

560R

3U66

560R

3U65

560R

E

3U64

1

4u7

+5V

2K2

3U70

+24VF

I_18020_070.eps 210808

3103 313 6298.3

1

2

3

4

5

6

7

8

2U50 A4 2U51 A5 2U52 B1 2U53 B2 2U54 B3 2U55 C3 2U56 A3 2U57 C2 2U58 B4 2U59 D3 2U60 D5 2U61 A6 2U62 B7 2U63 B6 2U64 C6 2U65 C7 2U66 B7 2U67 E3 2U68 E4 2U69 E4 2U70 E7 3U17 B1 3U18 B1 3U19 B1 3U50 A3 3U51 A3 3U52 B3 3U53 C2 3U54 C3 3U55 C3 3U56 C3 3U57 A6 3U58 A6 3U59 B6 3U60 D5 3U61 C6 3U62 C6 3U63 C7 3U64 E1 3U65 E1 3U66 E1 3U67 E1 3U68 E2 3U69 E2 3U70 E7 5U50 B2 5U51 B7 6U50 B2 6U51 B7 6U52 E7 7U50 A4 7U51 E3 9U01 B4 9U03 B5 FU50 B1 FU51 D3 FU52 C8 IU24 B4 IU25 B5 IU26 E4 IU50 B2 IU51 A3 IU52 B4 IU53 B4 IU54 B3 IU55 C3 IU56 C3 IU57 D3 IU58 D3 IU59 B5 IU60 A6

IU61 B6 IU62 B6 IU63 C6 IU64 B5 IU65 D5

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

144

Monitor Panel: Audio

3

4

5

6

AUDIO

7

8

9

M02A

+AUDIO-POWER-S +AUDIO-POWER-S

FD12

2D24

ID18

47n

6

ID19

5

47n

FD16

GND-AUDIO

18 17

2D16 GND-A

1u0 2D17 1u0

MUTE A-STDBY

C

ID29

+3V3-STANDBY

ID30

11 7 4 2

L

R

AVCC

Φ

IN L

5 4

3

15K

15K 3D10-4

6

7 2

15K 3D10-3

15K 3D10-2

25V 220u

2D19

220n

2D08

220R

2D15

PVCC BSR

CLASS-D AUDIO AMP

R

220n 3D10-1

8

2D23

FD11

-AUDIO-R

7D10-1 TPA3120D2PWP

A

ID28

19 20

GND-A

+AUDIO-L

ID27

220n GND-AUDIO

GND-A

B

220R

220u 25V 2D07

25V 220u 2D31

2D05

10u 35V

2D06

22K

GND-AUDIO

220u 25V 2D20

2

5D08

ID34

8

100n

3D04-1

1

2D30 4R7 FD14

1

2D27

3D05

220n 2D21

ID33 1

6

10 12

A

GND-AUDIO

AVCC

7D11-1 BC847BS

5D07

M02A

2

1 3

1

R OUT L

0 GAIN 1

BSL

16

ID31

ID09 220n

15 22 21

ID10 ID32

B

25V 220u 2D11

2D09 5D01 22u

ID05

5D02

ID06

5D04

25V 220u

ID07

220R

2D12

ID08

5D05

LEFT-SPEAKER

RIGHT-SPEAKER

2D10 22u

25V 220u 2D18

220n VCLAMP BYPASS MUTE SD

220R

25V 220u

C

7D12 BC847BW

3

22K

ID01

5

7D11-2 BC847BS 4

7

4

6

5

V_NOM GND-AUDIO

5D06

E

2

220R GND-AUDIO

RIGHT-SPEAKER

FD07

GND-AUDIO

V_NOM 1K5

6 3D11-3

1K5

4

2n2

GND-AUDIO

F

3

3D11-4

5

2D25

1 2 3 4

FD06 FD08

GND-AUDIO

100R

F

15K

3

15K 3D14-4

2

15K 3D14-3

15K 3D14-2

GND-AUDIO

GND-AUDIO GND-AUDIO

3D03

FD05

1735

22K

3D04-2

E

6

LEFT-SPEAKER

1

3D04-3

VIA

37 36 35 34

2n2

ID13

AUDIO-MUTE

VIA

VIA VIA

3

7

4K7

3D08-1 1

GND-AUDIO

VIA

10n

10u

2D28

26 27 28 29

GND-AUDIO

8

MUTE

2n2

ID02

100K

FD13

7D10-2 TPA3120D2PWP

2D13

2 3D06-2 7

RIGHT-SPEAKER

D

GND-AUDIO

100K

2D14

5

2D29

3D06-4

3D11-2

4

7

D

8

ID11

2

6

100K

1K5 1K5

3D06-3

8

3

3D11-1

8

100K

40 39 38

3D06-1

30 31 32 33

1

LEFT-SPEAKER

GND-AUDIO

GND-A

ID23

220n 2D22

2D26

4

A-STDBY

220n 3D14-1

1

13 14

GND_HS 25

R

CD10

4K7

3D08-4

5

8 9

FD15

L 23 24

PGND AGND

GND-AUDIO

I_18020_071.eps 210808

3103 313 6298.3

1

2

3

4

5

6

7

8

9

1735 E9 2D05 B4 2D06 B5 2D07 B5 2D08 A6 2D09 B7 2D10 C7 2D11 B8 2D12 B8 2D13 E9 2D14 E9 2D15 B8 2D16 C4 2D17 C4 2D18 C8 2D19 A7 2D20 A5 2D21 A7 2D22 C7 2D23 B4 2D24 B4 2D25 F3 2D26 C7 2D27 A7 2D28 D3 2D29 E8 2D30 A5 2D31 A7 3D03 E3 3D04-1 A3 3D04-2 E4 3D04-3 E4 3D05 A4 3D06-1 D3 3D06-2 D3 3D06-3 D4 3D06-4 D4 3D08-1 E3 3D08-4 C4 3D10-1 A8 3D10-2 A8 3D10-3 A8 3D10-4 A8 3D11-1 E8 3D11-2 E8 3D11-3 F8 3D11-4 F8 3D14-1 C8 3D14-2 C8 3D14-3 C8 3D14-4 C8 5D01 B7 5D02 B7 5D04 B9 5D05 B9 5D06 E8 5D07 A6 5D08 A6 7D10-1 B5 7D10-2 D5 7D11-1 A4 7D11-2 E4 7D12 D4 CD10 C5 FD05 E9 FD06 E9 FD07 F9 FD08 E9 FD11 B3 FD12 B3 FD13 E3 FD14 A5 FD15 C4

FD16 B4 ID01 E4 ID02 D4 ID05 B8 ID06 B8 ID07 B8 ID08 B8 ID09 B7 ID10 B7 ID11 D4 ID13 E3 ID18 B4 ID19 B4 ID23 D4 ID27 B6 ID28 B6 ID29 C5 ID30 C5 ID31 B6 ID32 C6 ID33 A4 ID34 A3

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

145

Monitor Panel: Audio

1

M02B

2

3

4

5

6

7

AUDIO

M02B

A +AUDIO-POWER

FD57

ID61

1D50

A

FD58 +AUDIO-POWER-S

32V 3.0A T

+3V3

+3V3

1R0

3D54

B

1R0

3D53

FD56

B

AUDIO-BCK

FD50

1

BCK

AUDIO-WS

FD51

2

WS

AUDIO-DAO

FD52

3

DATAI

C

+AUDIO-L

SFOR1

7

DEEM

10

PCS

14

VOL

INTERPOLATION FILTER

GND-AUDIO

NOISE SHAPER

D VOR

VSSA

VSSD

16

VREF-DAC 12

FD55 9

GND-AUDIO

11

DAC

MUTE

DAC

FD54 8

D

SFOR0

SYSCLK

5

6

2D56

VDDD

DIGITAL INTERFACE

15

FD53

100n

GND-AUDIO GND-AUDIO

VDDA

DE-EMPHASIS AUDIO-MCK

2D52

4

100n

7D53 GND-A GND-A UDA1334BTS

C

100u 4V

ID65

13

100u 4V 2D55

2D51

ID64

E

100u 4V

GND-AUDIO

100n 2D53

GND-A

2D54

ID71

E

GND-A GND-A -AUDIO-R

I_18020_072.eps 210808

3103 313 6298.3

1

2

3

4

5

6

7

1D50 A3 2D51 B3 2D52 B4 2D53 E4 2D54 E4 2D55 B3 2D56 B5 3D53 B4 3D54 B4 7D53 C3 FD50 C2 FD51 C2 FD52 C2 FD53 D2 FD54 D3 FD55 D3 FD56 B4 FD57 A2 FD58 A3 ID61 A3 ID64 B3 ID65 B4 ID71 E4

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

146

Monitor Panel: DP-Rx 1

M03A

2

3

4

5

6

7

11

12

13

M03A Φ

A-CLK B-CLK TXCLK GCLK

10

7F00-2 EP2C5F256C7N

IF00

9F00 RES

IF11 IF13 9F01 RES 9F02 RES

DATA0 DCLK

3F29 3F28

47R 47R

H2 H1 J2 J1 H16 H15 J15 J16

F1 H4

7F00-4 EP2C5F256C7N

Φ

CONTROL CLK-PLL GCLK

9

DP-Rx 7F00-1 EP2C5F256C7N

A

8

0 1 2 3 4 CLK 5 6 7

CONFIG CONF_DONE

DATA0 DCLK

TCK TMS TDO TDI

G5 M13

CE STATUS

MSEL

nSTATUS

MSEL0

J13 K12

MSEL1

F2 G1 G2 H5

3F00

ASDO nCSO TX1C+ TX1CTX1CLK+ TX1CLKTX1D+ TX1DTX2A+ TX2ATX1ETX1E+ TX2CLK+ TX2CLKTX2D+ TX2D-

+3V3-FPGA

10K

nCONFIG CONF-DONE

J5 L13

0 1

nSTATUS

IF10 9F03 9F04 RES 9F05

MSEL0 MSEL1

TCK TMS TDO TDI

+3V3-FPGA

IF12

B

47R C3 47R F4 P1 P2 N1 N2 L1 L2 K4 K5 K1 K2 E1 E2 D3 D4

3F26 3F27

7F00-7 EP2C5F256C7N

Φ

BANK1

IO_C3|ASDO IO_F4|CSO_ IO_P1|LVDS0p IO_P2|LVDS0n IO_N1|LVDS1p IO_N2|LVDS1n IO_L1|LVDS2p IO_L2|LVDS2n IO_K4|LVDS3p IO_K5|LVDS3n IO_K1|LVDS4n IO_K2|LVDS4p IO_E1|LVDS5p IO_E2|LVDS5n IO_D3|LVDS6p IO_D4|LVDS6n

BANK3

IO_E3|LVDS7p IO_E4|LVDS7n IO_D5|LVDS8 p IO_E5|LVDS8 n IO_C1|LVDS9p IO_C2|LVDS9n IO_L4|PLL1_OUTp IO_M4|PLL1_OUTn IO_F3|VREFB1N0 IO_J4|VREFB1N1 IO_L3 IO_M1 IO_M2 IO_M3 IO_P3

E3 E4 D5 E5 C1 C2 L4 M4 F3 J4 L3 M1 M2 M3 P3

TX2C+ TX2CTX2B+ TX2BTX2E+ TX2E-

D13 C14 D16 D15 G13 G12 H11 J11 F16 F15 G15 G16 J12 H12 K15 K16 L16 L15

A-B5 A-B2 A-B4 A-B3 A-G0 A-B9 A-G3 A-G6 A-B7 A-B8 A-G2 A-G1 A-G5 A-G4 A-G8 A-G7 A-G9 A-R0

IF01 IF02

Φ

IO_D13|LVDS29p IO_C14|LVDS29n IO_D16|LVDS30p IO_D15|LVDS30n IO_G13|LVDS31p IO_G12|LVDS31n IO_H11|LVDS32p IO_J11|LVDS32n IO_F16|LVDS33p IO_F15|LVDS33n IO_G15|LVDS34p IO_G16|LVDS34n IO_J12|LVDS35p IO_H12|LVDS35n IO_K15|LVDS36p IO_K16|LVDS36n IO_L16|LVDS37p IO_L15|LVDS37n

M16 M15 N16 N15 P16 P15 N14 N13 M12 N12 M14 IF03 IF04 H13 E14 3F01 D14 10R E16 L14 P14

IO_M16|LVDS38 p IO_M15|LVDS38 n IO_N16|LVDS39p IO_N15|LVDS39n IO_P16|LVDS40p IO_P15|LVDS40n IO_N14|LVDS41p IO_N13|LVDS41n IO_M12|LVDS42p IO_N12|LVDS42n IO_M14|VREFB3N1 IO_H13|VREFB3N0 IO_E14|PLL2_OUTp IO_D14|PLL2_OUTn IO_E16 IO_L14 IO_P14

A

A-R2 A-R3 A-R8 A-R9 A-HS A-DE A-R7 A-R6 A-R4 A-R5 RES

CLK-PLL

IF05

B

A-B6 A-R1 A-VS

NC

+1V2-FPGA

7F00-6 EP2C5F256C7N

Φ

POWER

100n

100n

2F03

2F02

1u0

2F01

M6 1 E11 2

1K0

RES

3F15

100R

3F16

100R

TMS

3F17

100R

1F00

FF00

1 2 3 4 5 6 7 8 9 10

FF01 FF02

+3V3-FPGA

30R 3F18

TDI

+3V3 5F04

FF08

+2V5-STAB51

+2V5-L51

G 30R

5F00

100n

100n 2F23

100n 2F22

100n 2F21

2F19

4u7 2F20

30R

MP-LED2

IF17

MP-LED4

MP-LED1

H

D C S

3F20

330R

3F21

330R

3F22

330R

3F23

330R

3F24

330R

W 7F04 LD1117DT12

HOLD

FF11

5

FF12

6

FF13

1

+3V3-FPGA ASDO DCLK

3F11

Φ

1M FLASH

nCSO

+3V3-FPGA 7

FF16 FF15

I

3F07

I

nCONFIG

+3V3-FPGA 10K

DATA0

7F01 BC847BW

100K 3F10

4u7

2F36

1

100n

2F33

22u

2F32

3F09

CONF-DONE

RES

SML-310

6F00

SML-310

6F01

SML-310

6F02

SML-310

6F03

SML-310

6F04

FF14

100K

+1V2

COM

10K

OUT

3F08

IN

4

+3V3

2

FF10

I_18020_073.eps 210808

3103 313 6298.3 2

3

4

5

6

7

8

9

10

11

H

3

VSS 3

470R

100n

7F02 M25P10-AVMN6 VCC 2 Q

SML-310

100n

100n 2F28

100n 2F27

100n 2F26

2F24

4u7 2F25

30R

MP-LED5

10n

+2V5-STAB41

2F34

+2V5-L41

2F35

8

FF09

6F05

5F05

1

F

FF04 5-147279-2

1K0

3F19

MP-LED3 IF09

FF03

100R

RESERVED

G

1K0 3F14

1K0 3F13

3F12

22u

2F10 RES

100n

100n 2F09

FF07

100n

GNDA_PLL

5F03 +3V3

2F18

1 VCCD_PLL 2

+3V3-FPGA

TDO

TCK

100n

GND_PLL2

D12 F12

2F17

L6 F11

100n 2F08

30R

L5 N5

100n

+1V2-PLL

D

+3V3

+1V2-FPGA

100n 2F16

F

5F02

100n 2F15

GND_PLL1

C

E +3V3-FPGA

FF06

VCCINT

M5 1 VCCA_PLL E12 2

TX3E+ TX3EMP-LED4 MP-LED2 TX3D+ TX3DTX4B+ TX4BTX4C+ TX4C-

TX4CLK+ TX4CLKTX4D+ TX4DTX4E+ TX4ETX1B+ TX1BTX1A+ TX1ATX4A+ TX4AMP-LED1 MP-LED5

T7 IO_T7|LVDS54p R7 IO_R7|LVDS54n T5 IO_T5|LVDS55p R5 IO_R5|LVDS55n T4 IO_T4|LVDS56p R4 IO_R4|LVDS56n P5 IO_P5|LVDS57p P4 IO_P4|LVDS57n T3 IO_T3|LVDS58 p R3 IO_R3|LVDS58 n N9 IO_N9|LVDS59p N10 IO_N10|LVDS59n L7 IO_L7|LVDS60p L8 IO_L8|LVDS60n N11 IO_N11|VREFB4N0 N8 IO_N8|VREFB4N1 L12 IO_L12 P11 IO_P11 T6 IO_T6

IO_M11|LVDS43p IO_L11|LVDS43n IO_T14|LVDS44p IO_R14|LVDS44n IO_T13|LVDS45p IO_R13|LVDS45n IO_T12|LVDS46p IO_R12|LVDS46n IO_P12|LVDS47p IO_P13|LVDS47n IO_K11|LVDS48 p IO_K10|LVDS48 n IO_R10|LVDS49p IO_T10|LVDS49n IO_L9|LVDS50p IO_L10|LVDS50n IO_T11|LVDS51p IO_R11|LVDS51n IO_T9|LVDS52p IO_R9|LVDS52n IO_T8|LVDS53p IO_R8|LVDS53n

+3V3-FPGA

30R

2F12

+1V2-FPGA

MP-LED3 TX3A+ TX3ATX3C+ TX3CTX3CLK+ TX3CLKTX3B+ TX3B-

5F01

2F14

G9 H10 H7 J7

IF08

M11 L11 T14 R14 T13 R13 T12 R12 P12 P13 K11 K10 R10 T10 L9 L10 T11 R11 T9 R9 T8 R8

+1V2

100n 2F07

GND

2F06

VCCIO4

B-R6 B-R7 B-R8 B-B8 B-B9 B-R9 SCL-UP 3F03 SDA-UP B-B3 B-B4 B-B0 B-B1 B-B5 B-B2 A-B0 A-B1 BACKLIGHT-IN BACKLIGHT-OUT B-R4 B-B6 B-B7

+1V2-PLL

1u0

M10 M7 P10 P7 T15 T2

+2V5-L51

B9 A9 D10 D11 A10 B10 G11 3F02 G10 100R A12 100R B12 A13 B13 C12 C13 A14 B14 D8 C11 A8 A11 B11

FF05

1u0

E

GND VCCIO3

1u0

B16 G14 K14 R16

+3V3-FPGA

100n

VCCIO2

2F00

GND

A15 A2 C10 C7 E10 E7

+3V3-FPGA

BANK4

IO_B9|LVDS21p IO_A9|LVDS21n IO_D10|LVDS22p IO_D11|LVDS22n IO_A10|LVDS23p IO_B10|LVDS23n IO_G11|LVDS24p IO_G10|LVDS24n IO_A12|LVDS25p IO_B12|LVDS25n IO_A13|LVDS26p IO_B13|LVDS26n IO_C12|LVDS27p IO_C13|LVDS27n IO_A14|LVDS28 p IO_B14|LVDS28 n IO_D8|VREFB2N1 IO_C11|VREFB2N0 IO_A8 IO_A11 IO_B11

IO_C4|LVDS10p IO_C5|LVDS10n IO_G7|LVDS11p IO_G6|LVDS11n IO_F9|LVDS12p IO_F10|LVDS12n IO_E6|LVDS13p IO_F6|LVDS13n IO_A3|LVDS14p IO_B3|LVDS14n IO_A4|LVDS15p IO_B4|LVDS15n IO_A5|LVDS16p IO_B5|LVDS16n IO_C6|LVDS17p IO_D6|LVDS17n IO_A6|LVDS18 p IO_B6|LVDS18 n IO_F8|LVDS19p IO_F7|LVDS19n IO_B7|LVDS20p IO_A7|LVDS20n

2F05

VCCIO1

2F11

D

A1 A16 B15 B2 C8 C9 E8 E9 G8 H14 H3 H8 H9 J14 J3 J8 J9 K9 M8 M9 P8 P9 R15 R2 T1 T16

5F06

B1 G3 K3 R1

+2V5-L41

Φ

BANK2 C4 C5 RES 3F04 G7 100R G6 SCL-AMBI-3V3 3F05 100R RES F9 B-R5 IF06 F10 3F25 LVDS-ENABLE E6 100R B-G8 3F06 F6 RES SDA-AMBI-3V3 IF07 A3 100R B-G1 B3 B-G0 A4 B-G4 B4 B-G3 A5 B-G7 B5 B-G6 C6 B-R0 D6 B-R1 A6 B-R2 B6 B-G9 F8 B-DE F7 B-VS B7 B-R3 A7 B-HS B-G2 B-G5 LCD-PWR-ON

100n 2F13

NC

7F00-5 EP2C5F256C7N

Φ

30R

NC

7F00-3 EP2C5F256C7N

+1V2-FPGA

4u7

C

H6 J10 J6 K13 K6 K7 K8 N3 N4 N6 N7 P6 R6

2F04

B8 C15 C16 D1 D2 D7 D9 E13 E15 F13 F14 F5 G4

12

13

1F00 F13 2F00 E7 2F01 E7 2F02 E8 2F03 E8 2F04 F6 2F05 F7 2F06 F7 2F07 F7 2F08 F8 2F09 F8 2F10 F8 2F11 F6 2F12 F7 2F13 F7 2F14 F7 2F15 F8 2F16 F8 2F17 F8 2F18 F9 2F19 G6 2F20 G6 2F21 G6 2F22 G7 2F23 G7 2F24 H6 2F25 H6 2F26 H6 2F27 H7 2F28 H7 2F32 I6 2F33 I6 2F34 H10 2F35 H10 2F36 I7 3F00 A4 3F01 B13 3F02 C8 3F03 C9 3F04 C6 3F05 C6 3F06 C6 3F07 I11 3F08 I13 3F09 I13 3F10 I13 3F11 H13 3F12 F12 3F13 F12 3F14 F12 3F15 F13 3F16 F13 3F17 F13 3F18 F13 3F19 G12 3F20 H4 3F21 H3 3F22 H2 3F23 H2 3F24 H1 3F25 C6 3F26 A6 3F27 A6 3F28 B1 3F29 B1 5F00 G11 5F01 E6 5F02 F6 5F03 F6 5F04 G6 5F05 G6 5F06 E6 6F00 I4 6F01 I3 6F02 I2 6F03 I2 6F04 I1 6F05 H13 7F00-1 A2 7F00-2 A7 7F00-3 C7 7F00-4 A12 7F00-5 C12 7F00-6 D2 7F00-7 B2 7F01 I13 7F02 G11 7F04 H7 9F00 A1 9F01 A1 9F02 A1 9F03 A5 9F04 A5 9F05 B5 FF00 F13 FF01 F13 FF02 F13 FF03 F13 FF04 G13 FF05 E7 FF06 E7 FF07 F6 FF08 G7 FF09 G7 FF10 I11 FF11 H12 FF12 H12 FF13 H12 FF14 I11 FF15 I11 FF16 I13

IF00 A1 IF01 A8 IF02 B8 IF03 B13 IF04 B13 IF05 B13 IF06 C6 IF07 C6 IF08 E6 IF09 G6 IF10 A4 IF11 A1 IF12 B4 IF13 A2 IF17 G11

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

147

Monitor Panel: DP-Receiver & Power 1

2

3

+3V3

100R

125 ML-P1 ML-N0

DPRX-0P

3F1S

10R

ML-P0

DPRX-AUXP

3F1T

10R

ML-AUX+

2F1G

100n

DPRX-AUXN DPRX-HPD

3F1U 3F1V

10R 10R

ML-AUXHPD-OUT

2F1H

100n

DPRX-2P DPRX-2N

SDM-AUX+

9F0F RES IF0Q

BACKLIGHT-IN

2F2F

3F1G 100n

4K7

4K7 3F0W

8

100n

4K7

4K7

4K7

4K7

4K7 RES 3F2Z

RES 3F2Y

RES 3F2E

RES 3F2W

RES 3F0F

RES 3F0K

RES 3F0H

4K7

4K7

4K7

4K7

4K7 RES 3F2V

RES 3F0M

RES 3F0P

2F1R

4

FF0W

IF1B

RESET-N

100R

1n0

7F0B M25P20-VMN

RES 100p

2F1K

SPI-CLK

FF0F 5

SPI-CSN-BS-1 UP-WC

FF0G 6

9F0L RES

FF0H

3F0C

FF0N

10K

FF0P

VCC

Φ Q 2M C FLASH D

1

S

3

W

7

HOLD

3F0D 10K

+1V8

E

7

WC

FF0R

6

SCL ADR

MSCL-I2C

9F0G

MSDA-I2C

5

SDA

1F0A 1 2 3

2

FF0Q

FF1D FF1M

4

SCL-AUX

FF1C

SDA-AUX

5

SPI-DI B3B-PH-SM4-TBT(LF)

G

VSS

64 58 50

XOUT

Y3

S0 S1|SDA S2|SCL

2 13 12

18p 3F1B 3F1C

100R 100R

22u 16V

2F2G

100n

H

+1V8

BC857BW 7F0M

RC-IN IF0K

SDA-UP SCL-UP

GND

RC-IN 5

10

2F1Q

2F2A

1u0

9F0M

18p 2F2C

14

1K0

Y2

1

FF0S

IF0L

3F0Z 10R

7F0N BC847BW

9F0H

RC-OUT

RC-OUT

I

1K0

8

IF0A

XIN|CLK

3F2R

1F0F 27M0 DSO751SV

Y1

2

PMEG1020EA

3F2S

9

OUT

100p

11

TXCLK

IN

COM

IF0M

6F0D

+3V3-STANDBY

4

10K 2F2D

GCLK

2

GCLK

RESERVED

BAS316 2F2B

3

+3V3

6F0C

+5V

3F1A

PORT_B NC

3

VDDOUT VDD Φ VCTRL

7F0K CDCE913PW

1F0E 27M

1

3

4

2F1Z

30R

7F0Q LD1117DT18

IF0N

1

IF0P

FF1P

30R

5F0H 5F0J

6

+3V3

7

RESERVED

1u0

DOPB_20|GPIO_20 DOPB_21|GPIO_21

I_18020_074.eps 210808

2

D

HDCP EPROM

3103 313 6298.3 1

SDA-UP

EDID OF DISPLAY PORT

Φ (512x8) EEPROM 0 1 2

SCL-UP 3F2P

F

+3V3-DVDD

7F0P BC847BW RES

100R

4

DOPB_12 DOPB_13 DOPB_14 DOPB_15 DOPB_16 DOPB_17 DOPB_18 DOPB_19

IF0R

1 2

SPI-DO-BS-3

+3V3

BACKLIGHT-OUT

3F2N FF0V

5

SDA

68020 I2C BUS

1K0

DOPB_10|GPIO_10 DOPB_11|GPIO_11

100R

3F30

NC

RC-OUT

FF1G

FF1H

3F89

3F88

DOPB_7 DOPB_8 DOPB_9

38 43 44 45 111 112 113 114 115 116 117 119 121 122

47272-0001

1F0D SKHU 3 4

1 2 3

UP-WC

+3V3-DVDD

100R

RES 2F1J

IF0C

PORT_A DPRX

DOPB_0|GPIO_0 DOPB_1|GPIO_1 DOPB_2|GPIO_2 DOPB_3|GPIO_3 DOPB_4|GPIO_4 DOPB_5|GPIO_5 DOPB_6|GPIO_6

21 23

FF0U 6

ADR

FF1N

FF1L

IF1A

7

WC SCL

7F0C M24C04-WDW6

+3V3 MANUAL RESET

FF1F

3F90

BACKLIGHT-IN 10K

+1V8-DPA

270R 1%

RES 1K0

68

100p RES 3F91

DPRX_REXT DPRX_VBUFC

3F1W

2F2E

IF0S 54

9F0N

DPRX-3P DPRX-3N

4K7

4K7

FF1E

+3V3-DP-STANDBY

RES 3F2U

3F2T

SDM-AUX- FF0E

5F0F RES

IF0J

FF0A

9F0J

+3V3

2F1F

DPRX-1P DPRX-1N

0 1 2

3F2Q 10K IF0Z RES

8

59 60

33n RES

10K

3F1H

10R 10R

2F1V

220R RES

+3V3-STANDBY

3F0Y

8

3F1Q 3F1R

5F0G

B

4

DPRX-1P DPRX-0N

100R IF1D

C

9F0Q

Φ (512x8) EEPROM

1 2 9F0E 3

100n

ML-P2 ML-N1

IF1E

7F0H M24C04-WDW6

2F1M

10R 10R

+3V3

10K

3F1N 3F1P

FF1B

RES 3F87

DPRX-2P DPRX-1N

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 24

INTR-OUT-BS-0

100n

ML-P3 ML-N2

9F0P RES

+3V3

SPI-CSN-BS-1 SPI-CLK SPI-DO-BS-3 UA-TX-BS-4 IF1G A-R6 IF1H A-R5 IF1J A-R4 IF1K A-G9 IF1L A-R0 IF1M A-R1 IF1N A-R3

PDZ24-B

ML-N3

10R 10R

100R 3F2H

GND-24V

4K7 4K7 IF1F 4K7 RES 4K7 4K7 4K7 4K7 4K7 4K7 4K7 4K7 4K7

6F0F

10R

3F1L 3F1M

1F0H

3F1K

DPRX-3P DPRX-2N

6F0E

DPRX-3N

PDZ24-B

DPRX-0P DPRX-0N

65 66

4K7

RES 3F1Y 3F1Z 3F80 3F2A 3F0E 3F0G 3F0J 3F0L 3F2D 3F0N 3F2B 3F2C

10K

30R DPRX_ML_L3P DPRX_ML_L3N

FF1A

MSDA-I2C

BACKLIGHT-BOOST LAMP-ON-OUT 3F2G BACKLIGHT-OUT BACKLIGHT-PWM-ANA-DISP

3F2L

100R

100R RES

3F0U DPRX-CABLE-DET

IF1C

3F2M RES

FF0J FF0K FF0L FF0M

GND-24V

DPRX-HPD

56 57

62 63

9F0D FF0Z

DVDD_1V8

PDZ24-B

DPRX_ML_L2P DPRX_ML_L2N

FF1K

CRVSS

8 34 46 97 104 148

9 32 39 48 77 95 102 118 129 146 158

GND-24V

1F0G

DPRX_ML_L1P DPRX_ML_L1N

FF1J

MSCL-I2C

RVDD_3V3

BOOT STRAP

1F0J

DPRX_ML_L0P DPRX_ML_L0N

DPRX-AUXP DPRX-AUXN

49

SDA-UP SCL-UP 100R MSCL-I2C MSDA-I2C

A +24V

1 2 3 4 5 6 7 8 9 10 11 12 13 14

1F0K

128

3F1E 3F0T 100R 100R

1M0

3F1F

3F92

100R

3F1D

470R

3F1J

DPRX-CABLE-DET

52 51

UA-RX UA-TX-BS-4

120

1M0

DPRX_HPD_OUT

DOPA_23|BS_12 DOPA_24|GPO_13|BS_7 DOPA_25|GPO_14|BS_6 DOPA_26|GPO_15|BS_5 DOPA_27|GPO_16 DOPA_28|GPO_17 DOPA_29|GPO_18 DOPA_HS|GPO_19

I

6F0B

SML-310 DPRX_AUXP DPRX_AUXN

DOPA_22

DOPB_22 DOPB_23 DOPB_HS DOPB_VS DOPB_DE DOPB_CLK DOPB_24 DOPB_25 DOPB_26 DOPB_27 DOPB_28 DOPB_29

100R

1FDP

DOPA_19|BS_8 DOPA_20|BS_9 DOPA_21|BS_10

DOPA_DE DOPA_VS DOPA_CLK

100K

DOPA_0 DOPA_1 DOPA_2 DOPA_3 DOPA_4 DOPA_5 DOPA_6 DOPA_7 DOPA_8 DOPA_9 DOPA_10 DOPA_11 DOPA_12 DOPA_13 DOPA_14 DOPA_15 DOPA_16 DOPA_17 DOPA_18

+1V8-DVDD

3F85 3F86

1 14 37 47 69 87 110 138 151

RPLL_VSS

7F0L BC847BW

100n

10R

DOPA_I2S_SCLK DOPA_I2S_WS DOPA_I2S_MCLK DOPA_I2S_MUTE

30 31 41 42

+3V3

SPI-CSN-BS-1 SPI-CLK SPI-DO-BS-3 SPI-DI

+3V3

1u0 2F1Y

3F0B

14

1319 S14B-PH-K-S

POWER

+3V3-DVDD

RES 2F1W

H

9F0K

70 71 72 73 74 75 76 78 79 80 81 82 83 84 85 86 88 89 90 91 92 93 94 96 98 99 100 101 103 105 106 107 108 109

DOPA_I2S_0|DOPA_SPDIF DOPA_I2S_1|DOPA_SPDIF DOPA_I2S_2|DOPA_SPDIF DOPA_I2S_3|DOPA_SPDIF

100K 3F94

15 16 FF0B FF0C 17 18 FF0D 3F0Q-4 19 4 47R AUDIO-BCK 5 6 3 3F0Q-3 20 AUDIO-WS 47R 21 1 AUDIO-MCK 8 40 3F0Q-1 47R FF0Y 130 A-B0 131 A-B1 132 A-B2 133 A-B3 134 A-B4 135 A-B5 136 A-B6 137 A-B7 139 A-B8 140 A-B9 141 A-G0 142 A-G1 143 A-G2 144 A-G3 145 A-G4 147 A-G5 152 A-G6 153 A-G7 154 A-G8 155 A-G9 156 A-R0 157 A-R1 159 A-R2 160 A-R3 2 A-R4 3 A-R5 4 A-R6 5 A-R7 6 A-R8 7 A-R9 10 A-HS 11 A-DE 12 A-VS 3F0A 13 A-CLK 47R

3F93

3F0Q-2 2 AUDIO-DAO 7

G

100n

PORTS_NC

28 29

DPRX_CABLE_DET

7F0J PDTC114EU

2F1D

DPRX_VDDA

10R

RESET_

INTR-OUT-BS-0

24 25 26 27

CS_|BS_1 CLK DO|BS_3 DI

SDA SCL I2C MSCL MSDA

10n

2F1S

30R

5F0E

RESET

67 61 55 53

7F0A-2 GM68020H

C

B-B0 B-B1 B-B2 B-B3 B-B4 B-B5 B-B6 B-B7 B-B8 B-B9 B-G0 B-G1 B-G2 B-G3 B-G4 B-G5 B-G6 B-G7 B-G8 B-G9 B-R0 B-R1 B-R2 B-R3 B-HS B-VS B-DE B-CLK B-R4 B-R5 B-R6 B-R7 B-R8 B-R9

13

10K

36

3F82

IF0T

F

TEST0 TEST1

FF0T

23

UART_RX|GPO_4 UART_TX|BS_4|GPO_5

RES 100R

+1V8-DPA

E

12

9F0C

4K7

AUX_SCL AUX_SDA

33 35

9F0B 9F0A

SPI

TCLK

149 150

3F84 100R

22

GPIO_32

INTR_OUT|BS_0

XTAL

127

IF0F

D

11

7F0A-3 GM68020H

+3V3-DVDD

3F0V

27M

1F0C

126

18p

3F81

RESET-N

+1V8-DPA

VBUFC_RPLL

6F0G

100n

100n 2F1C

100n 2F1B

4u7

2F1A

+1V8-DPA 2F1L

2F0Z

22u 6.3V

30R

123

3F83 100R

+3V3-DVDD

IF0D

SYSTEM

IF0B

18p

4K7

4K7 3F0S

100n 3F0R

2F1N

100n

2F0V

4u7

2F1T

AVDD_3V3 RPLL

RESERVED

2F1U

IF0U

+1V8

10

+3V3-DVDD

3F95

+3V3-DPA

100n

100n 2F0T

100n 2F0S

100n 2F0R

100n 2F0Q

100n 2F0P

100n 2F0N

2F0M

4u7

+3V3

SCL-AUX SDA-AUX

5F0D

+3V3-DPA

DVDD_1V8

10R

+3V3-DPA 2F1E

2F0U

22u 6.3V

30R

7F0A-1 GM68020H

10R

IF0V

5F0C

+3V3

9

3F2J

RES 3F2K

TXCLK

+1V8-DVDD 2F0Y

2F0L

22u 6.3V

30R

8

M03B +1V8-DVDD

GCLK

IF0W

5F0B

+1V8

7

124

100n

100n 2F0K

100n 2F0J

100n 2F0H

100n 2F0G

100n 2F0F

100n 2F0E

100n 2F0D

100n 2F0C

4u7

2F0B

2F0W

2F0A

22u 6.3V

30R

A

6

+3V3-DVDD

IF0Y

5F0A

+3V3

5

DP RECEIVER & POWER SUPPPLY

M03B

B

4

3

4

5

1X01

6

1X02

7

1X04

8

9

10

11

12

13

14

1319 A12 1F0A F11 1F0C B6 1F0D E9 1F0E I7 1F0F I5 1F0G E8 1F0H E8 1F0J F8 1F0K A13 1FDP D8 2F0A A1 2F0B A2 2F0C A2 2F0D A2 2F0E A3 2F0F A3 2F0G A3 2F0H A3 2F0J A3 2F0K A4 2F0L A1 2F0M A2 2F0N A2 2F0P A2 2F0Q A3 2F0R A3 2F0S A3 2F0T A3 2F0U B1 2F0V B2 2F0W A2 2F0Y A2 2F0Z B1 2F1A B2 2F1B B2 2F1C B2 2F1D C3 2F1E B2 2F1F F10 2F1G E6 2F1H E6 2F1J F7 2F1K G7 2F1L B2 2F1M E12 2F1N B4 2F1Q H12 2F1R C12 2F1S C6 2F1T B5 2F1U A5 2F1V B14 2F1W I4 2F1Y I5 2F1Z H6 2F2A H7 2F2B H8 2F2C I8 2F2D I9 2F2E F6 2F2F F7 2F2G H13 3F0A F1 3F0B H1 3F0C G9 3F0D G9 3F0E D8 3F0F C10 3F0G D8 3F0H C10 3F0J D8 3F0K C9 3F0L D8 3F0M C9 3F0N D8 3F0P C9 3F0Q-1 D1 3F0Q-2 C1 3F0Q-3 D2 3F0Q-4 D1 3F0R B5 3F0S B5 3F0T B8 3F0U B8 3F0V B9 3F0W B9 3F0Y C13 3F0Z I9 3F1A I9 3F1B I7 3F1C I7 3F1D B8 3F1E B8 3F1F D7 3F1G F7 3F1H E13 3F1J D6 3F1K D5 3F1L D5 3F1M D5 3F1N E5 3F1P E5 3F1Q E5 3F1R E5 3F1S E5 3F1T E5 3F1U E5 3F1V E5 3F1W F4 3F1Y D8 3F1Z D8 3F2A D8 3F2B D8

3F2C D8 3F2D D8 3F2E C10 3F2G B14 3F2H B13 3F2J A6 3F2K A6 3F2L B13 3F2M B13 3F2N D13 3F2P D14 3F2Q D11 3F2R I10 3F2S I10 3F2T C9 3F2U C9 3F2V C9 3F2W C10 3F2Y C10 3F2Z C10 3F30 G7 3F80 D8 3F81 B5 3F82 B6 3F83 B6 3F84 B6 3F85 B8 3F86 B8 3F87 E11 3F88 G6 3F89 G6 3F90 F6 3F91 F6 3F92 C4 3F93 D3 3F94 D4 3F95 A8 5F0A A1 5F0B A1 5F0C B1 5F0D B1 5F0E C3 5F0F F7 5F0G B13 5F0H H7 5F0J H6 6F0B C4 6F0C H10 6F0D H10 6F0E E8 6F0F E8 6F0G F8 7F0A-1 A6 7F0A-2 C2 7F0A-3 A10 7F0B F10 7F0C E12 7F0H C12 7F0J C5 7F0K H7 7F0L D4 7F0M I10 7F0N I10 7F0P G6 7F0Q H13 9F0A B6 9F0B B6 9F0C B13 9F0D B12 9F0E D12 9F0F G6 9F0G E12 9F0H I12 9F0J C13 9F0K H1 9F0L G9 9F0M I9 9F0N F7 9F0P C12 9F0Q C13 FF0A E7 FF0B C1 FF0C C1 FF0D D1 FF0E E7 FF0F G10 FF0G G9 FF0H G9 FF0J B13 FF0K B13 FF0L B13 FF0M B13 FF0N G9 FF0P G9 FF0Q G10 FF0R E13 FF0S H13 FF0T B6 FF0U D13 FF0V D13 FF0W D13 FF0Y D1 FF0Z B12 FF1A B12 FF1B D12 FF1C G12 FF1D F12 FF1E F7 FF1F F7 FF1G F8 FF1H G7 FF1J B9 FF1K B10 FF1L E12

FF1M G12 FF1N D12 FF1P H10 IF0A I6 IF0B A6 IF0C F4 IF0D A8 IF0F B5 IF0J F6 IF0K I10 IF0L I9 IF0M H10 IF0N H7 IF0P H6 IF0Q G6 IF0R G6 IF0S F4 IF0T C3 IF0U B3 IF0V B3 IF0W A3 IF0Y A3 IF0Z D12 IF1A C14 IF1B E11 IF1C B14 IF1D B13 IF1E C12 IF1F D9 IF1G D10 IF1H D10 IF1J D10 IF1K D10 IF1L D10 IF1M D10 IF1N D10

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

148

Monitor Panel: DP-Rx 1

2

M03C

3

4

5

6

7

8

9

11

10

12

13

DP Rx

M03C

A

A

180R 3F6S

TX3B-

180R 4p7 4p7 TXPAN1B+

TX3B+

TXPAN1E+

180R TXPAN1FRES 2F5M 2F5N

TX2A+

3F5W

2F5P 2F5Q

4p7 4p7 TXPAN2A+

3F5Y

TX2C+

3F6D

3F5Z

FF6D FF6F FF6H

4p7 4p7

2F5T 2F5U

TX3D+

TX2CLK+

TX3E-

TX3E+

TX2E-

3F6F

2F5V 2F5W

TX4A-

TX4A+

TX2E+

3F6N

4p7 4p7 RES

3F6W

150R 150R 150R

3F7A

3F7J 180R 3F7L

TXPAN3F+

TX4B-

TO DISPLAY

TX4C-

3F7P

TX4C+

2F6V 2F6W

4p7 4p7 TXPAN4A+

TXPAN4B2F6Y 2F6Z

FF6U FF6W FF6Y FF6Z

FF7B FF7C

TXPAN3DTXPAN3D+ TXPAN3ETXPAN3E+ TXPAN3FTXPAN3F+ TXPAN4ATXPAN4A+ TXPAN4BTXPAN4B+ TXPAN4CTXPAN4C+

FF7D FF7E FF7F FF7G FF7H FF7J FF7K FF7L FF7M FF7N FF7P FF7Q FF7R FF7S

TXPAN4DTXPAN4D+ TXPAN4ETXPAN4E+ TXPAN4FTXPAN4F+

FF7T FF7U FF7V FF7W FF7Y FF7Z

4p7 4p7 TXPAN4B+

180R 3F7Q

3F7S

TXPAN3CLKTXPAN3CLK+

FF7A

5F5A 5F5B

TXPAN4C2F7A 2F7B

TX4CLK-

+12V 5F5C

4p7 4p7

TX4CLK+

3F7V

IF5A

120R IF5B

51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

2F7L 2F7M 2F7P 2F7R

RES 100p RES 100p RES 100p

2F7N 2F7Q 2F7S

RES 100p RES 100p RES 100p RES 100p

C

D

E

F

1F51

4p7 4p7 TXPAN4CLK+

180R

3F6J

TXPAN2D2F5Z 2F6A

TX4D-

TXPAN2D+

TX4D+

TXPAN2E2F6B 2F6C

3F7W 180R

4p7 4p7

TX4E-

3F7Z

TXPAN2E+

TX4E+

TXPAN4D2F7E 2F7F

G

4p7 4p7 TXPAN4D+

180R 3F50 180R

4p7 4p7

180R

3F52

TXPAN4E2F7G 2F7H

4p7 4p7 TXPAN4E+

180R TXPAN2F-

TXPAN4F-

RES

H

2F6D 2F6E

RES 2F7J 2F7K

4p7 4p7 RES

TXPAN2F+

4p7 4p7 RES

H TXPAN4F+

I_18020_075.eps 210808

3103 313 6298.3 1

B

TO DISPLAY

TXPAN4CLK2F7C 2F7D

9F5G

120R

120R

TXPAN4C+

3F7T 180R

47R 47R 47R 47R 47R 47R 47R

FF6L FF6M FF6N FF6P FF6Q FF6R FF6S

FF6V

TXPAN4CLKTXPAN4CLK+

3F7M 180R

FF6T

TXPAN4A-

180R

4p7 4p7

180R 3F6L 180R

TXPAN3E+

TXPAN3F-

TXPAN2CLK+

150R

3F6K

4p7 4p7

RES

TXPAN2CLK-

150R

TX2D+

3F7H

TXPAN3E2F6R 2F6S

TXPAN3ATXPAN3A+ TXPAN3BTXPAN3B+ TXPAN3CTXPAN3C+

180R

3F6M

G

4p7 4p7 TXPAN3D+

2F6T 2F6U

4p7 4p7

3F6H 180R

TXPAN3D2F6P 2F6Q

FF6J FF6K

100R RES 3F53 RES 3F54 RES 3F55 RES 3F56 RES 3F57 RES 3F58 RES 3F59

TXPAN3CLK+

180R

180R TX2D-

3F7E

180R

TXPAN2C+

150R

3F6G

3F61

4p7 4p7

180R 3F7F

180R

3F6E 180R

3F60 RES

SDA-UP SCL-UP

+3V3 2F6M 2F6N

180R 3F7C 180R

180R TX2CLK-

3F7B

150R

TX3D-

TX4B+

TXPAN2C-

4p7 4p7

RES 100R

3F7D

TX3CLK+

1F52

180R 3F6B 180R

F

2F5R 2F5S

TXPAN2DTXPAN2D+ TXPAN2ETXPAN2E+ TXPAN2FTXPAN2F+

180R

TXPAN2B+

150R

TX2C-

3F6A

3F6C

TX2B+

TXPAN2B150R

180R

FF5V

TXPAN2CLKTXPAN2CLK+

180R TX2B-

FF5T

TXPAN2A150R

180R

E

TXPAN1F+

3F5U 3F5V

TX2A-

4p7 4p7 RES

TXPAN1DTXPAN1D+ TXPAN1ETXPAN1E+ TXPAN1FTXPAN1F+ TXPAN2ATXPAN2A+ TXPAN2BTXPAN2B+ TXPAN2CTXPAN2C+

TXPAN3C-

60 61 58 59 56 57 54 55 52 53

TXPAN3CLK-

150R

4p7 4p7

2F6K 2F6L

3F6Z

3F7G

3F5T

TXPAN1E2F5K 2F5L

TXPAN1CLKTXPAN1CLK+

FI-RE51S-HF

180R TX3CLK-

150R

3F5L

TXPAN1D+

TXPAN3B+

TXPAN3C+

150R

TX1E+

4p7 4p7

180R 3F5R 180R

D

2F5Y 2F5J

TXPAN1ATXPAN1A+ TXPAN1BTXPAN1B+ TXPAN1CTXPAN1C+

3F6Y

3F7U

TX1E-

3F5Q

TXPAN1D150R

180R TX1D+

4p7 4p7

180R 3F5N 3F5P

TX1D-

2F5G 2F5H

TXPAN1CLK+

150R

TX1CLK+

3F5S

C

150R

180R 3F5M

TXPAN1CLK-

TX3C+

3F7K

3F5K

180R

150R

180R TX1CLK-

TX3C-

FF5A

3F7N

TXPAN1C+

4p7 4p7

3F6V

150R

4p7 4p7

2F6H 2F6J

180R

150R

3F5J

2F5E 2F5F

3F6U

3F7Y

TX1C+

TXPAN1C150R

180R

3F5H

TX1C-

3F5G

FI-RE41S-HF 50 51 48 49 46 47 FF50 44 45 42 43 9F5A RES 41 9F5B RES 40 9F5C RES 39 9F5D RES 38 9F5E RES 37 9F5F RES 36 9F5H RES 35 9F5J RES 34 FF5D 33 32 FF5E 31 FF5F 30 FF5G 29 FF5H 28 FF5J 27 FF5K 26 25 FF5L 24 FF5M 23 22 FF5N 21 FF5P 20 FF5Q 19 FF5R 18 FF5S 17 16 FF5U 15 14 FF5W 13 FF5Y 12 FF5Z 11 FF6A 10 9 FF6B 8 7 FF6C 6 5 FF6E 4 3 FF6G 2 1

4p7 4p7

TXPAN3B-

3F7R

180R

2F6F 2F6G

TXPAN3A+

3F51

3F5F

TXPAN1B2F5A 2F5B

3F6Q

180R 3F6R

3F6T

TX3A+

4p7 4p7

TXPAN3A-

150R

TXPAN1A+

3F6P

150R

TX1B+

TX3A-

180R

180R

B

2F5C 2F5D

TXPAN1A-

3F5D 150R

TX1B-

3F5C

150R

180R TX1A+

3F5B

3F5A

3F5E

TX1A-

2

3

4

5

6

7

8

9

10

11

12

13

1F51 F12 1F52 F6 2F5A B2 2F5B B2 2F5C A2 2F5D A2 2F5E B2 2F5F B2 2F5G C2 2F5H C2 2F5J C2 2F5K D2 2F5L D2 2F5M D2 2F5N D2 2F5P E2 2F5Q E2 2F5R E2 2F5S F2 2F5T F2 2F5U F2 2F5V F2 2F5W G2 2F5Y C2 2F5Z G2 2F6A G2 2F6B G2 2F6C H2 2F6D H2 2F6E H2 2F6F A9 2F6G A9 2F6H B9 2F6J B9 2F6K B9 2F6L B9 2F6M C9 2F6N C9 2F6P C9 2F6Q C9 2F6R D9 2F6S D9 2F6T D9 2F6U D9 2F6V E9 2F6W E9 2F6Y E9 2F6Z F9 2F7A F9 2F7B F9 2F7C F9 2F7D G9 2F7E G9 2F7F G9 2F7G G9 2F7H H9 2F7J H9 2F7K H9 2F7L C13 2F7M C12 2F7N C13 2F7P C12 2F7Q C13 2F7R C12 2F7S C13 3F50 G8 3F51 G8 3F52 H8 3F53 C11 3F54 C11 3F55 C11 3F56 C11 3F57 C11 3F58 C11 3F59 C11 3F5A A2 3F5B A2 3F5C A2 3F5D B2 3F5E B2 3F5F B2 3F5G B2 3F5H B2 3F5J C2 3F5K C2 3F5L C2 3F5M C2 3F5N C2 3F5P C2 3F5Q D2 3F5R D2 3F5S D2 3F5T D2 3F5U E2 3F5V E2 3F5W E2 3F5Y E2 3F5Z E2 3F60 B11 3F61 C11 3F6A F2 3F6B F2 3F6C F2

3F6D F2 3F6E F2 3F6F F2 3F6G G2 3F6H G2 3F6J G2 3F6K G2 3F6L G2 3F6M G2 3F6N H2 3F6P A8 3F6Q A8 3F6R A8 3F6S B8 3F6T B8 3F6U B8 3F6V B8 3F6W B8 3F6Y C8 3F6Z C8 3F7A C8 3F7B C8 3F7C C8 3F7D C8 3F7E D8 3F7F D8 3F7G D8 3F7H D8 3F7J E8 3F7K E8 3F7L E8 3F7M E8 3F7N E8 3F7P F8 3F7Q F8 3F7R F8 3F7S F8 3F7T F8 3F7U F8 3F7V G8 3F7W G8 3F7Y G8 3F7Z G8 5F5A F11 5F5B F11 5F5C F11 9F5A C6 9F5B C6 9F5C C6 9F5D C6 9F5E C6 9F5F C6 9F5G F11 9F5H C6 9F5J C6 FF50 B6 FF5A B7 FF5D C6 FF5E C5 FF5F C5 FF5G C6 FF5H C5 FF5J D6 FF5K D6 FF5L D6 FF5M D6 FF5N D6 FF5P D5 FF5Q D6 FF5R D5 FF5S D5 FF5T D5 FF5U D5 FF5V D5 FF5W E6 FF5Y E6 FF5Z E6 FF6A E6 FF6B E6 FF6C E6 FF6D E5 FF6E E5 FF6F E5 FF6G E5 FF6H E5 FF6J B11 FF6K C11 FF6L C11 FF6M C11 FF6N C11 FF6P C11 FF6Q C11 FF6R C11 FF6S C11 FF6T C11 FF6U C11 FF6V C11 FF6W C11 FF6Y C11 FF6Z D11 FF7A D11 FF7B D11 FF7C D11

FF7D D11 FF7E D11 FF7F D11 FF7G D11 FF7H D11 FF7J D11 FF7K D11 FF7L D11 FF7M E11 FF7N E11 FF7P E11 FF7Q E11 FF7R E12 FF7S E11 FF7T E11 FF7U E11 FF7V E11 FF7W E11 FF7Y E11 FF7Z E11 IF5A F12 IF5B F11

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

149

Monitor Panel: DP-Rx 2

3

4

5

6

7

8

9

10

11

12

13

DP Rx

M03D 1K0 RES

10K RES

3FC3

10K

10K

10K

10K

IF9S

3FC9

RES

3F8C

3F9V

3FE2

IF9T

3FC6

3F9L

100R

3F9K

FF8K

3FC1

5

3F9G RES

RXD-UP

3F9N

FF8J 4

10K

10K

TXD-UP

10K

10K

3F9J

RES 10K

3F9H

RES 10K

A

100R

100n

FF8H

2

+3V3

1 2 3

4u7

IF9G 4

BP

COM

1F8B

+1V8-STANDBY

2F8F

INH

FF8B

5

OUT

2F8E

1u0

2F8C

3

560R

560R

560R 3FE4

3FD8

560R

3FD2

560R 3FB2

3FB1

560R

3FB0

IN

10n

1

+3V3-STANDBY

3FD9

7F8C LD2985BM18R

10K

+5V

2F8D

A

+3V3-STANDBY

+3V3-STANDBY

+3V3-STANDBY

+3V3

10K

+3V3

3FE1

M03D

3FC4

1

RES 7F8A BC847BW LAMP-ON-OUT

LAMP-ON

t - sensor (external)

10K

3FC5 4K7

4K7

3FD4 UP-TDI UP-RESET

IF8Q

3F9A

100K

1u0 3F9B

4K7

100K

3FB7 IF9Y

IF9M

MONITOR+24V

MONITOR+AUDIO-POWER 2F8B

4K7

1u0 3FB8

2F9J

4u7

G 9F8Q

TXD-GPROBE

1F9A 1 2 3

TXD

15 FF9D

RXD

4

FF9F FF8A

FF9G

+3V3

+3V3-STANDBY

6F8C

PEND LIB 242202606037

+12V

FF9C

TXD-GPROBE

IF9L

IF9N MONITOR+12V

MONITOR+3V3

RXD-GPROBE

5

B3B-PH-SM4-TBT(LF)

47K

+3V3-RS232

GPROBE

FF9E IF8T

4K7

R1 R2

14 7 12 9

3FB3

OUT

T1 T2

1u0 3FB4

OUT

IF9D PMEG1020EA

2F9G

T1 IN T2

RXD-UP 5

IF9K 4

100n

C2-

R1 IN R2

IF9U 3F8L

RES 1K0

UA-TX-BS-4

RXD-GPROBE

UA-RX

I_18020_076.eps 210808

2

3

4

5

F

COM

100n 2F9P

2

5

10n 2F8P

V+ C2+

+AUDIO-POWER

10K

9F8D

9F8C

VC1-

2F9N

BP

4K7

11 10

IF8P 6

OUT

INH

3FB5

5

RS232

IN

1u0 3FB6

4

3

2F9H

IF8Y

3

C1+

1

+3V3-DP-STANDBY

VCC

3103 313 6298.3 1

3FD5

10K 3FD0

3FC8

10K

10K

3F8E

3FB9 RES

10K

10K 3F9Q

UP-TDO

7F8B LD2985BM33R

IF8C

6

RES 1K0

4

100R

A2

1 2 3 4 5 6 7 8 9 10

UP-TCK

+24V

16

Φ

TXD-UP

3F8K

SCL

1F8G +3V3-STANDBY UP-TMS

100R

FF8S

3u3

2

IF8V IF8W

1

13 8

IF8B

9F8B

A1

7

1K0 RES

3F8J

8 +VS

SDA

4K7

FF8N

3F8V

4u7

100n

100n

2F8G 2

A0

GND

SML-310 RES

1

OS

E

FF8R

22R

2F9T

IF8U

2F9M 100n

1K0 RES

3F8F 6F8A

100R

IF8D 3

D

UP-TMS UP-TCK UP-TDI UP-TDO

3F8U

2F9U

7F8K ST3232C

IF8Z

7F8D LM75ADP

3F9P

3FC0

10K

10K

3FC2 RES

3FC7

100p

2F8S

100p

FF8P FF8Q

1u0

2F8K

10p

2F8H

1F8F

1F8E

1F8D

+3V3

2F9L

IF8A

3F8G 3F8H

FF8M

2F8Q

9F8E

G t - sensor (Internal)

IF9R

MONITOR+AUDIO-POWER MONITOR+24V MONITOR+3V3 MONITOR+12V

FF8L

2F8N

SDA-UP

100n 2F9R

3F8N

+3V3

SCL-UP

3F9D 100R 3F8P 100R 3FD3 100R

100u 35V

SCL-UP

100R FF8D

C

FF9J LVDS-ENABLE

RC-IN BACKLIGHT-PWM-ANA-DISP SCL-AUX SDA-AUX BACKLIGHT-BOOST LAMP-ON BACKLIGHT-OUT LIGHT-SENSOR

1F8C SKHU

2F9Q

FF8C100R

SDA-UP

RES

100R 3F9U 100R 3F9W 100R

SDA-UP

5-147279-2

3F8M

GND

FF8T

100n

1M71 1 2 3 4

H

3FE0 100R

+3V3-RS232

10p 2F8J

F

100R

100p

+3V3-STANDBY 2F8V

2F8U

WHITE LED

3FD1 100R 3F8D 100R

4u7

7F8H BC847BW

10K

3F9C

IF9W

5F8A

100n 2F8W

3FA7

+1V8-STANDBY 100n

LED1

IF9F

17 40

5

RES

3F9S 100R 3F8Z

2F8A

7F8F RES PDTC114EU

100R

100p 2F8M

IF9H

100R

10K

9F8K

3F9T 3F8B

FF9H SCL-UP

SCL-UP SDA-UP B-VS RESET A-VS LVDS-ENABLE LED1 LED2 LCD-PWR-ON UP-WC AUDIO-MUTE ENABLE+3V3

3F9M 100R 3F8A 100R 3F9R 100R

100R

10K 3F8Y

RES 3F8S

10K

3F8R

+3V3-STANDBY

NC GND

4

100n

CD

FF8G

1

OUTP

5

1K2 2F8T

10K

3FA5

RES 3F8Q

IF8E

RES 10K

3FA4

10K

3FA9

E

INP

IF9J

6

2F8L

+3V3 FF8E

9F8M

NCP303LSN30

7F8E 2

+3V3-STANDBY

+3V3

27

UP-RESET

+3V3-STANDBY

3

10K RES

LED 9F8T

D

7F8J RED BC847BW RES

FF8F

ADD FOR DEBUG 9F8J

RES

+3V3-STANDBY

IF9V

3FA6

LED2

RES 3FD6 3K9

+3V3-STANDBY

4

+3V3

3F9E

3F8W

100p

26

13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16

RES 4u7

2F9E

3F8T

10K RES 9F8G

+3V3-STANDBY

20 25

B

9F8A

VSSA

P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 X2 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 P0.5|MISO0|MAT0.1 RTXC1 RTXC2 P0.6|MOSI0|CAP0.2 P0.7|SSEL0|MAT2.0 RTCK P0.8|TXD1|MAT2.1 P0.9|RXD1|MAT2.2 VBAT P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 P0.13|DTR1|MAT1.1 DBGSEL P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 P0.16|EINT0|MAT0.2 RST P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA

MICROCTRL

2F9K

100R

IF8F

LED PANEL

3FE3 10K

Φ

VSS X1

100n

3FA3

100p

3FA1

2F9F

9F8N

RES 10K

RES 10K

3FA2

3FA8

RES 10K

2F9D IF8G

TO

10K

9F8P

12

1u0

100R +3V3-STANDBY

+3V3-STANDBY +3V3

+3V3

100p

3FA0

16M9

IF8H

11 1M20 FF8U 5F8B 1 FF8W 30R 2 FF8V 5F8C 3 30R FF8Y 5F8D 4 5F8E 30R FF8Z 5 30R 5F8F 6 FF9A 30R 5F8G FF9K 7 +5V 8 9 30R FF9B 11 10

1F8A

IF8J

7F8G LPC2103FBD48

2F8Z

2F9C

100n

10R

2F8Y

100p

31

30R

3F9Z

RC-IN

42

5F8H

2F9B

100n

100p

10R

7 19 43

RES 3F9Y IF8K

100u 35V

LIGHT-SENSOR

C

2F8R

100K

RES 3FD7

2F9A RES

10K

IF8L

B

6

7

8

9

10

11

12

13

H

1F8A C6 1F8B A8 1F8C F10 1F8D G1 1F8E G2 1F8F G2 1F8G E13 1F9A H8 1M20 C4 1M71 F1 2F8A E11 2F8B G13 2F8C A5 2F8D B6 2F8E A6 2F8F A7 2F8G G3 2F8H G2 2F8J G2 2F8K F3 2F8L E7 2F8M E11 2F8N G10 2F8P G11 2F8Q G9 2F8R B9 2F8S B9 2F8T E5 2F8U E7 2F8V F8 2F8W F8 2F8Y F8 2F8Z E10 2F9A B3 2F9B B3 2F9C C3 2F9D C3 2F9E D3 2F9F D3 2F9G H13 2F9H H12 2F9J G12 2F9K E10 2F9L G5 2F9M G5 2F9N G6 2F9P G6 2F9Q F6 2F9R F6 2F9T H10 2F9U H10 3F8A C9 3F8B C9 3F8C B11 3F8D D9 3F8E B11 3F8F G2 3F8G H2 3F8H H1 3F8J H3 3F8K H3 3F8L H3 3F8M F2 3F8N F2 3F8P D9 3F8Q E5 3F8R D6 3F8S D7 3F8T C7 3F8U E9 3F8V E10 3F8W E11 3F8Y E11 3F8Z D9 3F9A F13 3F9B G13 3F9C D9 3F9D D10 3F9E C9 3F9G B11 3F9H A9 3F9J A9 3F9K B9 3F9L B9 3F9M C9 3F9N B11 3F9P B10 3F9Q B11 3F9R C9 3F9S C9 3F9T C9 3F9U D9 3F9V B10 3F9W D9 3F9Y B2 3F9Z C2 3FA0 C2 3FA1 C3 3FA2 C2 3FA3 C2 3FA4 E2 3FA5 E2 3FA6 D1 3FA7 E1

3FA8 C1 3FA9 E1 3FB0 B2 3FB1 B3 3FB2 B3 3FB3 H13 3FB4 H13 3FB5 H12 3FB6 H12 3FB7 F12 3FB8 G12 3FB9 B11 3FC0 B10 3FC1 B10 3FC2 B10 3FC3 A13 3FC4 A13 3FC5 C13 3FC6 B10 3FC7 C10 3FC8 B12 3FC9 B12 3FD0 B12 3FD1 D9 3FD2 B3 3FD3 D9 3FD4 C13 3FD5 C13 3FD6 D7 3FD7 B1 3FD8 B3 3FD9 A8 3FE0 D9 3FE1 A8 3FE2 B11 3FE3 C7 3FE4 B3 5F8A E8 5F8B C4 5F8C C4 5F8D C3 5F8E C3 5F8F C3 5F8G C4 5F8H B4 6F8A H2 6F8C G10 7F8A B13 7F8B F10 7F8C A6 7F8D H2 7F8E D5 7F8F E6 7F8G C7 7F8H E2 7F8J D2 7F8K F5 9F8A B13 9F8B H3 9F8C H3 9F8D H3 9F8E F3 9F8G C7 9F8J D7 9F8K D7 9F8M E1 9F8N D1 9F8P C3 9F8Q G10 9F8T D5 FF8A H8 FF8B A7 FF8C F2 FF8D F2 FF8E D5 FF8F D7 FF8G D7 FF8H A8 FF8J A8 FF8K B8 FF8L E11 FF8M E11 FF8N E10 FF8P E12 FF8Q E12 FF8R E12 FF8S E9 FF8T F2 FF8U C4 FF8V C4 FF8W C4 FF8Y C4 FF8Z C4 FF9A C4 FF9B D4 FF9C G10 FF9D H5 FF9E G6 FF9F H8 FF9G H8 FF9H C13 FF9J C13 FF9K C4 IF8A G2

IF8B H3 IF8C H3 IF8D H2 IF8E E1 IF8F D1 IF8G C2 IF8H C2 IF8J C2 IF8K B1 IF8L B12 IF8P G6 IF8Q G6 IF8T G6 IF8U G5 IF8V G5 IF8W G5 IF8Y G5 IF8Z G5 IF9D G10 IF9F E1 IF9G A6 IF9H E6 IF9J D5 IF9K G12 IF9L H12 IF9M G13 IF9N H13 IF9R C13 IF9S B13 IF9T A13 IF9U H3 IF9V D1 IF9W E10 IF9Y G10

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

150

Monitor: SRP List Netname

Diagram

+12V +12V +12V +1V2 +1V2-FPGA +1V2-PLL +1V8 +1V8-DPA +1V8-DVDD +1V8-STANDBY +24V +24V +24V +24VF +24VF +2V5-L41 +2V5-L51 +2V5-STAB41 +2V5-STAB41 +2V5-STAB51 +2V5-STAB51 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3 +3V3-DPA +3V3-DP-STANDBY +3V3-DP-STANDBY +3V3-DVDD +3V3-FPGA +3V3-RS232 +3V3-RS232 +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +5V +5V +5V +AUDIO-L +AUDIO-POWER +AUDIO-POWER +AUDIO-POWER +AUDIO-POWER-S +AUDIO-POWER-S A-B0 A-B0 A-B1 A-B1 A-B2 A-B2 A-B3 A-B3 A-B4 A-B4 A-B5 A-B5 A-B6 A-B6 A-B7 A-B7 A-B8 A-B8 A-B9 A-B9 A-CLK A-CLK A-DE A-DE A-G0 A-G0 A-G1 A-G1 A-G2 A-G2 A-G3 A-G3 A-G4 A-G4 A-G5 A-G5 A-G6 A-G6 A-G7 A-G7 A-G8 A-G8 A-G9 A-G9 A-HS A-HS A-R0 A-R0 A-R1 A-R1 A-R2 A-R2 A-R3

M1A M3C M3D M3A M3A M3A M3B M3B M3B M3D M1A M3B M3D M1A M1B M3A M3A M1A M3A M1A M3A M1A M2B M3A M3B M3C M3D M3B M3B M3D M3B M3A M1B M3D M2A M3B M3D M1B M3B M3D M2A M1A M2B M3D M2A M2B M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (2x) M3A (1x) M3B (1x) M3A (1x) M3B (2x) M3A (1x) M3B (2x) M3A (1x) M3B (1x) M3A (1x)

3104 313 6299.3

A-R3 A-R4 A-R4 A-R5 A-R5 A-R6 A-R6 A-R7 A-R7 A-R8 A-R8 A-R9 A-R9 ASDO A-STDBY AUDIO-BCK AUDIO-BCK AUDIO-DAO AUDIO-DAO AUDIO-MCK AUDIO-MCK AUDIO-MUTE AUDIO-MUTE -AUDIO-R AUDIO-WS AUDIO-WS AVCC A-VS A-VS A-VS BACKLIGHT-BOOST BACKLIGHT-BOOST BACKLIGHT-IN BACKLIGHT-IN BACKLIGHT-OUT BACKLIGHT-OUT BACKLIGHT-OUT BACKLIGHT-PWM-ANA-DISP BACKLIGHT-PWM-ANA-DISP B-B0 B-B0 B-B1 B-B1 B-B2 B-B2 B-B3 B-B3 B-B4 B-B4 B-B5 B-B5 B-B6 B-B6 B-B7 B-B7 B-B8 B-B8 B-B9 B-B9 B-CLK B-CLK B-DE B-DE B-G0 B-G0 B-G1 B-G1 B-G2 B-G2 B-G3 B-G3 B-G4 B-G4 B-G5 B-G5 B-G6 B-G6 B-G7 B-G7 B-G8 B-G8 B-G9 B-G9 B-HS B-HS B-R0 B-R0 B-R1 B-R1 B-R2 B-R2 B-R3 B-R3 B-R4 B-R4 B-R5 B-R5 B-R6 B-R6 B-R7 B-R7

M3B (2x) M3A (1x) M3B (2x) M3A (1x) M3B (2x) M3A (1x) M3B (2x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (2x) M2A (2x) M2B (1x) M3B (1x) M2B (1x) M3B (1x) M2B (1x) M3B (1x) M2A (1x) M3D (1x) M2A (1x) M2B (1x) M3B (1x) M2A (1x) M3A (1x) M3B (1x) M3D (1x) M3B (1x) M3D (1x) M3A (1x) M3B (2x) M3A (1x) M3B (2x) M3D (1x) M3B (1x) M3D (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x)

B-R8 B-R8 B-R9 B-R9 B-VS B-VS B-VS CLK-PLL CONF-DONE DATA0 DCLK DPRX-0N DPRX-0P DPRX-1N DPRX-1P DPRX-2N DPRX-2P DPRX-3N DPRX-3P DPRX-AUXN DPRX-AUXP DPRX-CABLE-DET DPRX-HPD ENABLE+3V3 ENABLE+3V3 GCLK GCLK GND-24V GND-24V GND-A GND-A GND-AUDIO GND-AUDIO GND-AUDIO INTR-OUT-BS-0 LAMP-ON LAMP-ON-OUT LAMP-ON-OUT LCD-PWR-ON LCD-PWR-ON LCD-PWR-ON LED1 LED2 LEFT-SPEAKER LIGHT-SENSOR LVDS-ENABLE LVDS-ENABLE MONITOR+12V MONITOR+24V MONITOR+3V3 MONITOR+AUDIO-POWER MP-LED1 MP-LED2 MP-LED3 MP-LED4 MP-LED5 MSCL-I2C MSDA-I2C MSEL0 MSEL1 MUTE nCONFIG nCSO nSTATUS RC-IN RC-IN RC-OUT RESET RESET RESET-N RIGHT-SPEAKER RXD RXD RXD-GPROBE RXD-UP SCL-AUX SCL-AUX SCL-UP SCL-UP SCL-UP SCL-UP SDA-AUX SDA-AUX SDA-UP SDA-UP SDA-UP SDA-UP SPI-CLK SPI-CSN-BS-1 SPI-DI SPI-DO-BS-3 TCK TDI TDO TMS TX1ATX1ATX1A+ TX1A+ TX1BTX1B-

M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3A (1x) M3B (1x) M3D (1x) M3A (2x) M3A (2x) M3A (2x) M3A (2x) M3B (2x) M3B (2x) M3B (2x) M3B (2x) M3B (2x) M3B (2x) M3B (2x) M3B (2x) M3B (2x) M3B (2x) M3B (2x) M3B (2x) M1A (1x) M3D (1x) M3A (2x) M3B (3x) M1A (2x) M3B (3x) M2A (4x) M2B (5x) M1A (1x) M2A (17x) M2B (5x) M3B (2x) M3D (2x) M3B (1x) M3D (1x) M1A (1x) M3A (1x) M3D (1x) M3D (2x) M3D (2x) M2A (3x) M3D (2x) M3A (1x) M3D (2x) M3D (3x) M3D (2x) M3D (2x) M3D (2x) M3A (2x) M3A (2x) M3A (2x) M3A (2x) M3A (2x) M3B (3x) M3B (3x) M3A (2x) M3A (2x) M2A (2x) M3A (2x) M3A (2x) M3A (2x) M3B (2x) M3D (2x) M3B (3x) M3B (1x) M3D (1x) M3B (2x) M2A (3x) M1A (1x) M3D (1x) M3D (2x) M3D (2x) M3B (2x) M3D (1x) M3A (1x) M3B (3x) M3C (1x) M3D (4x) M3B (2x) M3D (1x) M3A (1x) M3B (3x) M3C (1x) M3D (4x) M3B (3x) M3B (3x) M3B (2x) M3B (3x) M3A (2x) M3A (2x) M3A (2x) M3A (2x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x)

TX1B+ TX1B+ TX1CTX1CTX1C+ TX1C+ TX1CLKTX1CLKTX1CLK+ TX1CLK+ TX1DTX1DTX1D+ TX1D+ TX1ETX1ETX1E+ TX1E+ TX2ATX2ATX2A+ TX2A+ TX2BTX2BTX2B+ TX2B+ TX2CTX2CTX2C+ TX2C+ TX2CLKTX2CLKTX2CLK+ TX2CLK+ TX2DTX2DTX2D+ TX2D+ TX2ETX2ETX2E+ TX2E+ TX3ATX3ATX3A+ TX3A+ TX3BTX3BTX3B+ TX3B+ TX3CTX3CTX3C+ TX3C+ TX3CLKTX3CLKTX3CLK+ TX3CLK+ TX3DTX3DTX3D+ TX3D+ TX3ETX3ETX3E+ TX3E+ TX4ATX4ATX4A+ TX4A+ TX4BTX4BTX4B+ TX4B+ TX4CTX4CTX4C+ TX4C+ TX4CLKTX4CLKTX4CLK+ TX4CLK+ TX4DTX4DTX4D+ TX4D+ TX4ETX4ETX4E+ TX4E+ TXCLK TXCLK TXD TXD TXD-GPROBE TXD-UP TXPAN1ATXPAN1A+ TXPAN1BTXPAN1B+ TXPAN1C-

M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3C (1x) M3A (1x) M3B (2x) M1A (1x) M3D (1x) M3D (2x) M3D (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x)

TXPAN1C+ TXPAN1CLKTXPAN1CLK+ TXPAN1DTXPAN1D+ TXPAN1ETXPAN1E+ TXPAN1FTXPAN1F+ TXPAN2ATXPAN2A+ TXPAN2BTXPAN2B+ TXPAN2CTXPAN2C+ TXPAN2CLKTXPAN2CLK+ TXPAN2DTXPAN2D+ TXPAN2ETXPAN2E+ TXPAN2FTXPAN2F+ TXPAN3ATXPAN3A+ TXPAN3BTXPAN3B+ TXPAN3CTXPAN3C+ TXPAN3CLKTXPAN3CLK+ TXPAN3DTXPAN3D+ TXPAN3ETXPAN3E+ TXPAN3FTXPAN3F+ TXPAN4ATXPAN4A+ TXPAN4BTXPAN4B+ TXPAN4CTXPAN4C+ TXPAN4CLKTXPAN4CLK+ TXPAN4DTXPAN4D+ TXPAN4ETXPAN4E+ TXPAN4FTXPAN4F+ UA-RX UA-RX UA-TX-BS-4 UA-TX-BS-4 UP-RESET UP-TCK UP-TDI UP-TDO UP-TMS UP-WC UP-WC

M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3C (2x) M3B (1x) M3D (1x) M3B (2x) M3D (1x) M3D (1x) M3D (2x) M3D (2x) M3D (2x) M3D (2x) M3B (2x) M3D (1x)

I_18020_124.eps 120908

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

151

Layout Monitor Panel (Top Side) 1316 C3 1735 A3 1F00 A3 1F0D C1 1F8B B1 1F9A C1 1M71 A1 2D07 A3 2D10 A3 2D15 A3 2D20 B3 2D31 B3 2D53 B3 2F0U A2 2F11 A2 2F1H C1 2F1U B2 2F8G A1 2F8K A1 2F8Q C1 2F9F A1 2U01 B3 2U04 B3 2U11 B3 2U18 B2 2U30 C3 2U50 C3 2U53 1319 B1 1D50 B3 1F0A A1 1F51 A2 1F8C B2 1FDP C1 1U00 C3 2D08 A3 2D11 A3 2D18 A3 2D25 A3 2D51 B2 2F0A B2 2F0Y B2 2F1E A2 2F1Q A2 2F1V A1 2F8H A1 2F8N C1 2F8R B1 2F9R C1 2U02 C3 2U05 B3 2U12 B3 2U19 B2 2U31 C2 2U51 C3 2U62 13DP C2 1E06 C3 1F0C B2 1F52 A3 1F8G C2 1M20 A1 2D05 A2 2D09 A3 2D12 A3 2D19 B3 2D30 B3 2D52 B3 2F0L B2 2F0Z C2 2F1G C1 2F1T B2 2F2G B2 2F8J A1 2F8P C1 2F8S C1 2U00 C3 2U03 B3 2U09 B3 2U13 C2 2U20 C2 2U32 C2 2U52 C2 2U66 3D03 3D11 3F08 3F09 3F0A 3F10 3F11 3F1K 3F1L 3F1M 3F1N 3F1P 3F1Q 3F1R 3F1S 3F1T 3F1U 3F1V 3F20 3F21 3F22 3F23 3F24 3F29 3F2G 3F2H 3F2L 3F2M 3F50 3F51 3F52 3F5A 3F5B 3F5C 3F5D 3F5E 3F5F 3F5G 3F5H 3F5J 3F5K 3F5L 3F5M 3F5N 3F5P 3F5Q 3F5R 3F5S 3F5T 3F5U 3F5V 3F5W 3F5Y 3F5Z 3F6A 3F6B 3F6C 3F6D 3F6E 3F6F 3F6G 3F6H 3F6J 3F6K 3F6L 3F6M 3F6N 3F6P 3F6Q 3F6R 3F6S 3F6T 3F6U 3F6V 3F6W 3F6Y 3F6Z 3F7A 3F7B 3F7C 3F7D 3F7E 3F7F 3F7G 3F7H 3F7J 3F7K 3F7L 3F7M 3F7N 3F7P 3F7Q 3F7R 3F7S 3F7T 3F7U 3F7V 3F7W 3F7Y 3F7Z 3F8F 3F8G 3F8H 3F8J 3F8K 3F8L 3F8M 3F8N 3F92 3F93 3F94 3F9H 3F9J 3F9K 3F9L 3FB1 3FD8 3FD9 I_18020_077.eps 3FE1 210808

3103 313 6298.3

C2 C3 C3 A3 A3 A1 A1 B1 A1 A1 C1 C1 C1 C1 C1 C1 C1 C1 C1 C1 C1 A1 A1 A1 A1 A1 A2 B1 B1 B1 B1 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A1 A1 A1 A1 A1 A1 A1 A1 C1 C1 C1 B1 C1 B1 C1 A1 A1 C1 B1

3U16 5D01 5D02 5D04 5D05 5D07 5D08 5F03 5F0B 5F0C 5F0D 5F0F 5F0G 5F5A 5F5B 5F5C 5U00 5U01 5U02 5U03 5U04 5U50 5U51 6F00 6F01 6F02 6F03 6F04 6F05 6F0B 6F0E 6F0F 6F0G 6F8A 6U00 6U01 6U04 6U05 6U50 6U51 7D10 7D53 7F00 7F01 7F0A 7F0B 7F0L 7F0Q 7F8B 7F8D 7U00 7U50 9F0C 9F0N 9F5G 9F8B 9F8C 9F8D 9F8E 9U01 9U03

B3 B3 A3 A3 A3 A3 A3 A2 B2 A2 C2 C1 B1 A2 A2 A2 C3 C3 C3 B3 B2 C2 C3 A1 A1 A1 A1 A1 A1 C1 C1 C1 C1 A1 B3 B2 C3 C3 C3 C3 A3 B2 A2 A1 B1 C1 C1 B2 C1 A1 B3 C3 B1 C1 A2 A1 A1 A1 A1 C3 C3

Circuit Diagrams and PWB Layouts

Q529.1E LC

7.

152

Layout Monitor Panel (Bottom Side)

3103 313 6298.3

I_18020_078.eps 210808

1F0E 1F0F 1F8A 2D06 2D13 2D14 2D16 2D17 2D21 2D22 2D23 2D24 2D26 2D27 2D28 2D29 2D54 2D55 2D56 2F00 2F01 2F02 2F03 2F04 2F05 2F06 2F07 2F08 2F09 2F0B 2F0C 2F0D 2F0E 2F0F 2F0G 2F0H 2F0J 2F0K 2F0M 2F0N 2F0P 2F0Q 2F0R 2F0S 2F0T 2F0V 2F0W 2F10 2F12 2F13 2F14 2F15 2F16 2F17 2F18 2F19 2F1A 2F1B 2F1C 2F1D 2F1F 2F1J 2F1K 2F1L 2F1M 2F1N 2F1R 2F1S 2F1W 2F1Y 2F1Z 2F20 2F21 2F22 2F23 2F24 2F25 2F26 2F27 2F28 2F2A 2F2B 2F2C 2F2D 2F2E 2F2F 2F32 2F33 2F34 2F35 2F36 2F5A 2F5B 2F5C 2F5D 2F5E 2F5F 2F5G 2F5H 2F5J 2F5K 2F5L 2F5M 2F5N 2F5P 2F5Q 2F5R 2F5S 2F5T 2F5U 2F5V 2F5W 2F5Y 2F5Z 2F6A

A2 B2 B3 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 B2 B2 B2 A2 A3 A2 A3 A2 A2 A2 A3 A2 A2 B2 B2 B3 B3 B3 B3 B3 C3 C2 B3 B3 B3 B2 B2 B2 B3 B2 B2 A2 A3 A3 A2 A2 A2 A3 A3 A2 B3 C3 C3 C3 C3 C3 C3 C3 C3 B3 A3 B3 B2 B2 B2 A2 A2 A3 A3 A2 A2 A2 A2 A2 B2 A2 A2 A3 A2 C3 B2 A2 A2 A2 A2 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1

2F6B 2F6C 2F6D 2F6E 2F6F 2F6G 2F6H 2F6J 2F6K 2F6L 2F6M 2F6N 2F6P 2F6Q 2F6R 2F6S 2F6T 2F6U 2F6V 2F6W 2F6Y 2F6Z 2F7A 2F7B 2F7C 2F7D 2F7E 2F7F 2F7G 2F7H 2F7J 2F7K 2F7L 2F7M 2F7N 2F7P 2F7Q 2F7R 2F7S 2F8A 2F8B 2F8C 2F8D 2F8E 2F8F 2F8L 2F8M 2F8T 2F8U 2F8V 2F8W 2F8Y 2F8Z 2F9A 2F9B 2F9C 2F9D 2F9E 2F9G 2F9H 2F9J 2F9K 2F9L 2F9M 2F9N 2F9P 2F9Q 2F9T 2F9U 2U06 2U07 2U08 2U10 2U14 2U15 2U16 2U17 2U21 2U22 2U23 2U24 2U27 2U28 2U29 2U33 2U34 2U35 2U54 2U55 2U56 2U57 2U58 2U59 2U60 2U61 2U63 2U64 2U65 2U67 2U68 2U69 2U70 3D04 3D05 3D06 3D08 3D10 3D14 3D53 3D54 3F00 3F01 3F02 3F03 3F04

A1 A1 A1 A1 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A3 A3 A3 A3 A3 A3 A3 B3 B2 C3 C3 C3 C3 B3 B2 B3 B3 B3 B2 B2 B2 A3 A3 A3 A3 A3 B2 B3 B2 B2 C3 C3 C3 C3 C3 C2 C2 C1 C1 B1 B1 B1 B2 B2 B1 B1 B1 B1 B1 B2 B2 B2 B2 B2 B2 C1 C1 C1 C1 C1 C1 C1 C1 C1 C1 C1 C2 C2 C2 C1 A2 B2 A1 B2 A1 A1 B2 B2 A3 A3 A3 A3 A2

3F05 3F06 3F07 3F0B 3F0C 3F0D 3F0E 3F0F 3F0G 3F0H 3F0J 3F0K 3F0L 3F0M 3F0N 3F0P 3F0Q 3F0R 3F0S 3F0T 3F0U 3F0V 3F0W 3F0Y 3F0Z 3F12 3F13 3F14 3F15 3F16 3F17 3F18 3F19 3F1A 3F1B 3F1C 3F1D 3F1E 3F1F 3F1G 3F1H 3F1J 3F1W 3F1Y 3F1Z 3F25 3F26 3F27 3F28 3F2A 3F2B 3F2C 3F2D 3F2E 3F2J 3F2K 3F2N 3F2P 3F2Q 3F2R 3F2S 3F2T 3F2U 3F2V 3F2W 3F2Y 3F2Z 3F30 3F53 3F54 3F55 3F56 3F57 3F58 3F59 3F60 3F61 3F80 3F81 3F82 3F83 3F84 3F85 3F86 3F87 3F88 3F89 3F8A 3F8B 3F8C 3F8D 3F8E 3F8P 3F8Q 3F8R 3F8S 3F8T 3F8U 3F8V 3F8W 3F8Y 3F8Z 3F90 3F91 3F95 3F9A 3F9B 3F9C 3F9D 3F9E 3F9G 3F9M 3F9N 3F9P 3F9Q

A2 A2 A2 B2 C3 C3 B3 B3 B3 B3 B3 B3 B3 B3 B3 B3 B3 B3 B3 C3 C3 C3 C3 A3 A3 A1 A1 A1 A1 A1 A1 A1 A1 A3 B2 B2 B3 B3 C3 C3 C3 C3 C3 B3 B3 A3 A2 A2 A2 B3 B3 B3 B3 B3 B2 B2 B3 B3 B3 A3 A3 B3 B3 B3 B3 B3 B3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 B3 B3 B3 B3 B3 B3 B3 C3 A3 A3 B3 B3 B3 B2 B3 B3 B3 B3 B3 B3 B3 B2 B3 B3 B2 A2 A2 B3 B2 B2 B3 B3 B3 B3 B3 B3 B2 B3

3F9R 3F9S 3F9T 3F9U 3F9V 3F9W 3F9Y 3F9Z 3FA0 3FA1 3FA2 3FA3 3FA4 3FA5 3FA6 3FA7 3FA8 3FA9 3FB0 3FB2 3FB3 3FB4 3FB5 3FB6 3FB7 3FB8 3FB9 3FC0 3FC1 3FC2 3FC3 3FC4 3FC5 3FC6 3FC7 3FC8 3FC9 3FD0 3FD1 3FD2 3FD3 3FD4 3FD5 3FD6 3FD7 3FE0 3FE2 3FE3 3FE4 3U00 3U01 3U02 3U03 3U04 3U05 3U06 3U07 3U08 3U09 3U10 3U11 3U12 3U13 3U14 3U15 3U17 3U18 3U19 3U50 3U51 3U52 3U53 3U54 3U55 3U56 3U57 3U58 3U59 3U60 3U61 3U62 3U63 3U64 3U65 3U66 3U67 3U68 3U69 3U70 5D06 5F00 5F01 5F02 5F04 5F05 5F06 5F0A 5F0E 5F0H 5F0J 5F8A 5F8B 5F8C 5F8D 5F8E 5F8F 5F8G 5F8H 6F0C 6F0D 6F8C 6U02 6U03 6U06 6U52

B3 B3 B3 B2 B2 B3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 A3 B3 A2 A2 B2 B2 B3 B3 B2 B2 B3 B2 B3 B3 B2 B2 A3 B2 B3 B3 B3 B3 B3 A2 B3 B3 A2 B3 B3 B2 B2 B3 A3 B1 B1 B1 C2 B1 B1 B1 B1 B1 B1 B2 C2 B1 B1 B1 B1 C2 C2 C2 C1 C1 C2 C1 C1 C1 C1 C1 C1 C1 C1 C1 C1 C1 C1 C2 C1 C1 C1 C1 C1 A1 A2 A2 A2 A2 A2 A2 B2 C3 B2 A2 B2 A3 A3 A3 A3 A3 A3 A3 A3 A3 C2 C2 B1 C1 C1

7D11 7D12 7F02 7F04 7F0C 7F0H 7F0J 7F0K 7F0M 7F0N 7F0P 7F8A 7F8C 7F8E 7F8F 7F8G 7F8H 7F8J 7F8K 7U02 7U03 7U51 9F00 9F01 9F02 9F03 9F04 9F05 9F0A 9F0B 9F0D 9F0E 9F0F 9F0G 9F0H 9F0J 9F0K 9F0L 9F0M 9F0P 9F0Q 9F5A 9F5B 9F5C 9F5D 9F5E 9F5F 9F5H 9F5J 9F8A 9F8G 9F8J 9F8K 9F8M 9F8N 9F8P 9F8Q 9F8T 9U00

B2 A1 A2 A2 C3 B3 C3 B2 A3 A3 A3 B2 C3 B3 B3 B3 A3 A3 C3 B2 B2 C2 A3 B2 A3 A3 A3 A3 B3 B3 B2 B3 A2 C3 A3 A3 B2 C3 A3 B3 B3 A1 A1 A1 A1 A1 A1 A1 A1 B2 B3 B3 B3 A3 A3 A3 C2 B3 B1

Alignments

Q529.1E LC

8.

EN 153

8. Alignments •

Index of this chapter: 8.1 General Alignment Conditions 8.2 Hardware Alignments 8.3 Software Alignments 8.4 Option Settings 8.5 Reset of Repaired SSB

For the next alignments, supply the following test signals via a video generator to the RF input: • EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz • US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3). • LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3). • DVB-T models: see table “SDM default settings” in chapter 5.

Note: The Service Default Mode (SDM) and Service Alignment Mode (SAM) are described in chapter 5. Menu navigation is done with the CURSOR UP, DOWN, LEFT or RIGHT keys of the remote control transmitter.

8.1

General Alignment Conditions Perform all electrical adjustments under the following conditions: • Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%). – AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%). – EU: 230 VAC / 50 Hz (± 10%). – LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%). – US: 120 VAC / 60 Hz (± 10%). • Connect the set to the mains via an isolation transformer with low internal resistance. • Allow the set to warm up for approximately 15 minutes. • Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heatsinks as ground. • Test probe: Ri > 10 Mohm, Ci < 20 pF. • Use an isolated trimmer/screwdriver to perform alignments.

8.1.1

Alignment Sequence •

8.3

8.3.1

White Point • •

•

Set “Active control” to “Off”. Choose “TV menu”, “TV Settings” and then “Picture” and put: – “Dynamic contrast” to “Off”. – “Colour enhancement” to “Off”. – “Light sensor” to “Off” where applicable. – “Clear LCD” to “On” where applicable. – “Brightness” to “50”. – “Colour” to “0”. – “Contrast” to “100”. Go to the SAM and select “Alignments”-> “Whitepoint”.

White point alignment LCD screens: • Use a 100% white screen as input signal and set the following values: – “Colour temperature”: “Normal”. – All “Whitepoint” values to: “127”. – “Red BL offset” values to “8”. – “Green BL offset” values to “8”.

Hardware Alignments

In case you have a colour analyser: • Measure with a calibrated (phosphor- independent) colour analyser in the centre of the screen. Consequently, the measurement needs to be done in a dark environment. • Adjust the correct x,y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x,y coordinates (see table “White D alignment values”). Tolerance: dx: ± 0.004, dy: ± 0.004. • Repeat this step for the other colour temperatures that need to be aligned. • When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM. • Restore the initial picture settings after the alignments.

Not applicable.

Table 8-1 White D alignment values

•

8.2

First, set the correct options: – In SAM, select “Options”, and then “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2” according to the set sticker (see also paragraph “Option Settings”). – Press OK on the remote control before the cursor is moved to the left. – In submenu “Option numbers” select “Store” and press OK on the RC. OR: – In main menu, select “Store” again and press OK on the RC. – Switch the set to Stand-by. Warming up (>15 minutes).

Switch the set to stand-by mode.

Software Alignments Put the set in SAM mode (see Chapter 5 “Service Modes, Error Codes and Fault Finding”). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following item can be aligned: • Whitepoint. To store the data: • Press OK on the RC before the cursor is moved to the left. • In main menu select “Store” and press OK on the RC. • Press MENU on the RC to switch back to the main menu.

Value

Cool (11000 K)

Normal (9000 K)

Warm (6500 K)

x

0.273

0.282

0.306

y

0.278

0.286

0.309

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production (statistics). • Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM). • Set the RED, GREEN and BLUE default values according to the values in the “Tint settings” table. • When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM. • Restore the initial picture settings after the alignments.

EN 154

8.

Alignments

Q529.1E LC

Table 8-2 Tint settings Colour Temp.

R

G

B

Cool

113

119

123

Normal

124

117

115

Warm

127

105

77

8.4

Option Settings

8.4.1

Introduction

digital diagnosis possible, the microprocessor has to know which ICs to address. The presence/absence of these specific ICs (or functions) is made known by the option codes. Notes: • After changing the option(s), save them by pressing the OK button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC. • The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the Mains switch (the NVM is then read again).

The microprocessor communicates with a large number of I2C ICs in the set. To ensure good communication and to make 8.4.2

Dealer Options For dealer options, in SAM select “Dealer options” and then “Personal options”. Table 8-3 Dealer options Menu item

Subjects

Options

Description

Personal Options

Picture Mute

On

Picture is muted / not muted in case no input signal is detected at input connectors

Off Virgin Mode

On

TV starts up / does not start up (once) with a language selection menu after the Mains switch is turned “on” for the first time (virgin mode)

Off

8.4.3

(Service) Options Select the sub menu's to set the initialization codes (options) of the set via text menus. Table 8-4 Service options Menu-item

Subjects

Options

Description

Data

8 days EPG

Off

No possibility to program 8 days in advance using EPG

Display

Screen

Video Repro

Source selection

Audio Repro

On

Possibility to program 8 days in advance using EPG

“Value”

Used screen size, type, and resolution (see table “Option code overview” in this chapter)

Display fans

Not present / Present

Feature present / not present

Temperature sensor

No sensor / Sensor on backside / Sensor in Location and presence of temperature sensor display

Temperature LUT

x

E-box & monitor

Off / On

E-box & monitor off / on

Perfect Pixel

Off / On

Perfect Pixel off / on

Ambilight

None / Stereo / Triple / Quad

Inverter not present / one inverter / two inverters / three inverters / four inverters

Ambilight technology

LED / Future use

LED (/future use)

MOP ambient light

Not present / Present

MOP not present / present

Light sensor

Not Present / Present

Light sensor not present / present

Light sensor type

Glass / Plastic

Sensor type

EXT1 type

“Value”

Specification

EXT2 type

“Value”

Specification

EXT3 type

“Value”

Specification

HDMI 1

Present

Present

HDMI 2

Present

Present

HDMI 3

Present

Present

HDMI CEC extended

Off / On

Feature not present / present

HDMI CEC

Off / On

Feature not present / present

USB version

“Value”

Specification

Ethernet

Not present / Present

Feature not present / present

Online services

Not present / Present

Feature not present / present

PTP (Picture Transfer Protocol)

Not present / Present

Feature not present / present

Connection assistant

Not present / Present

Feature not present / present

Riva scroll RC support

Not present / Present

Feature not present / present

System RC support

Not present / Present

Acoustic System (Cabinet design, 11 / Essence 2K8 42 used for setting dynamic audio parameters)

Feature not present / present Cabinet specification

Alignments Menu-item

Subjects

Options

Description

Miscellaneous

Region

Europe / AP-PAL-Multi / Australia / China

Region indication

Opt. no.

ATSC / DVB

On / Off

ATSC / DVB-T active / not active

Over the air download

Off / Country dependent / On

Specification

DVB-T installation

Off / Country dependent / On

Specification

DVB-C

Off / On

Feature not present / present

DVB-C installation

Off / Country dependent / On

Specification

MPEG4

Not present / present

Feature not present / present

Tuner type

TD1716 Mk3 / TD1716 Mk4 / VA1Y9ED2008

Tuner type

I2C configuration

None / With PCA 9540

Specification

Channel decoder

TDA10048

Channel decoder type

Hotel mode

Off

Hotel mode not supported

Video playback

Off / On

Feature present / not present

Update assistant

Present

Feature present

Board identifier

On

Board identifier supported

LightGuide

Off / On

Group 1

EN 155

LightGuide off / LightGuide on xxxxx xxxxx xxxxx xxxxx (see set sticker)

Store - go right

Store - press OK

Store option settings

Opt. No. (Option numbers) Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or “option byte”) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set and in Table “Option code overview”. Example: The options sticker gives the following option numbers: • 04368 00005 01066 08707 • 00000 00032 00512 00000

8.4.5

8.

xxxxx xxxxx xxxxx xxxxx (see set sticker)

Group 2

8.4.4

Q529.1E LC

The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicates software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number. See tables “Option code overview” for the options. Diversity Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM An alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. For the power supply there is no difference. Refer to chapter 2 “Safety Instructions, Warnings, and Notes”.

Option Code Overview Table 8-5 Option code overview CTN_alt BOM#

Options Group 1

Options Group 2

42PES0001D/10

16897 01419 37079 45160

10152 21792 07041 0001

168

42PES0001H/10

16897 01419 37079 45160

10152 21924 07073 0001

168

Important: after having edited the option numbers as described above, you must press OK on the remote control before the cursor is moved to the left!

8.5

Reset of Repaired SSB A very important issue towards a repaired SSB from a service repair shop, implies the reset of the NVM on the SSB. A repaired SSB in service should get the service Set type “00PF0000000000” and Production code “00000000000000”. Also the virgin bit is to be set. To set all this, you can use the ComPair tool.

Displ. (code)

EN 156

9.

Q529.1E LC

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9. Circuit Descriptions, Abbreviation List, and IC Data Sheets • • • • • • •

Index of this chapter: 9.1 Introduction 9.2 Main Supply 9.3 On-board DC/DC Converters 9.4 Additional Monitor DC/DC Converters 9.5 Front-End 9.6 PNX85xx 9.7 Back-end 9.8 Audio 9.9 DLNA 9.10 Abbreviation List 9.11 IC Data Sheets

•

9.1.3 Notes: • Only new circuits (circuits that are not published recently) are described. • Figures can deviate slightly from the actual situation, due to different set executions. • For a good understanding of the following circuit descriptions, please use the wiring, block (chapter 6) and circuit diagrams (chapter 7). Where necessary, you will find a separate drawing for clarification.

9.1

Introduction This chassis (member of the “TV522/92” platform) is a derivative from the Q529.1E LA/LB chassis. It is a new concept, introducing the separation between monitor and supporting hardware/software in a separate hub. The styling name is “ESSENCE”. Hub and monitor are connected with a single cable. All I/O connectors are present on the hub, avoiding cable clutter around the screen. The platform incorporates an improved (faster tuning, better phase noise performance, etc.) tuner block with separate support for DVB-C and DVB-T. It’s built around the PNX85xx “System on Chip” (SoC), which handles the video and audio processing, while the PNX51xx takes care of the video back-end processing. The CYCLONE II FPGA is used to process the data for the GENESIS Display Port, which transmits the data from hub to monitor.

9.1.1

Features The main features for this chassis are: • 1080p resolution @ 100 Hz. • High performance back-end processing Perfect Pixel HD engine capable of 300 Mpixels/sec. With this technology, each pixel of the incoming picture is enhanced to better match the surrounding pixels, resulting in a more natural picture. Artifacts and noise in all sources from multimedia to standard TV to highly-compressed high-definition (HD) are detected and reduced. This results in a clean and razor sharp image. • ClearLCD, a technology that uses scanning and back light dimming technology to reduce the motion blur on an LCD screen, caused by the slow response time and the “sample and hold” characteristic of LCD. • The separation of panel and supporting electronics by introducing a separate monitor and hub, connected by a single-cable connection. • The introduction of the Essence Smart Levelling Bracket, allowing hassle-free mounting of the screen on the wall. • Improved tuner compared to Q528.1E LA chassis. • Support of DVB-C reception (in some sets). • For all other features: refer to the Q528.1E LA/LB Service Manual.

9.1.2

Delta’s with respect to Q529.1E LA/LB chassis •

3 HDMI inputs (inputs are swapped).

ST7101-output is connected to HDMI multiplexer input 4. None of the HDMI inputs is associated with L/R side I/O. No SVHS on side I/O. Fan control added. No AmbiLight implementation > no AL EPLD. Audio via I2S. Possible other startup/shutdown behaviour (due to standby SW). Dedicated Essence Display Port functionality (the display ports perform the interface between hub/monitor and interconnection cable).

TV522/Essence Architecture Overview For details about the chassis block diagrams refer to chapter “Block diagrams, Test Point Overview, and Waveforms”. An overview of the TV522/92 architecture can be found in next figure “Architecture of TV522/92 platform”. The sets use the PNX85xx SoC and the PNX5100 Video Backend Processor for video processing.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.

EN 157

LVDS2DP

SSB TV522 Essence

TDA10023 DVB-C

I²C

TDA10048 DVB-T Hybrid Tuner Saw

Q529.1E LC

DDR-II

DDR-II

32

32

NXP PNX8541

lvds

ttl DP

PNX5100 Halo Free HD-NM FHD 120Hz

MASTER IF

DP Tx

EPLD

USB2.0 CA flash

DDR 32

ST7101

FLASH

H264

hdcp

PCI

8

I²S

Ethernet

Spartan 250E Pixelated Ambi Pixelated AL

AD8195 MUX

24V

hdmi

AD8197 MUX

24V

PSU

3V3stb

8 hdmi

hdmi

hdmi

2 channel Audio Amp.

FLASH

220V

PSU

I_18020_131.eps 180908

Figure 9-1 Architecture of Essence - Hub

Monitor2k8

DP Rx

3V3stb

24V

FHD@120p FHD@120p FHD@100p FHD@100p

TTL> LVDS

nvm

I²C AUX

I²C UP HV

nvm Stdby LED

uP

DC/DC 12V 3V3, 2V5, 1V8,1V2 3V3-stb2

Matrix Matrix

EPLD

hdcp

LED panel

lvds

ttl DP

flash

Display

mute

RED led

Lamp-On

I²S 24V

CLASS-D

12V Backlight PWM INV

24V

24V SPLIT

24V INV RC receiver

RC

I_18020_132.eps 180908

Figure 9-2 Architecture of Essence - Monitor

EN 158 9.1.4

9.

Q529.1E LC

Circuit Descriptions, Abbreviation List, and IC Data Sheets

SSB Cell Layout

SERVICE CONN.

HDMI

ANALOG I/O

HDMI MUX SIDE I/O

PNX5100

PNX85xx

DC - DC CONVERSION

DIGITAL I/O

MPEG4 VCOMMON INTERFACE I_18020_133.eps 080908

Figure 9-3 SSB top view

Circuit Descriptions, Abbreviation List, and IC Data Sheets 9.2

Main Supply

Q529.1E LC

9.

EN 159

the panel is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market. Refer to the Spare Parts list for the order number of the supply unit.

The sets in this chassis comes with a buy-in “Bobitrans” supply unit. When defective, a new panel must be ordered and the defective panel must be sent for repair, unless the main fuse of

I_18020_134.eps 180908

Figure 9-4 High level Power Architecture ESSENCE

9.3

On-board DC/DC Converters In this platform, on-board DC/DC converters have been foreseen. See also diagrams B01A, B01B and B01C.

9.3.1

PSU Start-up Sequence 1. If the input voltage of the DC/DC converters is around 12 V (measured on the decoupling capacitors 2U01/2U02) and the ENABLE signals are “low” (active), then the output voltages should have their normal values. 2. First, the Stand-by Processor activates the +1V2 supply (via ENABLE-1V2). 3. Then, after this voltage becomes present and is detected OK (about 100 ms), the other voltage of +3V3 will be activated (via ENABLE-3V3). 4. The current consumption of controller IC 7U00 is around 20 mA (that means around 200 mV drop voltage across resistor 3U01).

9.3.3

1.2V and 3.3V DC/DC Converters Introduction The circuit used is a so-called “synchronous buck converter”. Some characteristics: • Switching frequency: approx. 250 kHz. • Efficiency: approx. 90%. • Built-in output over-voltage and over-current protections • Soft start. • Software controlled “on/off” (via ENABLE line). Block diagram TS1 Vin

Internal Protection •

•

Provides a SUPPLY-FAULT signal (active “low”), when the output voltage of any DC/DC converter is out of its limits (± 10% of the normal value). In such cases, the Stand-by Processor will immediately stop the supplies by sending a “high” control signal towards the external and internal supplies: ENABLE-xVx, POD-MODE, ON-MODE, and STAND-BY. Note: The SUPPLY-FAULT control signal is “low” when any DC/DC converter is disabled by its control signal (ENABLE-xVx) and +12VSW is present, therefore it is ignored during start-up! The internal protection works together with the output overvoltage detector transistors 7U07-1 and 7U07-2.

Vout

G

TS2 D

FB PWM GENERATOR & MOSFET DRIVER

C1

G S

GND

9.3.2

L1

S

D

GND

F_15400_005.eps 130707

Figure 9-5 Block diagram synchronous buck converter. The advantage of a “synchronous buck converter” over a “classical buck converter” is its better efficiency (about 90%). The difference between the two is that in a synchronous buck converter the “low -side” diode is replaced by a MOSFET TS2 (item 7U05). This, because the voltage drop across a MOSFET is smaller than the forward voltage drop of a diode. This second MOSFET TS2 conducts current during the “off” times of the first MOSFET TS1 (item 7U08 at the input side). The upper MOSFET TS1 conducts, to transfer energy from the input to the inductor L1 and load RL, while the lower MOSFET TS2 conducts to circulate the inductor current (free wheel). The synchronous PWM control block regulates the output voltage by modulating the conduction intervals of the upper and lower MOSFETs.

EN 160

9.

Q529.1E LC

Circuit Descriptions, Abbreviation List, and IC Data Sheets

PWM Generator and MOSFET Drivers This circuit is a one-chip solution (item 7U0A). It contains all the circuitry for two independent buck regulators (3V3 and 1V2). The MOSFETs 7U08, 7U02, 7U05 and 7U06 are the switching transistors, they are conducting alternatively. • Time sequence 1: 7U08/7U02 is conducting; energy is stored in coil 5U01/5U00. The current is flowing from the +12VSW power supply source. • Time sequence 2: 7U08/7U02 is blocked; energy is stored in coil 5U01/5U00. • Time sequence 3: 7U05/7U06 is conducting, and the current circuit is now closed via 7U05/7U06, 5U01, 5U00, 2U06/2U0Z/2U07/2U0T/2U0U/2U0V, and the load. So the energy stored in the coil during time sequence T1 is consumed during sequence T3. The signal on the gate 7U05/7U06 is 180 degrees turned compared with the signal on the gate 7U08/7U02. Voltage Booster This circuit is build around capacitors 2U29 and 2U26, resistor 3U62/3UA1, diodes 6U01 and 6U00, and transistor 7U03. It generates the +18 V boost voltage on pin 4 of item 7U00, to drive the “high-side” power MOS-FET 7U08/7U02. The voltage is generated only during normal operation of the converter; therefore, any drop in its value means an internal fault condition, which is sensed by the internal protection circuit. The AC component of the voltage on the source of transistor 7U08/7U02 is rectified by the diodes and added to the input voltage, resulting into the boost voltage. The resistor 3U02/3U1K limits the peak current through the rectifier diodes. Over-current Detection Over-current detection is done via components 3U05, 3U06, 3U15, 3U14, and 2U04 for the 3.3 V converter and 3U00, 3U01, 3U16, 3U17, and 2U00 for the 1.2 V converter. Under-voltage Detection There is an additional circuit (7U01-1, 7U01-2 and 6U04) to switch “Off” the 3.3 V converter in case the +12VS drops below 9 V. Service Tips • When a power MOS-FET is found defective, replace the other power MOS-FET as well. • For a normal operation of the converter, it is important to check the switching frequency and the value of the boost voltage.

9.4

Additional Monitor DC/DC Converters In the monitor, additional DC/DC receivers are located to eliminate a voltage drop across the interconnection cable between monitor and hub. Refer to diagrams M01A and M01B. A +12V feedback-loop is built around items 2U09, 2U08, 3U04, 6U03, 3U07, 3U05 and 3U06. A +3V feedback-loop is built around items 2U21, 3U12, 3U13, 3U14, 2U17 and 3U15. Just as with the DC/DC converters in the hub, the circuit used is a so-called “synchronous buck converter”. Switching frequency is approx. 300 kHz.

dual dc-dc converter 1 LCD-PWR-ON

25V/12V dc-dc converter

+12V

25V/3.3V dc-dc converter

+3V3

ENABLE+3V3

dual dc-dc converter 2 25V/12V dc-dc converter 25V/3.3V dc-dc converter (res)

+5V +3V3-RS232 I_18020_135.eps 180908

Figure 9-6 ESSENCE monitor DC/DC converters -1-

+3V3

+5V

2.5V linear stabilizer

+2V5-STAB41

2.5V linear stabilizer

+2V5-STAB51

3.3V linear stabilizer

+3V3-RS232 I_18020_136.eps 180908

Figure 9-7 ESSENCE monitor DC/DC converters -2-

9.5

Front-End Refer to figure “9-1 Architecture of Essence - Hub” earlier in this chapter for details. Refer also to block diagrams B02A, B02B and B02C.

9.5.1

Device specifications Tuner (TD1716) The tuner has the following specifications: • Hybrid tuner with symmetrical IF output. • Down conversion from RF to IF frequency (picture carrier 39.875 MHz at analogue reception, centre frequency 36.166 MHz at digital reception). • AGC control signal is coming from master IF device (TDA9898). • Only 5 V external supply needed (internal DC-DC conversion to 3.3 V). • 4 MHz output is used by channel decoder (TDA10048) and master IF device (TDA9898). The application in this chassis is as follows: • I2C address C0. • Broadband AGC, no IF section. • I2C communication buffered via MUX. • Gain to obtain optimised Master IF input level; AGC control is completely inside the tuner. • Output level ca. 110 dBμV (for strong input signal). Repair tip: after replacement of the tuner, the option code should be checked, even when the set appears to function correctly! Refer also to chapter 5 “Service Modes, Error Codes, and Fault Finding”.

Following figures depict the additional Monitor DC/DC converters.

Master IF (TDA9898) • Down conversion from IF to low-IF frequency. • Down conversion from IF to SIF. • CVBS output.

•

The application in this chassis is as follows: • I2C address 0x86. • Down conversion from IF to low-IF frequency (5.166 MHz centre frequency). • Advanced filtering (for further rejection of adjacent channels). signal is coming from channel decoder.

Gain to obtain optimised channel decoder level. Control

Circuit Descriptions, Abbreviation List, and IC Data Sheets • • •

SAW filter X6874D and X3451K • Analogue sound for BG, I, DK, L, L’. • DVB-T (digital reception sound and video).

X6774D • Analogue video for BG, I, DK, L, L’. 9.5.2 Channel decoder (TDA10048) DVB-T The channel decoder has the following specifications: • I2C address 0x10. • Decoding from low-IF to MPEG transport stream. • During decoding: de-modulation, de-interleaving and error correction.

RF

Digital signal processing (front-end) Refer to figure “9-8 DVB-C signal broadcast reception block diagram” and “9-9 DVB-T signal broadcast reception block diagram” for details of digital signal processing.

DVB-C TDA10023

PLL

Wideband AGC

Tuner TD1716_Mk4

10-bit ADC

DIF

Decoding

PLL

TS interface

C0h

IF X6874D

X3451K

8MHz

7MHz

5,8MHz

36.125MHz

36.13MHz

37.6MHz

DVB-T TDA10048 10-bit ADC

IF

Decoding

TS PLL

TS interface

IF AGC

LIF

TDA9898 SIF AGC

SIF Side Band Filter

RF AGC

TOP

Band Pass Filter

PLL

PEAK AGC T-AGC

CVBS

VIF AGC Nyquist Filter

Sound Trap

EN 161

External clock buffer required. No start-up requirements. AGC monitor.

PNX8541

4MHz

9.

Channel decoder (TDA10023) DVB-C The channel decoder has the following specifications: • I2C address 0x1C. • Decoding from low-IF to MPEG transport stream. • During decoding: de-modulation, de-interleaving and error correction. • External clock buffer required. • No start-up requirements. • AGC monitor.

For digital reception, the application in this chassis is as follows: • Rejection of adjacent channels. • Switching is done by Master IF (3 inputs). • One SAW covering both 7 and 8 MHz channels.

HPF

Q529.1E LC

Group Delay

L AGC

I_17660_144.eps 170308

Figure 9-8 DVB-C signal broadcast reception block diagram

EN 162

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

RF

DVB-C TDA10023

PLL

Wideband AGC

Tuner TD1716_Mk4

10-bit ADC

DIF

Decoding

PNX8541

4MHz HPF

PLL

TS interface

IF X6874D

X3451K

8MHz

7MHz

5,8MHz

36.125MHz

36.13MHz

37.6MHz

DVB-T TDA10048 10-bit ADC

IF

Decoding

TS PLL

TS interface

IF AGC

LIF

TDA9898 SIF AGC

SIF Side Band Filter

RF AGC

TOP

Band Pass Filter

PLL

PEAK AGC T-AGC

CVBS

VIF AGC Nyquist Filter

Sound Trap

Group Delay

L AGC

I_17660_143.eps 170308

Figure 9-9 DVB-T signal broadcast reception block diagram 9.5.3

Analogue signal processing (front-end) Refer to figure “9-10 Analog video broadcast reception block diagram” for details of analogue signal processing.

RF

DVB-C TDA10023

PLL

Nested AGC

Tuner TD1716_Mk4

10-bit ADC

DIF

Decoding

PNX8541

4MHz HPF

PLL

TS interface

IF X6874D

X3451K

8MHz

7MHz

5,8MHz

36.125MHz

36.13MHz

37.6MHz

DVB-T TDA10048 10-bit ADC

IF

Decoding

TS PLL

TS interface

IF AGC

LIF

TDA9898 SIF AGC

SIF Side Band Filter

RF AGC

TOP

Band Pass Filter

PLL

PEAK AGC T-AGC

CVBS

VIF AGC Nyquist Filter

Sound Trap

Group Delay

L AGC

I_17660_142.eps 170308

Figure 9-10 Analog video broadcast reception block diagram

Circuit Descriptions, Abbreviation List, and IC Data Sheets 9.6

PNX85xx

9.6.1

In this chassis, the PNX85xx is responsible for the audio/video source decode functions and video improvement processing on both digital and analogue sources. It includes a multistandard digital video decoder for MPEG2, and a multistandard analogue video decoder for support of PAL, NTSC, and SECAM standards. Refer to diagram B04 for details.

Q529.1E LC

9.

EN 163

Video Subsystem Refer to figure “9-11 PNX85xx video flow diagram” for a clarification of the blocks that are used in this device.

xx

H_16770_124.eps 130707

Figure 9-11 PNX85xx video flow diagram The Analogue Video Front-End (AVFE) provides the interface to external analogue baseband video sources and IF inputs. It supports the following inputs: • 1fh - CVBS, Y/C, YPbPr, RGB. • 2fh - YPbPr, RGB. • IF - low-IF, SSIF. The Video Capture Pipe (VCP) is used to capture analogue video inputs and consists of a number of blocks: • The VCP-RX block that contains digital IF processing, a Video Decoder, a 3D-combfilter, and a VBI-Data Capture unit together with a number of smaller control functions. • The VCP-PSUD which allows VBI data, such Teletext and Closed Captioning, to be stored in memory. • The VCP-PSUV which allows captured video data to be stored in memory. The HDMI receiver interface supports the capture of signals compliant with the HDMI V1.3 specification. It consists of two blocks: • Block HDMI-RX contains the de-serializer, HDCP, audio and video data capture and info packet extraction, together with audio formatting. • Block HDMI-RX2DTL allows captured video data to be stored in memory.

The Memory Based Video Processor TV (MBVP_L2TV) is used on the main video channel for de-interlacing and scaling of images, together with video measurement functions. The Video Composition Pipe TV (CPIPE_L2TV) is used to perform picture improvements on video and merge the video layer and 2 graphics layers into a single stream. The Flat Panel Display-LVDS (FPD-LVDS) provides a serial interface for 10-bit RGB output data towards the LCD panel. The Memory Based Video Processor VO (MBVP_2LVO) is used on the main video channel for scaling of images for monitor out. The Video Composition Pipe VO (CPIPE_VO) is used to merge a video and a graphics layer into a single stream together with insertion of VBI and CGMS data. The Digital Encoder (DENC) supports encoding of a digital video stream from the CPIPE_VO into Analogue CVBS or Y/C.

EN 164 9.6.2

9.

Q529.1E LC

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Audio Subsystem Refer to figure “9-12 PNX85xx audio flow diagram” for a clarification of the blocks that are used in this device.

xx

H_16770_125.eps 130707

Figure 9-12 PNX85xx audio flow diagram Digital Audio Decoder DSP is used to decode digital compressed streams such as MPEG and AC-3. This runs as SW Codecs on the AV-DSP.

The Analogue Audio Front-End Input (AAFE) block is used to capture Baseband Audio Inputs. The Sony/Philips Digital Interface (SPDIF) input is used to get compressed data into the system memory. The multiplexer in front of the block allows two possible sources of SPDIF signals. The SPDIF Output is used to generate either PCM data or a compliant IEC-61937 compressed stream containing MPEG/Dolby Digital format. The Audio Input (AI) block is used to transfer stereo audio (I2S channel) from the Audio DSP into the system memory for “lipsync” delay. The Audio Output (AO) block supports output of up to four stereo I2S channels. The AO is used to transfer data from the system memory to the Audio DSP, for post processing of the signal at a sampling frequency of 48 kHz (max.). Demodulation & Decoding DSP is used for demodulation and decoding of all analogue terrestrial TV sound standards that the TV520 platform covers. The Audio Post-Processing DSP supports DPLII together with volume and tone control, spatializers, and equalizers for 6 channels (max.)

9.6.3

Audio-Video Codec Subsystem The AV Codec subsystem consists of the modules required to capture and de-scramble Transport stream inputs together with decoding of Audio/video Streams. Refer to figure “PNX85xx video flow diagram” for a clarification. The sub-system consists of the following modules: The Conditional Access Interface block provides a direct interface towards a PCMCIA socket for Conditional Access. It supports both the DVB CI-CA Specification and the CableCard (POD) Interface. The MPEG System Processor (VMSP) provides parsing an MPEG-2 transport stream, including de-scrambling, demultiplexing and appropriate routing of data to the memory. The Video MPEG Decoder (VMPG) performs MPEG2 decoding for both MP@ML and MP@HL streams.

Circuit Descriptions, Abbreviation List, and IC Data Sheets 9.6.4

Q529.1E LC

9.

EN 165

Control and Compute Subsystem Refer to figure “Control and compute subsystem” for a clarification of the blocks that are used in this device.

DDR2-SDRAM

PNX85xx MCU

I2C-3

I2C-DMA3 MIPS MTI-4KeC

I2C-2

I2C-DMA2

I2C-1

I2C-Slave

2-wire

UART1

2-wire

UART2

D M A B u s

D C S N e t w o r k

I2C-4 System Controller 80C51

UART-3 PWM’s GPIO’s

PCI/XIO PCI/XIO

E-JTAG

E-JTAG DMA

CAI CA

H_16770_126.eps 130707

Figure 9-13 Control and compute subsystem The Control and compute subsystem consists of the main processor, control peripherals and the memory system. The MIPS 4KEc is a 32-bit MIPS RISC core. It has direct access to connectivity peripherals to support system features via PCI, I2C, UART or General Purpose I/O. A JTAG interface provides processor software debug capabilities. The Memory Control Unit (MCU) is a 32-bit DDR2 SDRAM interface supporting DDR2-533 with an address range of 128 MB (max.). The PCI/XIO interface supports PCI Rev2.2 and can be used to access 8/16-bit external NAND-Flash memory. The Conditional Access Interface supports direct control and communication to the PC-Card attached to a PCMCIA interface. The interface supports the DVB CI-CA and CableCard specification.

9.7

Back-end Refer to figures “9-1 Architecture of Essence - Hub” earlier in this chapter for details. Refer also to block diagrams B05, B05, B06 and AB. In HD sets (50 / 100 Hz), the output signal coming from the PNX85xx is fed to the PNX5100 and then to the Spartan-3 FPGA for driving the AmbiLight units. The PNX5100 3 also generates the pulse-width modulated signal needed for the “Dimming Backlight” feature, which ensures additional motion sharpness. As some displays require an analogue signal to switch the LCD, a multiplexer is added to transform the pulse width modulated signal. An additional signal, coming from the PNX85xx, makes the selection between analogue and pulsewidth modulation, depending on which display is used. Scanning back light displays require an analogue signal, and all other displays a pulse-width modulated. Refer to figure “9-14 PNX5100 Detailed Video Block diagram”.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

YUV10b

1G51 LVDS 51p

LVDS10b

PNX5100

MIPS

1G50 LVDS 41p

PNX8541 StdBy RGB-Ambi SPARTAN3 I2C

2x DDR PWM Boost

Converter

PWM Dimming

Converter

Analog /PWM Dimming

Lamp On

Level shift

1M59

9.

LVDS HD HD DF fHD fHD DF

AmbiLight

Analog Boost Analog /PWM Dimming

1M99

EN 166

Display Supply

Analog /PWM Display

I_17660_145.eps 170308

Figure 9-14 PNX5100 Detailed Video Block diagram 9.7.1

PNX5100

•

The PNX5100 performs the following tasks: • Picture quality improvement (Natural Motion, etc.). • Video and graphics (On Screen Display) mixing. • Up conversion from 50/60 to 100/120 Hz. • Colour processing • Sharpness processing • Backlight control • AmbiLight pre processing • Switching On and Off of the display • Pattern generator

• •

The PNX5050 interfaces: • Video input (CMOS). • Graphics input (PCI). • I2C. • Field memory (2 × DDR). • Video output: LVDS (single, dual or quad) to display • Backlight control: PWM for dimming and boost • AmbiLight: CMOS sequential RGB to FPGA • GPIO Refer to figure “9-14 PNX5100 Detailed Video Block diagram” for details.

9.8

Audio As a result of separation between monitor and supporting electronics (hub), some modifications are made w.r.t. previous chassis (Q529.1E LA/LB). The delta’s are: • All audio I/O, except side I/O, has been moved to a separate I/O panel. • One HDMI connector less on SSB. • Audio Amplifier is moved to Monitor panel (DPRX) • Audio for the amplifier is sent via I2S. The conversion to I2S format is done in the FPGA. • The amplifier type is the same as for the earlier Q529.1E LA/LB chassis. • Application however is different as a single supply is used.

•

An extra fuse is implemented in the audio supply on the monitor board as a result of the (long) supply cable Extra audio supply decoupling is implemented. DC-protection is self-contained: it will only affect the operation of the amplifier. The amplifier will go in a onesecond switch on/switch off cycle when in protection. Audio DAC is added to convert the I2S signal into the analog domain.

As a result of the audio application in this chassis, you can disconnect the speakers without the risk of damaging the amplifier. Also, the set will not go into protection anymore.

9.9

DLNA Is an international, cross-industry collaboration of consumer electronics, computing industry and mobile device companies standard. The main objective of DLNA is the establishment of a wired and wireless inter operable network of personal computers (PC), consumer electronics (CE) and mobile devices in the home and on the road, enabling a seamless environment for sharing new digital media and content services. DLNA is focused on delivering an inter operability framework of design guidelines based on open industry standards to complete the cross-industry digital convergence. The TV522 platform is set up as Digital Media Player. It can find and play or display the content that is shared on your network by server devices. In this chassis, an Ethernet MAC/PHY for wired Ethernet is incorporated to support DLNA. Main features: • National Semiconductors DP83816 • Controlled over PCI interface • Physical layer uses a top-entry RJ45 with integrated magnetics (UTP) • Supports 10M and 100M (full and half duplex) • Uses 3V3 only (divided into separate analog and digital supply planes) • The network controller shares the interrupt with the USB host controller • The network controller can access the DRAM to dump/fetch packets.

Circuit Descriptions, Abbreviation List, and IC Data Sheets 9.10 Abbreviation List 0/6/12

2DNR 3DNR AARA

ACI

ADC AFC

AGC

AM ANR AP AR ASF

ATSC

ATV Auto TV

AV AVC AVIP B/G BLR BTSC

B-TXT C CEC

CL CLR COLUMBUS ComPair CP CSM CTI

CVBS DAC DBE DDC

D/K SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format Spatial (2D) Noise Reduction Temporal (3D) Noise Reduction Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page Analogue to Digital Converter Automatic Frequency Control: control signal used to tune to the correct frequency Automatic Gain Control: algorithm that controls the video input of the feature box Amplitude Modulation Automatic Noise Reduction: one of the algorithms of Auto TV Asia Pacific Aspect Ratio: 4 : 3 or 16 : 9 Auto Screen Fit: algorithm that adapts aspect ratio to remove horizontal black bars without discarding video information Advanced Television Systems Committee, the digital TV standard in the USA See Auto TV A hardware and software control system that measures picture content, and adapts image parameters in a dynamic way External Audio Video Audio Video Controller Audio Video Input Processor Monochrome TV system. Sound carrier distance is 5.5 MHz Board-Level Repair Broadcast Television Standard Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries Blue TeleteXT Centre channel (audio) Consumer Electronics Control bus: remote control bus on HDMI connections Constant Level: audio output to connect with an external amplifier Component Level Repair COlour LUMinance Baseband Universal Sub-system Computer aided rePair Connected Planet / Copy Protection Customer Service Mode Colour Transient Improvement: manipulates steepness of chroma transients Composite Video Blanking and Synchronization Digital to Analogue Converter Dynamic Bass Enhancement: extra low frequency amplification See “E-DDC”

DFI DFU DLNA DMR DNM DNR DRAM DRM DSP DST

DTCP

DVB-C DVB-T DVD DVI(-d) E-DDC

EDID EEPROM EMI EPLD EU EXT FBL FDS FDW FLASH FM FPGA FTV Gb/s G-TXT GPIO H HD HDD HDCP

HDMI HP I I2 C I2 D I2 S IF Interlaced

Q529.1E LC

9.

EN 167

Monochrome TV system. Sound carrier distance is 6.5 MHz Dynamic Frame Insertion Directions For Use: owner's manual Digital Living Network Alliance Digital Media Reader: card reader Digital Natural Motion Digital Noise Reduction: noise reduction feature of the set Dynamic RAM Digital Rights Management Digital Signal Processing Dealer Service Tool: special remote control designed for service technicians Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394 Digital Video Broadcast - Cable Digital Video Broadcast - Terrestrial Digital Versatile Disc Digital Visual Interface (d= digital only) Enhanced Display Data Channel (VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display. Extended Display Identification Data (VESA standard) Electrically Erasable and Programmable Read Only Memory Electro Magnetic Interference Erasable Programmable Logic Device Europe EXTernal (source), entering the set by SCART or by cinches (jacks) Fast BLanking: DC signal accompanying RGB signals Full Dual Screen (same as FDW) Full Dual Window (same as FDS) FLASH memory Field Memory or Frequency Modulation Field-Programmable Gate Array Flat TeleVision Giga bits per second Green TeleteXT General Purpose Input/Output H_sync to the module High Definition Hard Disk Drive High-bandwidth Digital Content Protection: A “key” encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a “snow vision” mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP “software key” decoding. High Definition Multimedia Interface HeadPhone Monochrome TV system. Sound carrier distance is 6.0 MHz Inter IC bus Inter IC Data bus Inter IC Sound bus Intermediate Frequency Scan mode where two fields are used to form one frame. Each field contains

EN 168

9.

IR IRQ ITU-656

ITV JOP LS

LATAM LCD LED L/L'

LORE LPL LS LVDS Mbps M/N MIPS

MOP MOSFET MPEG MPIF MUTE NC NICAM

NTC NTSC

NVM O/C OSD OTC P50 PAL

Q529.1E LC

Circuit Descriptions, Abbreviation List, and IC Data Sheets

half the number of the total amount of lines. The fields are written in “pairs”, causing line flicker. Infra Red Interrupt Request The ITU Radio communication Sector (ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz. Institutional TeleVision; TV sets for hotels, hospitals etc. Jaguar Output Processor Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences Latin America Liquid Crystal Display Light Emitting Diode Monochrome TV system. Sound carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I LOcal REgression approximation noise reduction LG.Philips LCD (supplier) Loudspeaker Low Voltage Differential Signalling Mega bits per second Monochrome TV system. Sound carrier distance is 4.5 MHz Microprocessor without Interlocked Pipeline-Stages; A RISC-based microprocessor Matrix Output Processor Metal Oxide Silicon Field Effect Transistor, switching device Motion Pictures Experts Group Multi Platform InterFace MUTE Line Not Connected Near Instantaneous Compounded Audio Multiplexing. This is a digital sound system, mainly used in Europe. Negative Temperature Coefficient, non-linear resistor National Television Standard Committee. Colour system mainly used in North America and Japan. Colour carrier NTSC M/N = 3.579545 MHz, NTSC 4.43 = 4.433619 MHz (this is a VCR norm, it is not transmitted off-air) Non-Volatile Memory: IC containing TV related data such as alignments Open Circuit On Screen Display On screen display Teletext and Control; also called Artistic (SAA5800) Project 50: communication protocol between TV and peripherals Phase Alternating Line. Colour system mainly used in West Europe (colour carrier = 4.433619 MHz) and South

PCB PCM PDP PFC PIP PLL

POR Progressive Scan

PTC PWB PWM QRC QTNR QVCP RAM RGB

RC RC5 / RC6 RESET ROM R-TXT SAM S/C SCART

SCL SCL-F SD SDA SDA-F SDI SDRAM SECAM

SIF SMPS SoC SOG SOPS S/PDIF SRAM SSB STBY SVGA SVHS SW SWAN SXGA TFT THD TMDS TXT TXT-DW UI uP UXGA

America (colour carrier PAL M = 3.575612 MHz and PAL N = 3.582056 MHz) Printed Circuit Board (same as “PWB”) Pulse Code Modulation Plasma Display Panel Power Factor Corrector (or Preconditioner) Picture In Picture Phase Locked Loop. Used for e.g. FST tuning systems. The customer can give directly the desired frequency Power On Reset, signal to reset the uP Scan mode where all scan lines are displayed in one frame at the same time, creating a double vertical resolution. Positive Temperature Coefficient, non-linear resistor Printed Wiring Board (same as “PCB”) Pulse Width Modulation Quasi Resonant Converter Quality Temporal Noise Reduction Quality Video Composition Processor Random Access Memory Red, Green, and Blue. The primary colour signals for TV. By mixing levels of R, G, and B, all colours (Y/C) are reproduced. Remote Control Signal protocol from the remote control receiver RESET signal Read Only Memory Red TeleteXT Service Alignment Mode Short Circuit Syndicat des Constructeurs d'Appareils Radiorecepteurs et Televisieurs Serial Clock I2C CLock Signal on Fast I2C bus Standard Definition Serial Data I2C DAta Signal on Fast I2C bus Serial Digital Interface, see “ITU-656” Synchronous DRAM SÉquence Couleur Avec Mémoire. Colour system mainly used in France and East Europe. Colour carriers= 4.406250 MHz and 4.250000 MHz Sound Intermediate Frequency Switched Mode Power Supply System on Chip Sync On Green Self Oscillating Power Supply Sony Philips Digital InterFace Static RAM Small Signal Board STand-BY 800 × 600 (4 : 3) Super Video Home System Software Spatial temporal Weighted Averaging Noise reduction 1280 × 1024 Thin Film Transistor Total Harmonic Distortion Transmission Minimized Differential Signalling TeleteXT Dual Window with TeleteXT User Interface Microprocessor 1600 × 1200 (4 : 3)

Circuit Descriptions, Abbreviation List, and IC Data Sheets V VCR VESA VGA VL VSB WYSIWYR

WXGA XTAL XGA Y Y/C YPbPr

YUV

V-sync to the module Video Cassette Recorder Video Electronics Standards Association 640 × 480 (4 : 3) Variable Level out: processed audio output toward external amplifier Vestigial Side Band; modulation method What You See Is What You Record: record selection that follows main picture and sound 1280 × 768 (15 : 9) Quartz crystal 1024 × 768 (4 : 3) Luminance signal Luminance (Y) and Chrominance (C) signal Component video. Luminance and scaled colour difference signals (B-Y and R-Y) Component video

Q529.1E LC

9.

EN 169

EN 170

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.11 IC Data Sheets This section shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the electrical diagrams (with the exception of “memory” and “logic” ICs). 9.11.1 Diagram B01A, B01C, NCP5422AD (IC 7U0A, 7U0L)

Block Diagram

VCC

ROSC

BIAS

− +

VCC

+

8.6 V − 7.8 V

CURRENT SOURCE GEN

RAMP2

RAMP1

BST

IS+1 CLK1

+ IS−1

non−overlap VCC

GATE(H)1

GATE(L)1

R

−

+

−

FAULT

PWM Comparator 1

+

FAULT

70 mV

Q FAULT

S

−

+

Set Dominant

RAMP1 BST

0.425 V

R

− +

+

− 0.25 V

+

GATE(L)2

R FAULT GND E/A OFF

0.425 V

1.2 mA

−

E/A1

−

1.0 V

non−overlap VCC

Reset Dominant

FAULT

RAMP2

E/A OFF

5.0 A

GATE(H)2

S

PWM Comparator 2

− +

IS−2

S Reset Dominant

70 mV

−

+

IS+2

CLK2

−

+

−

BST

OSC

+

FAULT

E/A2

1.0 V

VFB1

COMP1

VFB2

COMP2

Pin Configuration SO−16 16

1

A WL Y WW

NCP5422A AWLYWW

GATE(H)1 GATE(L)1 GND BST IS+1 IS−1 VFB1 COMP1

GATE(H)2 GATE(L)2 VCC ROSC IS+2 IS−2 VFB2 COMP2

= Assembly Location = Wafer Lot = Year = Work Week

Figure 9-15 Internal block diagram and pin configuration

F_15400_129.eps 240505

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.

EN 171

9.11.2 Diagram B01B, LD2985BM33R (IC7U73)

Pin Configuration

Block Diagram LD2985BM

SOT23-5L

F_15710_165.eps 230905

Figure 9-16 Internal block diagram and pin configuration

EN 172

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.11.3 Diagram B02A, TDA10048HN (IC7T17-1)

Block Diagram

AGC_TUN

ANALOG

AGC_IF

ΣΛ STEP INTERFACE

VIM

DUAL AGC

ADC VIP

DIGITAL FRONT-END AND OFDM DEMODULATION

ΣΛ

CHANNEL ESTIMATION AND CORRECTION

STEP INTERFACE

XIN

TIME RECOVERY

CARRIER RECOVERY

OSCILLATOR XOUT

DYNAMIC TIMESHIFT

CCI CANCELLER

ACI FILTERING

COARSE TIME ESTIMATOR

CPE CALCULATION

I2C-BUS INTERFACE

ΣΔ

ΣΔ

ΣΔ

ΣΔ

DSP CORE SYNCHRONISATION

FREQUENCY INTERPOLATION

FREQUENCY, TIME, FRAME RECOVERY FFT WINDOW POSITIONING TPS DECODING

GPIO[3:0]

PARTIAL CHANNEL ESTIMATION

TIME INTERPOLATION

TDA10048HN

SCL_TUN SDA_TUN SCL, SDA SADDR

FFT 2K / 4K / 8K

DIGITAL AGC

PLL

CONFIDENCE CALCULATION

CHANNEL CORRECTION

confidence MPEG-2 OUTPUT INTERFACE

DESCRAMBLER

RS DECODER

CPT_UNCOR

BIT DEINTERLEAVER

VITERBI DECODER CBER

VBER

DEMAPPER

(I,Q)

INNER FREQUENCY DEINTERLEAVER CHANNEL DECODER

37 TMS

38 TDI

39 TCK

41 CLR_N

40 TDO

42 AGC_IF

43 AGC_TUN

44 VSSDC

45 VDDDC(1V2)

46 VDDD(3V3)

terminal 1 index area

47 VSSD(ADC/PLL)

48 VDDD(ADC/PLL)(1V2)

Pin Configuration

VDDA(ADC)(3V3)

1

36 TRST_N

VIM

2

35 SCL

VIP

3

34 SDA

VSSA(ADC)

4

33 SADDR

VDDD(ADC)(3V3)

5

VSSA(OSC)

6

XIN

7

30 VSSDC

XOUT

8

29 VSSD

VDDA(OSC)(1V2)

9

28 VDDD(3V3)

32 GPIO0 31 VDDDC(1V2)

TDA10048HN

DO4/GPIO3 24

DO3/GPIO2 23

DO2/GPIO1 22

DO1/S_DO 21

DO0/S_UNCOR 20

OCLK/S__OCLK 19

DEN/S_DEN 18

PSYNC/S_PSYNC 17

25 DO5

SCL_TUN 16

26 DO6

VDDDC(1V2) 12

SDA_TUN 15

27 DO7

VDDA(PLL)(1V2) 11

VSSD 14

VSSA(PLL) 10

VSSDC 13

MPEG TS DO[7:0]/S_DO (parallel/serial)

OUTER FORNEY DEINTERLEAVER

Transparent top view

Figure 9-17 Internal block diagram and pin configuration

H_16800_127.eps 090507

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.

EN 173

9.11.4 Diagram B02B, TDA9898HL (IC7T57)

Block Diagram R(2)

4 MHz reference input R(2)

SDA

SCL

23

i.c.

24

ADRSEL BVS

14

25

EXTERNAL SOUND BAND-PASS FILTER(1)

GNDD

32

VP 43, 44

LFSYN2 1

22

I2C-BUS

SYNTHESIZER AND VCO

GNDA 40, 41

EXTFILO 15

EXTFILI 17

FREF 46

OPTXTAL 39

4 MHz FREQUENCY REFERENCE

SUPPLY +3 dB

A

TDA9897 AGCDIN

AM average

36

SIF AGC

B

29

TDA9897

FM peak

30

OUT2A OUT2B

BP on/off IF3A IF3B

sideband

3

OUTPUT SWITCH

C

Q 4

26

BAND-PASS FILTER

SIDEBAND FILTER

I

27

D IF1A IF1B

IF2A IF2B

6

21 VIF AGC

7

EXTFMI

20 CDEEM

I NYQUIST FILTER

Q

10

OUT1B

34 CAF2

sideband

9

OUT1A

FM SWITCH

E

31

FM AMPLIFIER

AUD

28 CAF1 FM CARRIER AGC I2C-BUS TOPNEG

DECODER i.c.

45

PEAK AGC TUNER

TAGC

47

RSSI DETECTOR AND IF BASED TUNER AGC

VIF PLL AND ACQUISITION HELP

SOUND CARRIER TRAP

VIF AFC

GROUP DELAY EQUALIZER

AM F

AM DEMODULATOR FM AND FM NARROW-BAND PLL AM

trap reference

16 TAGC SIF AGC FM AGC AFC

standard

SYNTHESIZER AND VCO

33

I2C-BUS TOP2

G

AND RSSI

H

VIF AGC I2C-bus

13 LFVIF

35, 42

38 LFSYN1

MPP1

port

19 LFFM

40 GNDA

41 GNDA

42 n.c.

43 VP

44 VP

45 i.c.

46 FREF

48 GND

47 TAGC

Pin Configuration

37 n.c.

n.c.

38 LFSYN1

n.c.

11 TOP2 optional tuner AGC TOP for IF based tuner AGC and radio signal strength detector onset

CVBS

LFSYN2

1

36 AGCDIN

n.c.

2

35 n.c.

IF3A

3

34 CAF2

IF3B

4

33 CVBS

CIFAGC(1)

5

IF1A

6

IF1B

7

CTAGC

8

29 OUT2A

IF2A

9

28 CAF1

32 BVS 31 AUD

TDA9897HL TDA9898HL

30 OUT2B

EXTFMI 21

CDEEM 20

LFFM 19

n.c. 18

EXTFILI 17

MPP2 16

25 ADRSEL

EXTFILO 15

26 OUT1A

MPP1 12

i.c. 14

27 OUT1B

TOP2 11

LFVIF 13

IF2B 10

SCL 24

CTAGC

39 OPTXTAL

8

SDA 23

2, 5, 18, 37

GND

GNDD 22

48

12

MPP2

Figure 9-18 Pin configuration

H_16800_029.eps 111007

EN 174

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.11.5 Diagram B02C, TDA10023HT (IC7TA4)

Block Diagram VDDA1 XIN 2

VSSA1

VDDD3

XOUT 3

VSSD3

3 4

1

7, 24, 41

VSSD2

VDDD2

3 8, 25, 42

VDDD1

VSSD1

VDDA2

VDDA3

VSSA3

VDDD4

50

49

61

55

59

60

3

3

15, 31, 44

14, 30, 43

9

PWM PLL SACLK

CTRL

ADC

10

BASEBAND CONVERSION

11

PWM

HALF NYQUIST

TIMING INTERPOLATOR

DECIMATION FILTERS

CLRB VIP VIM

29

32

RS DECODER

DE-INTERLEAVER

GPIO

8

JQAM FILTER

DE-SCRAMBLER

6

TRELLIS DEMODULATOR

FRAME SYNC

DERANDOMIZER

36

16

35 34 33

MPEG2 TS CKSUM

REED SOLOMON DECODER

DEINTERLEAVER

37 to 40, 45 to 48

28

58

27

57

TDA10023HT

JTAG

22 23

IICDIV

26

10

21 19

I2C-BUS INTERFACE

17

20

DO[7:0] DEN programmable interface

OCLK PSYNC UNCOR

TDO TMS serial interface

TCK TDI TRST ENSERI SDAT SCLT

13, 51, 52, 53, 54, 56, 62, 63, 64

12

001aac555

SADDR

n.c.

49 VSSD1

50 VDDD1

52 n.c.

51 n.c.

53 n.c.

55 VDDA3

54 n.c.

56 n.c.

58 VIP

57 VIM

59 VSSA3

61 VDDA2

60 VDDD4

63 n.c.

62 n.c.

64 n.c.

Pin Configuration

VDDA1

1

48 DO[0]

XIN

2

47 DO[1]

XOUT

3

46 DO[2]

VSSA1

4

45 DO[3]

SACLK

5

44 VSSD2

TEST

6

43 VDDD2

VDDD3

7

42 VSSD3

VSSD3

8

AGCTUN

9

41 VDDD3

TDA10023HT

40 DO[4]

IICDIV 10

39 DO[5]

AGCIF 11

38 DO[6]

SADDR 12

37 DO[7]

n.c. 13

36 DEN

CTRL 32

VSSD2 31

VDDD2 30

TDO 28

GPIO 29

TMS 27

TRST 26

VSSD3 25

TDI 23

VDDD3 24

TCK 22

33 UNCOR SCLT 20

34 PSYNC

CLRB 16 ENSERI 21

35 OCLK

VSSD2 15

SDAT 19

VDDD2 14

SCL 17

SCL

18

SDA 18

SDA

AGCIF

DECISION DIFFERENTIAL DECODER

CARRIER RECOVERY

EQUALIZER

OUTPUT INTERFACE

TEST

AGCTUN

AGC

5

IF

GPIO

CLOCK RECOVERY

Figure 9-19 Internal block diagram and pin configuration

H_17650_072.eps 150108

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.

EN 175

9.11.6 Diagram B03x, STi7100 (IC7A00)

Block Diagram

DDR SDRAM

32

5 x 2-ch S/PDIF PCM out AudioL 2-ch PCM in AudioR

32

Audio DACs

ST40 core 266 MHz 16 K Icache

UDI

Video LMI

32 K Dcache

Serial ATA interface

Audio decoder and interfaces

Int. control MMU

System LMI

ST231 core

Peripheral I/O and external interrupts

SD video in

Digital video input

USB 2.0

2x I/F SmCard

IR Tx/Rx

MAFE interface

PWM

6x GPIO

ILC

4x UARTs

3x SSCs

STBus

2 x PDES

PTI

PTI

TSmerger/router

CP

Video decoder H264/MPEG-2

FDMA

Clock generator and system services

CUR

ST231 core

Ethernet, MII/RMII

MII/RMII for 100BT Ethernet TSIN0 TSIN1 TS I/O NRSS-A

2D gamma blitter

DVI-HDCP HDMI

TMDS main video output (HD)

3 x GDP Display compositor

Output stage

DENC

DACs

DACs

Main video output (HD) YPbPr

Aux video output (SD) YC/CVBS

DEI Main video display Aux video display

EMI

EMPI

Flash or companion chip

H_16780_085.eps 070907

Figure 9-20 Internal block diagram and pin configuration

EN 176

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.11.7 Diagram B04x, PNX85xx (IC 7H00)

Block Diagram DDR-II 32 MB

DDR-II 32 MB

16

16

LCD Matrix Display 1368 × 768

PNX85xx A/V INPUTS MIPS32@240MHz TV control, Pixel OSD Source select 3D-Comb Digital color decoder Audio decoding Full audio processing, inc SRS MPEG-2 HD/SD decode MA DI 8-bit video processing Enhanced PQ processing Single LVDS output HDMI / DVI CA option

VGA

HDMI

TDA10060 Channel

TD1736OF

TDA9897

Tuner

IF

SPDIF Out

TDA8933T Audio Amp.

8/16

USB2 Option

FLASH 16 MB

Pin Configuration ball A1 index area

2 1

B D F H K M P T V Y AB AD AF AH AK

4 3

6 5

7

8 10 12 14 16 18 20 22 24 26 28 30 9 11 13 15 17 19 21 23 25 27 29

A C E G J

PNX85xx

L N R U W AA AC AE AG AJ

Transparent top view

Figure 9-21 Pin configuration

H_16800_128.eps 230707

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.11.8 Diagram B05x, PNX5100 (IC 7C00)

Block Diagram PNX5100EH MEMORY CONTROLLER

TM327x 1 LVDS RX 1

GIC 1 UIP L3K7

Video TM327x 2 GIC 2

LVDS RX 2

TM327x 3 GIC 3 PCI/XIO

LVDS TX 1 Video

I2C

LVDS TX 2

I2C-DMA I2C

CPIPE L3K7 LVDS TX 3

GFX

LVDS TX 4 UART

UART

16 X GPIO EJTAG CLOCK

CAB

AUDIO IN AUDIO OUT

Pin Configuration ball A1 index area A B C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF

2 4 6 8 10 12 14 16 18 20 22 24 26 1 3 5 7 9 11 13 15 17 19 21 23 25

PNX5100EH

I_17660_149.eps 180308

Figure 9-22 Pin configuration

9.

EN 177

EN 178

9.

Q529.1E LC

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.11.9 Diagram B08A, 74HC4053PW (IC7E02)

Block Diagram

74HC4053PW

Pin Configuration

Fig.1 Pin configuration.

Fig.2 Logic symbol.

Fig.3 IEC logic symbol. I_18020_140.eps 190908

Figure 9-23 Pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.11.10 Diagram B08G, AD8197A (IC7E13)

PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP_PRE[1:0]

Block Diagram

PARALLEL SERIAL

2

I2C_SDA I2C_SCL I2C_ADDR[2:0]

RESET

AD8197

2

CONFIG INTERFACE

3

AVCC DVCC AMUXVCC AVEE DVEE

CONTROL LOGIC

VTTI

+ IP_A[3:0] IN_A[3:0] – + IP_B[3:0] IN_B[3:0] – + IP_C[3:0] IN_C[3:0] – + IP_D[3:0] IN_D[3:0] –

VTTO

4 4 4 4

4

SWITCH CORE

4 4

+ OP[3:0] – ON[3:0]

4

PE

EQ

4 4

HIGH SPEED VTTI AUX_A[3:0] AUX_B[3:0] AUX_C[3:0] AUX_D[3:0]

BUFFERED

4 4

4

SWITCH CORE

4

AUX_COM[3:0]

4 06471-001

LOW SPEED UNBUFFERED

AUX_D0

AUX_D1

AUX_D2

AUX_D3

PP_EQ

PP_EN

79

78

77

76

AMUXVCC

80

AUX_C3

82

81

AUX_C2 84

83

AUX_COM1

AUX_C0

AUX_COM0

89

AUX_C1

AUX_B3

90

86

AUX_B2

91

85

AUX_B1 93

92

AUX_COM2

AUX_B0

AUX_COM3

DVEE 95

94

87

AUX_A2

AUX_A3 96

AUX_A1

97

AUX_A0

98

PP_OTO 100

99

Pin Configuration

88

BIDIRECTIONAL

75

AVCC

74

IP_C3

AVCC

1

IN_B0

2

IP_B0

3

73

IN_C3

AVEE

4

72

AVEE IP_C2

PIN 1 INDICATOR

IN_B1

5

71

IP_B1

6

70

IN_C2

VTTI

7

69

VTTI IP_C1

IN_B2

8

68

IP_B2

9

67

IN_C1

AVEE

10

66

AVEE

IN_B3

11

IP_B3

12

65

IP_C0

64

AVCC

13

IN_C0

63

IN_A0

AVCC

14

62

IP_D3

IP_A0

15

61

IN_D3

AVEE

16

60

AVEE IP_D2

AD8197 TOP VIEW (Not to Scale)

49

50

I2C_SCL

I2C_SDA

PP_PRE1

48

46

PP_PRE0

47

45

RESET

DVCC

44

OP3

PP_OCL

42

43

ON3

40

41

39

ON2

OP2

38

DVCC

VTTO

37

AVEE

OP1

51

36

25

ON1

IN_D0

AVEE

35

IP_D0

52

VTTO

53

24

34

23

IP_A3

33

IN_A3

OP0

AVCC

ON0

54

31

22

32

IN_D1

AVCC

DVCC

IP_D1

55

PP_CH1

56

21

30

20

IP_A2

PP_CH0

IN_A2

29

VTTI

DVEE

57

28

19

I2C_ADDR2

IN_D2

VTTI

27

58

26

59

18

I2C_ADDR0

17

IP_A1

I2C_ADDR1

IN_A1

Figure 9-24 Internal block diagram and pin configuration

I_18020_141.eps 190908

9.

EN 179

EN 180

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.11.11 Diagram B09A, ISP1564HL (IC 7N00)

Block Diagram PME# CLK 32

AD[31:0]

C/BE[3:0]#

SCL

SDA

96

99

97 77, 98, 100

7 10, 12 to 15, 20 to 22, 26 to 31, 33, 34, 50 to 54, 56, 57, 59, 62, 63, 65 to 70

PCI CORE

VOLTAGE REGULATOR (Vaux)

32-bit, 33 MHz PCI bus

23, 35, 48, 60 REQ#

9

GNT#

8

IDSEL

24

INTA#

4

FRAME#

36

DEVSEL#

39

IRDY#

37

CLKRUN#

42

PAR

47

PERR#

44

SERR#

45

TRDY#

38

STOP#

41

RST# VCC(IO) VCC(REG) REG(1V8)

5

PCI MASTER

2, 73

VCC(AUX)

AUX(1V8)

Vaux(1V8) core PCI SLAVE

CONFIGURATION SPACE

OHCI (FUNCTION 0)

EHCI (FUNCTION 2)

RAM

RAM

CONFIGURATION FUNCTION 0

81

CONFIGURATION FUNCTION 2

80

RREF

GND _RREF

1, 17, 46, 61, 72, 82, 84, 89, 91

PORT ROUTER

CORE RESET_N

GNDA

POR

11, 25, 40, 55, 71 ATX1

16 18, 43, 58

VCC CORE

VOLTAGE REGULATOR

ORIGINAL USB ATX

ATX2 ORIGINAL USB ATX

Hi-SPEED USB ATX

Hi-SPEED USB ATX

19, 32, 49, 64, 76, 94, 95

6

74

GND

SYS_TUNE

XOSC PLL 90

92 DP2

76 GND

77 VCC(IO)AUX

79 PWE1_N

78 OC1_N

DP1 OC2_N PWE2_N DM2

82 GNDA

83 DM1

84 GNDA

86 VCCA(AUX)

85 DP1

87 OC2_N

89 GNDA

88 PWE2_N

90 DM2

91 GNDA

93 VCCA(AUX)

92 DP2

94 GND

96 SCL

95 GND

97 SDA

99 PME#

98 VCC(IO)AUX

100 VCC(IO)AUX

88

87

85

OC1_N PWE1_N DM1

VCCA(AUX)

Pin Configuration

83

79

80 GND_RREF

78

81 RREF

86, 93

GNDA

1

75 XTAL2

AUX(1V8)

2

74 XTAL1

VCC(AUX)

3

73 AUX(1V8)

INTA#

4

72 GNDA

RST#

5

71 VCC(IO)

SYS_TUNE

6

70 AD[0]

CLK

7

69 AD[1]

GNT#

8

68 AD[2]

REQ#

9

67 AD[3]

AD[31] 10

66 AD[4] 65 AD[5]

VCC(IO) 11

ISP1564HL

AD[30] 12

64 GND

AD[29] 13

63 AD[6]

AD[28] 14

62 AD[7]

AD[27] 15

61 GNDA 60 C/BE[0]#

VCC(REG) 16

59 AD[8]

GNDA 17

58 REG(1V8)

REG(1V8) 18

57 AD[9]

GND 19 AD[26] 20

56 AD[10]

AD[25] 21

55 VCC(IO)

AD[24] 22

54 AD[11]

GND 49

AD[15] 50

C/BE[1]# 48

PAR 47

GNDA 46

SERR# 45

PERR# 44

REG(1V8) 43

CLKRUN# 42

STOP# 41

VCC(IO) 40

DEVSEL# 39

TRDY# 38

C/BE[2]# 35

AD[16] 34

GND 32

AD[17] 33

AD[18] 31

AD[19] 30

51 AD[14]

AD[20] 29

VCC(IO) 25 AD[21] 28

52 AD[13]

AD[23] 26

53 AD[12]

IDSEL 24

AD[22] 27

C/BE[3]# 23

IRDY# 37

75

FRAME# 36

XTAL2

3

ISP1564

VCC(I/O) DETECT XTAL1

VCC(IO)AUX

GLOBAL CONTROL

Figure 9-25 Internal block diagram and pin configuration

H_17650_073.eps 150108

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.11.12 Diagram B09B, DP83816AVNG (IC7N04)

Block Diagram

32 32

15

Data FIFO

4 Tx MAC

32

PCI Bus

32 32

32 32

PCI Bus Interface

Data FIFO

4 Rx MAC

Rx Buffer Manager

32 MIB

32

Rx Filter Pkt Recog Logic

16

Physical Layer Interface

Tx Buffer Manager

SRAM

MAC/BIU

93C46 Serial EEPROM

Boot ROM/ Flash

36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

NC VSS NC AUXVDD VSS TXCLK TXEN CRS COL/MA16 AUXVDD VSS TXD3/MA15 TXD2/MA14 TXD1/MA13 TXD0/MA12 AUXVDD VSS C1 X2 X1 VSS RXDV/MA11 RXER/MA10 RXOE RXD3/MA9 RXD2/MA8 RXD1/MA7 AUXVDD VSS RXD0/MA6 RXCLK MDC MDIO MA5 MA4/EECLK MA3/EEDI

Pin Configuration

Pin1 Identification

DP83816

144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109

MA2/LED100N MA1/LED10N MA0/LEDACTN MD7 MD6 MD5 MD4/EEDO AUXVDD VSS MD3 MD2 MD1/CFGDISN MD0 MWRN MRDN MCSN EESEL RESERVED NC NC NC PWRGOOD 3VAUX AD0 AD1 AD2 AD3 PCIVDD AD4 AD5 VSS AD6 AD7 CBEN0 AD8 AD9

73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108

37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

AD25 AD24 CBEN3 IDSEL VSS AD23 AD22 PCIVDD AD21 AD20 AD19 NC NC AD18 AD17 AD16 CBEN2 VSS FRAMEN IRDYN TRDYN PCIVDD DEVSELN STOPN PERRN SERRN PAR CBEN1 AD15 AD14 VSS AD13 AD12 AD11 PCIVDD AD10

NC VSS IAUXVDD VREF RESERVED NC NC VSS TPRDM TPRDP IAUXVDD REGEN VSS RESERVED VSS VSS TPTDM TPTDP VSS AUXVDD VSS AUXVDD PMEN/CLKRUNN PCICLK INTAN RSTN GNTN REQN VSS AD31 AD30 AD29 PCIVDD AD28 AD27 AD26

Figure 9-26 Internal block diagram and pin configuration

I_17660_148.eps 180308

9.

EN 181

EN 182

9.

Q529.1E LC

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.11.13 Diagram LD3, GM60028 (IC7300)

Block Diagram

I_18020_138.eps 190908

Figure 9-27 Internal block diagram 9.11.14 Diagram M03B, GM68020 (IC7F0A)

Block Diagram

I_18020_139.eps 190908

Figure 9-28 Internal block diagram

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.

9.11.15 Diagram M02A, TPA3120DP (IC7D10)

Block Diagram TPA3120D2 1 F

0.22 F LIN

BSR

RIN

ROUT

1 F

PGNDR PGNDL

1 F BYPASS AGND

470 F

22 H 0.68 F 0.68 F

LOUT 22 H

BSL

470 F

0.22 F

AVCC

PVCCL PVCCR

VCLAMP Shutdown Control

SD

MUTE

1 F

}

GAIN0 GAIN1

Control

Pin Configuration PWP (TSSOP) PACKAGE (TOP VIEW)

PVCCL SD PVCCL MUTE LIN RIN BYPASS AGND AGND PVCCR VCLAMP PVCCR

1 2 3 4 5 6 7 8 9 10 11 12

24 23 22 21 20 19 18 17 16 15 14 13

PGNDL PGNDL LOUT BSL AVCC AVCC GAIN0 GAIN1 BSR ROUT PGNDR PGNDR I_18020_142.eps 190908

Figure 9-29 Internal block diagram and pin configuration

EN 183

EN 184

9.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

Q529.1E LC

9.11.16 Diagram M02B, UDA1334 (IC7D53)

Block Diagram VSSD

VDDD 4

BCK WS DATAI

5

1 2 3

DIGITAL INTERFACE

MUTE DEEM/CLKOUT

10

PLL

DE-EMPHASIS

UDA1334ATS SYSCLK/PLL1

PLL0

6

7

8

11

INTERPOLATION FILTER

9

SFOR1 SFOR0

NOISE SHAPER

VOUTL

DAC

14

DAC

13

15

VDDA

VSSA

16

VOUTR

12 Vref(DAC)

Pin Configuration BCK 1

16 VOUTR

WS 2

15 VSSA

DATAI 3 VDDD 4 VSSD 5 SYSCLK/PLL1 6 SFOR1 7 MUTE 8

14 VOUTL

UDA1334ATS

13 VDDA 12 Vref(DAC) 11 SFOR0 10 PLL0 9

DEEM/CLKOUT

G_16860_081.eps 220207

Figure 9-30 Internal block diagram and pin configuration

Spare Parts List & CTN Overview

10. Spare Parts List & CTN Overview For the latest spare part overview, please consult the Philips Service website. Table 10-1 Sets described in this manual: CTN

Styling

Published in:

42PES0001D/10

Essence

3122 785 18020

42PES0001H/10

Essence

3122 785 18020

11. Revision List Manual xxxx xxx xxxx.0 • First release. Manual xxxx xxx xxxx.1 • All Chapters: various textual changes. • Chapter 1: Specification of SCART connectors changed, specification of HDMI connectors changed. • Chapter 4: Instructions for LCD Panel replacement changed; introduction of one Spare Part Service Kit. • Chapter 5: Contents of CSM changed to reflect current situation. • Chapter 8: Contents of Service Options changed to reflect current situation. Manual xxxx xxx xxxx.2 • Chapter 5: Error codes and FAN selftest description added.

Q529.1E LC

10.

EN 185